mirror of
https://github.com/holub/mame
synced 2025-04-19 23:12:11 +03:00
Grammar police (nw)
This commit is contained in:
parent
1b9a2d8891
commit
c5345b9ea8
@ -301,7 +301,7 @@ uint8_t a2bus_pcxporter_device::read_c800(uint16_t offset)
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case 0x703: // read with increment
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rv = m_ram[m_offset];
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// don't increment if the debugger's reading
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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m_offset++;
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}
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@ -587,7 +587,7 @@ WRITE8_MEMBER( luxor_55_10828_device::ctrl_w )
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*/
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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return;
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// drive selection
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@ -639,7 +639,7 @@ WRITE8_MEMBER( luxor_55_10828_device::status_w )
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*/
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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return;
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m_status = data & 0xfe;
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@ -655,7 +655,7 @@ WRITE8_MEMBER( luxor_55_10828_device::status_w )
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READ8_MEMBER( luxor_55_10828_device::fdc_r )
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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return 0xff;
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uint8_t data = 0xff;
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@ -683,7 +683,7 @@ READ8_MEMBER( luxor_55_10828_device::fdc_r )
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WRITE8_MEMBER( luxor_55_10828_device::fdc_w )
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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return;
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m_fdc->gen_w(offset, data);
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@ -442,7 +442,7 @@ WRITE8_MEMBER( a500_kbd_device::latch_w )
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READ8_MEMBER( a500_kbd_device::counter_r )
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{
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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m_control &= ~COUNTER_OVERFLOW;
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update_irqs();
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@ -130,7 +130,7 @@ READ8_MEMBER(bbc_tube_6502_device::read)
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if (offset >= 0xfef0 && offset <= 0xfeff)
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{
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if (!machine().side_effect_disabled()) m_rom_enabled = false;
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if (!machine().side_effects_disabled()) m_rom_enabled = false;
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data = m_ula->parasite_r(space, offset);
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}
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else if (m_rom_enabled && (offset >= 0xf000))
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@ -130,7 +130,7 @@ READ8_MEMBER(bbc_tube_65c102_device::read)
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if ((offset >= 0xfef0) && (offset <= 0xfeff))
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{
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if (!machine().side_effect_disabled()) m_rom_enabled = false;
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if (!machine().side_effects_disabled()) m_rom_enabled = false;
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data = m_ula->parasite_r(space, offset);
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}
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else if (m_rom_enabled && (offset >= 0xf000))
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@ -145,7 +145,7 @@ READ8_MEMBER(bbc_tube_arm_device::ram_r)
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WRITE8_MEMBER(bbc_tube_arm_device::ram_w)
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{
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/* clear ROM select on first write */
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if (!machine().side_effect_disabled()) m_rom_select = false;
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if (!machine().side_effects_disabled()) m_rom_select = false;
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m_ram->pointer()[offset] = data;
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}
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@ -145,7 +145,7 @@ WRITE8_MEMBER(bbc_tube_z80_device::host_w)
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READ8_MEMBER(bbc_tube_z80_device::opcode_r)
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{
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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if (offset == 0x0066 && m_z80->input_state(INPUT_LINE_NMI))
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m_rom_enabled = true;
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@ -171,7 +171,7 @@ READ8_MEMBER(bbc_tube_zep100_device::io_r)
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{
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uint8_t data = 0xff;
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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m_rom_enabled = !BIT(offset, 2);
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data = m_ppi->read(space, offset & 0x03);
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@ -204,7 +204,7 @@ uint8_t c64_currah_speech_cartridge_device::c64_cd_r(address_space &space, offs_
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data = m_nsp->sby_r() << 7;
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}
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if (!machine().side_effect_disabled() && (offset == 0xa7f0))
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if (!machine().side_effects_disabled() && (offset == 0xa7f0))
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{
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m_game = !m_game;
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m_exrom = !m_exrom;
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@ -115,7 +115,7 @@ WRITE8_MEMBER(imm4_22_device::rom_out)
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READ8_MEMBER(imm4_22_device::rom_in)
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{
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// GPIO read - hooking this up would be a pain with MAME as it is
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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logerror("ROM %u in\n", (m_rom_page << 2) | ((offset >> 4) & 0x03U));
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return 0x0fU;
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}
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@ -959,7 +959,7 @@ READ8_MEMBER( isa8_ega_device::read )
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{
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uint8_t data = 0xFF;
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if ( !machine().side_effect_disabled() && ! ( m_sequencer.data[4] & 0x04 ) )
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if ( !machine().side_effects_disabled() && ! ( m_sequencer.data[4] & 0x04 ) )
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{
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/* Fill read latches */
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m_read_latch[0] = m_plane[0][offset & 0xffff];
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@ -16,7 +16,7 @@ DEFINE_DEVICE_TYPE(ISA16_SB16, sb16_lle_device, "sb16", "SoundBlaster 16 Audio A
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READ8_MEMBER( sb16_lle_device::dsp_data_r )
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{
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if(!machine().side_effect_disabled())
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if(!machine().side_effects_disabled())
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m_data_in = false;
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return m_in_byte;
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@ -77,7 +77,7 @@ READ8_MEMBER(msx_cart_holy_quran_device::read_cart)
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// The decryption should actually start working after the first M1 cycle executing something
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// from the cartridge.
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if (offset == ((m_rom[3] << 8) | m_rom[2]) && !machine().side_effect_disabled())
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if (offset == ((m_rom[3] << 8) | m_rom[2]) && !machine().side_effects_disabled())
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{
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m_decrypt = true;
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}
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@ -108,7 +108,7 @@ READ8_MEMBER(spectrum_intf1_device::mreq_r)
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uint8_t temp;
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uint8_t data = 0xff;
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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if (offset == 0x0008 || offset == 0x1708)
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m_romcs = 1;
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@ -88,7 +88,7 @@ READ8_MEMBER(spectrum_usource_device::mreq_r)
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{
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uint8_t data;
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if (!machine().side_effect_disabled() && (offset == 0x2bae))
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if (!machine().side_effects_disabled() && (offset == 0x2bae))
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{
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m_romcs = !m_romcs;
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}
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@ -111,7 +111,7 @@ READ8_MEMBER(spectrum_uspeech_device::mreq_r)
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{
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uint8_t data;
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if (!machine().side_effect_disabled() && (offset == 0x38))
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if (!machine().side_effects_disabled() && (offset == 0x38))
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{
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m_romcs = !m_romcs;
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}
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@ -634,7 +634,7 @@ READ8_MEMBER( mainboard8_device::read )
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uint8_t value = 0;
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const char* what;
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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return debugger_read(space, offset);
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}
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@ -832,7 +832,7 @@ WRITE8_MEMBER( mainboard8_device::write )
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m_latched_data = data;
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m_pending_write = true;
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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return debugger_write(space, offset, data);
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}
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@ -335,7 +335,7 @@ READ16_MEMBER( datamux_device::read )
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uint16_t value = 0;
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// Care for debugger
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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return debugger_read(space, offset);
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}
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@ -384,7 +384,7 @@ READ16_MEMBER( datamux_device::read )
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*/
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WRITE16_MEMBER( datamux_device::write )
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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debugger_write(space, offset, data);
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return;
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@ -497,7 +497,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
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decdata debug;
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// For the debugger, do the decoding here with no wait states
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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if (m_cpu->is_onchip(offset)) return m_cpu->debug_read_onchip_memory(offset&0xff);
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dec = &debug;
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@ -514,7 +514,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
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switch (dec->function)
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{
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case MLGVIDEO:
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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value = m_video->read(space, dec->offset>>1);
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LOGMASKED(LOG_READ, "Read video %04x -> %02x\n", dec->offset, value);
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@ -532,7 +532,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
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case MLGKEY:
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// key
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if (!machine().side_effect_disabled()) value = m_keyboard->get_recent_key();
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if (!machine().side_effects_disabled()) value = m_keyboard->get_recent_key();
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LOGMASKED(LOG_READ, "Read keyboard -> %02x\n", value);
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break;
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@ -552,7 +552,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
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case MLTKEY:
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// key
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if (!machine().side_effect_disabled()) value = m_keyboard->get_recent_key();
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if (!machine().side_effects_disabled()) value = m_keyboard->get_recent_key();
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LOGMASKED(LOG_READ, "Read keyboard -> %02x\n", value);
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break;
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@ -574,7 +574,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
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// video
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// ++++ ++-- ---- ---+
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// 1000 1000 0000 00x0
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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value = m_video->read(space, dec->offset>>1);
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LOGMASKED(LOG_READ, "Read video %04x -> %02x\n", dec->offset, value);
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@ -597,7 +597,7 @@ READ8_MEMBER( geneve_mapper_device::readm )
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// grom simulation
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// ++++ ++-- ---- ---+
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// 1001 1000 0000 00x0
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if (!machine().side_effect_disabled()) value = read_grom(space, dec->offset, 0xff);
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if (!machine().side_effects_disabled()) value = read_grom(space, dec->offset, 0xff);
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LOGMASKED(LOG_READ, "Read GROM %04x -> %02x\n", dec->offset, value);
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break;
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@ -684,7 +684,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
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decdata debug;
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// For the debugger, do the decoding here with no wait states
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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dec = &debug;
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m_debug_no_ws = true;
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@ -704,7 +704,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
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// ++++ ++++ ++++ ---+
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// 1111 0001 0000 .cc0
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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m_video->write(space, dec->offset>>1, data);
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LOGMASKED(LOG_WRITE, "Write video %04x <- %02x\n", offset, data);
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@ -750,7 +750,7 @@ WRITE8_MEMBER( geneve_mapper_device::writem )
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// ++++ ++-- ---- ---+
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// 1000 1100 0000 00c0
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// Initialize waitstate timer
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if (!machine().side_effect_disabled())
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if (!machine().side_effects_disabled())
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{
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m_video->write(space, dec->offset>>1, data);
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LOGMASKED(LOG_WRITE, "Write video %04x <- %02x\n", offset, data);
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@ -140,7 +140,7 @@ WRITE_LINE_MEMBER( snug_bwg_device::fdc_drq_w )
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SETADDRESS_DBIN_MEMBER( snug_bwg_device::setaddress_dbin )
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{
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// Do not allow setaddress for debugger
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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// Selection login in the PAL and some circuits on the board
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@ -219,7 +219,7 @@ void snug_bwg_device::debug_write(offs_t offset, uint8_t data)
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*/
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READ8Z_MEMBER(snug_bwg_device::readz)
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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debug_read(offset, value);
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return;
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@ -289,7 +289,7 @@ READ8Z_MEMBER(snug_bwg_device::readz)
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*/
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WRITE8_MEMBER(snug_bwg_device::write)
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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debug_write(offset, data);
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return;
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@ -75,7 +75,7 @@ SETADDRESS_DBIN_MEMBER( snug_enhanced_video_device::setaddress_dbin )
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{
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// Do not allow setaddress for the debugger. It will mess up the
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// setaddress/memory access pairs when the CPU enters wait states.
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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if (TRACE_ADDRESS) logerror("set address %04x, %s\n", offset, (state==ASSERT_LINE)? "read" : "write");
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@ -110,7 +110,7 @@ SETADDRESS_DBIN_MEMBER( myarc_hfdc_device::setaddress_dbin )
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{
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// Do not allow setaddress for the debugger. It will mess up the
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// setaddress/memory access pairs when the CPU enters wait states.
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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// Selection login in the PAL and some circuits on the board
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@ -202,7 +202,7 @@ void myarc_hfdc_device::debug_write(offs_t offset, uint8_t data)
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*/
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READ8Z_MEMBER(myarc_hfdc_device::readz)
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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debug_read(offset, value);
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return;
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@ -281,7 +281,7 @@ READ8Z_MEMBER(myarc_hfdc_device::readz)
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*/
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WRITE8_MEMBER( myarc_hfdc_device::write )
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{
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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debug_write(offset, data);
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return;
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@ -347,7 +347,7 @@ void snug_high_speed_gpl_device::cartspace_readz(address_space& space, offs_t of
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*/
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void snug_high_speed_gpl_device::grom_readz(address_space& space, offs_t offset, uint8_t* value, uint8_t mem_mask)
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{
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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//activedevice_adjust_icount(-4);
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@ -533,7 +533,7 @@ void snug_high_speed_gpl_device::cartspace_write(address_space& space, offs_t of
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*/
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void snug_high_speed_gpl_device::grom_write(address_space& space, offs_t offset, uint8_t data, uint8_t mem_mask)
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{
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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//activedevice_adjust_icount(-4);
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@ -160,7 +160,7 @@ void ti_pcode_card_device::debugger_read(address_space& space, uint16_t offset,
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READ8Z_MEMBER( ti_pcode_card_device::readz )
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{
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// Care for debugger
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if (machine().side_effect_disabled())
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if (machine().side_effects_disabled())
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{
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debugger_read(space, offset, *value);
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}
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@ -203,7 +203,7 @@ READ8Z_MEMBER( ti_pcode_card_device::readz )
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*/
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WRITE8_MEMBER( ti_pcode_card_device::write )
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{
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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if (m_active && m_isgrom && m_selected)
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{
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for (auto & elem : m_grom) elem->write(space, m_address, data);
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@ -51,7 +51,7 @@ ti_speech_synthesizer_device::ti_speech_synthesizer_device(const machine_config
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READ8Z_MEMBER( ti_speech_synthesizer_device::readz )
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{
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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if (m_sbe)
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{
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@ -70,7 +70,7 @@ READ8Z_MEMBER( ti_speech_synthesizer_device::readz )
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*/
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WRITE8_MEMBER( ti_speech_synthesizer_device::write )
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{
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if (machine().side_effect_disabled()) return;
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if (machine().side_effects_disabled()) return;
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if (m_sbe)
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{
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@ -147,7 +147,7 @@ void ti_fdc_device::debug_read(offs_t offset, uint8_t* value)
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READ8Z_MEMBER(ti_fdc_device::readz)
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{
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if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
{
|
||||
debug_read(offset, value);
|
||||
return;
|
||||
@ -161,7 +161,7 @@ READ8Z_MEMBER(ti_fdc_device::readz)
|
||||
|
||||
if (m_WDsel && ((m_address & 9)==0))
|
||||
{
|
||||
if (!machine().side_effect_disabled()) reply = m_fd1771->gen_r((offset >> 1)&0x03);
|
||||
if (!machine().side_effects_disabled()) reply = m_fd1771->gen_r((offset >> 1)&0x03);
|
||||
if (TRACE_DATA)
|
||||
{
|
||||
if ((m_address & 0xffff)==0x5ff6)
|
||||
@ -188,7 +188,7 @@ READ8Z_MEMBER(ti_fdc_device::readz)
|
||||
|
||||
WRITE8_MEMBER(ti_fdc_device::write)
|
||||
{
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
if (m_inDsrArea && m_selected)
|
||||
{
|
||||
@ -206,7 +206,7 @@ WRITE8_MEMBER(ti_fdc_device::write)
|
||||
{
|
||||
// As this is a memory-mapped access we must prevent the debugger
|
||||
// from messing with the operation
|
||||
if (!machine().side_effect_disabled()) m_fd1771->gen_w((offset >> 1)&0x03, data);
|
||||
if (!machine().side_effects_disabled()) m_fd1771->gen_w((offset >> 1)&0x03, data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -131,7 +131,7 @@ WRITE8_MEMBER(nouspikel_ide_interface_device::cruwrite)
|
||||
READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
|
||||
{
|
||||
uint8_t reply = 0;
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
if (((offset & m_select_mask)==m_select_value) && m_selected)
|
||||
{
|
||||
@ -197,7 +197,7 @@ READ8Z_MEMBER(nouspikel_ide_interface_device::readz)
|
||||
*/
|
||||
WRITE8_MEMBER(nouspikel_ide_interface_device::write)
|
||||
{
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
if (((offset & m_select_mask)==m_select_value) && m_selected)
|
||||
{
|
||||
|
@ -185,7 +185,7 @@ WRITE8_MEMBER(nouspikel_usb_smartmedia_device::cruwrite)
|
||||
*/
|
||||
READ8Z_MEMBER(nouspikel_usb_smartmedia_device::readz)
|
||||
{
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
if (((offset & m_select_mask)==m_select_value) && m_selected)
|
||||
{
|
||||
@ -236,7 +236,7 @@ READ8Z_MEMBER(nouspikel_usb_smartmedia_device::readz)
|
||||
*/
|
||||
WRITE8_MEMBER(nouspikel_usb_smartmedia_device::write)
|
||||
{
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
if (((offset & m_select_mask)==m_select_value) && m_selected)
|
||||
{
|
||||
|
@ -357,7 +357,7 @@ READ8_MEMBER(a26_rom_f4_device::read_rom)
|
||||
}
|
||||
|
||||
// update banks
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -423,7 +423,7 @@ READ8_MEMBER(a26_rom_f6_device::read_rom)
|
||||
}
|
||||
|
||||
// update banks
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -481,7 +481,7 @@ READ8_MEMBER(a26_rom_f8_device::read_rom)
|
||||
}
|
||||
|
||||
// update banks
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -537,7 +537,7 @@ READ8_MEMBER(a26_rom_fa_device::read_rom)
|
||||
}
|
||||
|
||||
// update banks
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -605,7 +605,7 @@ READ8_MEMBER(a26_rom_fe_device::read_rom)
|
||||
|
||||
data = m_rom[offset + (m_base_bank * 0x1000)];
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (m_trigger_on_next_access)
|
||||
{
|
||||
@ -630,7 +630,7 @@ READ8_MEMBER(a26_rom_fe_device::read_bank)
|
||||
{
|
||||
uint8_t data = space.read_byte(0xfe + offset);
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
switch (offset & 1)
|
||||
{
|
||||
@ -654,7 +654,7 @@ READ8_MEMBER(a26_rom_fe_device::read_bank)
|
||||
WRITE8_MEMBER(a26_rom_fe_device::write_bank)
|
||||
{
|
||||
space.write_byte(0xfe, data);
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// The next byte on the data bus determines which bank to switch to
|
||||
m_trigger_on_next_access = 1;
|
||||
@ -740,7 +740,7 @@ WRITE8_MEMBER(a26_rom_3f_device::write_bank)
|
||||
READ8_MEMBER(a26_rom_e0_device::read_rom)
|
||||
{
|
||||
// update banks
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (offset >= 0xfe0 && offset <= 0xff8)
|
||||
m_base_banks[(offset >> 3) & 3] = offset & 7;
|
||||
@ -779,7 +779,7 @@ WRITE8_MEMBER(a26_rom_e0_device::write_bank)
|
||||
READ8_MEMBER(a26_rom_e7_device::read_rom)
|
||||
{
|
||||
// update banks
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (offset >= 0xfe0 && offset <= 0xfe7)
|
||||
m_base_bank = offset - 0xfe0;
|
||||
@ -845,7 +845,7 @@ READ8_MEMBER(a26_rom_ua_device::read_rom)
|
||||
|
||||
READ8_MEMBER(a26_rom_ua_device::read_bank)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_base_bank = offset >> 6;
|
||||
|
||||
return 0;
|
||||
@ -900,7 +900,7 @@ WRITE8_MEMBER(a26_rom_cv_device::write_bank)
|
||||
|
||||
READ8_MEMBER(a26_rom_dc_device::read_rom)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (offset == 0xff0)
|
||||
m_base_bank = (m_base_bank + 1) & 0x0f;
|
||||
@ -930,7 +930,7 @@ WRITE8_MEMBER(a26_rom_dc_device::write_bank)
|
||||
|
||||
READ8_MEMBER(a26_rom_fv_device::read_rom)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (offset == 0xfd0)
|
||||
{
|
||||
@ -1014,7 +1014,7 @@ READ8_MEMBER(a26_rom_4in1_device::read_rom)
|
||||
|
||||
READ8_MEMBER(a26_rom_8in1_device::read_rom)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
|
@ -111,7 +111,7 @@ inline uint8_t a26_rom_ss_device::read_byte(uint32_t offset)
|
||||
|
||||
READ8_MEMBER(a26_rom_ss_device::read_rom)
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return read_byte(offset);
|
||||
|
||||
// Bankswitch
|
||||
|
@ -242,7 +242,7 @@ READ16_MEMBER( alto2_cpu_device::utilin_r )
|
||||
|
||||
data = m_hw.utilin;
|
||||
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_HW,2," UTILIN rd %#o (%#o)\n", offset, data));
|
||||
}
|
||||
return data;
|
||||
@ -258,7 +258,7 @@ READ16_MEMBER( alto2_cpu_device::xbus_r )
|
||||
{
|
||||
uint16_t data = m_hw.xbus[offset & 3];
|
||||
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_HW,2," XBUS[%d] rd %#o (%#o)\n", offset & 3, offset, data));
|
||||
}
|
||||
return data;
|
||||
@ -274,7 +274,7 @@ READ16_MEMBER( alto2_cpu_device::xbus_r )
|
||||
*/
|
||||
WRITE16_MEMBER( alto2_cpu_device::xbus_w )
|
||||
{
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_HW,2," XBUS[%d] wr %#o (%#o)\n", offset & 3, offset, data));
|
||||
}
|
||||
m_hw.xbus[offset&3] = data;
|
||||
@ -289,7 +289,7 @@ WRITE16_MEMBER( alto2_cpu_device::xbus_w )
|
||||
READ16_MEMBER( alto2_cpu_device::utilout_r )
|
||||
{
|
||||
uint16_t data = m_hw.utilout ^ 0177777;
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,0,2," UTILOUT rd %#o (%#o)\n", offset, data));
|
||||
}
|
||||
return data;
|
||||
@ -305,7 +305,7 @@ READ16_MEMBER( alto2_cpu_device::utilout_r )
|
||||
*/
|
||||
WRITE16_MEMBER( alto2_cpu_device::utilout_w )
|
||||
{
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_HW,2," UTILOUT wr %#o (%#o)\n", offset, data));
|
||||
}
|
||||
m_hw.utilout = data ^ 0177777;
|
||||
|
@ -32,11 +32,11 @@ READ16_MEMBER( alto2_cpu_device::kbd_ad_r )
|
||||
break;
|
||||
}
|
||||
m_kbd.matrix[offset & 03] = data;
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_KBD,2," read KBDAD+%o (%#o)\n", offset & 3, data));
|
||||
}
|
||||
if (0 == (offset & 3) && (m_kbd.bootkey != 0177777)) {
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,0,2," boot keys (%#o & %#o)\n", data, m_kbd.bootkey));
|
||||
}
|
||||
data &= m_kbd.bootkey;
|
||||
|
@ -485,7 +485,7 @@ uint32_t alto2_cpu_device::hamming_code(bool write, uint32_t dw_addr, uint32_t d
|
||||
READ16_MEMBER( alto2_cpu_device::mear_r )
|
||||
{
|
||||
int data = m_mem.error ? m_mem.mear : m_mem.mar;
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_MEM,2," MEAR read %07o\n", data));
|
||||
}
|
||||
return data;
|
||||
@ -510,7 +510,7 @@ READ16_MEMBER( alto2_cpu_device::mear_r )
|
||||
READ16_MEMBER( alto2_cpu_device::mesr_r )
|
||||
{
|
||||
uint16_t data = m_mem.mesr ^ 0177777;
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_MEM,2," MESR read %07o\n", data));
|
||||
LOG((this,LOG_MEM,6," Hamming code read : %#o\n", GET_MESR_HAMMING(data)));
|
||||
LOG((this,LOG_MEM,6," Parity error : %o\n", GET_MESR_PERR(data)));
|
||||
@ -523,7 +523,7 @@ READ16_MEMBER( alto2_cpu_device::mesr_r )
|
||||
|
||||
WRITE16_MEMBER( alto2_cpu_device::mesr_w )
|
||||
{
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_MEM,2," MESR write %07o (clear MESR; was %07o)\n", data, m_mem.mesr));
|
||||
m_mem.mesr = 0; // set all bits to 0
|
||||
m_mem.error = 0; // reset the error flag
|
||||
@ -558,7 +558,7 @@ WRITE16_MEMBER( alto2_cpu_device::mecr_w )
|
||||
// clear spare bits
|
||||
X_WRBITS(m_mem.mecr,16, 0, 3,0);
|
||||
X_WRBITS(m_mem.mecr,16,15,15,0);
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_MEM,2," MECR write %07o\n", data));
|
||||
LOG((this,LOG_MEM,6," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(m_mem.mecr)));
|
||||
LOG((this,LOG_MEM,6," Test mode : %s\n", GET_MECR_TEST_MODE(m_mem.mecr) ? "on" : "off"));
|
||||
@ -575,7 +575,7 @@ READ16_MEMBER( alto2_cpu_device::mecr_r )
|
||||
{
|
||||
uint16_t data = m_mem.mecr ^ 0177777;
|
||||
// all spare bits are set
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
LOG((this,LOG_MEM,2," MECR read %07o\n", data));
|
||||
LOG((this,LOG_MEM,6," Test Hamming code : %#o\n", GET_MECR_TEST_CODE(data)));
|
||||
LOG((this,LOG_MEM,6," Test mode : %s\n", GET_MECR_TEST_MODE(data) ? "on" : "off"));
|
||||
@ -772,7 +772,7 @@ uint16_t alto2_cpu_device::debug_read_mem(uint32_t addr)
|
||||
int base_addr = addr & 0177777;
|
||||
int data;
|
||||
if (addr >= ALTO2_IO_PAGE_BASE && addr < ALTO2_RAM_SIZE) {
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
data = m_iomem->read_word(m_iomem->address_to_byte(base_addr));
|
||||
} else {
|
||||
data = (addr & ALTO2_MEM_ODD) ? GET_ODD(m_mem.ram[addr/2]) : GET_EVEN(m_mem.ram[addr/2]);
|
||||
@ -790,7 +790,7 @@ void alto2_cpu_device::debug_write_mem(uint32_t addr, uint16_t data)
|
||||
{
|
||||
int base_addr = addr & 0177777;
|
||||
if (addr >= ALTO2_IO_PAGE_BASE && addr < ALTO2_RAM_SIZE) {
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
m_iomem->write_word(m_iomem->address_to_byte(base_addr), data);
|
||||
} else if (addr & ALTO2_MEM_ODD) {
|
||||
PUT_ODD(m_mem.ram[addr/2], data);
|
||||
|
@ -1326,13 +1326,13 @@ void cop400_cpu_device::set_flags(uint8_t flags)
|
||||
|
||||
uint8_t cop400_cpu_device::get_m() const
|
||||
{
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
return RAM_R(B);
|
||||
}
|
||||
|
||||
void cop400_cpu_device::set_m(uint8_t m)
|
||||
{
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
RAM_W(B, m);
|
||||
}
|
||||
|
||||
|
@ -629,7 +629,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
|
||||
{
|
||||
// irq flags are reset(acked) when read
|
||||
u8 flag = m_irqflag[offset];
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_irqflag[offset] = 0;
|
||||
return flag;
|
||||
}
|
||||
@ -706,7 +706,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
logerror("%s unknown io_r from $0F%02X at $%04X\n", tag(), offset, m_prev_pc);
|
||||
break;
|
||||
}
|
||||
|
@ -916,7 +916,7 @@ WRITE8_MEMBER(lc8670_cpu_device::mram_w)
|
||||
|
||||
READ8_MEMBER(lc8670_cpu_device::xram_r)
|
||||
{
|
||||
if (!(REG_VCCR & 0x40) || machine().side_effect_disabled()) // XRAM access enabled
|
||||
if (!(REG_VCCR & 0x40) || machine().side_effects_disabled()) // XRAM access enabled
|
||||
{
|
||||
uint8_t * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
|
||||
|
||||
@ -939,7 +939,7 @@ READ8_MEMBER(lc8670_cpu_device::xram_r)
|
||||
|
||||
WRITE8_MEMBER(lc8670_cpu_device::xram_w)
|
||||
{
|
||||
if (!(REG_VCCR & 0x40) || machine().side_effect_disabled()) // XRAM access enabled
|
||||
if (!(REG_VCCR & 0x40) || machine().side_effects_disabled()) // XRAM access enabled
|
||||
{
|
||||
uint8_t * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
|
||||
|
||||
@ -979,7 +979,7 @@ READ8_MEMBER(lc8670_cpu_device::regs_r)
|
||||
case 0x66:
|
||||
{
|
||||
uint8_t data = m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff];
|
||||
if (!machine().side_effect_disabled() && (REG_VSEL & 0x10))
|
||||
if (!machine().side_effects_disabled() && (REG_VSEL & 0x10))
|
||||
{
|
||||
uint16_t vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1;
|
||||
REG_VRMAD1 = vrmad & 0xff;
|
||||
@ -991,7 +991,7 @@ READ8_MEMBER(lc8670_cpu_device::regs_r)
|
||||
// write-only registers
|
||||
case 0x20: case 0x23: case 0x24: case 0x27:
|
||||
case 0x45: case 0x46: case 0x4d:
|
||||
if(!machine().side_effect_disabled()) logerror("%s: read write-only SFR %04x\n", machine().describe_context(), offset);
|
||||
if(!machine().side_effects_disabled()) logerror("%s: read write-only SFR %04x\n", machine().describe_context(), offset);
|
||||
return 0xff;
|
||||
}
|
||||
return m_sfr[offset];
|
||||
@ -1046,7 +1046,7 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w)
|
||||
break;
|
||||
case 0x66:
|
||||
m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff] = data;
|
||||
if (!machine().side_effect_disabled() && (REG_VSEL & 0x10))
|
||||
if (!machine().side_effects_disabled() && (REG_VSEL & 0x10))
|
||||
{
|
||||
uint16_t vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1;
|
||||
REG_VRMAD1 = vrmad & 0xff;
|
||||
@ -1060,7 +1060,7 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w)
|
||||
|
||||
// read-only registers
|
||||
case 0x12: case 0x14: case 0x5c:
|
||||
if(!machine().side_effect_disabled()) logerror("%s: write read-only SFR %04x = %02x\n", machine().describe_context(), offset, data);
|
||||
if(!machine().side_effects_disabled()) logerror("%s: write read-only SFR %04x = %02x\n", machine().describe_context(), offset, data);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -847,7 +847,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_P3DATA:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (m_p3csr_is3_flag_read)
|
||||
{
|
||||
@ -868,7 +868,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
data = (m_io->read_byte(M6801_PORT3) & (m_port3_ddr ^ 0xff))
|
||||
| (m_port3_data & m_port3_ddr);
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_port3_latched = 0;
|
||||
|
||||
@ -893,7 +893,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_CH:
|
||||
if(!(m_pending_tcsr&TCSR_TOF) && !machine().side_effect_disabled())
|
||||
if(!(m_pending_tcsr&TCSR_TOF) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_tcsr &= ~TCSR_TOF;
|
||||
MODIFIED_tcsr;
|
||||
@ -906,7 +906,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
// HACK there should be a break here, but Coleco Adam won't boot with it present, proper fix required to the free-running counter
|
||||
|
||||
case IO_OCRH:
|
||||
if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effect_disabled())
|
||||
if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_tcsr &= ~TCSR_OCF;
|
||||
MODIFIED_tcsr;
|
||||
@ -915,7 +915,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_OCRL:
|
||||
if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effect_disabled())
|
||||
if(!(m_pending_tcsr&TCSR_OCF) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_tcsr &= ~TCSR_OCF;
|
||||
MODIFIED_tcsr;
|
||||
@ -924,7 +924,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_ICRH:
|
||||
if(!(m_pending_tcsr&TCSR_ICF) && !machine().side_effect_disabled())
|
||||
if(!(m_pending_tcsr&TCSR_ICF) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_tcsr &= ~TCSR_ICF;
|
||||
MODIFIED_tcsr;
|
||||
@ -937,7 +937,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_P3CSR:
|
||||
if ((m_p3csr & M6801_P3CSR_IS3_FLAG) && !machine().side_effect_disabled())
|
||||
if ((m_p3csr & M6801_P3CSR_IS3_FLAG) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_p3csr_is3_flag_read = 1;
|
||||
}
|
||||
@ -950,7 +950,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_TRCSR:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (m_trcsr & M6801_TRCSR_TDRE)
|
||||
{
|
||||
@ -972,7 +972,7 @@ READ8_MEMBER( m6801_cpu_device::m6801_io_r )
|
||||
break;
|
||||
|
||||
case IO_RDR:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (m_trcsr_read_orfe)
|
||||
{
|
||||
|
@ -168,7 +168,7 @@ void m68hc05_device::set_port_interrupt(std::array<u8, PORT_COUNT> const &interr
|
||||
READ8_MEMBER(m68hc05_device::port_r)
|
||||
{
|
||||
offset &= PORT_COUNT - 1;
|
||||
if (!machine().side_effect_disabled() && !m_port_cb_r[offset].isnull())
|
||||
if (!machine().side_effects_disabled() && !m_port_cb_r[offset].isnull())
|
||||
{
|
||||
u8 const newval(m_port_cb_r[offset](space, 0, ~m_port_ddr[offset] & m_port_bits[offset]) & m_port_bits[offset]);
|
||||
u8 const diff(newval ^ m_port_input[offset]);
|
||||
@ -252,7 +252,7 @@ WRITE8_MEMBER(m68hc05_device::tcr_w)
|
||||
|
||||
READ8_MEMBER(m68hc05_device::tsr_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
u8 const events(m_tsr & ~m_tsr_seen);
|
||||
if (events)
|
||||
@ -271,7 +271,7 @@ READ8_MEMBER(m68hc05_device::icr_r)
|
||||
// reading ICRL after reading TCR with ICF set clears ICF
|
||||
|
||||
u8 const low(BIT(offset, 0));
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (low)
|
||||
{
|
||||
@ -299,7 +299,7 @@ READ8_MEMBER(m68hc05_device::ocr_r)
|
||||
// reading OCRL after reading TCR with OCF set clears OCF
|
||||
|
||||
u8 const low(BIT(offset, 0));
|
||||
if (!machine().side_effect_disabled() && low && BIT(m_tsr_seen, 6))
|
||||
if (!machine().side_effects_disabled() && low && BIT(m_tsr_seen, 6))
|
||||
{
|
||||
LOGTIMER("read OCRL, clear OCF\n");
|
||||
m_tsr &= 0xbf;
|
||||
@ -315,7 +315,7 @@ WRITE8_MEMBER(m68hc05_device::ocr_w)
|
||||
// writing OCRL after reading TCR with OCF set clears OCF
|
||||
|
||||
u8 const low(BIT(offset, 0));
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (low)
|
||||
{
|
||||
@ -349,7 +349,7 @@ READ8_MEMBER(m68hc05_device::timer_r)
|
||||
u8 const alt(BIT(offset, 1));
|
||||
if (low)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
if (m_trl_latched[alt]) LOGTIMER("read %sTRL, read sequence complete\n", alt ? "A" : "");
|
||||
m_trl_latched[alt] = false;
|
||||
@ -365,7 +365,7 @@ READ8_MEMBER(m68hc05_device::timer_r)
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!machine().side_effect_disabled() && !m_trl_latched[alt])
|
||||
if (!machine().side_effects_disabled() && !m_trl_latched[alt])
|
||||
{
|
||||
LOGTIMER("read %sTRH, latch %sTRL\n", alt ? "A" : "", alt ? "A" : "");
|
||||
m_trl_latched[alt] = true;
|
||||
|
@ -203,14 +203,14 @@ static const uint32_t mtc0_writemask[]=
|
||||
|
||||
READ32_MEMBER( psxcpu_device::berr_r )
|
||||
{
|
||||
if( !machine().side_effect_disabled() )
|
||||
if( !machine().side_effects_disabled() )
|
||||
m_berr = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( psxcpu_device::berr_w )
|
||||
{
|
||||
if( !machine().side_effect_disabled() )
|
||||
if( !machine().side_effects_disabled() )
|
||||
m_berr = 1;
|
||||
}
|
||||
|
||||
|
@ -260,7 +260,7 @@ READ32_MEMBER( adsp21062_device::iop_r)
|
||||
return m_core->dma_status;
|
||||
}
|
||||
default:
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
fatalerror("sharc_iop_r: Unimplemented IOP reg %02X at %08X\n", offset, m_core->pc);
|
||||
|
||||
return 0;
|
||||
|
@ -518,7 +518,7 @@ READ16_MEMBER( tms32051_device::cpuregs_r )
|
||||
return m_io->read_word(offset);
|
||||
|
||||
default:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
fatalerror("32051: cpuregs_r: unimplemented memory-mapped register %02X at %04X\n", offset, m_pc-1);
|
||||
}
|
||||
|
||||
@ -630,7 +630,7 @@ WRITE16_MEMBER( tms32051_device::cpuregs_w )
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
fatalerror("32051: cpuregs_w: unimplemented memory-mapped register %02X, data %04X at %04X\n", offset, data, m_pc-1);
|
||||
}
|
||||
}
|
||||
|
@ -511,7 +511,7 @@ READ8_MEMBER(tms7000_device::tms7000_pf_r)
|
||||
{
|
||||
// note: port B is write-only, reading it returns the output value as if ddr is 0xff
|
||||
int port = offset / 2 - 2;
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
return (m_port_in_cb[port]() & ~m_port_ddr[port]) | (m_port_latch[port] & m_port_ddr[port]);
|
||||
break;
|
||||
}
|
||||
@ -521,7 +521,7 @@ READ8_MEMBER(tms7000_device::tms7000_pf_r)
|
||||
return m_port_ddr[offset / 2 - 2];
|
||||
|
||||
default:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
logerror("'%s' (%04X): tms7000_pf_r @ $%04x\n", tag(), m_pc, offset);
|
||||
break;
|
||||
}
|
||||
|
@ -63,7 +63,7 @@ public:
|
||||
template<class Object>
|
||||
static devcb_base &set_port_write_cb(device_t &device, int p, Object &&object) { return downcast<tms7000_device &>(device).m_port_out_cb[p].set_callback(std::move(object)); }
|
||||
|
||||
DECLARE_READ8_MEMBER(tms7000_unmapped_rf_r) { if (!machine().side_effect_disabled()) logerror("'%s' (%04X): unmapped_rf_r @ $%04x\n", tag(), m_pc, offset + 0x80); return 0; };
|
||||
DECLARE_READ8_MEMBER(tms7000_unmapped_rf_r) { if (!machine().side_effects_disabled()) logerror("'%s' (%04X): unmapped_rf_r @ $%04x\n", tag(), m_pc, offset + 0x80); return 0; };
|
||||
DECLARE_WRITE8_MEMBER(tms7000_unmapped_rf_w) { logerror("'%s' (%04X): unmapped_rf_w @ $%04x = $%02x\n", tag(), m_pc, offset + 0x80, data); };
|
||||
|
||||
DECLARE_READ8_MEMBER(tms7000_pf_r);
|
||||
@ -349,7 +349,7 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(dockbus_data_w);
|
||||
|
||||
// access I/O port E if databus is disabled
|
||||
DECLARE_READ8_MEMBER(e_bus_data_r) { return machine().side_effect_disabled() ? 0xff : ((m_control & 0x20) ? 0xff : m_port_in_cb[4]()); }
|
||||
DECLARE_READ8_MEMBER(e_bus_data_r) { return machine().side_effects_disabled() ? 0xff : ((m_control & 0x20) ? 0xff : m_port_in_cb[4]()); }
|
||||
DECLARE_WRITE8_MEMBER(e_bus_data_w) { if (~m_control & 0x20) m_port_out_cb[4](data); }
|
||||
|
||||
void tms70c46_mem(address_map &map);
|
||||
|
@ -421,7 +421,7 @@ void tms99xx_device::state_string_export(const device_state_entry &entry, std::s
|
||||
uint16_t tms99xx_device::read_workspace_register_debug(int reg)
|
||||
{
|
||||
int temp = m_icount;
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
uint16_t value = m_prgspace->read_word((WP+(reg<<1)) & m_prgaddr_mask & 0xfffe);
|
||||
m_icount = temp;
|
||||
return value;
|
||||
@ -430,7 +430,7 @@ uint16_t tms99xx_device::read_workspace_register_debug(int reg)
|
||||
void tms99xx_device::write_workspace_register_debug(int reg, uint16_t data)
|
||||
{
|
||||
int temp = m_icount;
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
m_prgspace->write_word((WP+(reg<<1)) & m_prgaddr_mask & 0xfffe, data);
|
||||
m_icount = temp;
|
||||
}
|
||||
|
@ -437,7 +437,7 @@ uint16_t tms9995_device::read_workspace_register_debug(int reg)
|
||||
}
|
||||
else
|
||||
{
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
value = (m_prgspace->read_byte(addrb) << 8) & 0xff00;
|
||||
value |= m_prgspace->read_byte(addrb+1);
|
||||
}
|
||||
@ -457,7 +457,7 @@ void tms9995_device::write_workspace_register_debug(int reg, uint16_t data)
|
||||
}
|
||||
else
|
||||
{
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
m_prgspace->write_byte(addrb, (data >> 8) & 0xff);
|
||||
m_prgspace->write_byte(addrb+1, data & 0xff);
|
||||
}
|
||||
|
@ -537,7 +537,7 @@ void via6522_device::output_pb()
|
||||
READ8_MEMBER( via6522_device::read )
|
||||
{
|
||||
int val = 0;
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0;
|
||||
|
||||
offset &= 0xf;
|
||||
|
@ -233,7 +233,7 @@ void riot6532_device::reg_w(uint8_t offset, uint8_t data)
|
||||
|
||||
READ8_MEMBER( riot6532_device::read )
|
||||
{
|
||||
return reg_r(offset, machine().side_effect_disabled());
|
||||
return reg_r(offset, machine().side_effects_disabled());
|
||||
}
|
||||
|
||||
uint8_t riot6532_device::reg_r(uint8_t offset, bool debugger_access)
|
||||
|
@ -1164,7 +1164,7 @@ void am9513_device::internal_write(u16 data)
|
||||
|
||||
void am9513_device::advance_dpr()
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return;
|
||||
|
||||
if (bus_is_16_bit() || !BIT(m_status, 0))
|
||||
|
@ -124,7 +124,7 @@ READ16_MEMBER( amiga_autoconfig::autoconfig_read )
|
||||
{
|
||||
uint16_t data = m_cfg[offset] | 0x0fff;
|
||||
|
||||
if (VERBOSE && !dynamic_cast<device_t *>(this)->machine().side_effect_disabled())
|
||||
if (VERBOSE && !dynamic_cast<device_t *>(this)->machine().side_effects_disabled())
|
||||
space.device().logerror("autoconfig_read %04x @ %02x [mask = %04x]\n", data, offset, mem_mask);
|
||||
|
||||
return data;
|
||||
@ -132,7 +132,7 @@ READ16_MEMBER( amiga_autoconfig::autoconfig_read )
|
||||
|
||||
WRITE16_MEMBER( amiga_autoconfig::autoconfig_write )
|
||||
{
|
||||
if (VERBOSE && !dynamic_cast<device_t *>(this)->machine().side_effect_disabled())
|
||||
if (VERBOSE && !dynamic_cast<device_t *>(this)->machine().side_effects_disabled())
|
||||
space.device().logerror("autoconfig_write %04x @ %02x [mask = %04x]\n", data, offset, mem_mask);
|
||||
|
||||
switch (offset)
|
||||
|
@ -116,7 +116,7 @@ void cdp1879_device::update_rtc()
|
||||
|
||||
READ8_MEMBER(cdp1879_device::read)
|
||||
{
|
||||
if (offset == R_CTL_IRQSTATUS && !machine().side_effect_disabled())
|
||||
if (offset == R_CTL_IRQSTATUS && !machine().side_effects_disabled())
|
||||
{
|
||||
// reading the IRQ status clears IRQ line and IRQ status
|
||||
uint8_t data = m_regs[offset];
|
||||
|
@ -101,7 +101,7 @@ generic_latch_8_device::generic_latch_8_device(const machine_config &mconfig, co
|
||||
|
||||
READ8_MEMBER( generic_latch_8_device::read )
|
||||
{
|
||||
if (!has_separate_acknowledge() && !machine().side_effect_disabled())
|
||||
if (!has_separate_acknowledge() && !machine().side_effects_disabled())
|
||||
set_latch_written(false);
|
||||
return m_latched_value;
|
||||
}
|
||||
@ -133,7 +133,7 @@ WRITE_LINE_MEMBER( generic_latch_8_device::clear_w )
|
||||
|
||||
READ8_MEMBER( generic_latch_8_device::acknowledge_r )
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
set_latch_written(false);
|
||||
return space.unmap();
|
||||
}
|
||||
@ -184,7 +184,7 @@ generic_latch_16_device::generic_latch_16_device(const machine_config &mconfig,
|
||||
|
||||
READ16_MEMBER( generic_latch_16_device::read )
|
||||
{
|
||||
if (!has_separate_acknowledge() && !machine().side_effect_disabled())
|
||||
if (!has_separate_acknowledge() && !machine().side_effects_disabled())
|
||||
set_latch_written(false);
|
||||
return m_latched_value;
|
||||
}
|
||||
|
@ -122,7 +122,7 @@ void i8212_device::device_reset()
|
||||
|
||||
READ8_MEMBER(i8212_device::read)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// clear interrupt line
|
||||
m_write_int(CLEAR_LINE);
|
||||
|
@ -96,7 +96,7 @@ void mb8421_master_device::device_reset()
|
||||
template<read_or_write row, bool is_right>
|
||||
void mb8421_master_device::update_intr(offs_t offset)
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return;
|
||||
|
||||
if (row == read_or_write::WRITE && offset == (is_right ? 0x7fe : 0x7ff))
|
||||
|
@ -571,7 +571,7 @@ READ8_MEMBER( mc68901_device::read )
|
||||
case REGISTER_RSR:
|
||||
{
|
||||
uint8_t rsr = m_rsr;
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_rsr &= ~RSR_OVERRUN_ERROR;
|
||||
return rsr;
|
||||
}
|
||||
@ -580,13 +580,13 @@ READ8_MEMBER( mc68901_device::read )
|
||||
{
|
||||
/* clear UE bit (in reality, this won't be cleared until one full clock cycle of the transmitter has passed since the bit was set) */
|
||||
uint8_t tsr = m_tsr;
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_tsr &= ~TSR_UNDERRUN_ERROR;
|
||||
return tsr;
|
||||
}
|
||||
|
||||
case REGISTER_UDR:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_rsr &= ~RSR_BUFFER_FULL;
|
||||
if (m_overrun_pending)
|
||||
|
@ -184,7 +184,7 @@ READ8_MEMBER(mm58167_device::read)
|
||||
{
|
||||
// printf("read reg %x = %02x\n", offset, m_regs[offset]);
|
||||
|
||||
if (offset == R_CTL_IRQSTATUS && !machine().side_effect_disabled())
|
||||
if (offset == R_CTL_IRQSTATUS && !machine().side_effects_disabled())
|
||||
{
|
||||
// reading the IRQ status clears IRQ line and IRQ status
|
||||
uint8_t data = m_regs[offset];
|
||||
|
@ -795,7 +795,7 @@ READ8_MEMBER( mos6526_device::read )
|
||||
switch (offset & 0x0f)
|
||||
{
|
||||
case PRA:
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
if (m_ddra != 0xff)
|
||||
@ -806,7 +806,7 @@ READ8_MEMBER( mos6526_device::read )
|
||||
break;
|
||||
|
||||
case PRB:
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
if (m_ddrb != 0xff)
|
||||
@ -860,7 +860,7 @@ READ8_MEMBER( mos6526_device::read )
|
||||
break;
|
||||
|
||||
case TOD_10THS:
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
data = read_tod(0);
|
||||
@ -869,21 +869,21 @@ READ8_MEMBER( mos6526_device::read )
|
||||
break;
|
||||
|
||||
case TOD_SEC:
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
data = read_tod(1);
|
||||
break;
|
||||
|
||||
case TOD_MIN:
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
data = read_tod(2);
|
||||
break;
|
||||
|
||||
case TOD_HR:
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
if (!m_tod_latched)
|
||||
@ -902,7 +902,7 @@ READ8_MEMBER( mos6526_device::read )
|
||||
case ICR:
|
||||
data = (m_ir1 << 7) | m_icr;
|
||||
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return data;
|
||||
|
||||
m_icr_read = true;
|
||||
|
@ -581,7 +581,7 @@ WRITE8_MEMBER( mos6530_device_base::pb_ddr_w )
|
||||
|
||||
READ8_MEMBER( mos6530_device_base::timer_off_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0;
|
||||
|
||||
return timer_r(false);
|
||||
@ -589,7 +589,7 @@ READ8_MEMBER( mos6530_device_base::timer_off_r )
|
||||
|
||||
READ8_MEMBER( mos6530_device_base::timer_on_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0;
|
||||
|
||||
return timer_r(true);
|
||||
@ -626,7 +626,7 @@ READ8_MEMBER( mos6530_device_base::irq_r )
|
||||
{
|
||||
uint8_t data = get_irq_flags();
|
||||
|
||||
if (!machine().side_effect_disabled()) {
|
||||
if (!machine().side_effects_disabled()) {
|
||||
if (m_irq_edge) {
|
||||
m_irq_edge = false;
|
||||
update_irq();
|
||||
|
@ -376,7 +376,7 @@ void mos6551_device::write_command(uint8_t data)
|
||||
|
||||
READ8_MEMBER( mos6551_device::read )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0xff;
|
||||
|
||||
switch (offset & 0x03)
|
||||
|
@ -103,7 +103,7 @@ bool msm6253_device::shift_out()
|
||||
bool msb = BIT(m_shift_register, 7);
|
||||
|
||||
// shift the bit out, with zero coming in on the other end
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_shift_register <<= 1;
|
||||
|
||||
// return the bit
|
||||
|
@ -416,7 +416,7 @@ READ8_MEMBER( s2636_device::read_data )
|
||||
{
|
||||
case REG_COL_BG_CMPL:
|
||||
case REG_VBL_COL_OBJ:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_registers[offset] = 0x00; // collision/completion/VRESET flags reset on read
|
||||
break;
|
||||
}
|
||||
|
@ -150,7 +150,7 @@ WRITE_LINE_MEMBER(upd4701_device::resety_w)
|
||||
|
||||
READ8_MEMBER(upd4701_device::reset_x)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
resetx_w(1);
|
||||
resetx_w(0);
|
||||
@ -170,7 +170,7 @@ WRITE8_MEMBER(upd4701_device::reset_x)
|
||||
|
||||
READ8_MEMBER(upd4701_device::reset_y)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
resety_w(1);
|
||||
resety_w(0);
|
||||
@ -190,7 +190,7 @@ WRITE8_MEMBER(upd4701_device::reset_y)
|
||||
|
||||
READ8_MEMBER(upd4701_device::reset_xy)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
resetx_w(1);
|
||||
resety_w(1);
|
||||
|
@ -748,7 +748,7 @@ uint8_t i8274_new_device::read_vector()
|
||||
constexpr uint8_t RR1_SPECIAL(RR1_RX_OVERRUN_ERROR | RR1_CRC_FRAMING_ERROR | RR1_END_OF_FRAME);
|
||||
|
||||
// in non-vectored mode this serves the same function as the end of the second acknowldege cycle
|
||||
if (!(m_chanB->m_wr2 & WR2_VECTORED_INT) && !machine().side_effect_disabled())
|
||||
if (!(m_chanB->m_wr2 & WR2_VECTORED_INT) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_int_state[prio[i]] |= Z80_DAISY_IEO;
|
||||
check_interrupts();
|
||||
@ -1384,7 +1384,7 @@ uint8_t z80sio_channel::control_read()
|
||||
|
||||
//LOG("%s %s\n",FUNCNAME, tag());
|
||||
// mask out register index
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_wr0 &= ~WR0_REGISTER_MASK;
|
||||
|
||||
switch (reg)
|
||||
@ -1652,7 +1652,7 @@ uint8_t z80sio_channel::data_read()
|
||||
{
|
||||
uint8_t const data = uint8_t(m_rx_data_fifo & 0x000000ffU);
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// framing and overrun errors need to be cleared to advance the FIFO in interrupt-on-first mode
|
||||
// TODO: Intel 8274 manual doesn't mention this behaviour - is it specific to Z80 SIO?
|
||||
|
@ -1032,7 +1032,7 @@ READ8_MEMBER( z8536_device::read )
|
||||
data = read_register(m_pointer);
|
||||
|
||||
// return to state 0 after read
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_state0 = true;
|
||||
|
||||
break;
|
||||
|
@ -2012,7 +2012,7 @@ WRITE8_MEMBER( tms5220_device::data_w )
|
||||
void tms5220_device::data_w(uint8_t data)
|
||||
{
|
||||
// prevent debugger from changing the internal state
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
#ifdef DEBUG_RS_WS
|
||||
logerror("tms5220_data_w: data %02x\n", data);
|
||||
@ -2050,7 +2050,7 @@ READ8_MEMBER( tms5220_device::status_r )
|
||||
uint8_t tms5220_device::status_r()
|
||||
{
|
||||
// prevent debugger from changing the internal state
|
||||
if (machine().side_effect_disabled()) return 0;
|
||||
if (machine().side_effects_disabled()) return 0;
|
||||
|
||||
if (!m_true_timing)
|
||||
{
|
||||
|
@ -567,7 +567,7 @@ READ8_MEMBER( sega315_5124_device::vram_read )
|
||||
/* Return read buffer contents */
|
||||
temp = m_buffer;
|
||||
|
||||
if ( !machine().side_effect_disabled() )
|
||||
if ( !machine().side_effects_disabled() )
|
||||
{
|
||||
/* Load read buffer */
|
||||
m_buffer = this->space().read_byte(m_addr & 0x3fff);
|
||||
@ -634,7 +634,7 @@ READ8_MEMBER( sega315_5124_device::register_read )
|
||||
check_pending_flags();
|
||||
temp = m_status;
|
||||
|
||||
if ( !machine().side_effect_disabled() )
|
||||
if ( !machine().side_effects_disabled() )
|
||||
{
|
||||
/* Clear pending write flag */
|
||||
m_pending_reg_write = 0;
|
||||
|
@ -100,17 +100,17 @@ u8 bt459_device::get_component(rgb_t *arr, int index)
|
||||
switch (m_address_rgb)
|
||||
{
|
||||
case 0: // red component
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_address_rgb = 1;
|
||||
return (m_command_2 & CR2524) == CR2524_RED ? arr[index].g() : arr[index].r();
|
||||
|
||||
case 1: // green component
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_address_rgb = 2;
|
||||
return arr[index].g();
|
||||
|
||||
case 2: // blue component
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_address_rgb = 0;
|
||||
m_address = (m_address + 1) & ADDRESS_MASK;
|
||||
@ -147,7 +147,7 @@ void bt459_device::set_component(rgb_t *arr, int index, u8 data)
|
||||
READ8_MEMBER(bt459_device::address_lo_r)
|
||||
{
|
||||
// reset component pointer and return address register lsb
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_address_rgb = 0;
|
||||
return m_address & ADDRESS_LSB;
|
||||
}
|
||||
@ -162,7 +162,7 @@ WRITE8_MEMBER(bt459_device::address_lo_w)
|
||||
READ8_MEMBER(bt459_device::address_hi_r)
|
||||
{
|
||||
// reset component pointer and return address register msb
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_address_rgb = 0;
|
||||
return (m_address & ADDRESS_MSB) >> 8;
|
||||
}
|
||||
|
@ -1263,7 +1263,7 @@ READ8_MEMBER(cirrus_gd5428_device::mem_r)
|
||||
if(vga.sequencer.data[4] & 4)
|
||||
{
|
||||
int data;
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
vga.gc.latch[0]=vga.memory[(offset+addr) % vga.svga_intf.vram_size];
|
||||
vga.gc.latch[1]=vga.memory[((offset+addr)+0x10000) % vga.svga_intf.vram_size];
|
||||
|
@ -2868,7 +2868,7 @@ void dmg_ppu_device::lcd_switch_on(uint8_t new_data)
|
||||
|
||||
READ8_MEMBER(dmg_ppu_device::vram_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
update_state();
|
||||
LOG("vram_r: offset=0x%04x\n", offset);
|
||||
@ -2890,7 +2890,7 @@ WRITE8_MEMBER(dmg_ppu_device::vram_w)
|
||||
|
||||
READ8_MEMBER(dmg_ppu_device::oam_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
update_state();
|
||||
LOG("oam_r: offset=0x%02x\n", offset);
|
||||
@ -2913,7 +2913,7 @@ WRITE8_MEMBER(dmg_ppu_device::oam_w)
|
||||
|
||||
READ8_MEMBER(dmg_ppu_device::video_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
update_state();
|
||||
if (offset == 1) LOG("STAT read\n");
|
||||
@ -3185,7 +3185,7 @@ WRITE8_MEMBER(dmg_ppu_device::video_w)
|
||||
|
||||
READ8_MEMBER(cgb_ppu_device::video_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
update_state();
|
||||
if (offset == 1) LOG("STAT read\n");
|
||||
|
@ -489,7 +489,7 @@ READ8_MEMBER(hd44780_device::control_read)
|
||||
{
|
||||
if (m_data_len == 4)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
update_nibble(0, 1);
|
||||
|
||||
if (m_nibble)
|
||||
@ -551,7 +551,7 @@ READ8_MEMBER(hd44780_device::data_read)
|
||||
|
||||
if (m_data_len == 4)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
update_nibble(1, 1);
|
||||
|
||||
if (m_nibble)
|
||||
@ -560,7 +560,7 @@ READ8_MEMBER(hd44780_device::data_read)
|
||||
data = (data << 4) & 0xf0;
|
||||
}
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
update_ac(m_direction);
|
||||
set_busy_flag(41);
|
||||
|
@ -283,7 +283,7 @@ READ8_MEMBER(nt7534_device::control_read)
|
||||
{
|
||||
if (m_data_len == 4)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
update_nibble(0, 1);
|
||||
|
||||
if (m_nibble)
|
||||
@ -342,7 +342,7 @@ READ8_MEMBER(nt7534_device::data_read)
|
||||
|
||||
if (m_data_len == 4)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
update_nibble(1, 1);
|
||||
|
||||
if (m_nibble)
|
||||
|
@ -2118,7 +2118,7 @@ READ8_MEMBER(vga_device::mem_r)
|
||||
if(vga.sequencer.data[4] & 4)
|
||||
{
|
||||
int data;
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
vga.gc.latch[0]=vga.memory[(offset)];
|
||||
vga.gc.latch[1]=vga.memory[(offset)+0x10000];
|
||||
|
@ -175,7 +175,7 @@ READ16_MEMBER( saturn_state::saturn_vdp1_regs_r )
|
||||
|
||||
return modr;
|
||||
default:
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
logerror("%s VDP1: Read from Registers, Offset %04x\n", machine().describe_context(), offset*2);
|
||||
break;
|
||||
}
|
||||
|
@ -5780,7 +5780,7 @@ READ16_MEMBER ( saturn_state::saturn_vdp2_regs_r )
|
||||
/* latch h/v signals through HV latch*/
|
||||
if(!STV_VDP2_EXLTEN)
|
||||
{
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
{
|
||||
m_vdp2.h_count = get_hcounter();
|
||||
m_vdp2.v_count = get_vcounter();
|
||||
@ -5807,7 +5807,7 @@ READ16_MEMBER ( saturn_state::saturn_vdp2_regs_r )
|
||||
m_vdp2_regs[offset] |= 1 << 3;
|
||||
|
||||
/* HV latches clears if this register is read */
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
{
|
||||
m_vdp2.exltfg &= ~1;
|
||||
m_vdp2.exsyfg &= ~1;
|
||||
@ -5821,7 +5821,7 @@ READ16_MEMBER ( saturn_state::saturn_vdp2_regs_r )
|
||||
|
||||
/* Games basically r/w the entire VDP2 register area when this is tripped. (example: Silhouette Mirage)
|
||||
Disable log for the time being. */
|
||||
//if(!machine().side_effect_disabled())
|
||||
//if(!machine().side_effects_disabled())
|
||||
// printf("Warning: VDP2 version read\n");
|
||||
break;
|
||||
}
|
||||
@ -5841,7 +5841,7 @@ READ16_MEMBER ( saturn_state::saturn_vdp2_regs_r )
|
||||
}
|
||||
|
||||
default:
|
||||
//if(!machine().side_effect_disabled())
|
||||
//if(!machine().side_effects_disabled())
|
||||
// printf("VDP2: read from register %08x %08x\n",offset*4,mem_mask);
|
||||
break;
|
||||
}
|
||||
|
@ -231,7 +231,7 @@ READ8_MEMBER(t6a04_device::data_read)
|
||||
output_reg = ((((*ti82_video)<<8)+ti82_video[1])>>(10-pos_bit));
|
||||
}
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_output_reg = output_reg;
|
||||
|
||||
|
@ -279,7 +279,7 @@ READ8_MEMBER( tms9927_device::read )
|
||||
return m_reg[offset - 0x08 + 7];
|
||||
|
||||
default:
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
generic_access(space, offset);
|
||||
break;
|
||||
}
|
||||
|
@ -139,7 +139,7 @@ WRITE8_MEMBER( tms9928a_device::write )
|
||||
u8 tms9928a_device::vram_read()
|
||||
{
|
||||
// prevent debugger from changing the address base
|
||||
if (machine().side_effect_disabled()) return 0;
|
||||
if (machine().side_effects_disabled()) return 0;
|
||||
|
||||
uint8_t data = m_ReadAhead;
|
||||
|
||||
@ -158,7 +158,7 @@ READ8_MEMBER( tms9928a_device::vram_read )
|
||||
void tms9928a_device::vram_write(u8 data)
|
||||
{
|
||||
// prevent debugger from changing the address base
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
m_vram_space->write_byte(m_Addr, data);
|
||||
m_Addr = (m_Addr + 1) & (m_vram_size - 1);
|
||||
@ -174,7 +174,7 @@ WRITE8_MEMBER( tms9928a_device::vram_write )
|
||||
u8 tms9928a_device::register_read()
|
||||
{
|
||||
// prevent debugger from changing the internal state
|
||||
if (machine().side_effect_disabled()) return 0;
|
||||
if (machine().side_effects_disabled()) return 0;
|
||||
|
||||
uint8_t data = m_StatusReg;
|
||||
|
||||
@ -306,7 +306,7 @@ void tms9928a_device::change_register(uint8_t reg, uint8_t val)
|
||||
void tms9928a_device::register_write(u8 data)
|
||||
{
|
||||
// prevent debugger from changing the internal state
|
||||
if (machine().side_effect_disabled()) return;
|
||||
if (machine().side_effects_disabled()) return;
|
||||
|
||||
if (m_latch)
|
||||
{
|
||||
|
@ -204,7 +204,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
switch(shift) {
|
||||
case -1:
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u16 *dest = get_ptr<u16>(lstart);
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 1) & m_pc_mask) {
|
||||
offs_t tpc = m_intf->pc_linear_to_real(lpc);
|
||||
@ -217,7 +217,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
break;
|
||||
case 0:
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u8 *dest = get_ptr<u8>(lstart);
|
||||
u32 steps = 0;
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 1) & m_pc_mask) {
|
||||
@ -236,7 +236,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
switch(shift) {
|
||||
case -3: // bus granularity 64
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u64 *dest = get_ptr<u64>(lstart);
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 1) & m_pc_mask) {
|
||||
offs_t tpc = lpc;
|
||||
@ -250,7 +250,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
|
||||
case -2: // bus granularity 32
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u32 *dest = get_ptr<u32>(lstart);
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 1) & m_pc_mask) {
|
||||
offs_t tpc = lpc;
|
||||
@ -264,7 +264,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
|
||||
case -1: // bus granularity 16
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u16 *dest = get_ptr<u16>(lstart);
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 1) & m_pc_mask) {
|
||||
offs_t tpc = lpc;
|
||||
@ -278,7 +278,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
|
||||
case 0: // bus granularity 8
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u8 *dest = get_ptr<u8>(lstart);
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 1) & m_pc_mask) {
|
||||
offs_t tpc = lpc;
|
||||
@ -292,7 +292,7 @@ void debug_disasm_buffer::debug_data_buffer::setup_methods()
|
||||
|
||||
case 3: // bus granularity 1, stored as u16
|
||||
m_do_fill = [this](offs_t lstart, offs_t lend) {
|
||||
auto dis = m_space->device().machine().disable_side_effect();
|
||||
auto dis = m_space->device().machine().disable_side_effects();
|
||||
u16 *dest = reinterpret_cast<u16 *>(&m_buffer[0]) + ((lstart - m_lstart) >> 4);
|
||||
for(offs_t lpc = lstart; lpc != lend; lpc = (lpc + 0x10) & m_pc_mask) {
|
||||
offs_t tpc = lpc;
|
||||
|
@ -1691,7 +1691,7 @@ void debugger_commands::execute_save(int ref, const std::vector<std::string> &pa
|
||||
}
|
||||
|
||||
/* now write the data out */
|
||||
auto dis = space->device().machine().disable_side_effect();
|
||||
auto dis = space->device().machine().disable_side_effects();
|
||||
switch (space->addr_shift())
|
||||
{
|
||||
case -3:
|
||||
@ -1917,7 +1917,7 @@ void debugger_commands::execute_dump(int ref, const std::vector<std::string> &pa
|
||||
else if(shift < 0)
|
||||
width >>= -shift;
|
||||
|
||||
auto dis = space->device().machine().disable_side_effect();
|
||||
auto dis = space->device().machine().disable_side_effects();
|
||||
bool be = space->endianness() == ENDIANNESS_BIG;
|
||||
|
||||
for (offs_t i = offset; i <= endoffset; i += rowsize)
|
||||
|
@ -835,7 +835,7 @@ u64 debugger_cpu::expression_read_memory(void *param, const char *name, expressi
|
||||
if (memory->has_space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL)))
|
||||
{
|
||||
address_space &space = memory->space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL));
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
return read_memory(space, address, size, true);
|
||||
}
|
||||
break;
|
||||
@ -859,7 +859,7 @@ u64 debugger_cpu::expression_read_memory(void *param, const char *name, expressi
|
||||
if (memory->has_space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL)))
|
||||
{
|
||||
address_space &space = memory->space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL));
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
return read_memory(space, address, size, false);
|
||||
}
|
||||
break;
|
||||
@ -877,7 +877,7 @@ u64 debugger_cpu::expression_read_memory(void *param, const char *name, expressi
|
||||
device = get_visible_cpu();
|
||||
memory = &device->memory();
|
||||
}
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
return expression_read_program_direct(memory->space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size);
|
||||
break;
|
||||
}
|
||||
@ -894,7 +894,7 @@ u64 debugger_cpu::expression_read_memory(void *param, const char *name, expressi
|
||||
device = get_visible_cpu();
|
||||
memory = &device->memory();
|
||||
}
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
return expression_read_program_direct(memory->space(AS_OPCODES), (spacenum == EXPSPACE_OPCODE), address, size);
|
||||
break;
|
||||
}
|
||||
@ -1040,7 +1040,7 @@ void debugger_cpu::expression_write_memory(void *param, const char *name, expres
|
||||
if (memory->has_space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL)))
|
||||
{
|
||||
address_space &space = memory->space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_LOGICAL));
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
write_memory(space, address, data, size, true);
|
||||
}
|
||||
break;
|
||||
@ -1059,7 +1059,7 @@ void debugger_cpu::expression_write_memory(void *param, const char *name, expres
|
||||
if (memory->has_space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL)))
|
||||
{
|
||||
address_space &space = memory->space(AS_PROGRAM + (spacenum - EXPSPACE_PROGRAM_PHYSICAL));
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
write_memory(space, address, data, size, false);
|
||||
}
|
||||
break;
|
||||
@ -1072,7 +1072,7 @@ void debugger_cpu::expression_write_memory(void *param, const char *name, expres
|
||||
device = get_visible_cpu();
|
||||
memory = &device->memory();
|
||||
}
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
expression_write_program_direct(memory->space(AS_PROGRAM), (spacenum == EXPSPACE_OPCODE), address, size, data);
|
||||
break;
|
||||
}
|
||||
@ -1085,7 +1085,7 @@ void debugger_cpu::expression_write_memory(void *param, const char *name, expres
|
||||
device = get_visible_cpu();
|
||||
memory = &device->memory();
|
||||
}
|
||||
auto dis = m_machine.disable_side_effect(disable_se);
|
||||
auto dis = m_machine.disable_side_effects(disable_se);
|
||||
expression_write_program_direct(memory->space(AS_OPCODES), (spacenum == EXPSPACE_OPCODE), address, size, data);
|
||||
break;
|
||||
}
|
||||
@ -2726,7 +2726,7 @@ void device_debug::watchpoint_check(address_space& space, int type, offs_t addre
|
||||
void debugger_cpu::watchpoint_check(address_space& space, int type, offs_t address, u64 value_to_write, u64 mem_mask, std::vector<device_debug::watchpoint *> &wplist)
|
||||
{
|
||||
// if we're within debugger code, don't stop
|
||||
if (m_within_instruction_hook || m_machine.side_effect_disabled())
|
||||
if (m_within_instruction_hook || m_machine.side_effects_disabled())
|
||||
return;
|
||||
|
||||
m_within_instruction_hook = true;
|
||||
|
@ -759,7 +759,7 @@ bool debug_view_memory::read(u8 size, offs_t offs, u64 &data)
|
||||
// if no raw data, just use the standard debug routines
|
||||
if (source.m_space)
|
||||
{
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
|
||||
bool ismapped = offs <= m_maxaddr;
|
||||
if (ismapped && !m_no_translation)
|
||||
@ -842,7 +842,7 @@ void debug_view_memory::write(u8 size, offs_t offs, u64 data)
|
||||
// if no raw data, just use the standard debug routines
|
||||
if (source.m_space)
|
||||
{
|
||||
auto dis = machine().disable_side_effect();
|
||||
auto dis = machine().disable_side_effects();
|
||||
|
||||
switch (size)
|
||||
{
|
||||
|
@ -1159,7 +1159,7 @@ void parsed_expression::parse_memory_operator(parse_token &token, const char *st
|
||||
}
|
||||
|
||||
// configure the token
|
||||
token.configure_operator(TVL_MEMORYAT, 2).set_memory_size(memsize).set_memory_space(memspace).set_memory_source(namestring).set_memory_side_effect(disable_se);
|
||||
token.configure_operator(TVL_MEMORYAT, 2).set_memory_size(memsize).set_memory_space(memspace).set_memory_source(namestring).set_memory_side_effects(disable_se);
|
||||
}
|
||||
|
||||
|
||||
@ -1703,7 +1703,7 @@ u64 parsed_expression::parse_token::get_lval_value(symbol_table *table)
|
||||
|
||||
// or get the value from the memory callbacks
|
||||
else if (is_memory() && table != nullptr) {
|
||||
return table->memory_value(m_string, memory_space(), address(), 1 << memory_size(), memory_side_effect());
|
||||
return table->memory_value(m_string, memory_space(), address(), 1 << memory_size(), memory_side_effects());
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -1723,7 +1723,7 @@ inline void parsed_expression::parse_token::set_lval_value(symbol_table *table,
|
||||
|
||||
// or set the value via the memory callbacks
|
||||
else if (is_memory() && table != nullptr)
|
||||
table->set_memory_value(m_string, memory_space(), address(), 1 << memory_size(), value, memory_side_effect());
|
||||
table->set_memory_value(m_string, memory_space(), address(), 1 << memory_size(), value, memory_side_effects());
|
||||
}
|
||||
|
||||
|
||||
|
@ -293,7 +293,7 @@ private:
|
||||
bool right_to_left() const { assert(m_type == OPERATOR); return ((m_flags & TIN_RIGHT_TO_LEFT_MASK) != 0); }
|
||||
expression_space memory_space() const { assert(m_type == OPERATOR || m_type == MEMORY); return expression_space((m_flags & TIN_MEMORY_SPACE_MASK) >> TIN_MEMORY_SPACE_SHIFT); }
|
||||
int memory_size() const { assert(m_type == OPERATOR || m_type == MEMORY); return (m_flags & TIN_MEMORY_SIZE_MASK) >> TIN_MEMORY_SIZE_SHIFT; }
|
||||
bool memory_side_effect() const { assert(m_type == OPERATOR || m_type == MEMORY); return (m_flags & TIN_SIDE_EFFECT_MASK) >> TIN_SIDE_EFFECT_SHIFT; }
|
||||
bool memory_side_effects() const { assert(m_type == OPERATOR || m_type == MEMORY); return (m_flags & TIN_SIDE_EFFECT_MASK) >> TIN_SIDE_EFFECT_SHIFT; }
|
||||
|
||||
// setters
|
||||
parse_token &set_offset(int offset) { m_offset = offset; return *this; }
|
||||
@ -310,7 +310,7 @@ private:
|
||||
parse_token &set_right_to_left() { assert(m_type == OPERATOR); m_flags |= TIN_RIGHT_TO_LEFT_MASK; return *this; }
|
||||
parse_token &set_memory_space(expression_space space) { assert(m_type == OPERATOR || m_type == MEMORY); m_flags = (m_flags & ~TIN_MEMORY_SPACE_MASK) | ((space << TIN_MEMORY_SPACE_SHIFT) & TIN_MEMORY_SPACE_MASK); return *this; }
|
||||
parse_token &set_memory_size(int log2ofbits) { assert(m_type == OPERATOR || m_type == MEMORY); m_flags = (m_flags & ~TIN_MEMORY_SIZE_MASK) | ((log2ofbits << TIN_MEMORY_SIZE_SHIFT) & TIN_MEMORY_SIZE_MASK); return *this; }
|
||||
parse_token &set_memory_side_effect(bool disable_se) { assert(m_type == OPERATOR || m_type == MEMORY); m_flags = disable_se ? m_flags | TIN_SIDE_EFFECT_MASK : m_flags & ~TIN_SIDE_EFFECT_MASK; return *this; }
|
||||
parse_token &set_memory_side_effects(bool disable_se) { assert(m_type == OPERATOR || m_type == MEMORY); m_flags = disable_se ? m_flags | TIN_SIDE_EFFECT_MASK : m_flags & ~TIN_SIDE_EFFECT_MASK; return *this; }
|
||||
parse_token &set_memory_source(const char *string) { assert(m_type == OPERATOR || m_type == MEMORY); m_string = string; return *this; }
|
||||
|
||||
// access
|
||||
|
@ -719,7 +719,7 @@ private:
|
||||
template<typename UintType>
|
||||
UintType unmap_r(address_space &space, offs_t offset, UintType mask)
|
||||
{
|
||||
if (m_space.log_unmap() && !m_space.m_manager.machine().side_effect_disabled())
|
||||
if (m_space.log_unmap() && !m_space.m_manager.machine().side_effects_disabled())
|
||||
{
|
||||
m_space.device().logerror(
|
||||
m_space.is_octal()
|
||||
@ -791,7 +791,7 @@ private:
|
||||
template<typename UintType>
|
||||
void unmap_w(address_space &space, offs_t offset, UintType data, UintType mask)
|
||||
{
|
||||
if (m_space.log_unmap() && !m_space.m_manager.machine().side_effect_disabled())
|
||||
if (m_space.log_unmap() && !m_space.m_manager.machine().side_effects_disabled())
|
||||
{
|
||||
m_space.device().logerror(
|
||||
m_space.is_octal()
|
||||
|
@ -108,7 +108,7 @@ osd_interface &running_machine::osd() const
|
||||
|
||||
running_machine::running_machine(const machine_config &_config, machine_manager &manager)
|
||||
: primary_screen(nullptr),
|
||||
m_side_effect_disabled(0),
|
||||
m_side_effects_disabled(0),
|
||||
debug_flags(0),
|
||||
m_config(_config),
|
||||
m_system(_config.gamedrv()),
|
||||
|
@ -145,7 +145,7 @@ class running_machine
|
||||
{
|
||||
DISABLE_COPYING(running_machine);
|
||||
|
||||
class side_effect_disabler;
|
||||
class side_effects_disabler;
|
||||
|
||||
friend class sound_manager;
|
||||
friend class memory_manager;
|
||||
@ -201,8 +201,8 @@ public:
|
||||
|
||||
// RAII-based side effect disable
|
||||
// NOP-ed when passed false, to make it more easily conditional
|
||||
side_effect_disabler disable_side_effect(bool disable_se = true) { return side_effect_disabler(this, disable_se); }
|
||||
bool side_effect_disabled() const { return m_side_effect_disabled != 0; }
|
||||
side_effects_disabler disable_side_effects(bool disable_se = true) { return side_effects_disabler(this, disable_se); }
|
||||
bool side_effects_disabled() const { return m_side_effects_disabled != 0; }
|
||||
|
||||
// additional helpers
|
||||
emu_options &options() const { return m_config.options(); }
|
||||
@ -263,34 +263,34 @@ private:
|
||||
screen_device * primary_screen; // the primary screen device, or nullptr if screenless
|
||||
|
||||
// side effect disable counter
|
||||
u32 m_side_effect_disabled;
|
||||
u32 m_side_effects_disabled;
|
||||
|
||||
public:
|
||||
// debugger-related information
|
||||
u32 debug_flags; // the current debug flags
|
||||
|
||||
private:
|
||||
class side_effect_disabler {
|
||||
class side_effects_disabler {
|
||||
running_machine *m_machine;
|
||||
bool m_disable_se;
|
||||
|
||||
public:
|
||||
side_effect_disabler(running_machine *m, bool disable_se) : m_machine(m), m_disable_se(disable_se) {
|
||||
side_effects_disabler(running_machine *m, bool disable_se) : m_machine(m), m_disable_se(disable_se) {
|
||||
if(m_disable_se)
|
||||
m_machine->disable_side_effect_count();
|
||||
m_machine->disable_side_effects_count();
|
||||
}
|
||||
|
||||
~side_effect_disabler() {
|
||||
~side_effects_disabler() {
|
||||
if(m_disable_se)
|
||||
m_machine->enable_side_effect_count();
|
||||
m_machine->enable_side_effects_count();
|
||||
}
|
||||
|
||||
side_effect_disabler(const side_effect_disabler &) = delete;
|
||||
side_effect_disabler(side_effect_disabler &&) = default;
|
||||
side_effects_disabler(const side_effects_disabler &) = delete;
|
||||
side_effects_disabler(side_effects_disabler &&) = default;
|
||||
};
|
||||
|
||||
void disable_side_effect_count() { m_side_effect_disabled++; }
|
||||
void enable_side_effect_count() { m_side_effect_disabled--; }
|
||||
void disable_side_effects_count() { m_side_effects_disabled++; }
|
||||
void enable_side_effects_count() { m_side_effects_disabled--; }
|
||||
|
||||
// internal helpers
|
||||
template <typename T> struct is_null { template <typename U> static bool value(U &&x) { return false; } };
|
||||
|
@ -43,7 +43,7 @@ ADDRESS_MAP_END
|
||||
|
||||
READ8_MEMBER(a2600_state::cart_over_all_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_cart->write_bank(space, offset, 0);
|
||||
|
||||
int masked_offset = offset &~ 0x0d00;
|
||||
@ -265,7 +265,7 @@ WRITE16_MEMBER(a2600_base_state::a2600_tia_vsync_callback_pal)
|
||||
// TODO: is this the correct behavior for the real hardware?!?
|
||||
READ8_MEMBER(a2600_state::cart_over_riot_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_cart->write_bank(space, offset, 0);
|
||||
return m_riot_ram[0x20 + offset];
|
||||
}
|
||||
|
@ -220,7 +220,7 @@ void accomm_state::video_start()
|
||||
|
||||
WRITE8_MEMBER(accomm_state::ch00switch_w)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_ch00rom_enabled = false;
|
||||
}
|
||||
|
||||
|
@ -19,7 +19,7 @@
|
||||
- video: vertical raster splits (used at least by Rapira)
|
||||
- what is the state of devices at init and reset?
|
||||
- what do floating bus reads do?
|
||||
- ignore debugger reads -- use side_effect_disabled()
|
||||
- ignore debugger reads -- use side_effects_disabled()
|
||||
- softlists
|
||||
|
||||
To do (agat7):
|
||||
@ -351,7 +351,7 @@ READ8_MEMBER(agat7_state::keyb_strobe_r)
|
||||
{
|
||||
// reads any key down, clears strobe
|
||||
uint8_t rv = m_transchar | (m_anykeydown ? 0x80 : 0x00);
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_strobe = 0;
|
||||
return rv;
|
||||
}
|
||||
@ -364,7 +364,7 @@ WRITE8_MEMBER(agat7_state::keyb_strobe_w)
|
||||
|
||||
READ8_MEMBER(agat7_state::cassette_toggle_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
cassette_toggle_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -377,7 +377,7 @@ WRITE8_MEMBER(agat7_state::cassette_toggle_w)
|
||||
|
||||
READ8_MEMBER(agat7_state::speaker_toggle_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
speaker_toggle_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -390,7 +390,7 @@ WRITE8_MEMBER(agat7_state::speaker_toggle_w)
|
||||
|
||||
READ8_MEMBER(agat7_state::interrupts_on_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
interrupts_on_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -402,7 +402,7 @@ WRITE8_MEMBER(agat7_state::interrupts_on_w)
|
||||
|
||||
READ8_MEMBER(agat7_state::interrupts_off_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
interrupts_off_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -447,7 +447,7 @@ READ8_MEMBER(agat7_state::flags_r)
|
||||
|
||||
READ8_MEMBER(agat7_state::controller_strobe_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
controller_strobe_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -462,7 +462,7 @@ WRITE8_MEMBER(agat7_state::controller_strobe_w)
|
||||
|
||||
READ8_MEMBER(agat7_state::c080_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
int slot;
|
||||
|
||||
@ -504,7 +504,7 @@ READ8_MEMBER(agat7_state::c100_r)
|
||||
|
||||
if (m_slotdevice[slotnum] != nullptr)
|
||||
{
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effect_disabled()))
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
|
||||
{
|
||||
m_cnxx_slot = slotnum;
|
||||
}
|
||||
@ -527,7 +527,7 @@ WRITE8_MEMBER(agat7_state::c100_w)
|
||||
|
||||
if (m_slotdevice[slotnum] != nullptr)
|
||||
{
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effect_disabled()))
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
|
||||
{
|
||||
m_cnxx_slot = slotnum;
|
||||
}
|
||||
@ -542,7 +542,7 @@ READ8_MEMBER(agat7_state::c800_r)
|
||||
|
||||
if (offset == 0x7ff)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = -1;
|
||||
}
|
||||
@ -564,7 +564,7 @@ WRITE8_MEMBER(agat7_state::c800_w)
|
||||
|
||||
if (offset == 0x7ff)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = -1;
|
||||
}
|
||||
|
@ -511,7 +511,7 @@ READ8_MEMBER(altos8600_state::get_slave_ack)
|
||||
|
||||
void altos8600_state::seterr(offs_t offset, u16 mem_mask, u16 err_mask)
|
||||
{
|
||||
if(machine().side_effect_disabled())
|
||||
if(machine().side_effects_disabled())
|
||||
return;
|
||||
logerror("Fault at %05x type %04x\n", offset << 1, err_mask);
|
||||
if(!m_nmiinh)
|
||||
@ -604,7 +604,7 @@ WRITE16_MEMBER(altos8600_state::xtraram_w)
|
||||
|
||||
READ16_MEMBER(altos8600_state::cpuio_r)
|
||||
{
|
||||
if(m_user && !machine().side_effect_disabled())
|
||||
if(m_user && !machine().side_effects_disabled())
|
||||
{
|
||||
m_pic1->ir0_w(ASSERT_LINE);
|
||||
return 0;
|
||||
@ -614,7 +614,7 @@ READ16_MEMBER(altos8600_state::cpuio_r)
|
||||
|
||||
WRITE16_MEMBER(altos8600_state::cpuio_w)
|
||||
{
|
||||
if(m_user && !machine().side_effect_disabled())
|
||||
if(m_user && !machine().side_effects_disabled())
|
||||
{
|
||||
m_pic1->ir0_w(ASSERT_LINE);
|
||||
return;
|
||||
|
@ -564,7 +564,7 @@ READ8_MEMBER(napple2_state::keyb_strobe_r)
|
||||
{
|
||||
// reads any key down, clears strobe
|
||||
uint8_t rv = m_transchar | (m_anykeydown ? 0x80 : 0x00);
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_strobe = 0;
|
||||
return rv;
|
||||
}
|
||||
@ -577,7 +577,7 @@ WRITE8_MEMBER(napple2_state::keyb_strobe_w)
|
||||
|
||||
READ8_MEMBER(napple2_state::cassette_toggle_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
cassette_toggle_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -590,7 +590,7 @@ WRITE8_MEMBER(napple2_state::cassette_toggle_w)
|
||||
|
||||
READ8_MEMBER(napple2_state::speaker_toggle_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
speaker_toggle_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -603,7 +603,7 @@ WRITE8_MEMBER(napple2_state::speaker_toggle_w)
|
||||
|
||||
READ8_MEMBER(napple2_state::utility_strobe_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
utility_strobe_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -615,7 +615,7 @@ WRITE8_MEMBER(napple2_state::utility_strobe_w)
|
||||
|
||||
READ8_MEMBER(napple2_state::switches_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_softlatch->write_bit((offset & 0x0e) >> 1, offset & 0x01);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -661,7 +661,7 @@ READ8_MEMBER(napple2_state::flags_r)
|
||||
|
||||
READ8_MEMBER(napple2_state::controller_strobe_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
controller_strobe_w(space, offset, 0);
|
||||
return read_floatingbus();
|
||||
}
|
||||
@ -676,7 +676,7 @@ WRITE8_MEMBER(napple2_state::controller_strobe_w)
|
||||
|
||||
READ8_MEMBER(napple2_state::c080_r)
|
||||
{
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
{
|
||||
int slot;
|
||||
|
||||
@ -713,7 +713,7 @@ READ8_MEMBER(napple2_state::c100_r)
|
||||
|
||||
if (m_slotdevice[slotnum] != nullptr)
|
||||
{
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effect_disabled()))
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
|
||||
{
|
||||
m_cnxx_slot = slotnum;
|
||||
}
|
||||
@ -732,7 +732,7 @@ WRITE8_MEMBER(napple2_state::c100_w)
|
||||
|
||||
if (m_slotdevice[slotnum] != nullptr)
|
||||
{
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effect_disabled()))
|
||||
if ((m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
|
||||
{
|
||||
m_cnxx_slot = slotnum;
|
||||
}
|
||||
@ -745,7 +745,7 @@ READ8_MEMBER(napple2_state::c800_r)
|
||||
{
|
||||
if (offset == 0x7ff)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = -1;
|
||||
}
|
||||
@ -765,7 +765,7 @@ WRITE8_MEMBER(napple2_state::c800_w)
|
||||
{
|
||||
if (offset == 0x7ff)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = -1;
|
||||
}
|
||||
|
@ -1309,7 +1309,7 @@ void apple2e_state::cec_lcrom_update()
|
||||
// most softswitches don't care about read vs write, so handle them here
|
||||
void apple2e_state::do_io(address_space &space, int offset, bool is_iic)
|
||||
{
|
||||
if(machine().side_effect_disabled()) return;
|
||||
if(machine().side_effects_disabled()) return;
|
||||
|
||||
// Handle C058-C05F according to IOUDIS
|
||||
if ((offset & 0x58) == 0x58)
|
||||
@ -1519,7 +1519,7 @@ void apple2e_state::do_io(address_space &space, int offset, bool is_iic)
|
||||
|
||||
READ8_MEMBER(apple2e_state::c000_r)
|
||||
{
|
||||
if(machine().side_effect_disabled()) return read_floatingbus();
|
||||
if(machine().side_effects_disabled()) return read_floatingbus();
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
@ -1630,7 +1630,7 @@ READ8_MEMBER(apple2e_state::c000_r)
|
||||
|
||||
WRITE8_MEMBER(apple2e_state::c000_w)
|
||||
{
|
||||
if(machine().side_effect_disabled()) return;
|
||||
if(machine().side_effects_disabled()) return;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
@ -1756,7 +1756,7 @@ WRITE8_MEMBER(apple2e_state::c000_w)
|
||||
|
||||
READ8_MEMBER(apple2e_state::c000_iic_r)
|
||||
{
|
||||
if(machine().side_effect_disabled()) return read_floatingbus();
|
||||
if(machine().side_effects_disabled()) return read_floatingbus();
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
@ -1900,7 +1900,7 @@ READ8_MEMBER(apple2e_state::c000_iic_r)
|
||||
|
||||
WRITE8_MEMBER(apple2e_state::c000_iic_w)
|
||||
{
|
||||
if(machine().side_effect_disabled()) return;
|
||||
if(machine().side_effects_disabled()) return;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
@ -2098,7 +2098,7 @@ void apple2e_state::update_iic_mouse()
|
||||
|
||||
READ8_MEMBER(apple2e_state::c080_r)
|
||||
{
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
{
|
||||
int slot;
|
||||
|
||||
@ -2175,7 +2175,7 @@ uint8_t apple2e_state::read_slot_rom(int slotbias, int offset)
|
||||
|
||||
if (m_slotdevice[slotnum] != nullptr)
|
||||
{
|
||||
if ((m_cnxx_slot == CNXX_UNCLAIMED) && (m_slotdevice[slotnum]->take_c800()) && (!machine().side_effect_disabled()))
|
||||
if ((m_cnxx_slot == CNXX_UNCLAIMED) && (m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
|
||||
{
|
||||
m_cnxx_slot = slotnum;
|
||||
update_slotrom_banks();
|
||||
@ -2193,7 +2193,7 @@ void apple2e_state::write_slot_rom(int slotbias, int offset, uint8_t data)
|
||||
|
||||
if (m_slotdevice[slotnum] != nullptr)
|
||||
{
|
||||
if ((m_cnxx_slot == CNXX_UNCLAIMED) && (m_slotdevice[slotnum]->take_c800()) && (!machine().side_effect_disabled()))
|
||||
if ((m_cnxx_slot == CNXX_UNCLAIMED) && (m_slotdevice[slotnum]->take_c800()) && (!machine().side_effects_disabled()))
|
||||
{
|
||||
m_cnxx_slot = slotnum;
|
||||
update_slotrom_banks();
|
||||
@ -2296,7 +2296,7 @@ READ8_MEMBER(apple2e_state::c800_r)
|
||||
|
||||
if (offset == 0x7ff)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = CNXX_UNCLAIMED;
|
||||
update_slotrom_banks();
|
||||
@ -2320,7 +2320,7 @@ READ8_MEMBER(apple2e_state::c800_int_r)
|
||||
return mig_r(offset-0x600);
|
||||
}
|
||||
|
||||
if ((offset == 0x7ff) && !machine().side_effect_disabled())
|
||||
if ((offset == 0x7ff) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = CNXX_UNCLAIMED;
|
||||
m_intc8rom = false;
|
||||
@ -2342,7 +2342,7 @@ READ8_MEMBER(apple2e_state::c800_b2_int_r)
|
||||
return mig_r(offset-0x600);
|
||||
}
|
||||
|
||||
if ((offset == 0x7ff) && !machine().side_effect_disabled())
|
||||
if ((offset == 0x7ff) && !machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = CNXX_UNCLAIMED;
|
||||
m_intc8rom = false;
|
||||
@ -2362,7 +2362,7 @@ WRITE8_MEMBER(apple2e_state::c800_w)
|
||||
|
||||
if (offset == 0x7ff)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_cnxx_slot = CNXX_UNCLAIMED;
|
||||
m_intc8rom = false;
|
||||
|
@ -433,7 +433,7 @@ WRITE16_MEMBER( st_state::berr_w )
|
||||
|
||||
READ16_MEMBER( st_state::berr_r )
|
||||
{
|
||||
if(!machine().side_effect_disabled()) {
|
||||
if(!machine().side_effects_disabled()) {
|
||||
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
|
||||
}
|
||||
|
@ -111,7 +111,7 @@ READ8_MEMBER(bombjack_state::soundlatch_read_and_clear)
|
||||
// An extra flip-flop is used to clear the LS273 after reading it through a LS245
|
||||
// (this flip-flop is then cleared in sync with the sound CPU clock)
|
||||
uint8_t res = m_soundlatch->read(space, 0);
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_soundlatch->clear_w(space, 0, 0);
|
||||
return res;
|
||||
}
|
||||
|
@ -224,7 +224,7 @@ READ8_MEMBER(c65_state::vic4567_dummy_r)
|
||||
return m_VIC3_ControlB;
|
||||
}
|
||||
|
||||
if(!machine().side_effect_disabled())
|
||||
if(!machine().side_effects_disabled())
|
||||
printf("%02x\n",offset); // TODO: PC
|
||||
return res;
|
||||
}
|
||||
|
@ -147,11 +147,11 @@ READ8_MEMBER(ccs_state::memory_read)
|
||||
result = m_rom[offset & 0x7ff];
|
||||
|
||||
// wait state forced for 4 MHz operation
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_maincpu->adjust_icount(-1);
|
||||
}
|
||||
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_power_on_status |= m_power_on_status >> 1;
|
||||
|
||||
return result;
|
||||
|
@ -370,7 +370,7 @@ MACHINE_RESET_MEMBER( cdi_state, quizard4 )
|
||||
|
||||
READ8_MEMBER( cdi_state::servo_io_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
@ -570,7 +570,7 @@ WRITE8_MEMBER( cdi_state::servo_io_w )
|
||||
|
||||
READ8_MEMBER( cdi_state::slave_io_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
@ -230,7 +230,7 @@ READ8_MEMBER(champbwl_state::trackball_r)
|
||||
|
||||
READ8_MEMBER(champbwl_state::trackball_reset_r)
|
||||
{
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
m_last_trackball_val[0] = m_fakex->read();
|
||||
m_last_trackball_val[1] = m_fakey->read();
|
||||
|
@ -837,7 +837,7 @@ void cmi_state::video_write(int offset)
|
||||
|
||||
READ8_MEMBER( cmi_state::video_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return m_video_data;
|
||||
|
||||
m_video_data = m_video_ram[m_y_pos * (512 / 8) + (m_x_pos / 8)];
|
||||
@ -883,7 +883,7 @@ WRITE8_MEMBER( cmi_state::vram_w )
|
||||
|
||||
READ8_MEMBER( cmi_state::vram_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return m_video_ram[offset];
|
||||
|
||||
/* Latch the current video position */
|
||||
@ -947,7 +947,7 @@ template<int cpunum> WRITE8_MEMBER( cmi_state::map_w )
|
||||
|
||||
template<int cpunum> READ8_MEMBER( cmi_state::irq_ram_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return m_scratch_ram[cpunum][0xf8 + offset];
|
||||
|
||||
if (m_m6809_bs_hack_cnt > 0 && m_m6809_bs_hack_cpu == cpunum)
|
||||
@ -1580,7 +1580,7 @@ WRITE8_MEMBER( cmi_state::fdc_w )
|
||||
|
||||
READ8_MEMBER( cmi_state::fdc_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0;
|
||||
|
||||
if (offset == 0)
|
||||
@ -2002,7 +2002,7 @@ WRITE8_MEMBER( cmi01a_device::write )
|
||||
|
||||
READ8_MEMBER( cmi01a_device::read )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0;
|
||||
|
||||
uint8_t data = 0;
|
||||
@ -2076,7 +2076,7 @@ WRITE_LINE_MEMBER( cmi_state::cmi02_ptm_o2 )
|
||||
|
||||
READ8_MEMBER( cmi_state::cmi02_r )
|
||||
{
|
||||
if (machine().side_effect_disabled())
|
||||
if (machine().side_effects_disabled())
|
||||
return 0;
|
||||
|
||||
if (offset <= 0x1f)
|
||||
|
@ -141,7 +141,7 @@ WRITE8_MEMBER( decwriter_state::la120_LED_w )
|
||||
READ8_MEMBER( decwriter_state::la120_NVR_r )
|
||||
{
|
||||
// one wait state inserted
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_maincpu->adjust_icount(-1);
|
||||
|
||||
return (m_nvm->data_r() << 7) | 0x7e;
|
||||
@ -150,7 +150,7 @@ READ8_MEMBER( decwriter_state::la120_NVR_r )
|
||||
WRITE8_MEMBER( decwriter_state::la120_NVR_w )
|
||||
{
|
||||
// one wait state inserted
|
||||
if (!machine().side_effect_disabled())
|
||||
if (!machine().side_effects_disabled())
|
||||
m_maincpu->adjust_icount(-1);
|
||||
|
||||
// ER1400 has negative logic, but 7406 inverters are used
|
||||
|
@ -350,7 +350,7 @@ READ16_MEMBER(esq5505_state::lower_r)
|
||||
m_ram = (uint16_t *)(void *)memshare("osram")->ptr();
|
||||
}
|
||||
|
||||
if (!machine().side_effect_disabled() && m_maincpu->get_fc() == 0x6) // supervisor mode = ROM
|
||||
if (!machine().side_effects_disabled() && m_maincpu->get_fc() == 0x6) // supervisor mode = ROM
|
||||
{
|
||||
return m_rom[offset];
|
||||
}
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user