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https://github.com/holub/mame
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(MESS) gameboy: added emulation of Rockman 8 pirate cart by Yong Yong. [Fabio Priuli]
(MESS) gameboy: added correct handling of Echo RAM, needed by Rockman 8. [Fabio Priuli] (MESS) gbcolor: added proper type to Stone Age / Shi Qi Shi Dai, making it working on gbpocket (it freezes on gb/gbc due to unemulated interaction with the bios). nw. also backing up some wip code which I'm not sure when I will have time to improve...
This commit is contained in:
Fabio Priuli
parent
f54c1e6f5b
commit
c581dbaf04
@ -23500,6 +23500,20 @@
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<!-- Other Asian pirate carts -->
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<software name="rockman8">
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<description>Rockman 8 (Chi)</description>
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<year>1999</year>
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<publisher>Yong Yong</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_rock8" />
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<dataarea name="rom" size="262144">
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<rom name="rockman 8 (hong kong) [p1].bin" size="262144" crc="cc131a94" sha1="496575adfb1296f2f99c00e06e5ca5ee4daf1a12" offset="000000" />
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</dataarea>
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<dataarea name="ram" size="8192">
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</dataarea>
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</part>
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</software>
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<software name="sml4" cloneof="crayon4">
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<description>Super Mario Land 4 (Chi)</description>
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<year>1997?</year>
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@ -23610,7 +23624,7 @@
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</part>
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</software>
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<software name="lasama" supported="no">
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<software name="lasama">
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<description>La Sa Ma Chuan Qi - Story of Lasama (Tw)</description>
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<year>19??</year>
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<publisher>GOWIN</publisher>
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@ -23625,19 +23639,6 @@
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</part>
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</software>
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<software name="lasamah" cloneof="lasama" supported="no">
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<description>La Sa Ma Chuan Qi - Story of Lasama (Tw, Hacked)</description>
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<year>19??</year>
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<publisher>GOWIN</publisher>
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<info name="serial" value="GS-04"/>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="65536">
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<rom name="la sa ma chuan qi - story of lasama (unlicensed) [fixed].bin" size="65536" crc="985fcc24" sha1="de0fed7673c525bbcdcc484067dddebba7684462" offset="000000" />
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</dataarea>
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</part>
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</software>
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<software name="magicbal">
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<description>Magic Ball (Tw)</description>
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<year>19??</year>
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@ -23280,6 +23280,22 @@ Undumped Pirates:
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</part>
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</software>
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<software name="3gokum2a" cloneof="3gokum2">
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<description>Zhen San Guo Wu Shuang 2 - Shin Sangokumusou 2 (Chi, Pirate)</description>
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<year>200?</year>
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<publisher><pirate></publisher>
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<info name="alt_title" value="真三國無雙2"/>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc5" />
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<!-- cartridge ram -->
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<dataarea name="rom" size="2097152">
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<rom name="shin san guo shi 2 (unl).bin" size="2097152" crc="33f56c90" sha1="a5111c11cf70c65341b373f484650caae3c4d29f" offset="000000" />
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</dataarea>
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<dataarea name="nvram" size="8192">
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</dataarea>
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</part>
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</software>
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<software name="zzx3">
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<!-- 4MB rom with crc 66442e7d is taizou's cracked version running on base MBC5 -->
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<description>Zhi Zhu Xia III (Chi)</description>
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@ -23931,13 +23947,14 @@ Undumped Pirates:
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</part>
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</software>
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<software name="sqsd" supported="no">
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<!-- works on gbpocket -->
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<software name="sqsd">
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<!-- Alt. Title: 石器時代 精靈王誕生 (Stone Age - Birth of the Goblin King) -->
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<description>Shi Qi Shi Dai - Jing Ling Wang Dan Sheng (Chi)</description>
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<year>20??</year>
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<publisher>GOWIN</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc5" />
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<feature name="slot" value="rom_yong" />
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<!-- cartridge ram -->
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<dataarea name="rom" size="4194304">
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<rom name="stone age (unl).bin" size="4194304" crc="e7d9d377" sha1="f88f605960c1573aa8bc5fafab19014b0d987729" offset="000000" />
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@ -23947,13 +23964,14 @@ Undumped Pirates:
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</part>
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</software>
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<software name="sqsdh" cloneof="sqsd" supported="partial">
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<!-- works on gbpocket -->
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<software name="sqsdh" cloneof="sqsd">
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<!-- Alt. Title: 石器時代 精靈王誕生 (Stone Age - Birth of the Goblin King) -->
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<description>Shi Qi Shi Dai - Jing Ling Wang Dan Sheng (Chi, Hacked?)</description>
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<year>20??</year>
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<publisher>GOWIN</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc5" />
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<feature name="slot" value="rom_yong" />
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<!-- cartridge ram -->
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<dataarea name="rom" size="4194304">
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<rom name="stone age (unl)(hacked).bin" size="4194304" crc="2ffe697c" sha1="b992f280b5dd2095c8f430282c5dba69c6a10eb4" offset="000000" />
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@ -23963,22 +23981,6 @@ Undumped Pirates:
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</part>
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</software>
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<software name="ssangws2">
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<description>Shin Sangoku Musou 2 - Zhen San Guo Wu Shuang 2 (Chi)</description>
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<year>20??</year>
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<publisher><unknown></publisher>
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<info name="alt_title" value="真三國無雙2"/>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc5" />
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<!-- cartridge ram -->
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<dataarea name="rom" size="2097152">
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<rom name="shin san guo shi 2 (unl).bin" size="2097152" crc="33f56c90" sha1="a5111c11cf70c65341b373f484650caae3c4d29f" offset="000000" />
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</dataarea>
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<dataarea name="nvram" size="8192">
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</dataarea>
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</part>
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</software>
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<software name="dquest4">
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<description>Dragon Quest 4 - Yongzhe Dou E Long 4 (Chi)</description>
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<year>20??</year>
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@ -24094,14 +24096,23 @@ Undumped Pirates:
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</part>
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</software>
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<!--
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There are various dumps of this:
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2MB version (CRC 18fd445d) which contains 4 copies of the rom used here
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256KB version (CRC 791f8c86) which contains the first half of the rom used here
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taizou dumped the game also from a multicart and got a 1MB dump containing the rom
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used here repeated twice. we need to redump the standalone cart to confirm the size
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but the 256KB version is definitely underdumped and misses sprite data
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-->
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<software name="sm3sp" supported="no">
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<description>Super Mario 3 Special (Chi, Bad? Protected?)</description>
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<year>200?</year>
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<description>Super Mario 3 Special (Chi)</description>
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<year>2000</year>
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<publisher>Yong Yong</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc1" />
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<dataarea name="rom" size="262144">
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<rom name="super mario 3 special (unl).bin" size="262144" crc="791f8c86" sha1="c5632ea968398d3a342f2639aad7e11122d561ef" offset="000000" />
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<feature name="slot" value="rom_sm3sp" />
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<dataarea name="rom" size="524288">
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<rom name="super mario 3 special (unl).bin" size="524288" crc="5e4266a7" sha1="f493da9f707ad84c4d720687ec1ca3f635dc35c6" offset="000000" />
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</dataarea>
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</part>
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</software>
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@ -24112,7 +24123,7 @@ Undumped Pirates:
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<year>20??</year>
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<publisher>Yong Yong</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc5" />
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<feature name="slot" value="rom_digimon" />
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<dataarea name="rom" size="1048576">
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<rom name="digimon 2 (unl).bin" size="1048576" crc="aabbec08" sha1="b88393318c35fcd63b9bbe8ccd0ce89d971b6163" offset="000000" />
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</dataarea>
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@ -24157,7 +24168,7 @@ Undumped Pirates:
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<year>20??</year>
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<publisher>Yong Yong</publisher>
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<part name="cart" interface="gameboy_cart">
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<feature name="slot" value="rom_mbc5" />
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<feature name="slot" value="rom_digimon" />
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<dataarea name="rom" size="1048576">
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<rom name="digimon 4 (unl).bin" size="1048576" crc="2ee18ab2" sha1="839f0880749735ba2113e437f8efede171b7474d" offset="000000" />
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</dataarea>
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@ -522,6 +522,16 @@ WRITE8_MEMBER(gb_state::gb_ram_w)
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m_cartslot->m_cart->write_ram(space, offset, data);
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}
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READ8_MEMBER(gb_state::gb_echo_r)
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{
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return space.read_byte(0xc000 + offset);
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}
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WRITE8_MEMBER(gb_state::gb_echo_w)
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{
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return space.write_byte(0xc000 + offset, data);
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}
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READ8_MEMBER(megaduck_state::cart_r)
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{
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if (m_cartslot && m_cartslot->m_cart)
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@ -546,11 +556,12 @@ WRITE8_MEMBER(megaduck_state::bank2_w)
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static ADDRESS_MAP_START(gameboy_map, AS_PROGRAM, 8, gb_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x7fff) AM_READWRITE(gb_cart_r, gb_bank_w)
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AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */
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AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */
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AM_RANGE(0xc000, 0xfdff) AM_RAM /* 8k low RAM, echo RAM */
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AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */
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AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, gb_io_w ) /* I/O */
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AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */
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AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */
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AM_RANGE(0xc000, 0xdfff) AM_RAM /* 8k low RAM */
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AM_RANGE(0xe000, 0xfdff) AM_READWRITE(gb_echo_r, gb_echo_w ) /* echo RAM */
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AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */
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AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, gb_io_w ) /* I/O */
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AM_RANGE(0xff10, 0xff26) AM_DEVREADWRITE_LEGACY("custom", gb_sound_r, gb_sound_w ) /* sound registers */
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AM_RANGE(0xff27, 0xff2f) AM_NOP /* unused */
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AM_RANGE(0xff30, 0xff3f) AM_DEVREADWRITE_LEGACY("custom", gb_wave_r, gb_wave_w ) /* Wave ram */
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@ -562,11 +573,12 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START(sgb_map, AS_PROGRAM, 8, gb_state )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x7fff) AM_READWRITE(gb_cart_r, gb_bank_w)
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AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */
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AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */
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AM_RANGE(0xc000, 0xfdff) AM_RAM /* 8k low RAM, echo RAM */
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AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */
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AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, sgb_io_w ) /* I/O */
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AM_RANGE(0x8000, 0x9fff) AM_READWRITE(gb_vram_r, gb_vram_w ) /* 8k VRAM */
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AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */
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AM_RANGE(0xc000, 0xdfff) AM_RAM /* 8k low RAM */
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AM_RANGE(0xe000, 0xfdff) AM_READWRITE(gb_echo_r, gb_echo_w ) /* echo RAM */
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AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */
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AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, sgb_io_w ) /* I/O */
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AM_RANGE(0xff10, 0xff26) AM_DEVREADWRITE_LEGACY("custom", gb_sound_r, gb_sound_w ) /* sound registers */
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AM_RANGE(0xff27, 0xff2f) AM_NOP /* unused */
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AM_RANGE(0xff30, 0xff3f) AM_DEVREADWRITE_LEGACY("custom", gb_wave_r, gb_wave_w ) /* Wave RAM */
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@ -582,7 +594,7 @@ static ADDRESS_MAP_START(gbc_map, AS_PROGRAM, 8, gb_state )
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AM_RANGE(0xa000, 0xbfff) AM_READWRITE(gb_ram_r, gb_ram_w ) /* 8k switched RAM bank (cartridge) */
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AM_RANGE(0xc000, 0xcfff) AM_RAM /* 4k fixed RAM bank */
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AM_RANGE(0xd000, 0xdfff) AM_RAMBANK("cgb_ram") /* 4k switched RAM bank */
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AM_RANGE(0xe000, 0xfdff) AM_RAM /* echo RAM */
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AM_RANGE(0xe000, 0xfdff) AM_READWRITE(gb_echo_r, gb_echo_w ) /* echo RAM */
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AM_RANGE(0xfe00, 0xfeff) AM_READWRITE(gb_oam_r, gb_oam_w ) /* OAM RAM */
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AM_RANGE(0xff00, 0xff0f) AM_READWRITE(gb_io_r, gb_io_w ) /* I/O */
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AM_RANGE(0xff10, 0xff26) AM_DEVREADWRITE_LEGACY("custom", gb_sound_r, gb_sound_w ) /* sound controller */
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@ -647,6 +659,9 @@ static SLOT_INTERFACE_START(gb_cart)
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SLOT_INTERFACE_INTERNAL("rom_camera", GB_STD_ROM)
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SLOT_INTERFACE_INTERNAL("rom_sintax", GB_ROM_SINTAX)
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SLOT_INTERFACE_INTERNAL("rom_chong", GB_ROM_CHONGWU)
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SLOT_INTERFACE_INTERNAL("rom_digimon", GB_ROM_DIGIMON)
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SLOT_INTERFACE_INTERNAL("rom_rock8", GB_ROM_ROCKMAN8)
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SLOT_INTERFACE_INTERNAL("rom_sm3sp", GB_ROM_SM3SP)
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SLOT_INTERFACE_END
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static SLOT_INTERFACE_START(megaduck_cart)
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@ -205,6 +205,8 @@ public:
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DECLARE_WRITE8_MEMBER(gb_bank_w);
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DECLARE_READ8_MEMBER(gb_ram_r);
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DECLARE_WRITE8_MEMBER(gb_ram_w);
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DECLARE_READ8_MEMBER(gb_echo_r);
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DECLARE_WRITE8_MEMBER(gb_echo_w);
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optional_device<gb_cart_slot_device> m_cartslot;
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protected:
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@ -26,6 +26,9 @@ const device_type GB_ROM_MBC7 = &device_creator<gb_rom_mbc7_device>;
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const device_type GB_ROM_MMM01 = &device_creator<gb_rom_mmm01_device>;
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const device_type GB_ROM_SINTAX = &device_creator<gb_rom_sintax_device>;
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const device_type GB_ROM_CHONGWU = &device_creator<gb_rom_chongwu_device>;
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const device_type GB_ROM_DIGIMON = &device_creator<gb_rom_digimon_device>;
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const device_type GB_ROM_ROCKMAN8 = &device_creator<gb_rom_rockman8_device>;
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const device_type GB_ROM_SM3SP = &device_creator<gb_rom_sm3sp_device>;
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gb_rom_mbc_device::gb_rom_mbc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
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@ -89,6 +92,21 @@ gb_rom_chongwu_device::gb_rom_chongwu_device(const machine_config &mconfig, cons
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{
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}
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gb_rom_digimon_device::gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: gb_rom_mbc5_device(mconfig, GB_ROM_DIGIMON, "GB Digimon", tag, owner, clock)
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{
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}
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gb_rom_rockman8_device::gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: gb_rom_mbc_device(mconfig, GB_ROM_ROCKMAN8, "GB MBC1 Rockman 8", tag, owner, clock)
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{
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}
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gb_rom_sm3sp_device::gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: gb_rom_mbc_device(mconfig, GB_ROM_SM3SP, "GB MBC1 Super Mario 3 Special", tag, owner, clock)
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{
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}
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void gb_rom_mbc_device::device_start()
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{
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@ -305,6 +323,57 @@ void gb_rom_chongwu_device::device_start()
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save_item(NAME(m_protection_checked));
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}
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void gb_rom_digimon_device::device_start()
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{
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has_timer = FALSE;
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has_rumble = FALSE;
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m_latch_bank = 0;
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m_latch_bank2 = 1;
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m_ram_bank = 0;
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m_ram_enable = 0;
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m_mode = 0;
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save_item(NAME(m_latch_bank));
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save_item(NAME(m_latch_bank2));
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save_item(NAME(m_ram_bank));
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save_item(NAME(m_ram_enable));
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save_item(NAME(m_mode));
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}
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void gb_rom_rockman8_device::device_start()
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{
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has_timer = FALSE;
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has_rumble = FALSE;
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m_latch_bank = 0;
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m_latch_bank2 = 1;
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m_ram_bank = 0;
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m_ram_enable = 0;
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m_mode = 0;
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save_item(NAME(m_latch_bank));
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save_item(NAME(m_latch_bank2));
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save_item(NAME(m_ram_bank));
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save_item(NAME(m_ram_enable));
|
||||
save_item(NAME(m_mode));
|
||||
}
|
||||
|
||||
void gb_rom_sm3sp_device::device_start()
|
||||
{
|
||||
has_timer = FALSE;
|
||||
has_rumble = FALSE;
|
||||
|
||||
m_latch_bank = 0;
|
||||
m_latch_bank2 = 1;
|
||||
m_ram_bank = 0;
|
||||
m_ram_enable = 0;
|
||||
m_mode = 0;
|
||||
save_item(NAME(m_latch_bank));
|
||||
save_item(NAME(m_latch_bank2));
|
||||
save_item(NAME(m_ram_bank));
|
||||
save_item(NAME(m_ram_enable));
|
||||
save_item(NAME(m_mode));
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
mapper specific handlers
|
||||
@ -573,15 +642,17 @@ WRITE8_MEMBER(gb_rom_mbc5_device::write_bank)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0;
|
||||
else if (offset < 0x4000)
|
||||
else if (offset < 0x3000)
|
||||
{
|
||||
// MBC5 has a 9 bit bank select
|
||||
// Writing into 2000-2fff sets the lower 8 bits
|
||||
m_latch_bank2 = (m_latch_bank2 & 0x100) | data;
|
||||
}
|
||||
else if (offset < 0x4000)
|
||||
{
|
||||
// MBC5 has a 9 bit bank select
|
||||
// Writing into 3000-3fff sets the 9th bit
|
||||
if (offset & 0x1000)
|
||||
m_latch_bank2 = (m_latch_bank2 & 0xff) | ((data & 0x01) << 8);
|
||||
else
|
||||
m_latch_bank2 = (m_latch_bank2 & 0x100) | data;
|
||||
m_latch_bank2 = (m_latch_bank2 & 0xff) | ((data & 0x01) << 8);
|
||||
}
|
||||
else if (offset < 0x6000)
|
||||
{
|
||||
@ -897,3 +968,219 @@ WRITE8_MEMBER(gb_rom_sintax_device::write_ram)
|
||||
m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data;
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
Further MBC5 variants to emulate:
|
||||
|
||||
Digimon 2 & Digimon 4 (Yong Yong)
|
||||
|
||||
Digimon 2 writes at $2000 to select latch2 (data must be divided by 2, and 0 becomes 1),
|
||||
then writes to $2400 a series of values that the patched version does not write...
|
||||
Digimon 4 seems to share part of the $2000 behavior, but does not write to $2400...
|
||||
|
||||
*/
|
||||
|
||||
// MBC5 variant used by Digimon 2 (and maybe 4?)
|
||||
|
||||
READ8_MEMBER(gb_rom_digimon_device::read_rom)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)];
|
||||
else
|
||||
return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_digimon_device::write_bank)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0;
|
||||
else if (offset == 0x2000)
|
||||
{
|
||||
// printf("written $02 %X at %X\n", data, offset);
|
||||
if (!data)
|
||||
data++;
|
||||
m_latch_bank2 = data/2;
|
||||
}
|
||||
else if (offset < 0x3000)
|
||||
{
|
||||
// printf("written $03 %X at %X\n", data, offset);
|
||||
}
|
||||
else if (offset < 0x4000)
|
||||
{
|
||||
// printf("written $04 %X at %X\n", data, offset);
|
||||
}
|
||||
else if (offset < 0x6000)
|
||||
{
|
||||
// printf("written $05-$06 %X at %X\n", data, offset);
|
||||
data &= 0x0f;
|
||||
if (has_rumble)
|
||||
data &= 0x7;
|
||||
m_ram_bank = data;
|
||||
}
|
||||
// else
|
||||
// printf("written $07 %X at %X\n", data, offset);
|
||||
}
|
||||
|
||||
READ8_MEMBER(gb_rom_digimon_device::read_ram)
|
||||
{
|
||||
if (m_ram && m_ram_enable)
|
||||
return m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)];
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_digimon_device::write_ram)
|
||||
{
|
||||
if (m_ram && m_ram_enable)
|
||||
m_ram[ram_bank_map[m_ram_bank] * 0x2000 + (offset & 0x1fff)] = data;
|
||||
}
|
||||
|
||||
|
||||
// MBC1 variant used by Yong Yong for Rockman 8
|
||||
|
||||
READ8_MEMBER(gb_rom_rockman8_device::read_rom)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
return m_rom[m_latch_bank * 0x4000 + (offset & 0x3fff)];
|
||||
else
|
||||
return m_rom[m_latch_bank2 * 0x4000 + (offset & 0x3fff)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_rockman8_device::write_bank)
|
||||
{
|
||||
if (offset < 0x2000)
|
||||
return;
|
||||
else if (offset < 0x4000)
|
||||
{
|
||||
// 5bits only
|
||||
data &= 0x1f;
|
||||
if (data == 0)
|
||||
data = 1;
|
||||
if (data > 0xf)
|
||||
data -= 8;
|
||||
|
||||
m_latch_bank2 = data;
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(gb_rom_rockman8_device::read_ram)
|
||||
{
|
||||
if (m_ram)
|
||||
return m_ram[offset];
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_rockman8_device::write_ram)
|
||||
{
|
||||
if (m_ram)
|
||||
m_ram[offset] = data;
|
||||
}
|
||||
|
||||
// MBC1 variant used by Yong Yong for Super Mario 3 Special
|
||||
|
||||
// Mario special seems to be 512k image (mirrored up to 1m or 2m [redump needed to establish this])
|
||||
// it consists of 13 unique 16k chunks layed out as follows
|
||||
// unique chunk --> bank in bin
|
||||
// 1st to 7th --> 0x00 to 0x06
|
||||
// 8th --> 0x08
|
||||
// 9th --> 0x0b
|
||||
// 10th --> 0x0c
|
||||
// 11th --> 0x0d
|
||||
// 12th --> 0x0f
|
||||
// 13th --> 0x13
|
||||
|
||||
// writing data to 0x2000-0x2fff switches bank according to the table below
|
||||
// (the value values corresponding to table[0x0f] is not confirmed, choices
|
||||
// 0,1,2,3,8,c,f freeze the game, while 4,5,6,7,b,d,0x13 work with glitches)
|
||||
static UINT8 smb3_table1[0x20] =
|
||||
{
|
||||
0x00,0x04,0x01,0x05, 0x02,0x06,0x03,0x05, 0x08,0x0c,0x03,0x0d, 0x03,0x0b,0x0b,0x08 /* original doc here put 0x0f (i.e. 11th unique bank) */,
|
||||
0x05,0x06,0x0b,0x0d, 0x08,0x06,0x13,0x0b, 0x08,0x05,0x05,0x08, 0x0b,0x0d,0x06,0x05
|
||||
};
|
||||
|
||||
// according to old doc from Brian Provinciano, writing bit5 in 0x5000-0x5fff should
|
||||
// change the bank layout, in the sense that writing to bankswitch acts like if
|
||||
// the original rom has a different layout (as if unique chunks were under permutations
|
||||
// (24), (365) and (8a9) with 0,1,7,b,c fixed) and the same table above is used
|
||||
// however, no such a write ever happen (only bit4 is written, but changing mode with
|
||||
// bit4 breaks the gfx...)
|
||||
|
||||
READ8_MEMBER(gb_rom_sm3sp_device::read_rom)
|
||||
{
|
||||
if (offset < 0x4000)
|
||||
return m_rom[rom_bank_map[0] * 0x4000 + (offset & 0x3fff)];
|
||||
else
|
||||
return m_rom[m_latch_bank2 * 0x4000 + (offset & 0x3fff)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_sm3sp_device::write_bank)
|
||||
{
|
||||
// printf("write 0x%x at %x\n", data, offset);
|
||||
if (offset < 0x2000)
|
||||
return;
|
||||
else if (offset < 0x3000)
|
||||
{
|
||||
// Table 1 confirmed...
|
||||
// 0->0, 4->2, 6->3
|
||||
// 1e -> 6 (level 1 bg gfx)
|
||||
// 19 -> 5 (level 2 bg gfx)
|
||||
// 1b -> 8 (level 3 bg gfx)
|
||||
// 1d -> D (level 4 bg gfx)
|
||||
// 1c -> B (bonus house bg gfx)
|
||||
// 1 (9 maybe, or 3)? f (5 maybe)? 2->1?
|
||||
// 16 -> 4-8? b?
|
||||
|
||||
// 5bits only
|
||||
data &= 0x1f;
|
||||
|
||||
m_latch_bank2 = smb3_table1[data];
|
||||
if (m_mode)
|
||||
{
|
||||
switch (m_latch_bank2)
|
||||
{
|
||||
case 0x02: m_latch_bank2 = 4; break;
|
||||
case 0x03: m_latch_bank2 = 6; break;
|
||||
case 0x04: m_latch_bank2 = 2; break;
|
||||
case 0x05: m_latch_bank2 = 3; break;
|
||||
case 0x06: m_latch_bank2 = 5; break;
|
||||
case 0x0b: m_latch_bank2 = 0xd; break;
|
||||
case 0x0c: m_latch_bank2 = 0xb; break;
|
||||
case 0x0d: m_latch_bank2 = 0xc; break;
|
||||
|
||||
case 0x00:
|
||||
case 0x01:
|
||||
case 0x08:
|
||||
case 0x0f:
|
||||
case 0x13:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (offset < 0x5000)
|
||||
{
|
||||
// printf("write $5 %x\n", data);
|
||||
//maybe rumble??
|
||||
}
|
||||
else if (offset < 0x6000)
|
||||
{
|
||||
// printf("write mode %x\n", data);
|
||||
m_mode = BIT(data, 5);
|
||||
// write_bank(space, 0x2000, 1);
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(gb_rom_sm3sp_device::read_ram)
|
||||
{
|
||||
if (m_ram)
|
||||
return m_ram[offset];
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gb_rom_sm3sp_device::write_ram)
|
||||
{
|
||||
if (m_ram)
|
||||
m_ram[offset] = data;
|
||||
}
|
||||
|
||||
@ -189,6 +189,24 @@ public:
|
||||
UINT8 m_protection_checked;
|
||||
};
|
||||
|
||||
// ======================> gb_rom_digimon_device
|
||||
|
||||
class gb_rom_digimon_device : public gb_rom_mbc5_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
gb_rom_digimon_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_config_complete() { m_shortname = "gb_rom_digimon"; }
|
||||
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank);
|
||||
virtual DECLARE_READ8_MEMBER(read_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram);
|
||||
};
|
||||
|
||||
// ======================> gb_rom_sintax_device
|
||||
class gb_rom_sintax_device : public gb_rom_mbc_device
|
||||
{
|
||||
@ -211,6 +229,44 @@ public:
|
||||
UINT8 m_currentxor, m_xor2, m_xor3, m_xor4, m_xor5, m_sintax_mode;
|
||||
};
|
||||
|
||||
// ======================> gb_rom_rockman8_device
|
||||
class gb_rom_rockman8_device : public gb_rom_mbc_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
gb_rom_rockman8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_config_complete() { m_shortname = "gb_rom_rockman8"; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank);
|
||||
virtual DECLARE_READ8_MEMBER(read_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram);
|
||||
UINT8 m_bank_mask, m_bank, m_reg;
|
||||
};
|
||||
|
||||
// ======================> gb_rom_sm3sp_device
|
||||
class gb_rom_sm3sp_device : public gb_rom_mbc_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
gb_rom_sm3sp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_config_complete() { m_shortname = "gb_rom_sm3sp"; }
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ8_MEMBER(read_rom);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_bank);
|
||||
virtual DECLARE_READ8_MEMBER(read_ram);
|
||||
virtual DECLARE_WRITE8_MEMBER(write_ram);
|
||||
UINT8 m_bank_mask, m_bank, m_reg;
|
||||
};
|
||||
|
||||
|
||||
|
||||
// device type definition
|
||||
@ -225,5 +281,8 @@ extern const device_type GB_ROM_MBC7;
|
||||
extern const device_type GB_ROM_MMM01;
|
||||
extern const device_type GB_ROM_SINTAX;
|
||||
extern const device_type GB_ROM_CHONGWU;
|
||||
extern const device_type GB_ROM_DIGIMON;
|
||||
extern const device_type GB_ROM_ROCKMAN8;
|
||||
extern const device_type GB_ROM_SM3SP;
|
||||
|
||||
#endif
|
||||
|
||||
@ -216,6 +216,9 @@ static const gb_slot slot_list[] =
|
||||
{ GB_MBC_ATVRACIN, "rom_atvrac" },
|
||||
{ GB_MBC_SINTAX, "rom_sintax" },
|
||||
{ GB_MBC_CHONGWU, "rom_chong" },
|
||||
{ GB_MBC_DIGIMON, "rom_digimon" },
|
||||
{ GB_MBC_ROCKMAN8, "rom_rock8" },
|
||||
{ GB_MBC_SM3SP, "rom_sm3sp" },
|
||||
{ GB_MBC_CAMERA, "rom_camera" }
|
||||
};
|
||||
|
||||
|
||||
@ -29,6 +29,9 @@ enum
|
||||
GB_MBC_CAMERA,
|
||||
GB_MBC_SINTAX,
|
||||
GB_MBC_CHONGWU,
|
||||
GB_MBC_DIGIMON,
|
||||
GB_MBC_ROCKMAN8,
|
||||
GB_MBC_SM3SP,
|
||||
GB_MBC_MEGADUCK, /* MEGADUCK style banking */
|
||||
GB_MBC_UNKNOWN /* Unknown mapper */
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user