mirror of
https://github.com/holub/mame
synced 2025-07-09 19:57:45 +03:00
Demoted svi318 to skeleton (nw)
This commit is contained in:
Miodrag Milanovic
parent
0942111794
commit
c5836d89d7
@ -2603,8 +2603,6 @@ files {
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createMESSProjects(_target, _subtarget, "svi")
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files {
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MAME_DIR .. "src/mame/drivers/svi318.cpp",
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MAME_DIR .. "src/mame/includes/svi318.h",
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MAME_DIR .. "src/mame/machine/svi318.cpp",
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}
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createMESSProjects(_target, _subtarget, "svision")
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@ -1,10 +1,8 @@
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// license:???
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// copyright-holders:Sean Young,Tomas Karlsson
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// license:BSD-3-Clause
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// copyright-holders:Sean Young
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/*
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** svi318.c : driver for Spectravideo SVI-318 and SVI-328
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**
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** Sean Young, Tomas Karlsson
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**
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** Information taken from: http://www.samdal.com/sv318.htm
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**
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** SV-318 : 16KB Video RAM, 16KB RAM
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@ -12,30 +10,114 @@
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*/
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#include "emu.h"
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#include "includes/svi318.h"
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#include "cpu/z80/z80.h"
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#include "machine/i8255.h"
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#include "machine/ins8250.h"
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#include "machine/wd_fdc.h"
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#include "machine/ram.h"
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#include "machine/buffer.h"
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#include "imagedev/cassette.h"
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#include "sound/dac.h"
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#include "sound/ay8910.h"
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#include "sound/wave.h"
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#include "video/mc6845.h"
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#include "video/tms9928a.h"
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#include "bus/centronics/ctronics.h"
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#include "bus/generic/slot.h"
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#include "bus/generic/carts.h"
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#include "imagedev/flopdrv.h"
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#include "formats/svi_dsk.h"
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#include "formats/svi_cas.h"
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#include "softlist.h"
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#include "rendlay.h"
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class svi318_state : public driver_device
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{
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public:
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svi318_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_cassette(*this, "cassette"),
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m_dac(*this, "dac"),
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m_ppi(*this, "ppi8255"),
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m_ram(*this, RAM_TAG),
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m_centronics(*this, "centronics"),
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m_cent_data_out(*this, "cent_data_out"),
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m_ins8250_0(*this, "ins8250_0"),
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m_ins8250_1(*this, "ins8250_1"),
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m_cart(*this, "cartslot"),
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m_fd1793(*this, "wd179x"),
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m_floppy0(*this, "wd179x:0"),
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m_floppy1(*this, "wd179x:1"),
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m_crtc(*this, "crtc"),
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m_line(*this, "LINE"),
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m_joysticks(*this, "JOYSTICKS"),
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m_buttons(*this, "BUTTONS"),
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m_palette(*this, "palette"),
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m_bank1(*this, "bank1"),
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m_bank2(*this, "bank2"),
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m_bank3(*this, "bank3"),
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m_bank4(*this, "bank4")
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{ }
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DECLARE_FLOPPY_FORMATS(floppy_formats);
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DECLARE_WRITE_LINE_MEMBER(vdp_interrupt);
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// FDC
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int m_drq;
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int m_irq;
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virtual void machine_start() override;
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virtual void machine_reset() override;
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memory_region *m_cart_rom;
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memory_region *m_bios_rom;
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protected:
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required_device<z80_device> m_maincpu;
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required_device<cassette_image_device> m_cassette;
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required_device<dac_device> m_dac;
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required_device<i8255_device> m_ppi;
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required_device<ram_device> m_ram;
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required_device<centronics_device> m_centronics;
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required_device<output_latch_device> m_cent_data_out;
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required_device<ins8250_device> m_ins8250_0;
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required_device<ins8250_device> m_ins8250_1;
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required_device<generic_slot_device> m_cart;
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required_device<fd1793_t> m_fd1793;
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required_device<floppy_connector> m_floppy0;
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required_device<floppy_connector> m_floppy1;
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optional_device<mc6845_device> m_crtc;
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required_ioport_array<11> m_line;
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required_ioport m_joysticks;
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required_ioport m_buttons;
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optional_device<palette_device> m_palette;
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private:
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required_memory_bank m_bank1;
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required_memory_bank m_bank2;
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required_memory_bank m_bank3;
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optional_memory_bank m_bank4;
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};
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static ADDRESS_MAP_START( svi318_mem, AS_PROGRAM, 8, svi318_state )
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AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(writemem1)
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AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(writemem2)
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AM_RANGE(0xc000, 0xffff) AM_READ_BANK("bank3") AM_WRITE(writemem3)
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//AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(writemem1)
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//AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(writemem2)
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//AM_RANGE(0xc000, 0xffff) AM_READ_BANK("bank3") AM_WRITE(writemem3)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( svi328_806_mem, AS_PROGRAM, 8, svi318_state )
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AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(writemem1)
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AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(writemem2)
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AM_RANGE(0xc000, 0xefff) AM_READ_BANK("bank3") AM_WRITE(writemem3)
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AM_RANGE(0xf000, 0xffff) AM_READ_BANK("bank4") AM_WRITE(writemem4)
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//AM_RANGE(0x0000, 0x7fff) AM_READ_BANK("bank1") AM_WRITE(writemem1)
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//AM_RANGE(0x8000, 0xbfff) AM_READ_BANK("bank2") AM_WRITE(writemem2)
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//AM_RANGE(0xc000, 0xefff) AM_READ_BANK("bank3") AM_WRITE(writemem3)
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//AM_RANGE(0xf000, 0xffff) AM_READ_BANK("bank4") AM_WRITE(writemem4)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( svi318_io, AS_IO, 8, svi318_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x00, 0x38) AM_READWRITE(io_ext_r, io_ext_w )
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//AM_RANGE(0x00, 0x38) AM_READWRITE(io_ext_r, io_ext_w )
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AM_RANGE(0x80, 0x80) AM_DEVWRITE("tms9928a", tms9928a_device, vram_write)
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AM_RANGE(0x81, 0x81) AM_DEVWRITE("tms9928a", tms9928a_device, register_write)
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AM_RANGE(0x84, 0x84) AM_DEVREAD("tms9928a", tms9928a_device, vram_read)
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@ -43,14 +125,14 @@ static ADDRESS_MAP_START( svi318_io, AS_IO, 8, svi318_state )
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AM_RANGE(0x88, 0x88) AM_DEVWRITE("ay8910", ay8910_device, address_w)
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AM_RANGE(0x8c, 0x8c) AM_DEVWRITE("ay8910", ay8910_device, data_w)
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AM_RANGE(0x90, 0x90) AM_DEVREAD("ay8910", ay8910_device, data_r)
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AM_RANGE(0x96, 0x97) AM_WRITE(ppi_w)
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//AM_RANGE(0x96, 0x97) AM_WRITE(ppi_w)
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AM_RANGE(0x98, 0x9a) AM_DEVREAD("ppi8255", i8255_device, read)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( svi328_806_io, AS_IO, 8, svi318_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x00, 0x58) AM_READWRITE(io_ext_r, io_ext_w )
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//AM_RANGE(0x00, 0x58) AM_READWRITE(io_ext_r, io_ext_w )
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AM_RANGE(0x80, 0x80) AM_DEVWRITE("tms9928a", tms9928a_device, vram_write)
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AM_RANGE(0x81, 0x81) AM_DEVWRITE("tms9928a", tms9928a_device, register_write)
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AM_RANGE(0x84, 0x84) AM_DEVREAD("tms9928a", tms9928a_device, vram_read)
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@ -58,7 +140,7 @@ static ADDRESS_MAP_START( svi328_806_io, AS_IO, 8, svi318_state )
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AM_RANGE(0x88, 0x88) AM_DEVWRITE("ay8910", ay8910_device, address_w)
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AM_RANGE(0x8c, 0x8c) AM_DEVWRITE("ay8910", ay8910_device, data_w)
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AM_RANGE(0x90, 0x90) AM_DEVREAD("ay8910", ay8910_device, data_r)
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AM_RANGE(0x96, 0x97) AM_WRITE(ppi_w)
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//AM_RANGE(0x96, 0x97) AM_WRITE(ppi_w)
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AM_RANGE(0x98, 0x9a) AM_DEVREAD("ppi8255", i8255_device, read)
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ADDRESS_MAP_END
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@ -257,7 +339,7 @@ SLOT_INTERFACE_END
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static MACHINE_CONFIG_FRAGMENT( svi318_cartslot )
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MCFG_GENERIC_CARTSLOT_ADD("cartslot", generic_plain_slot, "svi318_cart")
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MCFG_GENERIC_EXTENSIONS("bin,rom")
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MCFG_GENERIC_LOAD(svi318_state, svi318_cart)
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//MCFG_GENERIC_LOAD(svi318_state, svi318_cart)
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/* Software lists */
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MCFG_SOFTWARE_LIST_ADD("cart_list","svi318_cart")
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@ -271,21 +353,21 @@ static MACHINE_CONFIG_START( svi318, svi318_state )
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MCFG_QUANTUM_TIME(attotime::from_hz(60))
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MCFG_DEVICE_ADD("ppi8255", I8255, 0)
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MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, ppi_port_a_r))
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MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, ppi_port_b_r))
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MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, ppi_port_c_w))
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//MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, ppi_port_a_r))
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//MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, ppi_port_b_r))
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//MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, ppi_port_c_w))
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MCFG_DEVICE_ADD("ins8250_0", INS8250, 1000000)
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MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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//MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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MCFG_DEVICE_ADD("ins8250_1", INS8250, 3072000)
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MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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//MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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/* Video hardware */
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MCFG_DEVICE_ADD("tms9928a", TMS9929A, XTAL_10_738635MHz / 2)
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MCFG_TMS9928A_VRAM_SIZE(0x4000)
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MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt))
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//MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt))
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MCFG_TMS9928A_SCREEN_ADD_PAL("screen")
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MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9929a_device, screen_update)
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//MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9929a_device, screen_update)
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/* Sound hardware */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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@ -294,13 +376,13 @@ static MACHINE_CONFIG_START( svi318, svi318_state )
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MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
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MCFG_SOUND_ADD("ay8910", AY8910, 1789773)
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MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, psg_port_a_r))
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MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, psg_port_b_w))
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//MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, psg_port_a_r))
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//MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, psg_port_b_w))
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
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/* printer */
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MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer")
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MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(svi318_state, write_centronics_busy))
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//MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(svi318_state, write_centronics_busy))
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MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
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@ -312,8 +394,8 @@ static MACHINE_CONFIG_START( svi318, svi318_state )
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MCFG_SOFTWARE_LIST_ADD("cass_list", "svi318_cass")
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MCFG_FD1793_ADD("wd179x", XTAL_1MHz)
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MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(svi318_state, fdc_intrq_w))
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MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(svi318_state, fdc_drq_w))
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//MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(svi318_state, fdc_intrq_w))
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//MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(svi318_state, fdc_drq_w))
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MCFG_FLOPPY_DRIVE_ADD("wd179x:0", svi_floppies, "dd", svi318_state::floppy_formats)
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MCFG_FLOPPY_DRIVE_ADD("wd179x:1", svi_floppies, "dd", svi318_state::floppy_formats)
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@ -334,9 +416,9 @@ static MACHINE_CONFIG_DERIVED( svi318n, svi318 )
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MCFG_DEVICE_REMOVE("screen")
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MCFG_DEVICE_ADD("tms9928a", TMS9928A, XTAL_10_738635MHz / 2)
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MCFG_TMS9928A_VRAM_SIZE(0x4000)
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MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt))
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//MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt))
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MCFG_TMS9928A_SCREEN_ADD_NTSC("screen")
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MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
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//MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9928a_device, screen_update)
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( svi328, svi318 )
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@ -382,24 +464,24 @@ static MACHINE_CONFIG_START( svi328_806, svi318_state )
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MCFG_QUANTUM_TIME(attotime::from_hz(60))
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MCFG_DEVICE_ADD("ppi8255", I8255, 0)
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MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, ppi_port_a_r))
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MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, ppi_port_b_r))
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MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, ppi_port_c_w))
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//MCFG_I8255_IN_PORTA_CB(READ8(svi318_state, ppi_port_a_r))
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//MCFG_I8255_IN_PORTB_CB(READ8(svi318_state, ppi_port_b_r))
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//MCFG_I8255_OUT_PORTC_CB(WRITE8(svi318_state, ppi_port_c_w))
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MCFG_DEVICE_ADD("ins8250_0", INS8250, 1000000)
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MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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//MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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MCFG_DEVICE_ADD("ins8250_1", INS8250, 3072000)
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MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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//MCFG_INS8250_OUT_INT_CB(WRITELINE(svi318_state, ins8250_interrupt))
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/* Video hardware */
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MCFG_DEFAULT_LAYOUT(layout_dualhsxs)
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MCFG_DEVICE_ADD("tms9928a", TMS9929A, XTAL_10_738635MHz / 2)
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MCFG_TMS9928A_VRAM_SIZE(0x4000)
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MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt))
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//MCFG_TMS9928A_OUT_INT_LINE_CB(WRITELINE(svi318_state, vdp_interrupt))
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MCFG_TMS9928A_SET_SCREEN("screen")
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MCFG_TMS9928A_SCREEN_ADD_PAL("screen")
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MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9929a_device, screen_update)
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//MCFG_SCREEN_UPDATE_DEVICE("tms9928a", tms9929a_device, screen_update)
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MCFG_PALETTE_ADD("palette", TMS9928A_PALETTE_SIZE + 2) /* 2 additional entries for monochrome svi806 output */
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MCFG_SCREEN_ADD("svi806", RASTER)
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@ -407,14 +489,14 @@ static MACHINE_CONFIG_START( svi328_806, svi318_state )
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
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MCFG_SCREEN_SIZE(640, 400)
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MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 400-1)
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MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update)
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//MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update)
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", svi328)
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MCFG_MC6845_ADD("crtc", MC6845, "svi806", XTAL_12MHz / 8)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(8) /* ? */
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MCFG_MC6845_UPDATE_ROW_CB(svi318_state, crtc_update_row)
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//MCFG_MC6845_UPDATE_ROW_CB(svi318_state, crtc_update_row)
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/* Sound hardware */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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@ -423,13 +505,13 @@ static MACHINE_CONFIG_START( svi328_806, svi318_state )
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MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
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MCFG_SOUND_ADD("ay8910", AY8910, 1789773)
|
||||
MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, psg_port_a_r))
|
||||
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, psg_port_b_w))
|
||||
//MCFG_AY8910_PORT_A_READ_CB(READ8(svi318_state, psg_port_a_r))
|
||||
//MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(svi318_state, psg_port_b_w))
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
|
||||
|
||||
/* printer */
|
||||
MCFG_CENTRONICS_ADD("centronics", centronics_devices, "printer")
|
||||
MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(svi318_state, write_centronics_busy))
|
||||
//MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(svi318_state, write_centronics_busy))
|
||||
|
||||
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
|
||||
|
||||
@ -441,8 +523,8 @@ static MACHINE_CONFIG_START( svi328_806, svi318_state )
|
||||
MCFG_SOFTWARE_LIST_ADD("cass_list", "svi318_cass")
|
||||
|
||||
MCFG_FD1793_ADD("wd179x", XTAL_1MHz)
|
||||
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(svi318_state, fdc_intrq_w))
|
||||
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(svi318_state, fdc_drq_w))
|
||||
//MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(svi318_state, fdc_intrq_w))
|
||||
//MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(svi318_state, fdc_drq_w))
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd179x:0", svi_floppies, "dd", svi318_state::floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD("wd179x:1", svi_floppies, "dd", svi318_state::floppy_formats)
|
||||
@ -533,9 +615,9 @@ ROM_END
|
||||
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1983, svi318, 0, 0, svi318, svi318, svi318_state, svi318, "Spectravideo", "SVI-318 (PAL)", MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1983, svi318n, svi318, 0, svi318n, svi318, svi318_state, svi318, "Spectravideo", "SVI-318 (NTSC)", MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1983, svi328, svi318, 0, svi328, svi328, svi318_state, svi318, "Spectravideo", "SVI-328 (PAL)", MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1983, svi328n, svi318, 0, svi328n, svi328, svi318_state, svi318, "Spectravideo", "SVI-328 (NTSC)", MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1983, sv328p80, svi318, 0, svi328_806, svi328, svi318_state, svi328_806, "Spectravideo", "SVI-328 (PAL) + SVI-806 80 column card", MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1983, sv328n80, svi318, 0, svi328n_806, svi328, svi318_state, svi328_806, "Spectravideo", "SVI-328 (NTSC) + SVI-806 80 column card", MACHINE_SUPPORTS_SAVE )
|
||||
COMP( 1983, svi318, 0, 0, svi318, svi318, driver_device, 0, "Spectravideo", "SVI-318 (PAL)", MACHINE_NOT_WORKING )
|
||||
COMP( 1983, svi318n, svi318, 0, svi318n, svi318, driver_device, 0, "Spectravideo", "SVI-318 (NTSC)", MACHINE_NOT_WORKING )
|
||||
COMP( 1983, svi328, svi318, 0, svi328, svi328, driver_device, 0, "Spectravideo", "SVI-328 (PAL)", MACHINE_NOT_WORKING )
|
||||
COMP( 1983, svi328n, svi318, 0, svi328n, svi328, driver_device, 0, "Spectravideo", "SVI-328 (NTSC)", MACHINE_NOT_WORKING )
|
||||
COMP( 1983, sv328p80, svi318, 0, svi328_806, svi328, driver_device, 0, "Spectravideo", "SVI-328 (PAL) + SVI-806 80 column card", MACHINE_NOT_WORKING )
|
||||
COMP( 1983, sv328n80, svi318, 0, svi328n_806, svi328, driver_device, 0, "Spectravideo", "SVI-328 (NTSC) + SVI-806 80 column card", MACHINE_NOT_WORKING )
|
||||
|
||||
@ -1,767 +0,0 @@
|
||||
// license:???
|
||||
// copyright-holders:Sean Young,Tomas Karlsson
|
||||
/*
|
||||
** Spectravideo SVI-318 and SVI-328
|
||||
**
|
||||
** Sean Young, Tomas Karlsson
|
||||
**
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "video/mc6845.h"
|
||||
#include "includes/svi318.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "video/tms9928a.h"
|
||||
#include "imagedev/flopdrv.h"
|
||||
#include "formats/svi_cas.h"
|
||||
#include "sound/ay8910.h"
|
||||
|
||||
enum {
|
||||
SVI_INTERNAL = 0,
|
||||
SVI_CART = 1,
|
||||
SVI_EXPRAM2 = 2,
|
||||
SVI_EXPRAM3 = 3
|
||||
};
|
||||
|
||||
|
||||
/* Serial ports */
|
||||
|
||||
WRITE_LINE_MEMBER(svi318_state::ins8250_interrupt)
|
||||
{
|
||||
if (m_bank_low != SVI_CART)
|
||||
m_maincpu->set_input_line(0, (state ? HOLD_LINE : CLEAR_LINE));
|
||||
}
|
||||
|
||||
#if 0
|
||||
static INS8250_REFRESH_CONNECT( svi318_com_refresh_connected )
|
||||
{
|
||||
/* Motorola MC14412 modem */
|
||||
ins8250_handshake_in(device, UART8250_HANDSHAKE_IN_CTS|UART8250_HANDSHAKE_IN_DSR|UART8250_INPUTS_RING_INDICATOR|UART8250_INPUTS_DATA_CARRIER_DETECT);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Cartridge */
|
||||
|
||||
bool svi318_state::cart_verify(UINT8 *ROM)
|
||||
{
|
||||
if (ROM[0] != 0xf3 || ROM[1] != 0x31)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
DEVICE_IMAGE_LOAD_MEMBER( svi318_state, svi318_cart )
|
||||
{
|
||||
UINT32 size = m_cart->common_get_size("rom");
|
||||
|
||||
if (size > 0x8000)
|
||||
{
|
||||
logerror("Cart image %s larger than expected. Please report the issue.\n", image.filename());
|
||||
return IMAGE_INIT_FAIL;
|
||||
}
|
||||
|
||||
m_cart->rom_alloc(size, GENERIC_ROM8_WIDTH, ENDIANNESS_LITTLE);
|
||||
m_cart->common_load_rom(m_cart->get_rom_base(), size, "rom");
|
||||
|
||||
if (image.software_entry() == nullptr && !cart_verify(m_cart->get_rom_base()))
|
||||
return IMAGE_INIT_FAIL;
|
||||
|
||||
return IMAGE_INIT_PASS;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* PPI */
|
||||
|
||||
/*
|
||||
PPI Port A Input (address 98H)
|
||||
Bit Name Description
|
||||
1 TA Joystick 1, /SENSE
|
||||
2 TB Joystick 1, EOC
|
||||
3 TC Joystick 2, /SENSE
|
||||
4 TD Joystick 2, EOC
|
||||
5 TRIGGER1 Joystick 1, Trigger
|
||||
6 TRIGGER2 Joystick 2, Trigger
|
||||
7 /READY Cassette, Ready
|
||||
8 CASR Cassette, Read data
|
||||
*/
|
||||
|
||||
READ8_MEMBER(svi318_state::ppi_port_a_r)
|
||||
{
|
||||
int data = 0x0f;
|
||||
|
||||
if (m_cassette->input() > 0.0038)
|
||||
data |= 0x80;
|
||||
if (!m_cassette->exists())
|
||||
data |= 0x40;
|
||||
|
||||
data |= m_buttons->read() & 0x30;
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
/*
|
||||
PPI Port B Input (address 99H)
|
||||
Bit Name Description
|
||||
1 IN0 Keyboard, Column status of selected line
|
||||
2 IN1 Keyboard, Column status of selected line
|
||||
3 IN2 Keyboard, Column status of selected line
|
||||
4 IN3 Keyboard, Column status of selected line
|
||||
5 IN4 Keyboard, Column status of selected line
|
||||
6 IN5 Keyboard, Column status of selected line
|
||||
7 IN6 Keyboard, Column status of selected line
|
||||
8 IN7 Keyboard, Column status of selected line
|
||||
*/
|
||||
|
||||
READ8_MEMBER(svi318_state::ppi_port_b_r)
|
||||
{
|
||||
if (m_keyboard_row <= 10)
|
||||
return m_line[m_keyboard_row]->read();
|
||||
else
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
/*
|
||||
PPI Port C Output (address 97H)
|
||||
Bit Name Description
|
||||
1 KB0 Keyboard, Line select 0
|
||||
2 KB1 Keyboard, Line select 1
|
||||
3 KB2 Keyboard, Line select 2
|
||||
4 KB3 Keyboard, Line select 3
|
||||
5 CASON Cassette, Motor relay control (0=on, 1=off)
|
||||
6 CASW Cassette, Write data
|
||||
7 CASAUD Cassette, Audio out (pulse)
|
||||
8 SOUND Keyboard, Click sound bit (pulse)
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(svi318_state::ppi_port_c_w)
|
||||
{
|
||||
int val;
|
||||
|
||||
/* key click */
|
||||
val = (data & 0x80) ? 0x3e : 0;
|
||||
val += (data & 0x40) ? 0x3e : 0;
|
||||
m_dac->write_signed8(val);
|
||||
|
||||
/* cassette motor on/off */
|
||||
if (m_cassette->exists())
|
||||
{
|
||||
m_cassette->change_state(
|
||||
(data & 0x10) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED,
|
||||
CASSETTE_MOTOR_DISABLED);
|
||||
}
|
||||
|
||||
/* cassette signal write */
|
||||
m_cassette->output((data & 0x20) ? -1.0 : +1.0);
|
||||
|
||||
m_keyboard_row = data & 0x0f;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::ppi_w)
|
||||
{
|
||||
m_ppi->write(space, offset + 2, data);
|
||||
}
|
||||
|
||||
|
||||
/* PSG */
|
||||
|
||||
/*
|
||||
PSG Port A Input
|
||||
Bit Name Description
|
||||
1 FWD1 Joystick 1, Forward
|
||||
2 BACK1 Joystick 1, Back
|
||||
3 LEFT1 Joystick 1, Left
|
||||
4 RIGHT1 Joystick 1, Right
|
||||
5 FWD2 Joystick 2, Forward
|
||||
6 BACK2 Joystick 2, Back
|
||||
7 LEFT2 Joystick 2, Left
|
||||
8 RIGHT2 Joystick 2, Right
|
||||
*/
|
||||
|
||||
READ8_MEMBER(svi318_state::psg_port_a_r)
|
||||
{
|
||||
return m_joysticks->read();
|
||||
}
|
||||
|
||||
/*
|
||||
PSG Port B Output
|
||||
Bit Name Description
|
||||
1 /CART Memory bank 11, ROM 0000-7FFF (Cartridge /CCS1, /CCS2)
|
||||
2 /BK21 Memory bank 21, RAM 0000-7FFF
|
||||
3 /BK22 Memory bank 22, RAM 8000-FFFF
|
||||
4 /BK31 Memory bank 31, RAM 0000-7FFF
|
||||
5 /BK32 Memory bank 32, RAM 8000-7FFF
|
||||
6 CAPS Caps-Lock diod
|
||||
7 /ROMEN0 Memory bank 12, ROM 8000-BFFF* (Cartridge /CCS3)
|
||||
8 /ROMEN1 Memory bank 12, ROM C000-FFFF* (Cartridge /CCS4)
|
||||
|
||||
* The /CART signal must be active for any effect and all banks
|
||||
with RAM are disabled.
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(svi318_state::psg_port_b_w)
|
||||
{
|
||||
if ((m_bank_switch ^ data) & 0x20)
|
||||
output().set_led_value(0, !(data & 0x20));
|
||||
|
||||
m_bank_switch = data;
|
||||
set_banks();
|
||||
}
|
||||
|
||||
/* Disk drives */
|
||||
|
||||
WRITE_LINE_MEMBER(svi318_state::fdc_intrq_w)
|
||||
{
|
||||
m_irq = state;
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(svi318_state::fdc_drq_w)
|
||||
{
|
||||
m_drq = state;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::fdc_drive_motor_w)
|
||||
{
|
||||
m_floppy = nullptr;
|
||||
|
||||
if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
|
||||
if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
|
||||
|
||||
m_fd1793->set_floppy(m_floppy);
|
||||
|
||||
if (m_floppy0->get_device())
|
||||
m_floppy0->get_device()->mon_w(!BIT(data, 2));
|
||||
|
||||
if (m_floppy1->get_device())
|
||||
m_floppy1->get_device()->mon_w(!BIT(data, 3));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::fdc_density_side_w)
|
||||
{
|
||||
m_fd1793->dden_w(BIT(data, 0));
|
||||
|
||||
if (m_floppy)
|
||||
m_floppy->ss_w(BIT(data, 1));
|
||||
}
|
||||
|
||||
READ8_MEMBER(svi318_state::fdc_irqdrq_r)
|
||||
{
|
||||
UINT8 result = 0;
|
||||
|
||||
result |= m_drq << 6;
|
||||
result |= m_irq << 7;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
MC6845_UPDATE_ROW( svi318_state::crtc_update_row )
|
||||
{
|
||||
const rgb_t *palette = m_palette->palette()->entry_list_raw();
|
||||
|
||||
for (int i = 0; i < x_count; i++)
|
||||
{
|
||||
UINT8 data = m_svi806_gfx[m_svi806_ram[(ma + i) & 0x7ff] * 16 + ra];
|
||||
|
||||
if (i == cursor_x)
|
||||
{
|
||||
data = 0xff;
|
||||
}
|
||||
|
||||
for (int j = 0; j < 8; j++)
|
||||
{
|
||||
bitmap.pix32(y, i * 8 + j) = palette[TMS9928A_PALETTE_SIZE + BIT(data, 7)];
|
||||
data = data << 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(svi318_state::svi806_ram_enable_w)
|
||||
{
|
||||
m_svi806_ram_enabled = (data & 0x01);
|
||||
set_banks();
|
||||
}
|
||||
|
||||
|
||||
/* Init functions */
|
||||
|
||||
static const UINT8 cc_op[0x100] = {
|
||||
4+1,10+1, 7+1, 6+1, 4+1, 4+1, 7+1, 4+1, 4+1,11+1, 7+1, 6+1, 4+1, 4+1, 7+1, 4+1,
|
||||
8+1,10+1, 7+1, 6+1, 4+1, 4+1, 7+1, 4+1,12+1,11+1, 7+1, 6+1, 4+1, 4+1, 7+1, 4+1,
|
||||
7+1,10+1,16+1, 6+1, 4+1, 4+1, 7+1, 4+1, 7+1,11+1,16+1, 6+1, 4+1, 4+1, 7+1, 4+1,
|
||||
7+1,10+1,13+1, 6+1,11+1,11+1,10+1, 4+1, 7+1,11+1,13+1, 6+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
7+1, 7+1, 7+1, 7+1, 7+1, 7+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 4+1, 7+1, 4+1,
|
||||
5+1,10+1,10+1,10+1,10+1,11+1, 7+1,11+1, 5+1,10+1,10+1, 0+1,10+1,17+1, 7+1,11+1,
|
||||
5+1,10+1,10+1,11+1,10+1,11+1, 7+1,11+1, 5+1, 4+1,10+1,11+1,10+1, 0+1, 7+1,11+1,
|
||||
5+1,10+1,10+1,19+1,10+1,11+1, 7+1,11+1, 5+1, 4+1,10+1, 4+1,10+1, 0+1, 7+1,11+1,
|
||||
5+1,10+1,10+1, 4+1,10+1,11+1, 7+1,11+1, 5+1, 6+1,10+1, 4+1,10+1, 0+1, 7+1,11+1
|
||||
};
|
||||
|
||||
static const UINT8 cc_cb[0x100] = {
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,12+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,15+2, 8+2
|
||||
};
|
||||
|
||||
static const UINT8 cc_ed[0x100] = {
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
12+2,12+2,15+2,20+2, 8+2,14+2, 8+2, 9+2,12+2,12+2,15+2,20+2, 8+2,14+2, 8+2, 9+2,
|
||||
12+2,12+2,15+2,20+2, 8+2,14+2, 8+2, 9+2,12+2,12+2,15+2,20+2, 8+2,14+2, 8+2, 9+2,
|
||||
12+2,12+2,15+2,20+2, 8+2,14+2, 8+2,18+2,12+2,12+2,15+2,20+2, 8+2,14+2, 8+2,18+2,
|
||||
12+2,12+2,15+2,20+2, 8+2,14+2, 8+2, 8+2,12+2,12+2,15+2,20+2, 8+2,14+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
16+2,16+2,16+2,16+2, 8+2, 8+2, 8+2, 8+2,16+2,16+2,16+2,16+2, 8+2, 8+2, 8+2, 8+2,
|
||||
16+2,16+2,16+2,16+2, 8+2, 8+2, 8+2, 8+2,16+2,16+2,16+2,16+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2,
|
||||
8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2, 8+2
|
||||
};
|
||||
|
||||
static const UINT8 cc_xy[0x100] = {
|
||||
4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,15+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,15+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,
|
||||
4+2,14+2,20+2,10+2, 9+2, 9+2, 9+2, 4+2, 4+2,15+2,20+2,10+2, 9+2, 9+2, 9+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2,23+2,23+2,19+2, 4+2, 4+2,15+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
9+2, 9+2, 9+2, 9+2, 9+2, 9+2,19+2, 9+2, 9+2, 9+2, 9+2, 9+2, 9+2, 9+2,19+2, 9+2,
|
||||
19+2,19+2,19+2,19+2,19+2,19+2, 4+2,19+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2, 4+2, 4+2, 4+2, 4+2, 9+2, 9+2,19+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 0+2, 4+2, 4+2, 4+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,
|
||||
4+2,14+2, 4+2,23+2, 4+2,15+2, 4+2, 4+2, 4+2, 8+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,
|
||||
4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2,10+2, 4+2, 4+2, 4+2, 4+2, 4+2, 4+2
|
||||
};
|
||||
|
||||
static const UINT8 cc_xycb[0x100] = {
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,
|
||||
20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,
|
||||
20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,
|
||||
20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,20+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,
|
||||
23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2,23+2
|
||||
};
|
||||
|
||||
/* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
|
||||
static const UINT8 cc_ex[0x100] = {
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
|
||||
5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
|
||||
5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0+1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
5, 5, 5, 5, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
|
||||
6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
|
||||
6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
|
||||
6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
|
||||
6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2+1
|
||||
};
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(svi318_state, svi318)
|
||||
{
|
||||
/* z80 stuff */
|
||||
m_maincpu->z80_set_cycle_tables(cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex);
|
||||
|
||||
m_maincpu->set_input_line_vector(0, 0xff);
|
||||
|
||||
/* memory */
|
||||
m_empty_bank = std::make_unique<UINT8[]>(0x8000);
|
||||
memset(m_empty_bank.get(), 0xff, 0x8000);
|
||||
|
||||
m_bank_low_ptr = m_empty_bank.get();
|
||||
m_bank_high1_ptr = m_empty_bank.get();
|
||||
m_bank_high2_ptr = m_empty_bank.get();
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(svi318_state, svi328_806)
|
||||
{
|
||||
DRIVER_INIT_CALL(svi318);
|
||||
m_svi806_present = 1;
|
||||
}
|
||||
|
||||
void svi318_state::machine_start()
|
||||
{
|
||||
std::string region_tag;
|
||||
m_cart_rom = memregion(region_tag.assign(m_cart->tag()).append(GENERIC_ROM_REGION_TAG).c_str());
|
||||
m_bios_rom = memregion("maincpu");
|
||||
|
||||
// 80 column card start
|
||||
if (m_svi806_present)
|
||||
{
|
||||
// 2K RAM, but allocating 4KB to make banking easier
|
||||
// The upper 2KB will be set to FFs and will never be written to
|
||||
m_svi806_ram.resize(0x1000);
|
||||
save_item(NAME(m_svi806_ram));
|
||||
memset(&m_svi806_ram[0], 0x00, 0x800);
|
||||
memset(&m_svi806_ram[0x800], 0xff, 0x800);
|
||||
|
||||
m_svi806_gfx = memregion("gfx1")->base();
|
||||
|
||||
// Set SVI-806 80 column card palette
|
||||
m_palette->set_pen_color(TMS9928A_PALETTE_SIZE, 0, 0, 0); /* Monochrome black */
|
||||
m_palette->set_pen_color(TMS9928A_PALETTE_SIZE+1, 0, 224, 0); /* Monochrome green */
|
||||
}
|
||||
|
||||
// register for savestates
|
||||
save_item(NAME(m_drq));
|
||||
save_item(NAME(m_irq));
|
||||
|
||||
save_item(NAME(m_bank_switch));
|
||||
save_item(NAME(m_bank_low));
|
||||
save_item(NAME(m_bank_high));
|
||||
save_item(NAME(m_bank_low_read_only));
|
||||
save_item(NAME(m_bank_high1_read_only));
|
||||
save_item(NAME(m_bank_high2_read_only));
|
||||
save_item(NAME(m_keyboard_row));
|
||||
save_item(NAME(m_centronics_busy));
|
||||
|
||||
save_item(NAME(m_svi806_present));
|
||||
save_item(NAME(m_svi806_ram_enabled));
|
||||
|
||||
machine().save().register_postload(save_prepost_delegate(FUNC(svi318_state::postload), this));
|
||||
}
|
||||
|
||||
void svi318_state::machine_reset()
|
||||
{
|
||||
m_keyboard_row = 0;
|
||||
m_centronics_busy = 0;
|
||||
m_svi806_present = 0;
|
||||
m_svi806_ram_enabled = 0;
|
||||
m_drq = 0;
|
||||
m_irq = 0;
|
||||
|
||||
m_bank_low = 0;
|
||||
m_bank_high = 0;
|
||||
m_bank_low_read_only = 0;
|
||||
m_bank_high1_read_only = 0;
|
||||
m_bank_high2_read_only = 0;
|
||||
|
||||
m_bank_switch = 0xff;
|
||||
set_banks();
|
||||
}
|
||||
|
||||
/* Memory */
|
||||
|
||||
WRITE8_MEMBER(svi318_state::writemem1)
|
||||
{
|
||||
if (m_bank_low_read_only)
|
||||
return;
|
||||
|
||||
m_bank_low_ptr[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::writemem2)
|
||||
{
|
||||
if (m_bank_high1_read_only)
|
||||
return;
|
||||
|
||||
m_bank_high1_ptr[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::writemem3)
|
||||
{
|
||||
if (m_bank_high2_read_only)
|
||||
return;
|
||||
|
||||
m_bank_high2_ptr[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::writemem4)
|
||||
{
|
||||
if (m_svi806_ram_enabled)
|
||||
{
|
||||
if (offset < 0x800)
|
||||
m_svi806_ram[offset] = data;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (m_bank_high2_read_only)
|
||||
return;
|
||||
|
||||
m_bank_high2_ptr[0x3000 + offset] = data;
|
||||
}
|
||||
}
|
||||
|
||||
void svi318_state::set_banks()
|
||||
{
|
||||
const UINT8 v = m_bank_switch;
|
||||
UINT8 *ram = m_ram->pointer();
|
||||
UINT32 ram_size = m_ram->size();
|
||||
|
||||
m_bank_low = (v & 1) ? ((v & 2) ? ((v & 8) ? SVI_INTERNAL : SVI_EXPRAM3) : SVI_EXPRAM2) : SVI_CART;
|
||||
m_bank_high = (v & 4) ? ((v & 16) ? SVI_INTERNAL : SVI_EXPRAM3) : SVI_EXPRAM2;
|
||||
|
||||
m_bank_low_ptr = m_empty_bank.get();
|
||||
m_bank_low_read_only = 1;
|
||||
|
||||
switch (m_bank_low)
|
||||
{
|
||||
case SVI_INTERNAL:
|
||||
m_bank_low_ptr = m_bios_rom->base();
|
||||
break;
|
||||
case SVI_CART:
|
||||
if (m_cart_rom)
|
||||
m_bank_low_ptr = m_cart_rom->base();
|
||||
break;
|
||||
case SVI_EXPRAM2:
|
||||
if (ram_size >= 64 * 1024)
|
||||
{
|
||||
m_bank_low_ptr = ram + ram_size - 64 * 1024;
|
||||
m_bank_low_read_only = 0;
|
||||
}
|
||||
break;
|
||||
case SVI_EXPRAM3:
|
||||
if (ram_size > 128 * 1024)
|
||||
{
|
||||
m_bank_low_ptr = ram + ram_size - 128 * 1024;
|
||||
m_bank_low_read_only = 0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
m_bank_high1_ptr = m_empty_bank.get();
|
||||
m_bank_high1_read_only = 1;
|
||||
m_bank_high2_ptr = m_empty_bank.get();
|
||||
m_bank_high2_read_only = 1;
|
||||
|
||||
switch (m_bank_high)
|
||||
{
|
||||
case SVI_INTERNAL:
|
||||
if (ram_size == 16 * 1024)
|
||||
{
|
||||
m_bank_high2_ptr = ram;
|
||||
m_bank_high2_read_only = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
m_bank_high1_ptr = ram;
|
||||
m_bank_high1_read_only = 0;
|
||||
m_bank_high2_ptr = ram + 0x4000;
|
||||
m_bank_high2_read_only = 0;
|
||||
}
|
||||
break;
|
||||
case SVI_EXPRAM2:
|
||||
if (ram_size > 64 * 1024)
|
||||
{
|
||||
m_bank_high1_ptr = ram + ram_size - 64 * 1024 + 32 * 1024;
|
||||
m_bank_high1_read_only = 0;
|
||||
m_bank_high2_ptr = ram + ram_size - 64 * 1024 + 48 * 1024;
|
||||
m_bank_high2_read_only = 0;
|
||||
}
|
||||
break;
|
||||
case SVI_EXPRAM3:
|
||||
if (ram_size > 128 * 1024)
|
||||
{
|
||||
m_bank_high1_ptr = ram + ram_size - 128 * 1024 + 32 * 1024;
|
||||
m_bank_high1_read_only = 0;
|
||||
m_bank_high2_ptr = ram + ram_size - 128 * 1024 + 48 * 1024;
|
||||
m_bank_high2_read_only = 0;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
/* Check for special CART based banking */
|
||||
if (m_bank_low == SVI_CART && (v & 0xc0 ) != 0xc0)
|
||||
{
|
||||
m_bank_high1_ptr = m_empty_bank.get();
|
||||
m_bank_high1_read_only = 1;
|
||||
m_bank_high2_ptr = m_empty_bank.get();
|
||||
m_bank_high2_read_only = 1;
|
||||
|
||||
if (m_cart_rom && !(v & 0x80))
|
||||
m_bank_high2_ptr = m_cart_rom->base() + 0x4000;
|
||||
if (m_cart_rom && !(v & 0x40))
|
||||
m_bank_high1_ptr = m_cart_rom->base();
|
||||
}
|
||||
|
||||
m_bank1->set_base(m_bank_low_ptr);
|
||||
m_bank2->set_base(m_bank_high1_ptr);
|
||||
m_bank3->set_base(m_bank_high2_ptr);
|
||||
|
||||
/* SVI-806 80 column card specific banking */
|
||||
if (m_svi806_present)
|
||||
{
|
||||
if (m_svi806_ram_enabled)
|
||||
m_bank4->set_base(&m_svi806_ram[0]);
|
||||
else
|
||||
m_bank4->set_base(m_bank_high2_ptr + 0x3000);
|
||||
}
|
||||
}
|
||||
|
||||
void svi318_state::postload()
|
||||
{
|
||||
set_banks();
|
||||
}
|
||||
|
||||
|
||||
/* External I/O */
|
||||
|
||||
WRITE_LINE_MEMBER(svi318_state::write_centronics_busy)
|
||||
{
|
||||
m_centronics_busy = state;
|
||||
}
|
||||
|
||||
READ8_MEMBER(svi318_state::io_ext_r)
|
||||
{
|
||||
if (m_bank_low == SVI_CART)
|
||||
return 0xff;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0x12:
|
||||
return 0xfe | m_centronics_busy;
|
||||
|
||||
case 0x20:
|
||||
case 0x21:
|
||||
case 0x22:
|
||||
case 0x23:
|
||||
case 0x24:
|
||||
case 0x25:
|
||||
case 0x26:
|
||||
case 0x27:
|
||||
return m_ins8250_0->ins8250_r(space, offset & 7);
|
||||
|
||||
case 0x28:
|
||||
case 0x29:
|
||||
case 0x2a:
|
||||
case 0x2b:
|
||||
case 0x2c:
|
||||
case 0x2d:
|
||||
case 0x2e:
|
||||
case 0x2f:
|
||||
return m_ins8250_1->ins8250_r(space, offset & 7);
|
||||
|
||||
case 0x30:
|
||||
return m_fd1793->status_r(space, 0);
|
||||
|
||||
case 0x31:
|
||||
return m_fd1793->track_r(space, 0);
|
||||
|
||||
case 0x32:
|
||||
return m_fd1793->sector_r(space, 0);
|
||||
|
||||
case 0x33:
|
||||
return m_fd1793->data_r(space, 0);
|
||||
|
||||
case 0x34:
|
||||
return fdc_irqdrq_r(space, 0);
|
||||
|
||||
case 0x51:
|
||||
return m_crtc->register_r(space, offset);
|
||||
}
|
||||
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(svi318_state::io_ext_w)
|
||||
{
|
||||
if (m_bank_low == SVI_CART)
|
||||
return;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0x10:
|
||||
m_cent_data_out->write(space, 0, data);
|
||||
break;
|
||||
|
||||
case 0x11:
|
||||
m_centronics->write_strobe(BIT(data, 0));
|
||||
break;
|
||||
|
||||
case 0x20:
|
||||
case 0x21:
|
||||
case 0x22:
|
||||
case 0x23:
|
||||
case 0x24:
|
||||
case 0x25:
|
||||
case 0x26:
|
||||
case 0x27:
|
||||
m_ins8250_0->ins8250_w(space, offset & 7, data);
|
||||
break;
|
||||
|
||||
case 0x28:
|
||||
case 0x29:
|
||||
case 0x2A:
|
||||
case 0x2B:
|
||||
case 0x2C:
|
||||
case 0x2D:
|
||||
case 0x2E:
|
||||
case 0x2F:
|
||||
m_ins8250_1->ins8250_w(space, offset & 7, data);
|
||||
break;
|
||||
|
||||
case 0x30:
|
||||
m_fd1793->cmd_w(space, 0, data);
|
||||
break;
|
||||
case 0x31:
|
||||
m_fd1793->track_w(space, 0, data);
|
||||
break;
|
||||
case 0x32:
|
||||
m_fd1793->sector_w(space, 0, data);
|
||||
break;
|
||||
case 0x33:
|
||||
m_fd1793->data_w(space, 0, data);
|
||||
break;
|
||||
case 0x34:
|
||||
fdc_drive_motor_w(space, 0, data);
|
||||
break;
|
||||
case 0x38:
|
||||
fdc_density_side_w(space, 0, data);
|
||||
break;
|
||||
|
||||
case 0x50:
|
||||
m_crtc->address_w(space, offset, data);
|
||||
break;
|
||||
case 0x51:
|
||||
m_crtc->register_w(space, offset, data);
|
||||
break;
|
||||
|
||||
case 0x58:
|
||||
svi806_ram_enable_w(space, 0, data);
|
||||
break;
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user