scudsp, sega_scu, serflash, smartmed, smc91c9x, smioc, smpc : removed MCFG macros (nw)

This commit is contained in:
Ivan Vangelista 2018-10-26 18:32:30 +02:00
parent f8b14ab74e
commit c5a1ab90ce
20 changed files with 101 additions and 238 deletions

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@ -36,16 +36,6 @@ enum
};
#define MCFG_SCUDSP_OUT_IRQ_CB(_devcb) \
downcast<scudsp_cpu_device &>(*device).set_out_irq_callback(DEVCB_##_devcb);
#define MCFG_SCUDSP_IN_DMA_CB(_devcb) \
downcast<scudsp_cpu_device &>(*device).set_in_dma_callback(DEVCB_##_devcb);
#define MCFG_SCUDSP_OUT_DMA_CB(_devcb) \
downcast<scudsp_cpu_device &>(*device).set_out_dma_callback(DEVCB_##_devcb);
#define SCUDSP_RESET INPUT_LINE_RESET /* Non-Maskable */
class scudsp_cpu_device : public cpu_device
@ -54,9 +44,9 @@ public:
// construction/destruction
scudsp_cpu_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
template <class Object> devcb_base &set_out_irq_callback(Object &&cb) { return m_out_irq_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_in_dma_callback(Object &&cb) { return m_in_dma_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_dma_callback(Object &&cb) { return m_out_dma_cb.set_callback(std::forward<Object>(cb)); }
auto out_irq_callback() { return m_out_irq_cb.bind(); }
auto in_dma_callback() { return m_in_dma_cb.bind(); }
auto out_dma_callback() { return m_out_dma_cb.bind(); }
/* port 0 */
DECLARE_READ32_MEMBER( program_control_r );

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@ -125,10 +125,10 @@ void sega_scu_device::regs_map(address_map &map)
map(0x005c, 0x005f).r(FUNC(sega_scu_device::dma_status_r));
// AM_RANGE(0x0060, 0x0063) AM_WRITE(dma_force_stop_w)
map(0x007c, 0x007f).r(FUNC(sega_scu_device::dma_status_r));
map(0x0080, 0x0083).rw("scudsp", FUNC(scudsp_cpu_device::program_control_r), FUNC(scudsp_cpu_device::program_control_w));
map(0x0084, 0x0087).w("scudsp", FUNC(scudsp_cpu_device::program_w));
map(0x0088, 0x008b).w("scudsp", FUNC(scudsp_cpu_device::ram_address_control_w));
map(0x008c, 0x008f).rw("scudsp", FUNC(scudsp_cpu_device::ram_address_r), FUNC(scudsp_cpu_device::ram_address_w));
map(0x0080, 0x0083).rw(m_scudsp, FUNC(scudsp_cpu_device::program_control_r), FUNC(scudsp_cpu_device::program_control_w));
map(0x0084, 0x0087).w(m_scudsp, FUNC(scudsp_cpu_device::program_w));
map(0x0088, 0x008b).w(m_scudsp, FUNC(scudsp_cpu_device::ram_address_control_w));
map(0x008c, 0x008f).rw(m_scudsp, FUNC(scudsp_cpu_device::ram_address_r), FUNC(scudsp_cpu_device::ram_address_w));
map(0x0090, 0x0093).w(FUNC(sega_scu_device::t0_compare_w));
map(0x0094, 0x0097).w(FUNC(sega_scu_device::t1_setdata_w));
map(0x009a, 0x009b).w(FUNC(sega_scu_device::t1_mode_w));
@ -147,7 +147,8 @@ void sega_scu_device::regs_map(address_map &map)
sega_scu_device::sega_scu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SEGA_SCU, tag, owner, clock),
m_scudsp(*this, "scudsp")
m_scudsp(*this, "scudsp"),
m_hostcpu(*this, finder_base::DUMMY_TAG)
{
}
@ -177,12 +178,13 @@ WRITE16_MEMBER(sega_scu_device::scudsp_dma_w)
m_hostspace->write_word(addr, data,mem_mask);
}
MACHINE_CONFIG_START(sega_scu_device::device_add_mconfig)
MCFG_DEVICE_ADD("scudsp", SCUDSP, XTAL(57'272'727)/4) // 14 MHz
MCFG_SCUDSP_OUT_IRQ_CB(WRITELINE(DEVICE_SELF, sega_scu_device, scudsp_end_w))
MCFG_SCUDSP_IN_DMA_CB(READ16(*this, sega_scu_device, scudsp_dma_r))
MCFG_SCUDSP_OUT_DMA_CB(WRITE16(*this, sega_scu_device, scudsp_dma_w))
MACHINE_CONFIG_END
void sega_scu_device::device_add_mconfig(machine_config &config)
{
SCUDSP(config, m_scudsp, XTAL(57'272'727)/4); // 14 MHz
m_scudsp->out_irq_callback().set(DEVICE_SELF, FUNC(sega_scu_device::scudsp_end_w));
m_scudsp->in_dma_callback().set(FUNC(sega_scu_device::scudsp_dma_r));
m_scudsp->out_dma_callback().set(FUNC(sega_scu_device::scudsp_dma_w));
}
//-------------------------------------------------
@ -231,7 +233,6 @@ void sega_scu_device::device_start()
save_item(NAME(m_dma[2].rup));
save_item(NAME(m_dma[2].wup));
m_hostcpu = machine().device<sh2_device>(m_hostcpu_tag);
m_hostspace = &m_hostcpu->space(AS_PROGRAM);
m_dma_timer[0] = timer_alloc(DMALV0_ID);

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@ -31,14 +31,6 @@
#define IRQ_ABUS 1 << 15
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_SEGA_SCU_ADD(tag) \
MCFG_DEVICE_ADD((tag), SEGA_SCU, (0))
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -62,7 +54,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(sound_req_w);
DECLARE_WRITE_LINE_MEMBER(smpc_irq_w);
void set_hostcpu(const char *cputag) { m_hostcpu_tag = cputag; }
template <typename T> void set_hostcpu(T &&tag) { m_hostcpu.set_tag(std::forward<T>(tag)); }
protected:
// device-level overrides
@ -91,8 +83,7 @@ private:
bool m_t1md;
bool m_tenb;
const char *m_hostcpu_tag;
sh2_device *m_hostcpu;
required_device<sh2_device> m_hostcpu;
address_space *m_hostspace;
void test_pending_irqs();

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@ -7,15 +7,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_SERFLASH_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SERFLASH, 0)
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************

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@ -14,11 +14,6 @@
//#define SMARTMEDIA_IMAGE_SAVE
#define MCFG_NAND_TYPE(type) \
downcast<nand_device &>(*device).set_nand_type((nand_device::chip::type));
#define MCFG_NAND_RNB_CALLBACK(write) \
downcast<nand_device &>(*device).set_rnb_wr_callback(DEVCB_##write);
/***************************************************************************
TYPE DEFINITIONS
@ -41,7 +36,7 @@ public:
// construction/destruction
nand_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_rnb_wr_callback(Object &&cb) { return m_write_rnb.set_callback(std::forward<Object>(cb)); }
auto rnb_wr_callback() { return m_write_rnb.bind(); }
void set_nand_type(chip type)
{

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@ -18,7 +18,6 @@
class smc91c9x_device : public device_t,public device_network_interface
{
public:
template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
auto irq_handler() { return m_irq_handler.bind(); }
DECLARE_READ16_MEMBER( read );
@ -120,16 +119,4 @@ DECLARE_DEVICE_TYPE(SMC91C96, smc91c96_device)
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_SMC91C94_ADD(tag) \
MCFG_DEVICE_ADD((tag), SMC91C94, 0)
#define MCFG_SMC91C94_IRQ_CALLBACK(write) \
downcast<smc91c94_device &>(*device).set_irq_callback(DEVCB_##write);
#define MCFG_SMC91C96_ADD(tag) \
MCFG_DEVICE_ADD((tag), SMC91C96, 0)
#define MCFG_SMC91C96_IRQ_CALLBACK(write) \
downcast<smc91c96_device &>(*device).set_irq_callback(DEVCB_##write);
#endif // MAME_MACHINE_SMC91C9X_H

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@ -40,8 +40,8 @@ public:
/* Constructor and Destructor */
smioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> static devcb_base &m68k_r_callback(device_t &device, Object &&cb) { return downcast<smioc_device &>(device).m_m68k_r_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &m68k_w_callback(device_t &device, Object &&cb) { return downcast<smioc_device &>(device).m_m68k_w_cb.set_callback(std::forward<Object>(cb)); }
auto m68k_r_callback() { return m_m68k_r_cb.bind(); }
auto m68k_w_callback() { return m_m68k_w_cb.bind(); }
DECLARE_READ8_MEMBER(ram2_mmio_r);
@ -141,10 +141,4 @@ private:
/* Device type */
DECLARE_DEVICE_TYPE(SMIOC, smioc_device)
/* MCFG defines */
#define MCFG_SMIOC_R_CB(_devcb) \
smioc_device::m68k_r_callback(*device, DEVCB_##_devcb);
#define MCFG_SMIOC_W_CB(_devcb) \
smioc_device::m68k_w_callback(*device, DEVCB_##_devcb);
#endif // MAME_MACHINE_SMIOC_H

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@ -219,12 +219,10 @@ smpc_hle_device::smpc_hle_device(const machine_config &mconfig, const char *tag,
m_pdr1_write(*this),
m_pdr2_write(*this),
m_irq_line(*this),
m_ctrl1(nullptr),
m_ctrl2(nullptr),
m_ctrl1(*this, finder_base::DUMMY_TAG),
m_ctrl2(*this, finder_base::DUMMY_TAG),
m_screen(*this, finder_base::DUMMY_TAG)
{
m_ctrl1 = nullptr;
m_ctrl2 = nullptr;
m_has_ctrl_ports = false;
}
@ -299,13 +297,6 @@ void smpc_hle_device::device_start()
m_rtc_data[4] = DectoBCD(systime.local_time.hour);
m_rtc_data[5] = DectoBCD(systime.local_time.minute);
m_rtc_data[6] = DectoBCD(systime.local_time.second);
if (m_has_ctrl_ports)
{
m_ctrl1 = downcast<saturn_control_port_device *>(machine().device(m_ctrl1_tag));
m_ctrl2 = downcast<saturn_control_port_device *>(machine().device(m_ctrl2_tag));
}
// m_has_ctrl_ports = (m_ctrl1 != nullptr && m_ctrl2 != nullptr);
}

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@ -16,57 +16,6 @@
#include "machine/nvram.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_SMPC_HLE_ADD(tag, clock) \
MCFG_DEVICE_ADD((tag), SMPC_HLE, (clock))
#define MCFG_SMPC_HLE_SCREEN(screen_tag) \
downcast<smpc_hle_device &>(*device).set_screen_tag(screen_tag);
#define MCFG_SMPC_HLE_CONTROL_PORTS(ctrl1_tag, ctrl2_tag) \
downcast<smpc_hle_device &>(*device).set_control_port_tags(ctrl1_tag, ctrl2_tag);
#define MCFG_SMPC_HLE_PDR1_IN_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_pdr1_in_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_PDR2_IN_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_pdr2_in_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_PDR1_OUT_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_pdr1_out_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_PDR2_OUT_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_pdr2_out_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_MASTER_RESET_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_master_reset_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_MASTER_NMI_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_master_nmi_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_SLAVE_RESET_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_slave_reset_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_SOUND_RESET_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_sound_reset_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_SYSTEM_RESET_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_system_reset_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_SYSTEM_HALT_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_system_halt_handler(DEVCB_##_devcb);
#define MCFG_SMPC_HLE_DOT_SELECT_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_dot_select_handler(DEVCB_##_devcb);
// set_irq_handler doesn't work in Saturn driver???
#define MCFG_SMPC_HLE_IRQ_HANDLER_CB(_devcb) \
downcast<smpc_hle_device &>(*device).set_interrupt_handler(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -94,63 +43,39 @@ public:
uint8_t get_ddr(bool which);
// system delegation
template<class Object>
devcb_base &set_master_reset_handler(Object &&cb)
{ return m_mshres.set_callback(std::forward<Object>(cb)); }
auto master_reset_handler() { return m_mshres.bind(); }
template<class Object>
devcb_base &set_master_nmi_handler(Object &&cb)
{ return m_mshnmi.set_callback(std::forward<Object>(cb)); }
auto master_nmi_handler() { return m_mshnmi.bind(); }
template<class Object>
devcb_base &set_slave_reset_handler(Object &&cb)
{ return m_sshres.set_callback(std::forward<Object>(cb)); }
auto slave_reset_handler() { return m_sshres.bind(); }
template<class Object>
devcb_base &set_sound_reset_handler(Object &&cb)
{ return m_sndres.set_callback(std::forward<Object>(cb)); }
auto sound_reset_handler() { return m_sndres.bind(); }
template<class Object>
devcb_base &set_system_reset_handler(Object &&cb)
{ return m_sysres.set_callback(std::forward<Object>(cb)); }
auto system_reset_handler() { return m_sysres.bind(); }
template<class Object>
devcb_base &set_system_halt_handler(Object &&cb)
{ return m_syshalt.set_callback(std::forward<Object>(cb)); }
auto system_halt_handler() { return m_syshalt.bind(); }
template<class Object>
devcb_base &set_dot_select_handler(Object &&cb)
{ return m_dotsel.set_callback(std::forward<Object>(cb)); }
auto dot_select_handler() { return m_dotsel.bind(); }
// PDR delegation
template<class Object>
devcb_base &set_pdr1_in_handler(Object &&cb)
{ return m_pdr1_read.set_callback(std::forward<Object>(cb)); }
auto pdr1_in_handler() { return m_pdr1_read.bind(); }
template<class Object>
devcb_base &set_pdr2_in_handler(Object &&cb)
{ return m_pdr2_read.set_callback(std::forward<Object>(cb)); }
auto pdr2_in_handler() { return m_pdr2_read.bind(); }
template<class Object>
devcb_base &set_pdr1_out_handler(Object &&cb)
{ return m_pdr1_write.set_callback(std::forward<Object>(cb)); }
auto pdr1_out_handler() { return m_pdr1_write.bind(); }
template<class Object>
devcb_base &set_pdr2_out_handler(Object &&cb)
{ return m_pdr2_write.set_callback(std::forward<Object>(cb)); }
auto pdr2_out_handler() { return m_pdr2_write.bind(); }
// interrupt handler
template<class Object>
devcb_base &set_interrupt_handler(Object &&cb)
{ return m_irq_line.set_callback(std::forward<Object>(cb)); }
// interrupt handler, doesn't work in Saturn driver???
auto interrupt_handler() { return m_irq_line.bind(); }
void set_region_code(uint8_t rgn) { m_region_code = rgn; }
void set_screen_tag(const char *tag) { m_screen.set_tag(tag); }
void set_control_port_tags(const char *tag1, const char *tag2)
template <typename T> void set_screen_tag(T &&tag) { m_screen.set_tag(std::forward<T>(tag)); }
template <typename T, typename U> void set_control_port_tags(T &&tag1, U &&tag2)
{
m_ctrl1_tag = tag1;
m_ctrl2_tag = tag2;
m_ctrl1.set_tag(std::forward<T>(tag1));
m_ctrl2.set_tag(std::forward<U>(tag2));
// TODO: checking against nullptr still returns a device!?
m_has_ctrl_ports = true;
}
@ -178,8 +103,6 @@ private:
emu_timer *m_rtc_timer;
emu_timer *m_intback_timer;
emu_timer *m_sndres_timer;
const char *m_ctrl1_tag;
const char *m_ctrl2_tag;
bool m_has_ctrl_ports;
bool m_sf;
@ -247,8 +170,8 @@ private:
devcb_write8 m_pdr1_write;
devcb_write8 m_pdr2_write;
devcb_write_line m_irq_line;
saturn_control_port_device *m_ctrl1;
saturn_control_port_device *m_ctrl2;
optional_device<saturn_control_port_device> m_ctrl1;
optional_device<saturn_control_port_device> m_ctrl2;
required_device<screen_device> m_screen;

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@ -476,7 +476,7 @@ MACHINE_CONFIG_START(cv1k_state::cv1k)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", cv1k_state, irq2_line_hold)
MCFG_RTC9701_ADD("eeprom")
MCFG_SERFLASH_ADD("game")
SERFLASH(config, m_serflash, 0);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

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@ -45,7 +45,7 @@ Coin Counter Available
Gun Shooting Effect Available (Option)
Hopper, Ticket Counter, Prize System (Option)
6. Develoment
6. Development
- On-chip ICEbreaker debug support with JTAG-based debugging solution
- MultiICE, OPENICE etc.
- Compiler : ADS, SDT
@ -616,7 +616,7 @@ MACHINE_CONFIG_START(ghosteo_state::ghosteo)
MCFG_PALETTE_ADD("palette", 256)
MCFG_DEVICE_ADD("s3c2410", S3C2410, 12000000)
MCFG_DEVICE_ADD(m_s3c2410, S3C2410, 12000000)
MCFG_S3C2410_PALETTE("palette")
MCFG_S3C2410_SCREEN("screen")
MCFG_S3C2410_CORE_PIN_R_CB(READ32(*this, ghosteo_state, s3c2410_core_pin_r))
@ -630,9 +630,9 @@ MACHINE_CONFIG_START(ghosteo_state::ghosteo)
MCFG_S3C2410_NAND_DATA_R_CB(READ8(*this, ghosteo_state, s3c2410_nand_data_r))
MCFG_S3C2410_NAND_DATA_W_CB(WRITE8(*this, ghosteo_state, s3c2410_nand_data_w))
// MCFG_DEVICE_ADD("nand", NAND, 0)
// MCFG_NAND_TYPE(NAND_CHIP_K9F5608U0D) // or another variant with ID 0xEC 0x75 ?
// MCFG_NAND_RNB_CALLBACK(WRITELINE("s3c2410", s3c2410_device, s3c24xx_pin_frnb_w))
// nand_device &nand(NAND(config, "nand", 0));
// nand.set_nand_type(nand_device::chip::K9F5608U0D); // or another variant with ID 0xEC 0x75 ?
// nand.rnb_wr_callback().set(m_s3c2410, FUNC(s3c2410_device::s3c24xx_pin_frnb_w));
// I2CMEM(config, "i2cmem", 0, 0xA0, 0, 0x100, nullptr);

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@ -1696,7 +1696,7 @@ MACHINE_CONFIG_START(gp32_state::gp32)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
MCFG_DEVICE_ADD("smartmedia", SMARTMEDIA, 0)
SMARTMEDIA(config, m_smartmedia, 0);
MCFG_SOFTWARE_LIST_ADD("memc_list","gp32")
MACHINE_CONFIG_END

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@ -274,13 +274,13 @@ MACHINE_CONFIG_START(hapyfish_state::hapyfish)
MCFG_S3C2440_NAND_DATA_R_CB(READ8(*this, hapyfish_state, s3c2440_nand_data_r))
MCFG_S3C2440_NAND_DATA_W_CB(WRITE8(*this, hapyfish_state, s3c2440_nand_data_w))
MCFG_DEVICE_ADD("nand", NAND, 0)
MCFG_NAND_TYPE(K9LAG08U0M)
MCFG_NAND_RNB_CALLBACK(WRITELINE("s3c2440", s3c2440_device, frnb_w))
NAND(config, m_nand, 0);
m_nand->set_nand_type(nand_device::chip::K9LAG08U0M);
m_nand->rnb_wr_callback().set(m_s3c2440, FUNC(s3c2440_device::frnb_w));
MCFG_DEVICE_ADD("nand2", NAND, 0)
MCFG_NAND_TYPE(K9LAG08U0M)
MCFG_NAND_RNB_CALLBACK(WRITELINE("s3c2440", s3c2440_device, frnb_w))
NAND(config, m_nand2, 0);
m_nand2->set_nand_type(nand_device::chip::K9LAG08U0M);
m_nand2->rnb_wr_callback().set(m_s3c2440, FUNC(s3c2440_device::frnb_w));
MACHINE_CONFIG_END
static INPUT_PORTS_START( hapyfish )

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@ -333,7 +333,7 @@ MACHINE_CONFIG_START(juicebox_state::juicebox)
m_s3c44b0->gpio_port_w_cb().set(FUNC(juicebox_state::s3c44b0_gpio_port_w));
m_s3c44b0->i2s_data_w_cb().set("dac", FUNC(dac_word_interface::data_w));
MCFG_DEVICE_ADD("smartmedia", SMARTMEDIA, 0)
SMARTMEDIA(config, m_smartmedia, 0);
/* software lists */
MCFG_SOFTWARE_LIST_ADD("cart_list","juicebox")

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@ -260,9 +260,9 @@ MACHINE_CONFIG_START(mini2440_state::mini2440)
MCFG_S3C2440_NAND_DATA_R_CB(READ8(*this, mini2440_state, s3c2440_nand_data_r))
MCFG_S3C2440_NAND_DATA_W_CB(WRITE8(*this, mini2440_state, s3c2440_nand_data_w))
MCFG_DEVICE_ADD("nand", NAND, 0)
MCFG_NAND_TYPE(K9F1G08U0B)
MCFG_NAND_RNB_CALLBACK(WRITELINE("s3c2440", s3c2440_device, frnb_w))
NAND(config, m_nand, 0);
m_nand->set_nand_type(nand_device::chip::K9F1G08U0B);
m_nand->rnb_wr_callback().set(m_s3c2440, FUNC(s3c2440_device::frnb_w));
MACHINE_CONFIG_END
static INPUT_PORTS_START( mini2440 )

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@ -137,7 +137,7 @@ MACHINE_CONFIG_START(nexus3d_state::nexus3d)
MCFG_PALETTE_ADD("palette", 256)
MCFG_SERFLASH_ADD("flash")
SERFLASH(config, m_serflash, 0);
MACHINE_CONFIG_END

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@ -314,9 +314,9 @@ MACHINE_CONFIG_START(palmz22_state::palmz22)
MCFG_S3C2410_NAND_DATA_R_CB(READ8(*this, palmz22_state, s3c2410_nand_data_r))
MCFG_S3C2410_NAND_DATA_W_CB(WRITE8(*this, palmz22_state, s3c2410_nand_data_w))
MCFG_DEVICE_ADD(m_nand, NAND, 0)
MCFG_NAND_TYPE(K9F5608U0D_J)
MCFG_NAND_RNB_CALLBACK(WRITELINE(m_s3c2410, s3c2410_device, frnb_w))
NAND(config, m_nand, 0);
m_nand->set_nand_type(nand_device::chip::K9F5608U0D_J);
m_nand->rnb_wr_callback().set(m_s3c2410, FUNC(s3c2410_device::frnb_w));
MACHINE_CONFIG_END
static INPUT_PORTS_START( palmz22 )

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@ -963,9 +963,9 @@ MACHINE_CONFIG_START(r9751_state::r9751)
MCFG_QUANTUM_TIME(attotime::from_hz(1000))
/* i/o hardware */
MCFG_DEVICE_ADD("smioc", SMIOC, 0)
MCFG_SMIOC_R_CB(READ8(*this, r9751_state, smioc_dma_r))
MCFG_SMIOC_W_CB(WRITE8(*this, r9751_state, smioc_dma_w))
SMIOC(config, m_smioc, 0);
m_smioc->m68k_r_callback().set(FUNC(r9751_state::smioc_dma_r));
m_smioc->m68k_w_callback().set(FUNC(r9751_state::smioc_dma_w));
/* disk hardware */
PDC(config, m_pdc, 0);

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@ -806,27 +806,27 @@ MACHINE_CONFIG_START(sat_console_state::saturn)
MCFG_DEVICE_ADD("audiocpu", M68000, 11289600) //256 x 44100 Hz = 11.2896 MHz
MCFG_DEVICE_PROGRAM_MAP(sound_mem)
MCFG_SEGA_SCU_ADD("scu")
downcast<sega_scu_device &>(*device).set_hostcpu("maincpu");
SEGA_SCU(config, m_scu, 0);
m_scu->set_hostcpu(m_maincpu);
// SH-1
// SMPC MCU, running at 4 MHz (+ custom RTC device that runs at 32.768 KHz)
MCFG_SMPC_HLE_ADD("smpc", XTAL(4'000'000))
MCFG_SMPC_HLE_SCREEN("screen")
MCFG_SMPC_HLE_CONTROL_PORTS("ctrl1", "ctrl2")
MCFG_SMPC_HLE_PDR1_IN_CB(READ8(*this, sat_console_state, saturn_pdr1_direct_r))
MCFG_SMPC_HLE_PDR2_IN_CB(READ8(*this, sat_console_state, saturn_pdr2_direct_r))
MCFG_SMPC_HLE_PDR1_OUT_CB(WRITE8(*this, sat_console_state, saturn_pdr1_direct_w))
MCFG_SMPC_HLE_PDR2_OUT_CB(WRITE8(*this, sat_console_state, saturn_pdr2_direct_w))
MCFG_SMPC_HLE_MASTER_RESET_CB(WRITELINE(*this, saturn_state, master_sh2_reset_w))
MCFG_SMPC_HLE_MASTER_NMI_CB(WRITELINE(*this, saturn_state, master_sh2_nmi_w))
MCFG_SMPC_HLE_SLAVE_RESET_CB(WRITELINE(*this, saturn_state, slave_sh2_reset_w))
MCFG_SMPC_HLE_SOUND_RESET_CB(WRITELINE(*this, saturn_state, sound_68k_reset_w))
MCFG_SMPC_HLE_SYSTEM_RESET_CB(WRITELINE(*this, saturn_state, system_reset_w))
MCFG_SMPC_HLE_SYSTEM_HALT_CB(WRITELINE(*this, saturn_state, system_halt_w))
MCFG_SMPC_HLE_DOT_SELECT_CB(WRITELINE(*this, saturn_state, dot_select_w))
MCFG_SMPC_HLE_IRQ_HANDLER_CB(WRITELINE("scu", sega_scu_device, smpc_irq_w))
SMPC_HLE(config, m_smpc_hle, XTAL(4'000'000));
m_smpc_hle->set_screen_tag("screen");
m_smpc_hle->set_control_port_tags("ctrl1", "ctrl2");
m_smpc_hle->pdr1_in_handler().set(FUNC(sat_console_state::saturn_pdr1_direct_r));
m_smpc_hle->pdr2_in_handler().set(FUNC(sat_console_state::saturn_pdr2_direct_r));
m_smpc_hle->pdr1_out_handler().set(FUNC(sat_console_state::saturn_pdr1_direct_w));
m_smpc_hle->pdr2_out_handler().set(FUNC(sat_console_state::saturn_pdr2_direct_w));
m_smpc_hle->master_reset_handler().set(FUNC(saturn_state::master_sh2_reset_w));
m_smpc_hle->master_nmi_handler().set(FUNC(saturn_state::master_sh2_nmi_w));
m_smpc_hle->slave_reset_handler().set(FUNC(saturn_state::slave_sh2_reset_w));
m_smpc_hle->sound_reset_handler().set(FUNC(saturn_state::sound_68k_reset_w));
m_smpc_hle->system_reset_handler().set(FUNC(saturn_state::system_reset_w));
m_smpc_hle->system_halt_handler().set(FUNC(saturn_state::system_halt_w));
m_smpc_hle->dot_select_handler().set(FUNC(saturn_state::dot_select_w));
m_smpc_hle->interrupt_handler().set(m_scu, FUNC(sega_scu_device::smpc_irq_w));
MCFG_MACHINE_START_OVERRIDE(sat_console_state,saturn)
MCFG_MACHINE_RESET_OVERRIDE(sat_console_state,saturn)
@ -849,7 +849,7 @@ MACHINE_CONFIG_START(sat_console_state::saturn)
MCFG_DEVICE_ADD(m_scsp, SCSP)
MCFG_DEVICE_ADDRESS_MAP(0, scsp_mem)
MCFG_SCSP_IRQ_CB(WRITE8(*this, saturn_state, scsp_irq))
MCFG_SCSP_MAIN_IRQ_CB(WRITELINE("scu", sega_scu_device, sound_req_w))
MCFG_SCSP_MAIN_IRQ_CB(WRITELINE(m_scu, sega_scu_device, sound_req_w))
MCFG_SCSP_EXTS_CB(READ16("stvcd", stvcd_device, channel_volume_r))
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)

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@ -1138,24 +1138,24 @@ MACHINE_CONFIG_START(stv_state::stv)
MCFG_DEVICE_ADD("audiocpu", M68000, 11289600) //11.2896 MHz
MCFG_DEVICE_PROGRAM_MAP(sound_mem)
MCFG_SEGA_SCU_ADD("scu")
downcast<sega_scu_device &>(*device).set_hostcpu("maincpu");
SEGA_SCU(config, m_scu, 0);
m_scu->set_hostcpu(m_maincpu);
MCFG_SMPC_HLE_ADD("smpc", XTAL(4'000'000))
MCFG_SMPC_HLE_SCREEN("screen")
downcast<smpc_hle_device &>(*device).set_region_code(0);
MCFG_SMPC_HLE_PDR1_IN_CB(READ8(*this, stv_state, pdr1_input_r))
MCFG_SMPC_HLE_PDR2_IN_CB(READ8(*this, stv_state, pdr2_input_r))
MCFG_SMPC_HLE_PDR1_OUT_CB(WRITE8(*this, stv_state, pdr1_output_w))
MCFG_SMPC_HLE_PDR2_OUT_CB(WRITE8(*this, stv_state, pdr2_output_w))
MCFG_SMPC_HLE_MASTER_RESET_CB(WRITELINE(*this, saturn_state, master_sh2_reset_w))
MCFG_SMPC_HLE_MASTER_NMI_CB(WRITELINE(*this, saturn_state, master_sh2_nmi_w))
MCFG_SMPC_HLE_SLAVE_RESET_CB(WRITELINE(*this, saturn_state, slave_sh2_reset_w))
// MCFG_SMPC_HLE_SOUND_RESET_CB(WRITELINE(*this, saturn_state, sound_68k_reset_w)) // ST-V games controls reset line via PDR2
MCFG_SMPC_HLE_SYSTEM_RESET_CB(WRITELINE(*this, saturn_state, system_reset_w))
MCFG_SMPC_HLE_SYSTEM_HALT_CB(WRITELINE(*this, saturn_state, system_halt_w))
MCFG_SMPC_HLE_DOT_SELECT_CB(WRITELINE(*this, saturn_state, dot_select_w))
MCFG_SMPC_HLE_IRQ_HANDLER_CB(WRITELINE("scu", sega_scu_device, smpc_irq_w))
SMPC_HLE(config, m_smpc_hle, XTAL(4'000'000));
m_smpc_hle->set_screen_tag("screen");
m_smpc_hle->set_region_code(0);
m_smpc_hle->pdr1_in_handler().set(FUNC(stv_state::pdr1_input_r));
m_smpc_hle->pdr2_in_handler().set(FUNC(stv_state::pdr2_input_r));
m_smpc_hle->pdr1_out_handler().set(FUNC(stv_state::pdr1_output_w));
m_smpc_hle->pdr2_out_handler().set(FUNC(stv_state::pdr2_output_w));
m_smpc_hle->master_reset_handler().set(FUNC(saturn_state::master_sh2_reset_w));
m_smpc_hle->master_nmi_handler().set(FUNC(saturn_state::master_sh2_nmi_w));
m_smpc_hle->slave_reset_handler().set(FUNC(saturn_state::slave_sh2_reset_w));
// m_smpc_hle->sound_reset_handler().set(FUNC(saturn_state::sound_68k_reset_w)); // ST-V games controls reset line via PDR2
m_smpc_hle->system_reset_handler().set(FUNC(saturn_state::system_reset_w));
m_smpc_hle->system_halt_handler().set(FUNC(saturn_state::system_halt_w));
m_smpc_hle->dot_select_handler().set(FUNC(saturn_state::dot_select_w));
m_smpc_hle->interrupt_handler().set(m_scu, FUNC(sega_scu_device::smpc_irq_w));
MCFG_MACHINE_START_OVERRIDE(stv_state,stv)
MCFG_MACHINE_RESET_OVERRIDE(stv_state,stv)