diff --git a/src/devices/video/pc_vga_paradise.cpp b/src/devices/video/pc_vga_paradise.cpp
index 6c2d543429d..e205a3f409d 100644
--- a/src/devices/video/pc_vga_paradise.cpp
+++ b/src/devices/video/pc_vga_paradise.cpp
@@ -301,7 +301,6 @@ void pvga1a_vga_device::ext_gc_unlock_w(offs_t offset, u8 data)
 
 wd90c00_vga_device::wd90c00_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
 	: pvga1a_vga_device(mconfig, type, tag, owner, clock)
-	, m_ext_crtc_view(*this, "ext_crtc_view")
 {
 	m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(wd90c00_vga_device::crtc_map), this));
 }
@@ -316,8 +315,8 @@ void wd90c00_vga_device::device_reset()
 	pvga1a_vga_device::device_reset();
 
 	m_pr10_scratch = 0;
+	m_ext_crtc_read_unlock = false;
 	m_ext_crtc_write_unlock = false;
-	m_ext_crtc_view.select(0);
 	m_egasw = 0xf0;
 	m_interlace_start = 0;
 	m_interlace_end = 0;
@@ -325,25 +324,37 @@ void wd90c00_vga_device::device_reset()
 	m_pr15 = 0;
 }
 
+u8 wd90c00_vga_device::crtc_data_r(offs_t offset)
+{
+	if (!m_ext_crtc_read_unlock && vga.crtc.index >= 0x2a && !machine().side_effects_disabled())
+	{
+		LOGLOCKED("Attempt to read ext. CRTC register offset %02x while locked\n", vga.crtc.index);
+		return 0xff;
+	}
+	return svga_device::crtc_data_r(offset);
+}
+
+void wd90c00_vga_device::crtc_data_w(offs_t offset, u8 data)
+{
+	if (!m_ext_crtc_write_unlock && vga.crtc.index >= 0x2a && !machine().side_effects_disabled())
+	{
+		LOGLOCKED("Attempt to write ext. CRTC register offset [%02x] <- %02x while locked\n", vga.crtc.index, data);
+		return;
+	}
+	svga_device::crtc_data_w(offset, data);
+}
+
 void wd90c00_vga_device::crtc_map(address_map &map)
 {
 	pvga1a_vga_device::crtc_map(map);
 	map(0x29, 0x29).rw(FUNC(wd90c00_vga_device::ext_crtc_status_r), FUNC(wd90c00_vga_device::ext_crtc_unlock_w));
-	map(0x2a, 0x3f).view(m_ext_crtc_view);
-	m_ext_crtc_view[0](0x2a, 0x3f).lr8(
-		NAME([this] (offs_t offset) {
-			if (!machine().side_effects_disabled())
-				LOGLOCKED("Attempt to R ext. CRTC register offset %02x while locked\n", offset + 0x2a);
-			return 0xff;
-		})
-	);
-	m_ext_crtc_view[1](0x2a, 0x2a).rw(FUNC(wd90c00_vga_device::egasw_r), FUNC(wd90c00_vga_device::egasw_w));
-	m_ext_crtc_view[1](0x2b, 0x2b).ram(); // PR12 scratch pad
-	m_ext_crtc_view[1](0x2c, 0x2d).rw(FUNC(wd90c00_vga_device::interlace_r), FUNC(wd90c00_vga_device::interlace_w));
-	m_ext_crtc_view[1](0x2e, 0x2e).rw(FUNC(wd90c00_vga_device::misc_control_1_r), FUNC(wd90c00_vga_device::misc_control_1_w));
-//  m_ext_crtc_view[1](0x2f, 0x2f) PR16 Misc Control 2
-//  m_ext_crtc_view[1](0x30, 0x30) PR17 Misc Control 3
-//  m_ext_crtc_view[1](0x31, 0x3f) <reserved>
+	map(0x2a, 0x2a).rw(FUNC(wd90c00_vga_device::egasw_r), FUNC(wd90c00_vga_device::egasw_w));
+	map(0x2b, 0x2b).ram(); // PR12 scratch pad
+	map(0x2c, 0x2d).rw(FUNC(wd90c00_vga_device::interlace_r), FUNC(wd90c00_vga_device::interlace_w));
+	map(0x2e, 0x2e).rw(FUNC(wd90c00_vga_device::misc_control_1_r), FUNC(wd90c00_vga_device::misc_control_1_w));
+//  map(0x2f, 0x2f) PR16 Misc Control 2
+//  map(0x30, 0x30) PR17 Misc Control 3
+//  map(0x31, 0x3f) <reserved>, may still read device ASCII ID like later variants?
 }
 
 void wd90c00_vga_device::recompute_params()
@@ -385,16 +396,18 @@ void wd90c00_vga_device::recompute_params()
  */
 u8 wd90c00_vga_device::ext_crtc_status_r(offs_t offset)
 {
-	return m_pr10_scratch | (m_ext_crtc_write_unlock ? 0x05 : 0x00);
+	return (m_ext_crtc_read_unlock ? 0x80 : 0x00) | m_pr10_scratch | (m_ext_crtc_write_unlock ? 0x05 : 0x00);
 }
 
 void wd90c00_vga_device::ext_crtc_unlock_w(offs_t offset, u8 data)
 {
+	m_ext_crtc_read_unlock = (data & 0x88) == 0x80;
 	m_ext_crtc_write_unlock = (data & 0x7) == 5;
-	LOGLOCKED("PR10 %s state (%02x)\n", m_ext_crtc_write_unlock ? "unlock" : "lock", data);
-	// TODO: read unlock
-	//m_ext_crtc_read_unlock = (data & 0x88) == 0x80;
-	m_ext_crtc_view.select(m_ext_crtc_write_unlock);
+	LOGLOCKED("PR10 read %s write %s state (%02x)\n"
+		, m_ext_crtc_read_unlock ? "unlock" : "lock"
+		, m_ext_crtc_write_unlock ? "unlock" : "lock"
+		, data
+	);
 	m_pr10_scratch = data & 0x70;
 }
 
@@ -624,10 +637,10 @@ void wd90c30_vga_device::device_reset()
 void wd90c30_vga_device::crtc_map(address_map &map)
 {
 	wd90c11a_vga_device::crtc_map(map);
-//  m_ext_crtc_view[1](0x20, 0x21) Signature read data
-//  m_ext_crtc_view[1](0x3d, 0x3d) PR1A CRTC Shadow Register Control
-	m_ext_crtc_view[1](0x3e, 0x3e).rw(FUNC(wd90c30_vga_device::vert_timing_overflow_r), FUNC(wd90c30_vga_device::vert_timing_overflow_w));
-//  m_ext_crtc_view[1](0x3f, 0x3f) PR19 Signature Analyzer Control
+//  map(0x20, 0x21) Signature read data
+//  map(0x3d, 0x3d) PR1A CRTC Shadow Register Control
+	map(0x3e, 0x3e).rw(FUNC(wd90c30_vga_device::vert_timing_overflow_r), FUNC(wd90c30_vga_device::vert_timing_overflow_w));
+//  map(0x3f, 0x3f) PR19 Signature Analyzer Control
 }
 
 void wd90c30_vga_device::sequencer_map(address_map &map)
diff --git a/src/devices/video/pc_vga_paradise.h b/src/devices/video/pc_vga_paradise.h
index 27993e99ada..63bec929ec5 100644
--- a/src/devices/video/pc_vga_paradise.h
+++ b/src/devices/video/pc_vga_paradise.h
@@ -64,8 +64,10 @@ protected:
 
 	virtual bool get_interlace_mode() override { return m_interlace_mode; }
 
-	memory_view m_ext_crtc_view;
 private:
+	virtual u8 crtc_data_r(offs_t offset) override;
+	virtual void crtc_data_w(offs_t offset, u8 data) override;
+
 	u8 ext_crtc_status_r(offs_t offset);
 	void ext_crtc_unlock_w(offs_t offset, u8 data);
 	u8 egasw_r(offs_t offset);
@@ -75,6 +77,7 @@ private:
 	u8 misc_control_1_r(offs_t offset);
 	void misc_control_1_w(offs_t offset, u8 data);
 
+	bool m_ext_crtc_read_unlock = false;
 	bool m_ext_crtc_write_unlock = false;
 	u8 m_pr10_scratch = 0;
 	u8 m_egasw = 0;
diff --git a/src/devices/video/wd90c26.cpp b/src/devices/video/wd90c26.cpp
index 7430174aea1..da18dce61bf 100644
--- a/src/devices/video/wd90c26.cpp
+++ b/src/devices/video/wd90c26.cpp
@@ -24,22 +24,27 @@ wd90c26_vga_device::wd90c26_vga_device(const machine_config &mconfig, const char
 	m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(wd90c26_vga_device::sequencer_map), this));
 }
 
-// PR0:PR5, PR10:PR17, PR20:PR21, PR31:PR32 assumed same as derived class
+// PR0:PR5, PR10:PR17, PR20:PR21, PR31:PR32 assumed same as derived classes
+// TODO: implement the extra unlocks
+// when PR30 is locked but PR10 ext CRTC read is enabled then $31-$3f
+// reads with ASCII device signature "WD90C26REVx199y"
+// (x = rev number, y = manufacturing year)
+// cfr. section 6-17 at page 152
 void wd90c26_vga_device::crtc_map(address_map &map)
 {
 	wd90c11a_vga_device::crtc_map(map);
-//  m_ext_crtc_view[1](0x31, 0x31) PR18 Flat Panel Status
-//  m_ext_crtc_view[1](0x32, 0x33) PR19/PR1A Flat Panel Control
-//  m_ext_crtc_view[1](0x34, 0x34) PR1B Flat Panel Unlock
-//  m_ext_crtc_view[1](0x35, 0x35) PR30 Mapping RAM Unlock
-//  m_ext_crtc_view[1](0x37, 0x37) PR41 Vertical Expansion Initial Value
-//  m_ext_crtc_view[1](0x38, 0x38) PR33 Mapping RAM Address Counter
-//  m_ext_crtc_view[1](0x39, 0x39) PR34 Mapping RAM Data
-//  m_ext_crtc_view[1](0x3a, 0x3a) PR35 Mapping RAM Control and Power-Down
-//  m_ext_crtc_view[1](0x3b, 0x3b) PR36 LCD Panel Height Select
-//  m_ext_crtc_view[1](0x3c, 0x3c) PR37 Flat Panel Blinking Control
-//  m_ext_crtc_view[1](0x3e, 0x3e) PR39 Color LCD Control
-//  m_ext_crtc_view[1](0x3f, 0x3f) PR44 Power-Down Memory Refresh Control
+//  map(0x31, 0x31) PR18 Flat Panel Status
+//  map(0x32, 0x33) PR19/PR1A Flat Panel Control
+//  map(0x34, 0x34) PR1B Flat Panel Unlock
+//  map(0x35, 0x35) PR30 Mapping RAM Unlock
+//  map(0x37, 0x37) PR41 Vertical Expansion Initial Value
+//  map(0x38, 0x38) PR33 Mapping RAM Address Counter
+//  map(0x39, 0x39) PR34 Mapping RAM Data
+//  map(0x3a, 0x3a) PR35 Mapping RAM Control and Power-Down
+//  map(0x3b, 0x3b) PR36 LCD Panel Height Select
+//  map(0x3c, 0x3c) PR37 Flat Panel Blinking Control
+//  map(0x3e, 0x3e) PR39 Color LCD Control
+//  map(0x3f, 0x3f) PR44 Power-Down Memory Refresh Control
 }
 
 void wd90c26_vga_device::gc_map(address_map &map)