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Created CPU-specific device types for all CPUs, using new macros

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DECLARE_LEGACY_CPU_DEVICE and DEFINE_LEGACY_CPU_DEVICE. Changed CPUs
to be their own device types, rather than all of type CPU with a
special internal subtype. Note that as part of this process I removed
the CPU_ prefix from the ALL-CAPS device name, so CPU_Z80 is just
plain old Z80 now. This required changing a couple of names like
8080 to I8080 so that there was an alphabetic first character.

Added memory interfaces to the list of fast-access interfaces. To do
this properly I had to add a separate method to devices which is
called immediately after construction, when it is possible to perform
dynamic_casts on fully-constructed objects. (This is just internal,
no changes necessary to the devices themselves.)

Some additional notes:
 * SH2 and SH4 had typedefs that conflicted with their CPU_-less names
    so I bulk renamed to structures to sh2_state and sh4_state; RB, feel
    free to choose alternate names if you don't like 'em
 * SCSP was caught doing something to the 3rd indexed CPU. Since several
    systems that use SCSP don't even have 3 CPUs, I had no idea what
    this was supposed to do, so I changed to it reference "audiocpu"
    assuming that stv was the assumed target. This is really gross and
    should be a configuration parameter, not a hard-coded assumption.
This commit is contained in:
Aaron Giles 2010-07-03 00:12:44 +00:00
parent 46e30c4f68
commit c70c5fee5a
273 changed files with 1632 additions and 1662 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
makefile
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@ -694,9 +694,9 @@ $(sort $(OBJDIRS)):
ifndef EXECUTABLE_DEFINED
# always recompile the version string
$(VERSIONOBJ): $(DRVLIBS) $(LIBOSD) $(LIBEMU) $(LIBCPU) $(LIBSOUND) $(LIBUTIL) $(EXPAT) $(ZLIB) $(SOFTFLOAT) $(LIBOCORE) $(RESFILE)
$(VERSIONOBJ): $(DRVLIBS) $(LIBOSD) $(LIBCPU) $(LIBEMU) $(LIBSOUND) $(LIBUTIL) $(EXPAT) $(ZLIB) $(SOFTFLOAT) $(LIBOCORE) $(RESFILE)
$(EMULATOR): $(VERSIONOBJ) $(DRVLIBS) $(LIBOSD) $(LIBEMU) $(LIBCPU) $(LIBDASM) $(LIBSOUND) $(LIBUTIL) $(EXPAT) $(SOFTFLOAT) $(ZLIB) $(LIBOCORE) $(RESFILE)
$(EMULATOR): $(VERSIONOBJ) $(DRVLIBS) $(LIBOSD) $(LIBCPU) $(LIBEMU) $(LIBDASM) $(LIBSOUND) $(LIBUTIL) $(EXPAT) $(SOFTFLOAT) $(ZLIB) $(LIBOCORE) $(RESFILE)
@echo Linking $@...
$(LD) $(LDFLAGS) $(LDFLAGSEMULATOR) $^ $(LIBS) -o $@
ifeq ($(TARGETOS),win32)

20
src/emu/cpu/adsp2100/adsp2100.c
View File

@ -301,13 +301,12 @@ static void check_irqs(adsp2100_state *adsp);
INLINE adsp2100_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_ADSP2100 ||
cpu_get_type(device) == CPU_ADSP2101 ||
cpu_get_type(device) == CPU_ADSP2104 ||
cpu_get_type(device) == CPU_ADSP2105 ||
cpu_get_type(device) == CPU_ADSP2115 ||
cpu_get_type(device) == CPU_ADSP2181);
assert(device->type() == ADSP2100 ||
device->type() == ADSP2101 ||
device->type() == ADSP2104 ||
device->type() == ADSP2105 ||
device->type() == ADSP2115 ||
device->type() == ADSP2181);
return (adsp2100_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -2199,3 +2198,10 @@ UINT16 adsp2181_idma_data_r(running_device *device)
return result;
}
DEFINE_LEGACY_CPU_DEVICE(ADSP2100, adsp2100);
DEFINE_LEGACY_CPU_DEVICE(ADSP2101, adsp2101);
DEFINE_LEGACY_CPU_DEVICE(ADSP2104, adsp2104);
DEFINE_LEGACY_CPU_DEVICE(ADSP2105, adsp2105);
DEFINE_LEGACY_CPU_DEVICE(ADSP2115, adsp2115);
DEFINE_LEGACY_CPU_DEVICE(ADSP2181, adsp2181);

25
src/emu/cpu/adsp2100/adsp2100.h
View File

@ -16,6 +16,13 @@
TYPE DEFINITIONS
***************************************************************************/
DECLARE_LEGACY_CPU_DEVICE(ADSP2100, adsp2100);
DECLARE_LEGACY_CPU_DEVICE(ADSP2101, adsp2101);
DECLARE_LEGACY_CPU_DEVICE(ADSP2104, adsp2104);
DECLARE_LEGACY_CPU_DEVICE(ADSP2105, adsp2105);
DECLARE_LEGACY_CPU_DEVICE(ADSP2115, adsp2115);
DECLARE_LEGACY_CPU_DEVICE(ADSP2181, adsp2181);
/* transmit and receive data callbacks types */
typedef INT32 (*adsp21xx_rx_func)(cpu_device &device, int port);
typedef void (*adsp21xx_tx_func)(cpu_device &device, int port, INT32 data);
@ -69,9 +76,6 @@ enum
#define ADSP2100_IRQ2 2 /* IRQ2 */
#define ADSP2100_IRQ3 3 /* IRQ3 */
CPU_GET_INFO( adsp2100 );
#define CPU_ADSP2100 CPU_GET_INFO_NAME( adsp2100 )
/**************************************************************************
* ADSP2101 section
@ -86,9 +90,6 @@ CPU_GET_INFO( adsp2100 );
#define ADSP2101_SPORT0_TX 4 /* SPORT0 transmit IRQ */
#define ADSP2101_TIMER 5 /* internal timer IRQ */
CPU_GET_INFO( adsp2101 );
#define CPU_ADSP2101 CPU_GET_INFO_NAME( adsp2101 )
/**************************************************************************
* ADSP2104 section
@ -103,9 +104,6 @@ CPU_GET_INFO( adsp2101 );
#define ADSP2104_SPORT0_TX 4 /* SPORT0 transmit IRQ */
#define ADSP2104_TIMER 5 /* internal timer IRQ */
CPU_GET_INFO( adsp2104 );
#define CPU_ADSP2104 CPU_GET_INFO_NAME( adsp2104 )
void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
@ -120,9 +118,6 @@ void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#define ADSP2105_IRQ2 2 /* IRQ2 */
#define ADSP2105_TIMER 5 /* internal timer IRQ */
CPU_GET_INFO( adsp2105 );
#define CPU_ADSP2105 CPU_GET_INFO_NAME( adsp2105 )
void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
@ -139,9 +134,6 @@ void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#define ADSP2115_SPORT0_TX 4 /* SPORT0 transmit IRQ */
#define ADSP2115_TIMER 5 /* internal timer IRQ */
CPU_GET_INFO( adsp2115 );
#define CPU_ADSP2115 CPU_GET_INFO_NAME( adsp2115 )
void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
@ -161,9 +153,6 @@ void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
#define ADSP2181_IRQL1 7 /* IRQL1 */
#define ADSP2181_IRQL2 8 /* IRQL2 */
CPU_GET_INFO( adsp2181 );
#define CPU_ADSP2181 CPU_GET_INFO_NAME( adsp2181 )
void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
void adsp2181_idma_addr_w(running_device *device, UINT16 data);
UINT16 adsp2181_idma_addr_r(running_device *device);

8
src/emu/cpu/alph8201/alph8201.c
View File

@ -227,9 +227,8 @@ typedef struct {
INLINE alpha8201_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_ALPHA8201 ||
cpu_get_type(device) == CPU_ALPHA8301);
assert(device->type() == ALPHA8201 ||
device->type() == ALPHA8301);
return (alpha8201_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -994,3 +993,6 @@ CPU_GET_INFO( alpha8301 )
CPU_GET_INFO_CALL(alpha8xxx);
}
}
DEFINE_LEGACY_CPU_DEVICE(ALPHA8201, alpha8201);
DEFINE_LEGACY_CPU_DEVICE(ALPHA8301, alpha8301);

7
src/emu/cpu/alph8201/alph8201.h
View File

@ -35,11 +35,8 @@ enum
ALPHA8201_R4,ALPHA8201_R5,ALPHA8201_R6,ALPHA8201_R7
};
extern CPU_GET_INFO( alpha8201 );
extern CPU_GET_INFO( alpha8301 );
#define CPU_ALPHA8201 CPU_GET_INFO_NAME( alpha8201 )
#define CPU_ALPHA8301 CPU_GET_INFO_NAME( alpha8301 )
DECLARE_LEGACY_CPU_DEVICE(ALPHA8201, alpha8201);
DECLARE_LEGACY_CPU_DEVICE(ALPHA8301, alpha8301);
CPU_DISASSEMBLE( alpha8201 );

5
src/emu/cpu/am29000/am29000.c
View File

@ -144,8 +144,7 @@ typedef struct _am29000_state
INLINE am29000_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_AM29000);
assert(device->type() == AM29000);
return (am29000_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1209,3 +1208,5 @@ CPU_GET_INFO( am29000 )
}
}
DEFINE_LEGACY_CPU_DEVICE(AM29000, am29000);

3
src/emu/cpu/am29000/am29000.h
View File

@ -433,7 +433,6 @@ enum
PUBLIC FUNCTIONS
***************************************************************************/
extern CPU_GET_INFO( am29000 );
#define CPU_AM29000 CPU_GET_INFO_NAME( am29000 )
DECLARE_LEGACY_CPU_DEVICE(AM29000, am29000);
#endif /* __AM29000_H__ */

5
src/emu/cpu/apexc/apexc.c
View File

@ -371,8 +371,7 @@ struct _apexc_state
INLINE apexc_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_APEXC);
assert(device->type() == APEXC);
return (apexc_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -951,3 +950,5 @@ CPU_GET_INFO( apexc )
case CPUINFO_STR_REGISTER + APEXC_STATE: sprintf(info->s, "CPU state:%01X", cpustate->running ? TRUE : FALSE); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(APEXC, apexc);

3
src/emu/cpu/apexc/apexc.h
View File

@ -19,8 +19,7 @@ enum
APEXC_PC /* doesn't actually exist; is there for the disassembler */
};
CPU_GET_INFO( apexc );
#define CPU_APEXC CPU_GET_INFO_NAME( apexc )
DECLARE_LEGACY_CPU_DEVICE(APEXC, apexc);
CPU_DISASSEMBLE( apexc );

5
src/emu/cpu/arm/arm.c
View File

@ -253,8 +253,7 @@ static void arm_check_irq_state(ARM_REGS* cpustate);
INLINE ARM_REGS *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_ARM);
assert(device->type() == ARM);
return (ARM_REGS *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1567,3 +1566,5 @@ CPU_GET_INFO( arm )
case CPUINFO_STR_REGISTER + ARM32_SR14: sprintf( info->s, "SR14:%08x", cpustate->sArmRegister[eR14_SVC] ); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(ARM, arm);

3
src/emu/cpu/arm/arm.h
View File

@ -14,8 +14,7 @@
* PUBLIC FUNCTIONS
***************************************************************************************************/
extern CPU_GET_INFO( arm );
#define CPU_ARM CPU_GET_INFO_NAME( arm )
DECLARE_LEGACY_CPU_DEVICE(ARM, arm);
enum
{

7
src/emu/cpu/arm7/arm7.c
View File

@ -71,8 +71,7 @@ void arm7_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, void (*wr
INLINE arm_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_ARM7 || cpu_get_type(device) == CPU_ARM9 || cpu_get_type(device) == CPU_PXA255);
assert(device->type() == ARM7 || device->type() == ARM9 || device->type() == PXA255);
return (arm_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -837,3 +836,7 @@ void arm7_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, void (*wr
{
}
DEFINE_LEGACY_CPU_DEVICE(ARM7, arm7);
DEFINE_LEGACY_CPU_DEVICE(ARM9, arm9);
DEFINE_LEGACY_CPU_DEVICE(PXA255, pxa255);
DEFINE_LEGACY_CPU_DEVICE(SA1110, sa1110);

14
src/emu/cpu/arm7/arm7.h
View File

@ -37,16 +37,10 @@
/****************************************************************************************************
* PUBLIC FUNCTIONS
***************************************************************************************************/
extern CPU_GET_INFO( arm7 );
#define CPU_ARM7 CPU_GET_INFO_NAME( arm7 )
extern CPU_GET_INFO( arm9 );
#define CPU_ARM9 CPU_GET_INFO_NAME( arm9 )
extern CPU_GET_INFO( pxa255 );
#define CPU_PXA255 CPU_GET_INFO_NAME( pxa255 )
extern CPU_GET_INFO( sa1110 );
#define CPU_SA1110 CPU_GET_INFO_NAME( sa1110 )
DECLARE_LEGACY_CPU_DEVICE(ARM7, arm7);
DECLARE_LEGACY_CPU_DEVICE(ARM9, arm9);
DECLARE_LEGACY_CPU_DEVICE(PXA255, pxa255);
DECLARE_LEGACY_CPU_DEVICE(SA1110, sa1110);
#endif /* __ARM7_H__ */

5
src/emu/cpu/asap/asap.c
View File

@ -271,8 +271,7 @@ static void (*const conditiontable[16])(asap_state *) =
INLINE asap_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_ASAP);
assert(device->type() == ASAP);
return (asap_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1848,3 +1847,5 @@ CPU_GET_INFO( asap )
case CPUINFO_STR_REGISTER + ASAP_R31: sprintf(info->s, "R31:%08X", asap->src2val[REGBASE + 31]); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(ASAP, asap);

3
src/emu/cpu/asap/asap.h
View File

@ -37,7 +37,6 @@ enum
PUBLIC FUNCTIONS
***************************************************************************/
extern CPU_GET_INFO( asap );
#define CPU_ASAP CPU_GET_INFO_NAME( asap )
DECLARE_LEGACY_CPU_DEVICE(ASAP, asap);
#endif /* __ASAP_H__ */

5
src/emu/cpu/avr8/avr8.c
View File

@ -78,8 +78,7 @@ enum
INLINE avr8_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_AVR8);
assert(device->type() == AVR8);
return (avr8_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1157,3 +1156,5 @@ CPU_GET_INFO( avr8 )
case CPUINFO_STR_REGISTER + AVR8_SP: sprintf(info->s, "SP: %04x", SPREG ); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(AVR8, avr8);

3
src/emu/cpu/avr8/avr8.h
View File

@ -83,8 +83,7 @@ enum
AVR8_INT_SPM_RDY,
};
CPU_GET_INFO( avr8 );
#define CPU_AVR8 CPU_GET_INFO_NAME( avr8 )
DECLARE_LEGACY_CPU_DEVICE(AVR8, avr8);
CPU_DISASSEMBLE( avr8 );

5
src/emu/cpu/ccpu/ccpu.c
View File

@ -53,8 +53,7 @@ struct _ccpu_state
INLINE ccpu_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_CCPU);
assert(device->type() == CCPU);
return (ccpu_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -825,3 +824,5 @@ CPU_GET_INFO( ccpu )
case CPUINFO_STR_REGISTER + CCPU_T: sprintf(info->s, "T:%03X", cpustate->T); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(CCPU, ccpu);

3
src/emu/cpu/ccpu/ccpu.h
View File

@ -54,8 +54,7 @@ struct _ccpu_config
PUBLIC FUNCTIONS
***************************************************************************/
CPU_GET_INFO( ccpu );
#define CPU_CCPU CPU_GET_INFO_NAME( ccpu )
DECLARE_LEGACY_CPU_DEVICE(CCPU, ccpu);
void ccpu_wdt_timer_trigger(running_device *device);

5
src/emu/cpu/cdp1802/cdp1802.c
View File

@ -70,8 +70,7 @@ struct _cdp1802_state
INLINE cdp1802_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_CDP1802);
assert(device->type() == CDP1802);
return (cdp1802_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1105,3 +1104,5 @@ CPU_GET_INFO( cdp1802 )
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(CDP1802, cdp1802);

3
src/emu/cpu/cdp1802/cdp1802.h
View File

@ -92,8 +92,7 @@ struct _cdp1802_interface
};
#define CDP1802_INTERFACE(name) const cdp1802_interface (name) =
extern CPU_GET_INFO( cdp1802 );
#define CPU_CDP1802 CPU_GET_INFO_NAME( cdp1802 )
DECLARE_LEGACY_CPU_DEVICE(CDP1802, cdp1802);
extern CPU_DISASSEMBLE( cdp1802 );

46
src/emu/cpu/cop400/cop400.c
View File

@ -202,20 +202,19 @@ struct _cop400_opcode_map {
INLINE cop400_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_COP401 ||
cpu_get_type(device) == CPU_COP410 ||
cpu_get_type(device) == CPU_COP411 ||
cpu_get_type(device) == CPU_COP402 ||
cpu_get_type(device) == CPU_COP420 ||
cpu_get_type(device) == CPU_COP421 ||
cpu_get_type(device) == CPU_COP422 ||
cpu_get_type(device) == CPU_COP404 ||
cpu_get_type(device) == CPU_COP424 ||
cpu_get_type(device) == CPU_COP425 ||
cpu_get_type(device) == CPU_COP426 ||
cpu_get_type(device) == CPU_COP444 ||
cpu_get_type(device) == CPU_COP445);
assert(device->type() == COP401 ||
device->type() == COP410 ||
device->type() == COP411 ||
device->type() == COP402 ||
device->type() == COP420 ||
device->type() == COP421 ||
device->type() == COP422 ||
device->type() == COP404 ||
device->type() == COP424 ||
device->type() == COP425 ||
device->type() == COP426 ||
device->type() == COP444 ||
device->type() == COP445);
return (cop400_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1685,3 +1684,22 @@ CPU_GET_INFO( cop404 )
default: CPU_GET_INFO_CALL(cop444); break;
}
}
/* COP410 family */
DEFINE_LEGACY_CPU_DEVICE(COP401, cop401);
DEFINE_LEGACY_CPU_DEVICE(COP410, cop410);
DEFINE_LEGACY_CPU_DEVICE(COP411, cop411);
/* COP420 family */
DEFINE_LEGACY_CPU_DEVICE(COP402, cop402);
DEFINE_LEGACY_CPU_DEVICE(COP420, cop420);
DEFINE_LEGACY_CPU_DEVICE(COP421, cop421);
DEFINE_LEGACY_CPU_DEVICE(COP422, cop422);
/* COP444 family */
DEFINE_LEGACY_CPU_DEVICE(COP404, cop404);
DEFINE_LEGACY_CPU_DEVICE(COP424, cop424);
DEFINE_LEGACY_CPU_DEVICE(COP425, cop425);
DEFINE_LEGACY_CPU_DEVICE(COP426, cop426);
DEFINE_LEGACY_CPU_DEVICE(COP444, cop444);
DEFINE_LEGACY_CPU_DEVICE(COP445, cop445);

26
src/emu/cpu/cop400/cop400.h
View File

@ -133,23 +133,23 @@ struct _cop400_interface
***************************************************************************/
/* COP410 family */
extern CPU_GET_INFO( cop401 );
extern CPU_GET_INFO( cop410 );
extern CPU_GET_INFO( cop411 );
DECLARE_LEGACY_CPU_DEVICE(COP401, cop401);
DECLARE_LEGACY_CPU_DEVICE(COP410, cop410);
DECLARE_LEGACY_CPU_DEVICE(COP411, cop411);
/* COP420 family */
extern CPU_GET_INFO( cop402 );
extern CPU_GET_INFO( cop420 );
extern CPU_GET_INFO( cop421 );
extern CPU_GET_INFO( cop422 );
DECLARE_LEGACY_CPU_DEVICE(COP402, cop402);
DECLARE_LEGACY_CPU_DEVICE(COP420, cop420);
DECLARE_LEGACY_CPU_DEVICE(COP421, cop421);
DECLARE_LEGACY_CPU_DEVICE(COP422, cop422);
/* COP444 family */
extern CPU_GET_INFO( cop404 );
extern CPU_GET_INFO( cop424 );
extern CPU_GET_INFO( cop425 );
extern CPU_GET_INFO( cop426 );
extern CPU_GET_INFO( cop444 );
extern CPU_GET_INFO( cop445 );
DECLARE_LEGACY_CPU_DEVICE(COP404, cop404);
DECLARE_LEGACY_CPU_DEVICE(COP424, cop424);
DECLARE_LEGACY_CPU_DEVICE(COP425, cop425);
DECLARE_LEGACY_CPU_DEVICE(COP426, cop426);
DECLARE_LEGACY_CPU_DEVICE(COP444, cop444);
DECLARE_LEGACY_CPU_DEVICE(COP445, cop445);
/* disassemblers */
extern CPU_DISASSEMBLE( cop410 );

5
src/emu/cpu/cp1610/cp1610.c
View File

@ -54,8 +54,7 @@ struct _cp1610_state
INLINE cp1610_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_CP1610);
assert(device->type() == CP1610);
return (cp1610_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -3535,4 +3534,4 @@ CPU_GET_INFO( cp1610 )
return;
}
DEFINE_LEGACY_CPU_DEVICE(CP1610, cp1610);

3
src/emu/cpu/cp1610/cp1610.h
View File

@ -34,8 +34,7 @@ enum
#define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */
CPU_GET_INFO( cp1610 );
#define CPU_CP1610 CPU_GET_INFO_NAME( cp1610 )
DECLARE_LEGACY_CPU_DEVICE(CP1610, cp1610);
CPU_DISASSEMBLE( cp1610 );

13
src/emu/cpu/cubeqcpu/cubeqcpu.c
View File

@ -196,24 +196,21 @@ typedef struct
INLINE cquestsnd_state *get_safe_token_snd(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_CQUESTSND);
assert(device->type() == CQUESTSND);
return (cquestsnd_state *)downcast<legacy_cpu_device *>(device)->token();
}
INLINE cquestrot_state *get_safe_token_rot(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_CQUESTROT);
assert(device->type() == CQUESTROT);
return (cquestrot_state *)downcast<legacy_cpu_device *>(device)->token();
}
INLINE cquestlin_state *get_safe_token_lin(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_CQUESTLIN);
assert(device->type() == CQUESTLIN);
return (cquestlin_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1897,3 +1894,7 @@ CPU_GET_INFO( cquestlin )
case CPUINFO_STR_REGISTER + CQUESTLIN_ZLATCH: sprintf(info->s, "ZLATCH: %04X", cpustate->zlatch); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(CQUESTSND, cquestsnd);
DEFINE_LEGACY_CPU_DEVICE(CQUESTROT, cquestrot);
DEFINE_LEGACY_CPU_DEVICE(CQUESTLIN, cquestlin);

10
src/emu/cpu/cubeqcpu/cubeqcpu.h
View File

@ -154,12 +154,8 @@ void cubeqcpu_clear_stack(running_device *device);
UINT8 cubeqcpu_get_ptr_ram_val(running_device *device, int i);
UINT32* cubeqcpu_get_stack_ram(running_device *device);
CPU_GET_INFO( cquestsnd );
CPU_GET_INFO( cquestrot );
CPU_GET_INFO( cquestlin );
#define CPU_CQUESTSND CPU_GET_INFO_NAME( cquestsnd )
#define CPU_CQUESTROT CPU_GET_INFO_NAME( cquestrot )
#define CPU_CQUESTLIN CPU_GET_INFO_NAME( cquestlin )
DECLARE_LEGACY_CPU_DEVICE(CQUESTSND, cquestsnd);
DECLARE_LEGACY_CPU_DEVICE(CQUESTROT, cquestrot);
DECLARE_LEGACY_CPU_DEVICE(CQUESTLIN, cquestlin);
#endif /* _CUBEQCPU_H */

5
src/emu/cpu/dsp32/dsp32.c
View File

@ -205,8 +205,7 @@ static CPU_RESET( dsp32c );
INLINE dsp32_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_DSP32C);
assert(device->type() == DSP32C);
return (dsp32_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -931,3 +930,5 @@ CPU_GET_INFO( dsp32c )
case CPUINFO_STR_REGISTER + DSP32_IOC: sprintf(info->s, "IOC:%05X", cpustate->IOC); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(DSP32C, dsp32c);

3
src/emu/cpu/dsp32/dsp32.h
View File

@ -76,8 +76,7 @@ struct _dsp32_config
PUBLIC FUNCTIONS
***************************************************************************/
extern CPU_GET_INFO( dsp32c );
#define CPU_DSP32C CPU_GET_INFO_NAME( dsp32c )
DECLARE_LEGACY_CPU_DEVICE(DSP32C, dsp32c);
extern void dsp32c_pio_w(running_device *device, int reg, int data);
extern int dsp32c_pio_r(running_device *device, int reg);

3
src/emu/cpu/dsp56k/dsp56def.h
View File

@ -415,7 +415,6 @@ static void PCD_set(dsp56k_core* cpustate, UINT16 value);
INLINE dsp56k_core *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_DSP56156);
assert(device->type() == DSP56156);
return (dsp56k_core *)downcast<legacy_cpu_device *>(device)->token();
}

2
src/emu/cpu/dsp56k/dsp56k.c
View File

@ -620,3 +620,5 @@ CPU_GET_INFO( dsp56k )
case CPUINFO_STR_REGISTER + DSP56K_ST15: sprintf(info->s, "ST15: %08x", ST15); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(DSP56156, dsp56k);

3
src/emu/cpu/dsp56k/dsp56k.h
View File

@ -64,8 +64,7 @@ enum
#define DSP56K_IRQ_RESET 3 /* Is this needed? */
// Needed for MAME
extern CPU_GET_INFO( dsp56k );
#define CPU_DSP56156 CPU_GET_INFO_NAME( dsp56k )
DECLARE_LEGACY_CPU_DEVICE(DSP56156, dsp56k);
/***************************************************************************

44
src/emu/cpu/e132xs/e132xs.c
View File

@ -416,21 +416,20 @@ ADDRESS_MAP_END
INLINE hyperstone_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_E116T ||
cpu_get_type(device) == CPU_E116XT ||
cpu_get_type(device) == CPU_E116XS ||
cpu_get_type(device) == CPU_E116XSR ||
cpu_get_type(device) == CPU_E132N ||
cpu_get_type(device) == CPU_E132T ||
cpu_get_type(device) == CPU_E132XN ||
cpu_get_type(device) == CPU_E132XT ||
cpu_get_type(device) == CPU_E132XS ||
cpu_get_type(device) == CPU_E132XSR ||
cpu_get_type(device) == CPU_GMS30C2116 ||
cpu_get_type(device) == CPU_GMS30C2132 ||
cpu_get_type(device) == CPU_GMS30C2216 ||
cpu_get_type(device) == CPU_GMS30C2232);
assert(device->type() == E116T ||
device->type() == E116XT ||
device->type() == E116XS ||
device->type() == E116XSR ||
device->type() == E132N ||
device->type() == E132T ||
device->type() == E132XN ||
device->type() == E132XT ||
device->type() == E132XS ||
device->type() == E132XSR ||
device->type() == GMS30C2116 ||
device->type() == GMS30C2132 ||
device->type() == GMS30C2216 ||
device->type() == GMS30C2232);
return (hyperstone_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -5430,3 +5429,18 @@ CPU_GET_INFO( gms30c2232 )
CPU_GET_INFO_CALL(hyperstone);
}
}
DEFINE_LEGACY_CPU_DEVICE(E116T, e116t);
DEFINE_LEGACY_CPU_DEVICE(E116XT, e116xt);
DEFINE_LEGACY_CPU_DEVICE(E116XS, e116xs);
DEFINE_LEGACY_CPU_DEVICE(E116XSR, e116xsr);
DEFINE_LEGACY_CPU_DEVICE(E132N, e132n);
DEFINE_LEGACY_CPU_DEVICE(E132T, e132t);
DEFINE_LEGACY_CPU_DEVICE(E132XN, e132xn);
DEFINE_LEGACY_CPU_DEVICE(E132XT, e132xt);
DEFINE_LEGACY_CPU_DEVICE(E132XS, e132xs);
DEFINE_LEGACY_CPU_DEVICE(E132XSR, e132xsr);
DEFINE_LEGACY_CPU_DEVICE(GMS30C2116, gms30c2116);
DEFINE_LEGACY_CPU_DEVICE(GMS30C2132, gms30c2132);
DEFINE_LEGACY_CPU_DEVICE(GMS30C2216, gms30c2216);
DEFINE_LEGACY_CPU_DEVICE(GMS30C2232, gms30c2232);

54
src/emu/cpu/e132xs/e132xs.h
View File

@ -22,47 +22,21 @@
/* Functions */
CPU_GET_INFO( e116t );
#define CPU_E116T CPU_GET_INFO_NAME( e116t )
DECLARE_LEGACY_CPU_DEVICE(E116T, e116t);
DECLARE_LEGACY_CPU_DEVICE(E116XT, e116xt);
DECLARE_LEGACY_CPU_DEVICE(E116XS, e116xs);
DECLARE_LEGACY_CPU_DEVICE(E116XSR, e116xsr);
DECLARE_LEGACY_CPU_DEVICE(E132N, e132n);
DECLARE_LEGACY_CPU_DEVICE(E132T, e132t);
DECLARE_LEGACY_CPU_DEVICE(E132XN, e132xn);
DECLARE_LEGACY_CPU_DEVICE(E132XT, e132xt);
DECLARE_LEGACY_CPU_DEVICE(E132XS, e132xs);
DECLARE_LEGACY_CPU_DEVICE(E132XSR, e132xsr);
DECLARE_LEGACY_CPU_DEVICE(GMS30C2116, gms30c2116);
DECLARE_LEGACY_CPU_DEVICE(GMS30C2132, gms30c2132);
DECLARE_LEGACY_CPU_DEVICE(GMS30C2216, gms30c2216);
DECLARE_LEGACY_CPU_DEVICE(GMS30C2232, gms30c2232);
CPU_GET_INFO( e116xt );
#define CPU_E116XT CPU_GET_INFO_NAME( e116xt )
CPU_GET_INFO( e116xs );
#define CPU_E116XS CPU_GET_INFO_NAME( e116xs )
CPU_GET_INFO( e116xsr );
#define CPU_E116XSR CPU_GET_INFO_NAME( e116xsr )
CPU_GET_INFO( e132n );
#define CPU_E132N CPU_GET_INFO_NAME( e132n )
CPU_GET_INFO( e132t );
#define CPU_E132T CPU_GET_INFO_NAME( e132t )
CPU_GET_INFO( e132xn );
#define CPU_E132XN CPU_GET_INFO_NAME( e132xn )
CPU_GET_INFO( e132xt );
#define CPU_E132XT CPU_GET_INFO_NAME( e132xt )
CPU_GET_INFO( e132xs );
#define CPU_E132XS CPU_GET_INFO_NAME( e132xs )
CPU_GET_INFO( e132xsr );
#define CPU_E132XSR CPU_GET_INFO_NAME( e132xsr )
CPU_GET_INFO( gms30c2116 );
#define CPU_GMS30C2116 CPU_GET_INFO_NAME( gms30c2116 )
CPU_GET_INFO( gms30c2132 );
#define CPU_GMS30C2132 CPU_GET_INFO_NAME( gms30c2132 )
CPU_GET_INFO( gms30c2216 );
#define CPU_GMS30C2216 CPU_GET_INFO_NAME( gms30c2216 )
CPU_GET_INFO( gms30c2232 );
#define CPU_GMS30C2232 CPU_GET_INFO_NAME( gms30c2232 )
extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned h_flag, int private_fp);

5
src/emu/cpu/esrip/esrip.c
View File

@ -123,8 +123,7 @@ typedef struct
INLINE esrip_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_ESRIP);
assert(device->type() == ESRIP);
return (esrip_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1995,3 +1994,5 @@ CPU_GET_INFO( esrip )
case CPUINFO_STR_REGISTER + ESRIP_IADDR: sprintf(info->s, "IADR: %04X", cpustate->iaddr_latch); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(ESRIP, esrip);

4
src/emu/cpu/esrip/esrip.h
View File

@ -94,9 +94,7 @@ struct _esrip_config_
PUBLIC FUNCTIONS
***************************************************************************/
CPU_GET_INFO( esrip );
#define CPU_ESRIP CPU_GET_INFO_NAME( esrip )
DECLARE_LEGACY_CPU_DEVICE(ESRIP, esrip);
extern UINT8 get_rip_status(running_device *cpu);

9
src/emu/cpu/f8/f8.c
View File

@ -64,8 +64,7 @@ struct _f8_Regs
INLINE f8_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_F8);
assert(device->type() == F8);
return (f8_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -2230,8 +2229,4 @@ CPU_GET_INFO( f8 )
return;
}
DEFINE_LEGACY_CPU_DEVICE(F8, f8);

3
src/emu/cpu/f8/f8.h
View File

@ -46,8 +46,7 @@ enum
#define F8_INT_NONE 0
#define F8_INT_INTR 1
CPU_GET_INFO( f8 );
#define CPU_F8 CPU_GET_INFO_NAME( f8 )
DECLARE_LEGACY_CPU_DEVICE(F8, f8);
#ifdef __cplusplus
}

8
src/emu/cpu/g65816/g65816.c
View File

@ -98,8 +98,7 @@ TODO general:
INLINE g65816i_cpu_struct *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_G65816 || cpu_get_type(device) == CPU_5A22);
assert(device->type() == G65816 || device->type() == _5A22);
return (g65816i_cpu_struct *)downcast<legacy_cpu_device *>(device)->token();
}
@ -538,7 +537,7 @@ static CPU_INIT( 5a22 )
}
CPU_GET_INFO( 5a22 )
CPU_GET_INFO( _5a22 )
{
switch (state)
{
@ -552,6 +551,9 @@ CPU_GET_INFO( 5a22 )
}
}
DEFINE_LEGACY_CPU_DEVICE(G65816, g65816);
DEFINE_LEGACY_CPU_DEVICE(_5A22, _5a22);
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */

6
src/emu/cpu/g65816/g65816.h
View File

@ -57,10 +57,8 @@ enum
};
/* Main interface function */
CPU_GET_INFO( g65816 );
#define CPU_G65816 CPU_GET_INFO_NAME( g65816 )
CPU_GET_INFO( 5a22 );
#define CPU_5A22 CPU_GET_INFO_NAME( 5a22 )
DECLARE_LEGACY_CPU_DEVICE(G65816, g65816);
DECLARE_LEGACY_CPU_DEVICE(_5A22, _5a22);
#define CPU_TYPE_G65816 0
#define CPU_TYPE_5A22 1

5
src/emu/cpu/h6280/h6280.c
View File

@ -120,8 +120,7 @@ static void set_irq_line(h6280_Regs* cpustate, int irqline, int state);
INLINE h6280_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_H6280);
assert(device->type() == H6280);
return (h6280_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -530,3 +529,5 @@ CPU_GET_INFO( h6280 )
case CPUINFO_STR_REGISTER + H6280_M8: sprintf(info->s, "M8:%02X", cpustate->mmr[7]); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(H6280, h6280);

4
src/emu/cpu/h6280/h6280.h
View File

@ -72,9 +72,7 @@ typedef struct
} h6280_Regs;
CPU_GET_INFO( h6280 );
#define CPU_H6280 CPU_GET_INFO_NAME( h6280 )
DECLARE_LEGACY_CPU_DEVICE(H6280, h6280);
READ8_HANDLER( h6280_irq_status_r );
WRITE8_HANDLER( h6280_irq_status_w );

13
src/emu/cpu/h83002/h8.h
View File

@ -85,15 +85,10 @@ enum
H8_SERIAL_1,
};
CPU_GET_INFO( h8_3002 );
CPU_GET_INFO( h8_3007 );
CPU_GET_INFO( h8_3044 );
CPU_GET_INFO( h8_3334 );
#define CPU_H83002 CPU_GET_INFO_NAME( h8_3002 )
#define CPU_H83007 CPU_GET_INFO_NAME( h8_3007 )
#define CPU_H83044 CPU_GET_INFO_NAME( h8_3044 )
#define CPU_H83334 CPU_GET_INFO_NAME( h8_3334 )
DECLARE_LEGACY_CPU_DEVICE(H83002, h8_3002);
DECLARE_LEGACY_CPU_DEVICE(H83007, h8_3007);
DECLARE_LEGACY_CPU_DEVICE(H83044, h8_3044);
DECLARE_LEGACY_CPU_DEVICE(H83334, h8_3334);
#endif /* __H83002_H__ */

4
src/emu/cpu/h83002/h8_16.c
View File

@ -666,3 +666,7 @@ CPU_GET_INFO( h8_3007 )
CPU_GET_INFO_CALL(h8_3002);
}
}
DEFINE_LEGACY_CPU_DEVICE(H83002, h8_3002);
DEFINE_LEGACY_CPU_DEVICE(H83007, h8_3007);
DEFINE_LEGACY_CPU_DEVICE(H83044, h8_3044);

1
src/emu/cpu/h83002/h8_8.c
View File

@ -824,3 +824,4 @@ CPU_GET_INFO( h8_3334 )
}
}
DEFINE_LEGACY_CPU_DEVICE(H83334, h8_3334);

9
src/emu/cpu/h83002/h8priv.h
View File

@ -50,11 +50,10 @@ extern h83xx_state h8;
INLINE h83xx_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_H83002 ||
cpu_get_type(device) == CPU_H83007 ||
cpu_get_type(device) == CPU_H83044 ||
cpu_get_type(device) == CPU_H83334);
assert(device->type() == H83002 ||
device->type() == H83007 ||
device->type() == H83044 ||
device->type() == H83334);
return (h83xx_state *)downcast<legacy_cpu_device *>(device)->token();
}

5
src/emu/cpu/hd6309/hd6309.c
View File

@ -154,8 +154,7 @@ struct _m68_state_t
INLINE m68_state_t *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_HD6309);
assert(device->type() == HD6309);
return (m68_state_t *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1353,3 +1352,5 @@ CPU_GET_INFO( hd6309 )
case CPUINFO_STR_REGISTER + HD6309_DP: sprintf(info->s, "DP:%02X", m68_state->dp.b.h); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(HD6309, hd6309);

3
src/emu/cpu/hd6309/hd6309.h
View File

@ -17,8 +17,7 @@ enum
/* PUBLIC FUNCTIONS */
CPU_GET_INFO( hd6309 );
#define CPU_HD6309 CPU_GET_INFO_NAME( hd6309 )
DECLARE_LEGACY_CPU_DEVICE(HD6309, hd6309);
CPU_DISASSEMBLE( hd6309 );

5
src/emu/cpu/i386/i386.c
View File

@ -1456,3 +1456,8 @@ CPU_GET_INFO( mediagx )
default: CPU_GET_INFO_CALL(i386); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(I386, i386);
DEFINE_LEGACY_CPU_DEVICE(I486, i486);
DEFINE_LEGACY_CPU_DEVICE(PENTIUM, pentium);
DEFINE_LEGACY_CPU_DEVICE(MEDIAGX, mediagx);

13
src/emu/cpu/i386/i386.h
View File

@ -9,15 +9,10 @@
// mingw has this defined for 32-bit compiles
#undef i386
CPU_GET_INFO( i386 );
CPU_GET_INFO( i486 );
CPU_GET_INFO( pentium );
CPU_GET_INFO( mediagx );
#define CPU_I386 CPU_GET_INFO_NAME( i386 )
#define CPU_I486 CPU_GET_INFO_NAME( i486 )
#define CPU_PENTIUM CPU_GET_INFO_NAME( pentium )
#define CPU_MEDIAGX CPU_GET_INFO_NAME( mediagx )
DECLARE_LEGACY_CPU_DEVICE(I386, i386);
DECLARE_LEGACY_CPU_DEVICE(I486, i486);
DECLARE_LEGACY_CPU_DEVICE(PENTIUM, pentium);
DECLARE_LEGACY_CPU_DEVICE(MEDIAGX, mediagx);

9
src/emu/cpu/i386/i386priv.h
View File

@ -260,11 +260,10 @@ struct _i386_state
INLINE i386_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I386 ||
cpu_get_type(device) == CPU_I486 ||
cpu_get_type(device) == CPU_PENTIUM ||
cpu_get_type(device) == CPU_MEDIAGX);
assert(device->type() == I386 ||
device->type() == I486 ||
device->type() == PENTIUM ||
device->type() == MEDIAGX);
return (i386_state *)downcast<legacy_cpu_device *>(device)->token();
}

5
src/emu/cpu/i4004/i4004.c
View File

@ -54,8 +54,7 @@ struct _i4004_state
INLINE i4004_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I4004);
assert(device->type() == I4004);
return (i4004_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -617,3 +616,5 @@ CPU_GET_INFO( i4004 )
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(I4004, i4004);

3
src/emu/cpu/i4004/i4004.h
View File

@ -26,8 +26,7 @@ enum
FUNCTION PROTOTYPES
***************************************************************************/
CPU_GET_INFO( i4004 );
#define CPU_I4004 CPU_GET_INFO_NAME( i4004 )
DECLARE_LEGACY_CPU_DEVICE(I4004, i4004);
CPU_DISASSEMBLE( i4004 );

5
src/emu/cpu/i8008/i8008.c
View File

@ -57,8 +57,7 @@ struct _i8008_state
INLINE i8008_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I8008);
assert(device->type() == I8008);
return (i8008_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -720,3 +719,5 @@ CPU_GET_INFO( i8008 )
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(I8008, i8008);

3
src/emu/cpu/i8008/i8008.h
View File

@ -25,8 +25,7 @@ enum
FUNCTION PROTOTYPES
***************************************************************************/
CPU_GET_INFO( i8008 );
#define CPU_I8008 CPU_GET_INFO_NAME( i8008 )
DECLARE_LEGACY_CPU_DEVICE(I8008, i8008);
CPU_DISASSEMBLE( i8008 );
#endif

9
src/emu/cpu/i8085/i8085.c
View File

@ -275,9 +275,8 @@ static void execute_one(i8085_state *cpustate, int opcode);
INLINE i8085_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_8080 ||
cpu_get_type(device) == CPU_8085A);
assert(device->type() == I8080 ||
device->type() == I8085A);
return (i8085_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1290,3 +1289,7 @@ CPU_GET_INFO( i8080a )
default: CPU_GET_INFO_CALL(i8085); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(I8080, i8080);
DEFINE_LEGACY_CPU_DEVICE(I8080A, i8080a);
DEFINE_LEGACY_CPU_DEVICE(I8085A, i8085);

11
src/emu/cpu/i8085/i8085.h
View File

@ -50,14 +50,9 @@ struct _i8085_config
FUNCTION PROTOTYPES
***************************************************************************/
CPU_GET_INFO( i8080 );
#define CPU_8080 CPU_GET_INFO_NAME( i8080 )
CPU_GET_INFO( i8080a );
#define CPU_8080A CPU_GET_INFO_NAME( i8080a )
CPU_GET_INFO( i8085 );
#define CPU_8085A CPU_GET_INFO_NAME( i8085 )
DECLARE_LEGACY_CPU_DEVICE(I8080, i8080);
DECLARE_LEGACY_CPU_DEVICE(I8080A, i8080a);
DECLARE_LEGACY_CPU_DEVICE(I8085A, i8085);
CPU_DISASSEMBLE( i8085 );

6
src/emu/cpu/i86/i286.c
View File

@ -84,8 +84,7 @@ struct _i80286_state
INLINE i80286_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I80286);
assert(device->type() == I80286);
return (i80286_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -516,3 +515,6 @@ CPU_GET_INFO( i80286 )
case CPUINFO_STR_REGISTER + I80286_IDTR_LIMIT: sprintf(info->s, "%04X", cpustate->idtr.limit); break;
}
}
#undef I80286
DEFINE_LEGACY_CPU_DEVICE(I80286, i80286);

3
src/emu/cpu/i86/i286.h
View File

@ -43,7 +43,6 @@ enum
};
/* Public functions */
CPU_GET_INFO( i80286 );
#define CPU_I80286 CPU_GET_INFO_NAME( i80286 )
DECLARE_LEGACY_CPU_DEVICE(I80286, i80286);
#endif /* __I286INTF_H__ */

14
src/emu/cpu/i86/i86.c
View File

@ -73,11 +73,10 @@ struct _i8086_state
INLINE i8086_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I8086 ||
cpu_get_type(device) == CPU_I8088 ||
cpu_get_type(device) == CPU_I80186 ||
cpu_get_type(device) == CPU_I80188);
assert(device->type() == I8086 ||
device->type() == I8088 ||
device->type() == I80186 ||
device->type() == I80188);
return (i8086_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -644,3 +643,8 @@ CPU_GET_INFO( i80188 )
default: CPU_GET_INFO_CALL(i8086); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(I8086, i8086);
DEFINE_LEGACY_CPU_DEVICE(I8088, i8088);
DEFINE_LEGACY_CPU_DEVICE(I80186, i80186);
DEFINE_LEGACY_CPU_DEVICE(I80188, i80188);

15
src/emu/cpu/i86/i86.h
View File

@ -39,16 +39,9 @@ enum
};
/* Public functions */
CPU_GET_INFO( i8086 );
#define CPU_I8086 CPU_GET_INFO_NAME( i8086 )
CPU_GET_INFO( i8088 );
#define CPU_I8088 CPU_GET_INFO_NAME( i8088 )
CPU_GET_INFO( i80186 );
#define CPU_I80186 CPU_GET_INFO_NAME( i80186 )
CPU_GET_INFO( i80188 );
#define CPU_I80188 CPU_GET_INFO_NAME( i80188 )
DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
#endif /* __I86INTF_H__ */

2
src/emu/cpu/i860/i860.c
View File

@ -380,3 +380,5 @@ CPU_GET_INFO( i860 )
case CPUINFO_STR_REGISTER + I860_F31: CPU_GET_INFO_STR_F(31); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(I860, i860);

6
src/emu/cpu/i860/i860.h
View File

@ -47,8 +47,7 @@ enum
};
/* Needed for MAME */
CPU_GET_INFO( i860 );
#define CPU_I860 CPU_GET_INFO_NAME( i860 )
DECLARE_LEGACY_CPU_DEVICE(I860, i860);
/***************************************************************************
@ -179,8 +178,7 @@ typedef struct {
INLINE i860_state_t *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I860);
assert(device->type() == I860);
return (i860_state_t *)downcast<legacy_cpu_device *>(device)->token();
}

5
src/emu/cpu/i960/i960.c
View File

@ -43,8 +43,7 @@ struct _i960_state_t {
INLINE i960_state_t *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I960);
assert(device->type() == I960);
return (i960_state_t *)downcast<legacy_cpu_device *>(device)->token();
}
@ -2227,3 +2226,5 @@ void i960_stall(running_device *device)
i960_state_t *i960 = get_safe_token(device);
i960->IP = i960->PIP;
}
DEFINE_LEGACY_CPU_DEVICE(I960, i960);

3
src/emu/cpu/i960/i960.h
View File

@ -60,8 +60,7 @@ enum
I960_IRQ3 = 3
};
CPU_GET_INFO( i960 );
#define CPU_I960 CPU_GET_INFO_NAME( i960 )
DECLARE_LEGACY_CPU_DEVICE(I960, i960);
void i960_noburst(running_device *device);
void i960_stall(running_device *device);

8
src/emu/cpu/jaguar/jaguar.c
View File

@ -251,9 +251,8 @@ static void (*const dsp_op_table[64])(jaguar_state *jaguar, UINT16 op) =
INLINE jaguar_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_JAGUARGPU ||
cpu_get_type(device) == CPU_JAGUARDSP);
assert(device->type() == JAGUARGPU ||
device->type() == JAGUARDSP);
return (jaguar_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1663,3 +1662,6 @@ CPU_GET_INFO( jaguardsp )
default: CPU_GET_INFO_CALL(jaguargpu); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(JAGUARGPU, jaguargpu);
DEFINE_LEGACY_CPU_DEVICE(JAGUARDSP, jaguardsp);

6
src/emu/cpu/jaguar/jaguar.h
View File

@ -99,13 +99,11 @@ struct _jaguar_cpu_config
PUBLIC FUNCTIONS
***************************************************************************/
extern CPU_GET_INFO( jaguargpu );
#define CPU_JAGUARGPU CPU_GET_INFO_NAME( jaguargpu )
DECLARE_LEGACY_CPU_DEVICE(JAGUARGPU, jaguargpu);
extern void jaguargpu_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguargpu_ctrl_r(running_device *device, offs_t offset);
extern CPU_GET_INFO( jaguardsp );
#define CPU_JAGUARDSP CPU_GET_INFO_NAME( jaguardsp )
DECLARE_LEGACY_CPU_DEVICE(JAGUARDSP, jaguardsp);
extern void jaguardsp_ctrl_w(running_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
extern UINT32 jaguardsp_ctrl_r(running_device *device, offs_t offset);

5
src/emu/cpu/konami/konami.c
View File

@ -69,8 +69,7 @@ struct _konami_state
INLINE konami_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_KONAMI);
assert(device->type() == KONAMI);
return (konami_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -627,3 +626,5 @@ CPU_GET_INFO( konami )
case CPUINFO_STR_REGISTER + KONAMI_DP: sprintf(info->s, "DP:%02X", cpustate->dp.b.h); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(KONAMI, konami);

3
src/emu/cpu/konami/konami.h
View File

@ -20,8 +20,7 @@ enum
#define KONAMI_FIRQ_LINE 1 /* FIRQ line number */
/* PUBLIC FUNCTIONS */
CPU_GET_INFO( konami );
#define CPU_KONAMI CPU_GET_INFO_NAME( konami )
DECLARE_LEGACY_CPU_DEVICE(KONAMI, konami);
CPU_DISASSEMBLE( konami );

5
src/emu/cpu/lh5801/lh5801.c
View File

@ -71,8 +71,7 @@ struct _lh5810_state
INLINE lh5801_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_LH5801);
assert(device->type() == LH5801);
return (lh5801_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -268,3 +267,5 @@ CPU_GET_INFO( lh5801 )
case CPUINFO_STR_REGISTER + LH5801_DP: sprintf(info->s, "DP:%04X", cpustate->dp); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(LH5801, lh5801);

3
src/emu/cpu/lh5801/lh5801.h
View File

@ -76,8 +76,7 @@ struct _lh5801_cpu_core
#define LH5801_INT_NONE 0
#define LH5801_IRQ 1
CPU_GET_INFO( lh5801 );
#define CPU_LH5801 CPU_GET_INFO_NAME( lh5801 )
DECLARE_LEGACY_CPU_DEVICE(LH5801, lh5801);
extern CPU_DISASSEMBLE( lh5801 );
#endif /* __LH5801_H__ */

5
src/emu/cpu/lr35902/lr35902.c
View File

@ -116,8 +116,7 @@ union _lr35902_state {
INLINE lr35902_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_LR35902);
assert(device->type() == LR35902);
return (lr35902_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -491,3 +490,5 @@ CPU_GET_INFO( lr35902 )
case CPUINFO_STR_REGISTER + LR35902_IF: sprintf(info->s, "IF:%02X", cpustate->w.IF); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(LR35902, lr35902);

3
src/emu/cpu/lr35902/lr35902.h
View File

@ -29,8 +29,7 @@ enum
/****************************************************************************/
/* Return register contents */
/****************************************************************************/
extern CPU_GET_INFO( lr35902 );
#define CPU_LR35902 CPU_GET_INFO_NAME( lr35902 )
DECLARE_LEGACY_CPU_DEVICE(LR35902, lr35902);
extern CPU_DISASSEMBLE( lr35902 );

3
src/emu/cpu/m37710/m37710.c
View File

@ -1132,6 +1132,9 @@ CPU_GET_INFO( m37702 )
CPU_GET_INFO_CALL(m37710);
}
DEFINE_LEGACY_CPU_DEVICE(M37710, m37710);
DEFINE_LEGACY_CPU_DEVICE(M37702, m37702);
/* ======================================================================== */
/* ============================== END OF FILE ============================= */
/* ======================================================================== */

7
src/emu/cpu/m37710/m37710.h
View File

@ -85,11 +85,8 @@ enum
M37710_SER0_XMIT, M37710_SER1_REC, M37710_SER1_XMIT
};
CPU_GET_INFO( m37710 );
CPU_GET_INFO( m37702 );
#define CPU_M37710 CPU_GET_INFO_NAME( m37710 )
#define CPU_M37702 CPU_GET_INFO_NAME( m37702 )
DECLARE_LEGACY_CPU_DEVICE(M37710, m37710);
DECLARE_LEGACY_CPU_DEVICE(M37702, m37702);
/* ======================================================================== */
/* ============================== END OF FILE ============================= */

5
src/emu/cpu/m37710/m37710cm.h
View File

@ -130,9 +130,8 @@ struct _m37710i_cpu_struct
INLINE m37710i_cpu_struct *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M37710 ||
cpu_get_type(device) == CPU_M37702);
assert(device->type() == M37710 ||
device->type() == M37702);
return (m37710i_cpu_struct *)downcast<legacy_cpu_device *>(device)->token();
}

5
src/emu/cpu/m6502/m4510.c
View File

@ -159,8 +159,7 @@ struct _m4510_Regs {
INLINE m4510_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M4510);
assert(device->type() == M4510);
return (m4510_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -553,3 +552,5 @@ CPU_GET_INFO( m4510 )
}
}
#undef M4510
DEFINE_LEGACY_CPU_DEVICE(M4510, m4510);

3
src/emu/cpu/m6502/m4510.h
View File

@ -39,8 +39,7 @@ enum
#define M4510_IRQ_LINE M6502_IRQ_LINE
CPU_GET_INFO( m4510 );
#define CPU_M4510 CPU_GET_INFO_NAME( m4510 )
DECLARE_LEGACY_CPU_DEVICE(M4510, m4510);
extern CPU_DISASSEMBLE( m4510 );

29
src/emu/cpu/m6502/m6502.c
View File

@ -87,16 +87,15 @@ struct _m6502_Regs
INLINE m6502_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M6502 ||
cpu_get_type(device) == CPU_M6510 ||
cpu_get_type(device) == CPU_M6510T ||
cpu_get_type(device) == CPU_M7501 ||
cpu_get_type(device) == CPU_M8502 ||
cpu_get_type(device) == CPU_N2A03 ||
cpu_get_type(device) == CPU_M65C02 ||
cpu_get_type(device) == CPU_M65SC02 ||
cpu_get_type(device) == CPU_DECO16);
assert(device->type() == M6502 ||
device->type() == M6510 ||
device->type() == M6510T ||
device->type() == M7501 ||
device->type() == M8502 ||
device->type() == N2A03 ||
device->type() == M65C02 ||
device->type() == M65SC02 ||
device->type() == DECO16);
return (m6502_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -967,3 +966,13 @@ CPU_GET_INFO( deco16 )
default: CPU_GET_INFO_CALL(m6502); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(M6502, m6502);
DEFINE_LEGACY_CPU_DEVICE(M6510, m6510);
DEFINE_LEGACY_CPU_DEVICE(M6510T, m6510t);
DEFINE_LEGACY_CPU_DEVICE(M7501, m7501);
DEFINE_LEGACY_CPU_DEVICE(M8502, m8502);
DEFINE_LEGACY_CPU_DEVICE(N2A03, n2a03);
DEFINE_LEGACY_CPU_DEVICE(M65C02, m65c02);
DEFINE_LEGACY_CPU_DEVICE(M65SC02, m65sc02);
DEFINE_LEGACY_CPU_DEVICE(DECO16, deco16);

27
src/emu/cpu/m6502/m6502.h
View File

@ -65,8 +65,7 @@ struct _m6502_interface
m6510_port_write_func port_write_func;
};
extern CPU_GET_INFO( m6502 );
#define CPU_M6502 CPU_GET_INFO_NAME( m6502 )
DECLARE_LEGACY_CPU_DEVICE(M6502, m6502);
extern CPU_DISASSEMBLE( m6502 );
@ -86,8 +85,7 @@ extern CPU_DISASSEMBLE( m6502 );
#define M6510_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( m6510 );
#define CPU_M6510 CPU_GET_INFO_NAME( m6510 )
DECLARE_LEGACY_CPU_DEVICE(M6510, m6510);
extern CPU_DISASSEMBLE( m6510 );
@ -106,8 +104,7 @@ UINT8 m6510_get_port(legacy_cpu_device *device);
#define M6510T_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( m6510t );
#define CPU_M6510T CPU_GET_INFO_NAME( m6510t )
DECLARE_LEGACY_CPU_DEVICE(M6510T, m6510t);
#define M7501_A M6502_A
@ -123,8 +120,7 @@ extern CPU_GET_INFO( m6510t );
#define M7501_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( m7501 );
#define CPU_M7501 CPU_GET_INFO_NAME( m7501 )
DECLARE_LEGACY_CPU_DEVICE(M7501, m7501);
#define M8502_A M6502_A
#define M8502_X M6502_X
@ -139,8 +135,7 @@ extern CPU_GET_INFO( m7501 );
#define M8502_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( m8502 );
#define CPU_M8502 CPU_GET_INFO_NAME( m8502 )
DECLARE_LEGACY_CPU_DEVICE(M8502, m8502);
/****************************************************************************
@ -159,8 +154,7 @@ extern CPU_GET_INFO( m8502 );
#define N2A03_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( n2a03 );
#define CPU_N2A03 CPU_GET_INFO_NAME( n2a03 )
DECLARE_LEGACY_CPU_DEVICE(N2A03, n2a03);
#define N2A03_DEFAULTCLOCK (21477272.724 / 12)
@ -187,8 +181,7 @@ extern void n2a03_irq(running_device *device);
#define M65C02_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( m65c02 );
#define CPU_M65C02 CPU_GET_INFO_NAME( m65c02 )
DECLARE_LEGACY_CPU_DEVICE(M65C02, m65c02);
extern CPU_DISASSEMBLE( m65c02 );
@ -209,8 +202,7 @@ extern CPU_DISASSEMBLE( m65c02 );
#define M65SC02_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( m65sc02 );
#define CPU_M65SC02 CPU_GET_INFO_NAME( m65sc02 )
DECLARE_LEGACY_CPU_DEVICE(M65SC02, m65sc02);
extern CPU_DISASSEMBLE( m65sc02 );
@ -230,8 +222,7 @@ extern CPU_DISASSEMBLE( m65sc02 );
#define DECO16_IRQ_LINE M6502_IRQ_LINE
extern CPU_GET_INFO( deco16 );
#define CPU_DECO16 CPU_GET_INFO_NAME( deco16 )
DECLARE_LEGACY_CPU_DEVICE(DECO16, deco16);
extern CPU_DISASSEMBLE( deco16 );

4
src/emu/cpu/m6502/m6509.c
View File

@ -90,8 +90,7 @@ struct _m6509_Regs {
INLINE m6509_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M6509);
assert(device->type() == M6509);
return (m6509_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -414,3 +413,4 @@ CPU_GET_INFO( m6509 )
}
}
DEFINE_LEGACY_CPU_DEVICE(M6509, m6509);

3
src/emu/cpu/m6502/m6509.h
View File

@ -39,7 +39,6 @@ enum
positiv edge sets overflow flag */
#define M6509_SET_OVERFLOW 3
CPU_GET_INFO( m6509 );
#define CPU_M6509 CPU_GET_INFO_NAME( m6509 )
DECLARE_LEGACY_CPU_DEVICE(M6509, m6509);
#endif /* __M6509_H__ */

5
src/emu/cpu/m6502/m65ce02.c
View File

@ -84,8 +84,7 @@ struct _m65ce02_Regs {
INLINE m65ce02_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M65CE02);
assert(device->type() == M65CE02);
return (m65ce02_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -360,3 +359,5 @@ CPU_GET_INFO( m65ce02 )
case CPUINFO_STR_REGISTER + M65CE02_ZP: sprintf(info->s, "ZP:%03X", cpustate->zp.w.l); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(M65CE02, m65ce02);

3
src/emu/cpu/m6502/m65ce02.h
View File

@ -35,8 +35,7 @@ enum
#define M65CE02_IRQ_LINE M6502_IRQ_LINE
CPU_GET_INFO( m65ce02 );
#define CPU_M65CE02 CPU_GET_INFO_NAME( m65ce02 )
DECLARE_LEGACY_CPU_DEVICE(M65CE02, m65ce02);
extern CPU_DISASSEMBLE( m65ce02 );

23
src/emu/cpu/m6800/m6800.c
View File

@ -156,14 +156,13 @@ struct _m6800_state
INLINE m6800_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M6800 ||
cpu_get_type(device) == CPU_M6801 ||
cpu_get_type(device) == CPU_M6802 ||
cpu_get_type(device) == CPU_M6803 ||
cpu_get_type(device) == CPU_M6808 ||
cpu_get_type(device) == CPU_HD63701 ||
cpu_get_type(device) == CPU_NSC8105);
assert(device->type() == M6800 ||
device->type() == M6801 ||
device->type() == M6802 ||
device->type() == M6803 ||
device->type() == M6808 ||
device->type() == HD63701 ||
device->type() == NSC8105);
return (m6800_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -2888,3 +2887,11 @@ CPU_GET_INFO( nsc8105 )
default: CPU_GET_INFO_CALL(m6800); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(M6800, m6800);
DEFINE_LEGACY_CPU_DEVICE(M6801, m6801);
DEFINE_LEGACY_CPU_DEVICE(M6802, m6802);
DEFINE_LEGACY_CPU_DEVICE(M6803, m6803);
DEFINE_LEGACY_CPU_DEVICE(M6808, m6808);
DEFINE_LEGACY_CPU_DEVICE(HD63701, hd63701);
DEFINE_LEGACY_CPU_DEVICE(NSC8105, nsc8105);

40
src/emu/cpu/m6800/m6800.h
View File

@ -42,23 +42,13 @@ enum
M6803_PORT4
};
CPU_GET_INFO( m6800 );
#define CPU_M6800 CPU_GET_INFO_NAME( m6800 )
CPU_GET_INFO( m6801 );
#define CPU_M6801 CPU_GET_INFO_NAME( m6801 )
CPU_GET_INFO( m6802 );
#define CPU_M6802 CPU_GET_INFO_NAME( m6802 )
CPU_GET_INFO( m6803 );
#define CPU_M6803 CPU_GET_INFO_NAME( m6803 )
CPU_GET_INFO( m6808 );
#define CPU_M6808 CPU_GET_INFO_NAME( m6808 )
CPU_GET_INFO( hd63701 );
#define CPU_HD63701 CPU_GET_INFO_NAME( hd63701 )
DECLARE_LEGACY_CPU_DEVICE(M6800, m6800);
DECLARE_LEGACY_CPU_DEVICE(M6801, m6801);
DECLARE_LEGACY_CPU_DEVICE(M6802, m6802);
DECLARE_LEGACY_CPU_DEVICE(M6803, m6803);
DECLARE_LEGACY_CPU_DEVICE(M6808, m6808);
DECLARE_LEGACY_CPU_DEVICE(HD63701, hd63701);
DECLARE_LEGACY_CPU_DEVICE(NSC8105, nsc8105);
/* FIMXE: these should be replaced to use m6803 ones */
#define HD63701_DDR1 M6803_DDR1
@ -75,10 +65,6 @@ READ8_HANDLER( hd63701_internal_registers_r );
WRITE8_HANDLER( hd63701_internal_registers_w );
CPU_GET_INFO( nsc8105 );
#define CPU_NSC8105 CPU_GET_INFO_NAME( nsc8105 )
CPU_DISASSEMBLE( m6800 );
CPU_DISASSEMBLE( m6801 );
CPU_DISASSEMBLE( m6802 );
@ -106,8 +92,6 @@ CPU_DISASSEMBLE( nsc8105 );
#define M6801_WAI M6800_WAI
#define M6801_IRQ_LINE M6800_IRQ_LINE
extern CPU_GET_INFO( m6801 );
/****************************************************************************
* For now make the 6802 using the m6800 variables and functions
****************************************************************************/
@ -124,8 +108,6 @@ extern CPU_GET_INFO( m6801 );
#define M6802_WAI M6800_WAI
#define M6802_IRQ_LINE M6800_IRQ_LINE
extern CPU_GET_INFO( m6802 );
/****************************************************************************
* For now make the 6803 using the m6800 variables and functions
****************************************************************************/
@ -143,8 +125,6 @@ extern CPU_GET_INFO( m6802 );
#define M6803_IRQ_LINE M6800_IRQ_LINE
#define M6803_TIN_LINE M6800_TIN_LINE
extern CPU_GET_INFO( m6803 );
/* By default, on a port write port bits which are not set as output in the DDR */
/* are set to the value returned by a read from the same port. If you need to */
/* know the DDR for e.g. port 1, do m6803_internal_registers_r(M6801_DDR1) */
@ -175,8 +155,6 @@ extern CPU_GET_INFO( m6803 );
#define M6808_WAI M6800_WAI
#define M6808_IRQ_LINE M6800_IRQ_LINE
extern CPU_GET_INFO( m6808 );
/****************************************************************************
* For now make the HD63701 using the m6800 variables and functions
****************************************************************************/
@ -195,8 +173,6 @@ extern CPU_GET_INFO( m6808 );
#define HD63701_IRQ_LINE M6800_IRQ_LINE
#define HD63701_TIN_LINE M6800_TIN_LINE
extern CPU_GET_INFO( hd63701 );
#define HD63701_DDR1 M6803_DDR1
#define HD63701_DDR2 M6803_DDR2
#define HD63701_DDR3 M6803_DDR3
@ -228,8 +204,6 @@ WRITE8_HANDLER( hd63701_internal_registers_w );
#define NSC8105_IRQ_LINE M6800_IRQ_LINE
#define NSC8105_TIN_LINE M6800_TIN_LINE
extern CPU_GET_INFO( nsc8105 );
#endif
#endif /* __M6800_H__ */

38
src/emu/cpu/m68000/m68000.h
View File

@ -73,33 +73,19 @@ typedef void (*m68k_rte_func)(running_device *device);
typedef int (*m68k_tas_func)(running_device *device);
CPU_GET_INFO( m68000 );
CPU_GET_INFO( m68008 );
CPU_GET_INFO( m68010 );
CPU_GET_INFO( m68ec020 );
CPU_GET_INFO( m68020 );
CPU_GET_INFO( m68020pmmu );
CPU_GET_INFO( m68ec030 );
CPU_GET_INFO( m68030 );
CPU_GET_INFO( m68ec040 );
CPU_GET_INFO( m68lc040 );
CPU_GET_INFO( m68040 );
DECLARE_LEGACY_CPU_DEVICE(M68000, m68000);
DECLARE_LEGACY_CPU_DEVICE(M68008, m68008);
DECLARE_LEGACY_CPU_DEVICE(M68010, m68010);
DECLARE_LEGACY_CPU_DEVICE(M68EC020, m68ec020);
DECLARE_LEGACY_CPU_DEVICE(M68020, m68020);
DECLARE_LEGACY_CPU_DEVICE(M68020PMMU, m68020pmmu);
DECLARE_LEGACY_CPU_DEVICE(M68EC030, m68ec030);
DECLARE_LEGACY_CPU_DEVICE(M68030, m68030);
DECLARE_LEGACY_CPU_DEVICE(M68EC040, m68ec040);
DECLARE_LEGACY_CPU_DEVICE(M68LC040, m68lc040);
DECLARE_LEGACY_CPU_DEVICE(M68040, m68040);
DECLARE_LEGACY_CPU_DEVICE(SCC68070, scc68070);
CPU_GET_INFO( scc68070 );
#define CPU_M68000 CPU_GET_INFO_NAME( m68000 )
#define CPU_M68008 CPU_GET_INFO_NAME( m68008 )
#define CPU_M68010 CPU_GET_INFO_NAME( m68010 )
#define CPU_M68EC020 CPU_GET_INFO_NAME( m68ec020 )
#define CPU_M68020 CPU_GET_INFO_NAME( m68020 )
#define CPU_M68020_68851 CPU_GET_INFO_NAME( m68020pmmu )
#define CPU_M68EC030 CPU_GET_INFO_NAME( m68ec030 )
#define CPU_M68030 CPU_GET_INFO_NAME( m68030 )
#define CPU_M68EC040 CPU_GET_INFO_NAME( m68ec040 )
#define CPU_M68LC040 CPU_GET_INFO_NAME( m68lc040 )
#define CPU_M68040 CPU_GET_INFO_NAME( m68040 )
#define CPU_SCC68070 CPU_GET_INFO_NAME( scc68070 )
void m68k_set_encrypted_opcode_range(running_device *device, offs_t start, offs_t end);

36
src/emu/cpu/m68000/m68kcpu.c
View File

@ -496,18 +496,17 @@ const UINT8 m68ki_ea_idx_cycle_table[64] =
INLINE m68ki_cpu_core *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M68000 ||
cpu_get_type(device) == CPU_M68008 ||
cpu_get_type(device) == CPU_M68010 ||
cpu_get_type(device) == CPU_M68EC020 ||
cpu_get_type(device) == CPU_M68020 ||
cpu_get_type(device) == CPU_M68020_68851 ||
cpu_get_type(device) == CPU_M68EC030 ||
cpu_get_type(device) == CPU_M68030 ||
cpu_get_type(device) == CPU_M68EC040 ||
cpu_get_type(device) == CPU_M68040 ||
cpu_get_type(device) == CPU_SCC68070);
assert(device->type() == M68000 ||
device->type() == M68008 ||
device->type() == M68010 ||
device->type() == M68EC020 ||
device->type() == M68020 ||
device->type() == M68020PMMU ||
device->type() == M68EC030 ||
device->type() == M68030 ||
device->type() == M68EC040 ||
device->type() == M68040 ||
device->type() == SCC68070);
return (m68ki_cpu_core *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1813,3 +1812,16 @@ CPU_GET_INFO( scc68070 )
}
}
DEFINE_LEGACY_CPU_DEVICE(M68000, m68000);
DEFINE_LEGACY_CPU_DEVICE(M68008, m68008);
DEFINE_LEGACY_CPU_DEVICE(M68010, m68010);
DEFINE_LEGACY_CPU_DEVICE(M68EC020, m68ec020);
DEFINE_LEGACY_CPU_DEVICE(M68020, m68020);
DEFINE_LEGACY_CPU_DEVICE(M68020PMMU, m68020pmmu);
DEFINE_LEGACY_CPU_DEVICE(M68EC030, m68ec030);
DEFINE_LEGACY_CPU_DEVICE(M68030, m68030);
DEFINE_LEGACY_CPU_DEVICE(M68EC040, m68ec040);
DEFINE_LEGACY_CPU_DEVICE(M68LC040, m68lc040);
DEFINE_LEGACY_CPU_DEVICE(M68040, m68040);
DEFINE_LEGACY_CPU_DEVICE(SCC68070, scc68070);

11
src/emu/cpu/m6805/m6805.c
View File

@ -70,10 +70,9 @@ typedef struct
INLINE m6805_Regs *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M6805 ||
cpu_get_type(device) == CPU_M68705 ||
cpu_get_type(device) == CPU_HD63705);
assert(device->type() == M6805 ||
device->type() == M68705 ||
device->type() == HD63705);
return (m6805_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1075,3 +1074,7 @@ CPU_GET_INFO( hd63705 )
default: CPU_GET_INFO_CALL(m6805); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(M6805, m6805);
DEFINE_LEGACY_CPU_DEVICE(M68705, m68705);
DEFINE_LEGACY_CPU_DEVICE(HD63705, hd63705);

9
src/emu/cpu/m6805/m6805.h
View File

@ -10,8 +10,7 @@ enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
#define M6805_IRQ_LINE 0
extern CPU_GET_INFO( m6805 );
#define CPU_M6805 CPU_GET_INFO_NAME( m6805 )
DECLARE_LEGACY_CPU_DEVICE(M6805, m6805);
/****************************************************************************
* 68705 section
@ -27,8 +26,7 @@ extern CPU_GET_INFO( m6805 );
#define M68705_IRQ_LINE M6805_IRQ_LINE
#define M68705_INT_TIMER 0x01
extern CPU_GET_INFO( m68705 );
#define CPU_M68705 CPU_GET_INFO_NAME( m68705 )
DECLARE_LEGACY_CPU_DEVICE(M68705, m68705);
/****************************************************************************
* HD63705 section
@ -55,8 +53,7 @@ extern CPU_GET_INFO( m68705 );
#define HD63705_INT_ADCONV 0x07
#define HD63705_INT_NMI 0x08
extern CPU_GET_INFO( hd63705 );
#define CPU_HD63705 CPU_GET_INFO_NAME( hd63705 )
DECLARE_LEGACY_CPU_DEVICE(HD63705, hd63705);
CPU_DISASSEMBLE( m6805 );

8
src/emu/cpu/m6809/m6809.c
View File

@ -114,9 +114,8 @@ struct _m68_state_t
INLINE m68_state_t *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_M6809 ||
cpu_get_type(device) == CPU_M6809E);
assert(device->type() == M6809 ||
device->type() == M6809E);
return (m68_state_t *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1203,3 +1202,6 @@ CPU_GET_INFO( m6809e )
default: CPU_GET_INFO_CALL(m6809); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(M6809, m6809);
DEFINE_LEGACY_CPU_DEVICE(M6809E, m6809e);

6
src/emu/cpu/m6809/m6809.h
View File

@ -15,12 +15,10 @@ enum
#define M6809_IRQ_LINE 0 /* IRQ line number */
#define M6809_FIRQ_LINE 1 /* FIRQ line number */
CPU_GET_INFO( m6809 );
#define CPU_M6809 CPU_GET_INFO_NAME( m6809 )
DECLARE_LEGACY_CPU_DEVICE(M6809, m6809);
DECLARE_LEGACY_CPU_DEVICE(M6809E, m6809e);
/* M6809e has LIC line to indicate opcode/data fetch */
CPU_GET_INFO( m6809e );
#define CPU_M6809E CPU_GET_INFO_NAME( m6809e )
CPU_DISASSEMBLE( m6809 );

5
src/emu/cpu/mb86233/mb86233.c
View File

@ -68,8 +68,7 @@ struct _mb86233_state
INLINE mb86233_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_MB86233);
assert(device->type() == MB86233);
return (mb86233_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1711,3 +1710,5 @@ CPU_GET_INFO( mb86233 )
case CPUINFO_STR_REGISTER + MB86233_R15: sprintf(info->s, "R15:%08X", GETGPR(15)); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(MB86233, mb86233);

3
src/emu/cpu/mb86233/mb86233.h
View File

@ -53,7 +53,6 @@ struct _mb86233_cpu_core
const char *tablergn;
};
extern CPU_GET_INFO( mb86233 );
#define CPU_MB86233 CPU_GET_INFO_NAME( mb86233 )
DECLARE_LEGACY_CPU_DEVICE(MB86233, mb86233);
#endif /* __MB86233_H__ */

17
src/emu/cpu/mb88xx/mb88xx.c
View File

@ -84,12 +84,11 @@ struct _mb88_state
INLINE mb88_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_MB88 ||
cpu_get_type(device) == CPU_MB8841 ||
cpu_get_type(device) == CPU_MB8842 ||
cpu_get_type(device) == CPU_MB8843 ||
cpu_get_type(device) == CPU_MB8844);
assert(device->type() == MB88 ||
device->type() == MB8841 ||
device->type() == MB8842 ||
device->type() == MB8843 ||
device->type() == MB8844);
return (mb88_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1100,3 +1099,9 @@ CPU_GET_INFO( mb8844 )
default: CPU_GET_INFO_CALL(mb88); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(MB88, mb88);
DEFINE_LEGACY_CPU_DEVICE(MB8841, mb8841);
DEFINE_LEGACY_CPU_DEVICE(MB8842, mb8842);
DEFINE_LEGACY_CPU_DEVICE(MB8843, mb8843);
DEFINE_LEGACY_CPU_DEVICE(MB8844, mb8844);

16
src/emu/cpu/mb88xx/mb88xx.h
View File

@ -64,17 +64,11 @@ struct _mb88_cpu_core
PUBLIC FUNCTIONS
***************************************************************************/
CPU_GET_INFO( mb88 );
CPU_GET_INFO( mb8841 );
CPU_GET_INFO( mb8842 );
CPU_GET_INFO( mb8843 );
CPU_GET_INFO( mb8844 );
#define CPU_MB88 CPU_GET_INFO_NAME( mb88 )
#define CPU_MB8841 CPU_GET_INFO_NAME( mb8841 )
#define CPU_MB8842 CPU_GET_INFO_NAME( mb8842 )
#define CPU_MB8843 CPU_GET_INFO_NAME( mb8843 )
#define CPU_MB8844 CPU_GET_INFO_NAME( mb8844 )
DECLARE_LEGACY_CPU_DEVICE(MB88, mb88);
DECLARE_LEGACY_CPU_DEVICE(MB8841, mb8841);
DECLARE_LEGACY_CPU_DEVICE(MB8842, mb8842);
DECLARE_LEGACY_CPU_DEVICE(MB8843, mb8843);
DECLARE_LEGACY_CPU_DEVICE(MB8844, mb8844);
CPU_DISASSEMBLE( mb88 );

5
src/emu/cpu/mc68hc11/mc68hc11.c
View File

@ -81,8 +81,7 @@ struct _hc11_state
INLINE hc11_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_MC68HC11);
assert(device->type() == MC68HC11);
return (hc11_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -608,3 +607,5 @@ CPU_GET_INFO( mc68hc11 )
case CPUINFO_STR_REGISTER + HC11_IY: sprintf(info->s, "IY: %04X", cpustate->iy); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(MC68HC11, mc68hc11);

3
src/emu/cpu/mc68hc11/mc68hc11.h
View File

@ -6,8 +6,7 @@
CPU_DISASSEMBLE( hc11 );
CPU_GET_INFO( mc68hc11 );
#define CPU_MC68HC11 CPU_GET_INFO_NAME( mc68hc11 )
DECLARE_LEGACY_CPU_DEVICE(MC68HC11, mc68hc11);
#define MC68HC11_IO_PORTA 0x00

60
src/emu/cpu/mcs48/mcs48.c
View File

@ -220,24 +220,23 @@ static int check_irqs(mcs48_state *cpustate);
INLINE mcs48_state *get_safe_token(running_device *device)
{
assert(device != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_I8035 ||
cpu_get_type(device) == CPU_I8048 ||
cpu_get_type(device) == CPU_I8648 ||
cpu_get_type(device) == CPU_I8748 ||
cpu_get_type(device) == CPU_I8039 ||
cpu_get_type(device) == CPU_I8049 ||
cpu_get_type(device) == CPU_I8749 ||
cpu_get_type(device) == CPU_I8040 ||
cpu_get_type(device) == CPU_I8050 ||
cpu_get_type(device) == CPU_I8041 ||
cpu_get_type(device) == CPU_I8741 ||
cpu_get_type(device) == CPU_I8042 ||
cpu_get_type(device) == CPU_I8242 ||
cpu_get_type(device) == CPU_I8742 ||
cpu_get_type(device) == CPU_MB8884 ||
cpu_get_type(device) == CPU_N7751 ||
cpu_get_type(device) == CPU_M58715);
assert(device->type() == I8035 ||
device->type() == I8048 ||
device->type() == I8648 ||
device->type() == I8748 ||
device->type() == I8039 ||
device->type() == I8049 ||
device->type() == I8749 ||
device->type() == I8040 ||
device->type() == I8050 ||
device->type() == I8041 ||
device->type() == I8741 ||
device->type() == I8042 ||
device->type() == I8242 ||
device->type() == I8742 ||
device->type() == MB8884 ||
device->type() == N7751 ||
device->type() == M58715);
return (mcs48_state *)downcast<legacy_cpu_device *>(device)->token();
}
@ -1516,3 +1515,28 @@ CPU_GET_INFO( i8742 ) { mcs48_generic_get_info(devconfig, device, state, info,
CPU_GET_INFO( mb8884 ) { mcs48_generic_get_info(devconfig, device, state, info, MCS48_FEATURE, 0, 64, "MB8884"); }
CPU_GET_INFO( n7751 ) { mcs48_generic_get_info(devconfig, device, state, info, MCS48_FEATURE, 1024, 64, "N7751"); }
CPU_GET_INFO( m58715 ) { mcs48_generic_get_info(devconfig, device, state, info, MCS48_FEATURE, 2048, 128, "M58715"); }
/* Official Intel MCS-48 parts */
DEFINE_LEGACY_CPU_DEVICE(I8021, i8021); /* 1k internal ROM, 64 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8022, i8022); /* 2k internal ROM, 128 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8035, i8035); /* external ROM, 64 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8048, i8048); /* 1k internal ROM, 64 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8648, i8648); /* 1k internal OTP ROM, 64 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8748, i8748); /* 1k internal EEPROM, 64 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8039, i8039); /* external ROM, 128 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8049, i8049); /* 2k internal ROM, 128 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8749, i8749); /* 2k internal EEPROM, 128 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8040, i8040); /* external ROM, 256 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8050, i8050); /* 4k internal ROM, 256 bytes internal RAM */
/* Official Intel UPI-41 parts */
DEFINE_LEGACY_CPU_DEVICE(I8041, i8041); /* 1k internal ROM, 128 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8741, i8741); /* 1k internal EEPROM, 128 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8042, i8042); /* 2k internal ROM, 256 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8242, i8242); /* 2k internal ROM, 256 bytes internal RAM */
DEFINE_LEGACY_CPU_DEVICE(I8742, i8742); /* 2k internal EEPROM, 256 bytes internal RAM */
/* Clones */
DEFINE_LEGACY_CPU_DEVICE(MB8884, mb8884); /* 8035 clone */
DEFINE_LEGACY_CPU_DEVICE(N7751, n7751); /* 8048 clone */
DEFINE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */

67
src/emu/cpu/mcs48/mcs48.h
View File

@ -87,27 +87,30 @@ enum
MACROS
***************************************************************************/
#define CPU_I8021 CPU_GET_INFO_NAME( i8021 )
#define CPU_I8022 CPU_GET_INFO_NAME( i8022 )
#define CPU_I8035 CPU_GET_INFO_NAME( i8035 )
#define CPU_I8048 CPU_GET_INFO_NAME( i8048 )
#define CPU_I8648 CPU_GET_INFO_NAME( i8648 )
#define CPU_I8748 CPU_GET_INFO_NAME( i8748 )
#define CPU_I8039 CPU_GET_INFO_NAME( i8039 )
#define CPU_I8049 CPU_GET_INFO_NAME( i8049 )
#define CPU_I8749 CPU_GET_INFO_NAME( i8749 )
#define CPU_I8040 CPU_GET_INFO_NAME( i8040 )
#define CPU_I8050 CPU_GET_INFO_NAME( i8050 )
/* Official Intel MCS-48 parts */
DECLARE_LEGACY_CPU_DEVICE(I8021, i8021); /* 1k internal ROM, 64 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8022, i8022); /* 2k internal ROM, 128 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8035, i8035); /* external ROM, 64 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8048, i8048); /* 1k internal ROM, 64 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8648, i8648); /* 1k internal OTP ROM, 64 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8748, i8748); /* 1k internal EEPROM, 64 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8039, i8039); /* external ROM, 128 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8049, i8049); /* 2k internal ROM, 128 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8749, i8749); /* 2k internal EEPROM, 128 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8040, i8040); /* external ROM, 256 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8050, i8050); /* 4k internal ROM, 256 bytes internal RAM */
#define CPU_I8041 CPU_GET_INFO_NAME( i8041 )
#define CPU_I8741 CPU_GET_INFO_NAME( i8741 )
#define CPU_I8042 CPU_GET_INFO_NAME( i8042 )
#define CPU_I8242 CPU_GET_INFO_NAME( i8242 )
#define CPU_I8742 CPU_GET_INFO_NAME( i8742 )
/* Official Intel UPI-41 parts */
DECLARE_LEGACY_CPU_DEVICE(I8041, i8041); /* 1k internal ROM, 128 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8741, i8741); /* 1k internal EEPROM, 128 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8042, i8042); /* 2k internal ROM, 256 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8242, i8242); /* 2k internal ROM, 256 bytes internal RAM */
DECLARE_LEGACY_CPU_DEVICE(I8742, i8742); /* 2k internal EEPROM, 256 bytes internal RAM */
#define CPU_MB8884 CPU_GET_INFO_NAME( mb8884 )
#define CPU_N7751 CPU_GET_INFO_NAME( n7751 )
#define CPU_M58715 CPU_GET_INFO_NAME( m58715 )
/* Clones */
DECLARE_LEGACY_CPU_DEVICE(MB8884, mb8884); /* 8035 clone */
DECLARE_LEGACY_CPU_DEVICE(N7751, n7751); /* 8048 clone */
DECLARE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */
@ -115,32 +118,6 @@ enum
FUNCTION PROTOTYPES
***************************************************************************/
/* Official Intel MCS-48 parts */
CPU_GET_INFO( i8021 ); /* 1k internal ROM, 64 bytes internal RAM */
CPU_GET_INFO( i8022 ); /* 2k internal ROM, 128 bytes internal RAM */
CPU_GET_INFO( i8035 ); /* external ROM, 64 bytes internal RAM */
CPU_GET_INFO( i8048 ); /* 1k internal ROM, 64 bytes internal RAM */
CPU_GET_INFO( i8648 ); /* 1k internal OTP ROM, 64 bytes internal RAM */
CPU_GET_INFO( i8748 ); /* 1k internal EEPROM, 64 bytes internal RAM */
CPU_GET_INFO( i8039 ); /* external ROM, 128 bytes internal RAM */
CPU_GET_INFO( i8049 ); /* 2k internal ROM, 128 bytes internal RAM */
CPU_GET_INFO( i8749 ); /* 2k internal EEPROM, 128 bytes internal RAM */
CPU_GET_INFO( i8040 ); /* external ROM, 256 bytes internal RAM */
CPU_GET_INFO( i8050 ); /* 4k internal ROM, 256 bytes internal RAM */
/* Official Intel UPI-41 parts */
CPU_GET_INFO( i8041 ); /* 1k internal ROM, 128 bytes internal RAM */
CPU_GET_INFO( i8741 ); /* 1k internal EEPROM, 128 bytes internal RAM */
CPU_GET_INFO( i8042 ); /* 2k internal ROM, 256 bytes internal RAM */
CPU_GET_INFO( i8242 ); /* 2k internal ROM, 256 bytes internal RAM */
CPU_GET_INFO( i8742 ); /* 2k internal EEPROM, 256 bytes internal RAM */
/* Clones */
CPU_GET_INFO( mb8884 ); /* 8035 clone */
CPU_GET_INFO( n7751 ); /* 8048 clone */
CPU_GET_INFO( m58715 ); /* 8049 clone */
/* functions for talking to the input/output buffers on the UPI41-class chips */
UINT8 upi41_master_r(running_device *device, UINT8 a0);
void upi41_master_w(running_device *device, UINT8 a0, UINT8 data);

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