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synced 2025-04-27 18:53:05 +03:00
m68kdasm: decode ptest & pflush (#4190)
* m68kdasm: decode ptest & pflush this adds some more decoding to someof the MMU instructions. The following encodings are now properly decoded: $ ./unidasm test.bin -arch m68040 00: f010 8216 ptestr #6, (A0), 0 04: f010 8209 ptestr D1, (A0), 0 08: f010 8200 ptestr %sfc, (A0), 0 0c: f010 8201 ptestr %dfc, (A0), 0 10: f010 8310 ptestr #0, (A0), 0, @A1 14: f010 8000 ptestw %sfc, (A0), 0 18: f548 ptestw (A0) 1a: f568 ptestr (A0) 1c: f500 pflushn (A0) 1e: f501 pflushn (A1) 20: f509 pflush (A1) 22: f510 pflushan 24: f518 pflusha * m68kdasm: fix whitespace for MMU instructions
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ada980907d
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@ -2422,23 +2422,6 @@ std::string m68k_disassembler::d68000_pea()
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return util::string_format("pea %s", get_ea_mode_str_32(m_cpu_ir));
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return util::string_format("pea %s", get_ea_mode_str_32(m_cpu_ir));
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}
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}
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// this is a 68040-specific form of PFLUSH
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std::string m68k_disassembler::d68040_pflush()
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{
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auto limit = limit_cpu_types(M68040_PLUS);
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if(limit.first)
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return limit.second;
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if (m_cpu_ir & 0x10)
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{
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return util::string_format("pflusha%s", (m_cpu_ir & 8) ? "" : "n");
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}
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else
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{
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return util::string_format("pflush%s(A%d)", (m_cpu_ir & 8) ? "" : "n", m_cpu_ir & 7);
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}
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}
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std::string m68k_disassembler::d68000_reset()
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std::string m68k_disassembler::d68000_reset()
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{
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{
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return util::string_format("reset");
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return util::string_format("reset");
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@ -2916,7 +2899,53 @@ std::string m68k_disassembler::d68020_unpk_mm()
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return util::string_format("unpk -(A%d), -(A%d), %s; (2+)", m_cpu_ir&7, (m_cpu_ir>>9)&7, get_imm_str_u16());
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return util::string_format("unpk -(A%d), -(A%d), %s; (2+)", m_cpu_ir&7, (m_cpu_ir>>9)&7, get_imm_str_u16());
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}
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}
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std::string m68k_disassembler::fc_to_string(uint16_t modes)
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{
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uint16_t fc = modes & 0x1f;
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if (fc == 0)
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{
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return "%sfc";
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}
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else if (fc == 1)
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{
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return "%dfc";
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}
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else if ((fc >> 3) == 1)
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{
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return util::string_format("D%d", fc & 7);
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}
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else if ((fc >> 3) == 2)
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{
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return util::string_format("#%d", fc & 7);
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}
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return util::string_format("unknown fc %x", fc);
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}
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std::string m68k_disassembler::d68040_p000()
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{
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if ((m_cpu_ir & 0xffd8) == 0xf548) // 68040 PTEST
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{
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return util::string_format("ptest%c (A%d)", (m_cpu_ir & 0x20) ? 'r' : 'w', m_cpu_ir & 7);
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}
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if ((m_cpu_ir & 0xffe0) == 0xf500) // 68040 PFLUSH
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{
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switch((m_cpu_ir >> 3) & 3)
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{
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case 0:
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return util::string_format("pflushn (A%d)", m_cpu_ir & 7);
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case 1:
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return util::string_format("pflush (A%d)", m_cpu_ir & 7);
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case 2:
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return "pflushan";
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case 3:
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return "pflusha";
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}
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}
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return util::string_format("unknown instruction: %04x", m_cpu_ir);
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}
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// PFLUSH: 001xxx0xxxxxxxxx
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// PFLUSH: 001xxx0xxxxxxxxx
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// PLOAD: 001000x0000xxxxx
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// PLOAD: 001000x0000xxxxx
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// PVALID1: 0010100000000000
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// PVALID1: 0010100000000000
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@ -2937,11 +2966,11 @@ std::string m68k_disassembler::d68851_p000()
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{
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{
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if (modes & 0x0200)
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if (modes & 0x0200)
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{
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{
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return util::string_format("pload #%d, %s", (modes>>10)&7, str);
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return util::string_format("pload #%d, %s", (modes>>10)&7, str);
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}
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}
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else
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else
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{
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{
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return util::string_format("pload %s, #%d", str, (modes>>10)&7);
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return util::string_format("pload %s, #%d", str, (modes>>10)&7);
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}
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}
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}
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}
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@ -2957,17 +2986,32 @@ std::string m68k_disassembler::d68851_p000()
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if (modes == 0x2800) // PVALID (FORMAT 1)
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if (modes == 0x2800) // PVALID (FORMAT 1)
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{
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{
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return util::string_format("pvalid VAL, %s", str);
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return util::string_format("pvalid VAL, %s", str);
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}
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}
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if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
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if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
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{
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{
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return util::string_format("pvalid A%d, %s", modes & 0xf, str);
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return util::string_format("pvalid A%d, %s", modes & 0xf, str);
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}
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}
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if ((modes & 0xe000) == 0x8000) // PTEST
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if ((modes & 0xe000) == 0x8000) // PTEST
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{
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{
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return util::string_format("ptest #%d, %s", modes & 0x1f, str);
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if (modes & 0x100) {
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return util::string_format("ptest%c %s, %s, %d, @A%d",
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(modes & 0x200) ? 'r' : 'w',
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fc_to_string(modes),
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str,
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(modes >> 10) & 7,
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(modes >> 4) & 7);
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}
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else
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{
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return util::string_format("ptest%c %s, %s, %d",
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(modes & 0x200) ? 'r' : 'w',
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fc_to_string(modes),
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str,
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(modes >> 10) & 7);
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}
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}
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}
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switch ((modes>>13) & 0x7)
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switch ((modes>>13) & 0x7)
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@ -2978,22 +3022,22 @@ std::string m68k_disassembler::d68851_p000()
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{
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{
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if (modes & 0x0200)
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if (modes & 0x0200)
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{
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{
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return util::string_format("pmovefd %s, %s", m_mmuregs[(modes>>10)&7], str);
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return util::string_format("pmovefd %s, %s", m_mmuregs[(modes>>10)&7], str);
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}
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}
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else
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else
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{
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{
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return util::string_format("pmovefd %s, %s", str, m_mmuregs[(modes>>10)&7]);
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return util::string_format("pmovefd %s, %s", str, m_mmuregs[(modes>>10)&7]);
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}
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}
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}
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}
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else
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else
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{
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{
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if (modes & 0x0200)
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if (modes & 0x0200)
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{
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{
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return util::string_format("pmove %s, %s", m_mmuregs[(modes>>10)&7], str);
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return util::string_format("pmove %s, %s", m_mmuregs[(modes>>10)&7], str);
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}
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}
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else
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else
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{
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{
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return util::string_format("pmove %s, %s", str, m_mmuregs[(modes>>10)&7]);
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return util::string_format("pmove %s, %s", str, m_mmuregs[(modes>>10)&7]);
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}
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}
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}
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}
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break;
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break;
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@ -3001,11 +3045,11 @@ std::string m68k_disassembler::d68851_p000()
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case 3: // MC68030 to/from status reg
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case 3: // MC68030 to/from status reg
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if (modes & 0x0200)
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if (modes & 0x0200)
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{
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{
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return util::string_format("pmove mmusr, %s", str);
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return util::string_format("pmove mmusr, %s", str);
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}
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}
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else
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else
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{
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{
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return util::string_format("pmove %s, mmusr", str);
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return util::string_format("pmove %s, mmusr", str);
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}
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}
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break;
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break;
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@ -3302,7 +3346,7 @@ const m68k_disassembler::opcode_struct m68k_disassembler::m_opcode_info[] =
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{&m68k_disassembler::d68020_pack_rr , 0xf1f8, 0x8140, 0x000},
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{&m68k_disassembler::d68020_pack_rr , 0xf1f8, 0x8140, 0x000},
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{&m68k_disassembler::d68020_pack_mm , 0xf1f8, 0x8148, 0x000},
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{&m68k_disassembler::d68020_pack_mm , 0xf1f8, 0x8148, 0x000},
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{&m68k_disassembler::d68000_pea , 0xffc0, 0x4840, 0x27b},
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{&m68k_disassembler::d68000_pea , 0xffc0, 0x4840, 0x27b},
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{&m68k_disassembler::d68040_pflush , 0xffe0, 0xf500, 0x000},
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{&m68k_disassembler::d68040_p000 , 0xff80, 0xf500, 0x000},
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{&m68k_disassembler::d68000_reset , 0xffff, 0x4e70, 0x000},
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{&m68k_disassembler::d68000_reset , 0xffff, 0x4e70, 0x000},
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{&m68k_disassembler::d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},
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{&m68k_disassembler::d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},
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{&m68k_disassembler::d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},
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{&m68k_disassembler::d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},
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@ -117,6 +117,8 @@ protected:
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inline std::string get_ea_mode_str_16(u16 instruction) { return get_ea_mode_str(instruction, 1); }
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inline std::string get_ea_mode_str_16(u16 instruction) { return get_ea_mode_str(instruction, 1); }
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inline std::string get_ea_mode_str_32(u16 instruction) { return get_ea_mode_str(instruction, 2); }
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inline std::string get_ea_mode_str_32(u16 instruction) { return get_ea_mode_str(instruction, 2); }
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std::string fc_to_string(uint16_t modes);
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inline std::pair<bool, std::string> limit_cpu_types(u32 allowed);
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inline std::pair<bool, std::string> limit_cpu_types(u32 allowed);
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std::string d68000_illegal();
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std::string d68000_illegal();
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@ -337,7 +339,6 @@ protected:
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std::string d68020_pack_rr();
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std::string d68020_pack_rr();
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std::string d68020_pack_mm();
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std::string d68020_pack_mm();
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std::string d68000_pea();
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std::string d68000_pea();
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std::string d68040_pflush();
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std::string d68000_reset();
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std::string d68000_reset();
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std::string d68000_ror_s_8();
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std::string d68000_ror_s_8();
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std::string d68000_ror_s_16();
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std::string d68000_ror_s_16();
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@ -420,6 +421,7 @@ protected:
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std::string d68000_unlk();
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std::string d68000_unlk();
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std::string d68020_unpk_rr();
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std::string d68020_unpk_rr();
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std::string d68020_unpk_mm();
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std::string d68020_unpk_mm();
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std::string d68040_p000();
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std::string d68851_p000();
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std::string d68851_p000();
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std::string d68851_pbcc16();
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std::string d68851_pbcc16();
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std::string d68851_pbcc32();
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std::string d68851_pbcc32();
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