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invqix: General EEPROM, FPGA, and IRQ hookups. [R. Belmont]

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No whatsnew part:
This gets it to fall into the main loop, but then apparently nothing happens.  THe only interrupts with valid vectors are IRQ0 and IRQ1; the mainline explicitly waits on IRQ1 (so it's presumably VBL) and firing IRQ0 has no obvious effect although it executes a lot of code.  Enjoy? :)
This commit is contained in:
R. Belmont 2012-08-05 01:45:48 +00:00
parent 87afbcd5f2
commit c7da9adc48
1 changed files with 136 additions and 183 deletions
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319
src/mame/drivers/invqix.c
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@ -1,236 +1,189 @@
/*************************************************************************** /***************************************************************************
Space Invaders / Qix Silver Anniversary Edition (c) 2003 Taito Corporation invqix.c
TODO: Namco/Taito Space Invaders/Qix Silver Anniversary Edition
- HD6312394TE20 == H8S/2394 (unsupported)
- "H8/3xx: Unknown opcode (PC=11146) 218"
Hardware:
HD6412394TE20 H8S/2394 ROMless microcontroller @ 20 MHz
OKI MSM9810 8-channel ADPCM audio
Xilinx Spartan FPGA
3xCY7C1021B 64kx16 (128Kbyte) SRAMs marked "FRAM0", "FRAM1", and "WORK"
93C46 EEPROM
Memory map:
000000-1fffff: program ROM
200000-20ffff: VRAM?
400000-400001: ???
600000-61ffff: work RAM?
I/O map:
port 2 bit 6: FPGA chip select
port 2 bit 7: FPGA clock in
port 3 bit 0: FPGA status (1 for ready)
port 3 bit 1: FPGA download successful (1 if OK, 0 if failed)
port 3 bit 2: EEPROM chip select
port 3 bit 3: EEPROM clock
port 3 bit 4: EEPROM data to EEPROM
port 3 bit 5: EEPROM data from EEPROM
port 6 bit 3: FPGA data bit in
port G bit 0: framebuffer bank select? toggled each frame
IRQ0 and IRQ1 are valid. Mainline explicitly waits on IRQ1, but IRQ0 does a ton of processing.
No other IRQ vectors are valid.
main loop at 117ea:
117ea: jsr WaitForIRQ1
117ee: jsr ToggleBit0OfPortG
117f2: jsr 11306
117f6: jsr 1918
117fa: bra 117ea
***************************************************************************/ ***************************************************************************/
#include "emu.h" #include "emu.h"
#include "cpu/h83002/h8.h" #include "cpu/h83002/h8.h"
//#include "sound/ay8910.h" #include "sound/okim9810.h"
#include "machine/eeprom.h"
#define MAIN_CLOCK XTAL_20MHz
class invqix_state : public driver_device class invqix_state : public driver_device
{ {
public: public:
invqix_state(const machine_config &mconfig, device_type type, const char *tag) invqix_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu") m_maincpu(*this, "maincpu"),
m_eeprom(*this, "eeprom")
{ } { }
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_READ8_MEMBER(port1_r);
DECLARE_READ8_MEMBER(port2_r);
DECLARE_WRITE8_MEMBER(port2_w);
DECLARE_READ8_MEMBER(port3_r);
DECLARE_WRITE8_MEMBER(port3_w);
DECLARE_READ8_MEMBER(port6_r);
DECLARE_WRITE8_MEMBER(port6_w);
DECLARE_READ8_MEMBER(porta_r);
protected:
// devices // devices
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<eeprom_device> m_eeprom;
// screen updates
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
UINT32 m_test_x, m_test_y,m_start_offs;
protected:
// driver_device overrides // driver_device overrides
virtual void machine_start();
virtual void machine_reset();
virtual void video_start(); virtual void video_start();
}; };
void invqix_state::video_start() void invqix_state::video_start()
{ {
} }
UINT32 invqix_state::screen_update( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect ) UINT32 invqix_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{ {
int x,y,count;
const UINT8 *blit_ram = memregion("maincpu")->base();
if(screen.machine().input().code_pressed_once(KEYCODE_Z))
m_test_x++;
if(screen.machine().input().code_pressed_once(KEYCODE_X))
m_test_x--;
if(screen.machine().input().code_pressed(KEYCODE_A))
m_test_y++;
if(screen.machine().input().code_pressed(KEYCODE_S))
m_test_y--;
if(m_test_x == 0)
m_test_x = 256;
if(m_test_y == 0)
m_test_y = 256;
if(screen.machine().input().code_pressed(KEYCODE_Q))
m_start_offs+=0x200;
if(screen.machine().input().code_pressed(KEYCODE_W))
m_start_offs-=0x200;
if(screen.machine().input().code_pressed(KEYCODE_E))
m_start_offs++;
if(screen.machine().input().code_pressed(KEYCODE_R))
m_start_offs--;
popmessage("%d %d %04x",m_test_x,m_test_y,m_start_offs);
bitmap.fill(get_black_pen(screen.machine()), cliprect);
count = (m_start_offs);
for(y=0;y<m_test_y;y++)
{
for(x=0;x<m_test_x;x++)
{
UINT8 r,g,b;
int pen_data;
pen_data = (blit_ram[count]) | (blit_ram[count+1]) << 8;
b = (pen_data & 0x001f);
g = (pen_data & 0x03e0) >> 5;
r = (pen_data & 0x7c00) >> 10;
r = (r << 3) | (r & 0x7);
g = (g << 3) | (g & 0x7);
b = (b << 3) | (b & 0x7);
if(cliprect.contains(x, y))
bitmap.pix32(y, x) = r << 16 | g << 8 | b;
count+=2;
}
}
return 0; return 0;
} }
static ADDRESS_MAP_START( invqix_map, AS_PROGRAM, 16, invqix_state ) READ8_MEMBER(invqix_state::port1_r)
AM_RANGE(0x000000, 0x1fffff) AM_ROM {
AM_RANGE(0xff0000, 0xffbfff) AM_RAM // unknown boundaries return 0xff;
}
READ8_MEMBER(invqix_state::port2_r)
{
return 1;
}
WRITE8_MEMBER(invqix_state::port2_w)
{
}
READ8_MEMBER(invqix_state::port3_r)
{
return (m_eeprom->read_bit() << 5) | 0x03;
}
WRITE8_MEMBER(invqix_state::port3_w)
{
m_eeprom->set_cs_line(((data >> 2) & 1) ^ 1);
m_eeprom->write_bit((data >> 4) & 1);
m_eeprom->set_clock_line((data >> 3) & 1);
}
READ8_MEMBER(invqix_state::port6_r)
{
return 0;
}
WRITE8_MEMBER(invqix_state::port6_w)
{
}
READ8_MEMBER(invqix_state::porta_r)
{
return 0xff;
}
static ADDRESS_MAP_START(invqix_prg_map, AS_PROGRAM, 32, invqix_state)
AM_RANGE(0x000000, 0x1fffff) AM_ROM AM_REGION("program", 0)
AM_RANGE(0x200000, 0x20ffff) AM_RAM
AM_RANGE(0x600000, 0x61ffff) AM_RAM
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( invqix_io, AS_IO, 16, invqix_state ) static ADDRESS_MAP_START(invqix_io_map, AS_IO, 8, invqix_state)
// ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(H8_PORT_1, H8_PORT_1) AM_READ(port1_r)
AM_RANGE(H8_PORT_2, H8_PORT_2) AM_READWRITE(port2_r, port2_w)
AM_RANGE(H8_PORT_3, H8_PORT_3) AM_READWRITE(port3_r, port3_w)
AM_RANGE(H8_PORT_6, H8_PORT_6) AM_READWRITE(port6_r, port6_w)
AM_RANGE(H8_PORT_A, H8_PORT_A) AM_READ(porta_r)
AM_RANGE(H8_PORT_G, H8_PORT_G) AM_NOP
ADDRESS_MAP_END ADDRESS_MAP_END
static INPUT_PORTS_START( invqix ) static INPUT_PORTS_START( invqix )
/* dummy active high structure */
PORT_START("SYSA")
PORT_DIPNAME( 0x01, 0x00, "SYSA" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
/* dummy active low structure */
PORT_START("DSWA")
PORT_DIPNAME( 0x01, 0x01, "DSWA" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END INPUT_PORTS_END
void invqix_state::machine_start()
{
}
void invqix_state::machine_reset()
{
}
static PALETTE_INIT( invqix )
{
}
static MACHINE_CONFIG_START( invqix, invqix_state ) static MACHINE_CONFIG_START( invqix, invqix_state )
MCFG_CPU_ADD("maincpu", H8S2394, XTAL_20MHz)
/* basic machine hardware */ MCFG_CPU_PROGRAM_MAP(invqix_prg_map)
MCFG_CPU_ADD("maincpu",H8S2323,MAIN_CLOCK) /* !!! H8S/2394 !!! */ MCFG_CPU_IO_MAP(invqix_io_map)
MCFG_CPU_PROGRAM_MAP(invqix_map) MCFG_CPU_VBLANK_INT("screen", irq1_line_hold)
MCFG_CPU_IO_MAP(invqix_io) MCFG_CPU_PERIODIC_INT(irq0_line_hold, 60)
MCFG_DEVICE_DISABLE()
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
MCFG_SCREEN_UPDATE_DRIVER(invqix_state, screen_update) MCFG_SCREEN_UPDATE_DRIVER(invqix_state, screen_update)
MCFG_SCREEN_SIZE(32*8, 32*8) MCFG_SCREEN_SIZE(640, 480)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
MCFG_PALETTE_INIT(invqix) MCFG_PALETTE_LENGTH(65536)
MCFG_PALETTE_LENGTH(8)
/* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SPEAKER_STANDARD_MONO("mono")
// MCFG_SOUND_ADD("aysnd", AY8910, MAIN_CLOCK/4) MCFG_OKIM9810_ADD("oki", XTAL_4_096MHz)
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30) MCFG_SOUND_ROUTE(0, "lspeaker", 0.80)
MCFG_SOUND_ROUTE(1, "rspeaker", 0.80)
MCFG_EEPROM_93C46_ADD("eeprom")
MCFG_EEPROM_DEFAULT_VALUE(0)
MACHINE_CONFIG_END MACHINE_CONFIG_END
/***************************************************************************
Game driver(s)
***************************************************************************/
ROM_START( invqix ) ROM_START( invqix )
ROM_REGION( 0x200000, "maincpu", 0 ) ROM_REGION(0x200000, "program", 0)
ROM_LOAD16_WORD_SWAP( "f34-02.ic2", 0x000000, 0x200000, CRC(035ace40) SHA1(e61f180024102c7a136b1c7f974c71e5dc698a1e) ) ROM_LOAD( "f34-02.ic2", 0x000000, 0x200000, CRC(035ace40) SHA1(e61f180024102c7a136b1c7f974c71e5dc698a1e) )
ROM_REGION( 0x200000, "oki", 0 ) ROM_REGION(0x1000000, "oki", 0)
ROM_LOAD( "f34-01.ic13", 0x000000, 0x200000, CRC(7b055722) SHA1(8152bf04a58de15aefc4244e40733275e21818e1) ) ROM_LOAD( "f34-01.ic13", 0x000000, 0x200000, CRC(7b055722) SHA1(8152bf04a58de15aefc4244e40733275e21818e1) )
ROM_REGION( 0x080, "default_eep", 0 ) ROM_REGION(0x80, "eeprom", 0)
ROM_LOAD( "93c46.ic6", 0x000000, 0x000080, CRC(564b744e) SHA1(4d9ea7dc253797c513258d07a936dfb63d8ed18c) ) ROM_LOAD16_WORD_SWAP( "93c46.ic6", 0x000000, 0x000080, CRC(564b744e) SHA1(4d9ea7dc253797c513258d07a936dfb63d8ed18c) )
ROM_END ROM_END
GAME(2003, invqix, 0, invqix, invqix, invqix_state, 0, ROT0, "Namco/Taito", "Space Invaders / Qix Silver Anniversary Edition (Ver. 2.03)", GAME_NOT_WORKING )
GAME( 2003, invqix, 0, invqix, invqix, invqix_state, 0, ROT270, "Taito Corporation", "Space Invaders / Qix Silver Anniversary Edition (Ver. 2.03)", GAME_NOT_WORKING | GAME_NO_SOUND )