diff --git a/src/mame/drivers/changela.c b/src/mame/drivers/changela.c index 183935f9a68..b620b8b5cea 100644 --- a/src/mame/drivers/changela.c +++ b/src/mame/drivers/changela.c @@ -130,27 +130,18 @@ static WRITE8_HANDLER( changela_68705_ddrC_w ) } -static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 ) +static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_GLOBAL_MASK(0x7ff) - AM_RANGE(0x0000, 0x0000) AM_READ(changela_68705_portA_r) - AM_RANGE(0x0001, 0x0001) AM_READ(changela_68705_portB_r) - AM_RANGE(0x0002, 0x0002) AM_READ(changela_68705_portC_r) + AM_RANGE(0x0000, 0x0000) AM_READWRITE(changela_68705_portA_r, changela_68705_portA_w) + AM_RANGE(0x0001, 0x0001) AM_READWRITE(changela_68705_portB_r, changela_68705_portB_w) + AM_RANGE(0x0002, 0x0002) AM_READWRITE(changela_68705_portC_r, changela_68705_portC_w) - AM_RANGE(0x0000, 0x007f) AM_READ(SMH_RAM) - AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM) -ADDRESS_MAP_END - -static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 ) - ADDRESS_MAP_GLOBAL_MASK(0x7ff) - AM_RANGE(0x0000, 0x0000) AM_WRITE(changela_68705_portA_w) - AM_RANGE(0x0001, 0x0001) AM_WRITE(changela_68705_portB_w) - AM_RANGE(0x0002, 0x0002) AM_WRITE(changela_68705_portC_w) AM_RANGE(0x0004, 0x0004) AM_WRITE(changela_68705_ddrA_w) AM_RANGE(0x0005, 0x0005) AM_WRITE(changela_68705_ddrB_w) AM_RANGE(0x0006, 0x0006) AM_WRITE(changela_68705_ddrC_w) - AM_RANGE(0x0000, 0x007f) AM_WRITE(SMH_RAM) - AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM) + AM_RANGE(0x0000, 0x007f) AM_RAM + AM_RANGE(0x0080, 0x07ff) AM_ROM ADDRESS_MAP_END @@ -250,39 +241,14 @@ static WRITE8_HANDLER( changela_coin_counter_w ) } -static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) - AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM) /* OBJ0 RAM */ - AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM) /* OBJ1 RAM */ - AM_RANGE(0xb000, 0xbfff) AM_READ(SMH_ROM) +static ADDRESS_MAP_START( changela_map, ADDRESS_SPACE_PROGRAM, 8 ) + AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0x8000, 0x83ff) AM_RAM AM_BASE(&spriteram) /* OBJ0 RAM */ + AM_RANGE(0x9000, 0x97ff) AM_RAM AM_BASE(&videoram) /* OBJ1 RAM */ + AM_RANGE(0xa000, 0xa07f) AM_WRITE(changela_colors_w) AM_BASE(&colorram) /* Color 93419 RAM 64x9(nine!!!) bits A0-used as the 8-th bit data input (d0-d7->normal, a0->d8) */ + AM_RANGE(0xb000, 0xbfff) AM_ROM - AM_RANGE(0xc000, 0xc7ff) AM_READ(changela_mem_device_r) /* RAM4 (River Bed RAM); RAM5 (Tree RAM) */ - - AM_RANGE(0xd000, 0xd000) AM_DEVREAD("ay1", ay8910_r) - AM_RANGE(0xd010, 0xd010) AM_DEVREAD("ay2", ay8910_r) - - /* LS139 - U24 */ - AM_RANGE(0xd024, 0xd024) AM_READ(changela_24_r) - AM_RANGE(0xd025, 0xd025) AM_READ(changela_25_r) - AM_RANGE(0xd028, 0xd028) AM_READ(mcu_r) - AM_RANGE(0xd02c, 0xd02c) AM_READ(changela_2c_r) - AM_RANGE(0xd02d, 0xd02d) AM_READ(changela_2d_r) - - AM_RANGE(0xd030, 0xd030) AM_READ(changela_30_r) - AM_RANGE(0xd031, 0xd031) AM_READ(changela_31_r) - - AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM) /* RAM2 (Processor RAM) */ -ADDRESS_MAP_END - - -static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM) /* Processor ROM */ - AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) /* OBJ0 RAM (A10 = GND )*/ - AM_RANGE(0x9000, 0x97ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) /* OBJ1 RAM */ - AM_RANGE(0xa000, 0xa07f) AM_WRITE(changela_colors_w) AM_BASE(&colorram) /* Color 93419 RAM 64x9(nine!!!) bits A0-used as the 8-th bit data input (d0-d7->normal, a0->d8) */ - AM_RANGE(0xb000, 0xbfff) AM_WRITE(SMH_ROM) /* Processor ROM */ - - AM_RANGE(0xc000, 0xc7ff) AM_WRITE(changela_mem_device_w) /* River-Tree RAMs, slope ROM, tree ROM */ + AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(changela_mem_device_r, changela_mem_device_w) /* RAM4 (River Bed RAM); RAM5 (Tree RAM) */ /* LS138 - U16 */ AM_RANGE(0xc800, 0xc800) AM_WRITENOP /* not connected */ @@ -290,20 +256,28 @@ static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xca00, 0xca00) AM_WRITE(changela_slope_rom_addr_hi_w) AM_RANGE(0xcb00, 0xcb00) AM_WRITE(changela_slope_rom_addr_lo_w) - AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("ay1", ay8910_address_data_w) - AM_RANGE(0xd010, 0xd011) AM_DEVWRITE("ay2", ay8910_address_data_w) + AM_RANGE(0xd000, 0xd001) AM_DEVREADWRITE("ay1", ay8910_r, ay8910_address_data_w) + AM_RANGE(0xd010, 0xd011) AM_DEVREADWRITE("ay2", ay8910_r, ay8910_address_data_w) /* LS259 - U44 */ AM_RANGE(0xd020, 0xd020) AM_WRITE(changela_collision_reset_0) AM_RANGE(0xd021, 0xd022) AM_WRITE(changela_coin_counter_w) //AM_RANGE(0xd023, 0xd023) AM_WRITENOP - AM_RANGE(0xd024, 0xd024) AM_WRITE(mcu_PC0_w) - AM_RANGE(0xd025, 0xd025) AM_WRITE(changela_collision_reset_1) - AM_RANGE(0xd026, 0xd026) AM_WRITENOP - AM_RANGE(0xd030, 0xd030) AM_WRITE(mcu_w) - AM_RANGE(0xe000, 0xe000) AM_WRITE(watchdog_reset_w) /* Watchdog */ - AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM) /* Processor RAM */ + /* LS139 - U24 */ + AM_RANGE(0xd024, 0xd024) AM_READWRITE(changela_24_r, mcu_PC0_w) + AM_RANGE(0xd025, 0xd025) AM_READWRITE(changela_25_r, changela_collision_reset_1) + AM_RANGE(0xd026, 0xd026) AM_WRITENOP + AM_RANGE(0xd028, 0xd028) AM_READ(mcu_r) + AM_RANGE(0xd02c, 0xd02c) AM_READ(changela_2c_r) + AM_RANGE(0xd02d, 0xd02d) AM_READ(changela_2d_r) + + AM_RANGE(0xd030, 0xd030) AM_READWRITE(changela_30_r, mcu_w) + AM_RANGE(0xd031, 0xd031) AM_READ(changela_31_r) + + AM_RANGE(0xe000, 0xe000) AM_WRITE(watchdog_reset_w) /* Watchdog */ + + AM_RANGE(0xf000, 0xf7ff) AM_RAM /* RAM2 (Processor RAM) */ ADDRESS_MAP_END @@ -487,11 +461,11 @@ static INTERRUPT_GEN( chl_interrupt ) static MACHINE_DRIVER_START( changela ) MDRV_CPU_ADD("maincpu", Z80,5000000) - MDRV_CPU_PROGRAM_MAP(readmem,writemem) + MDRV_CPU_PROGRAM_MAP(changela_map,0) MDRV_CPU_VBLANK_INT_HACK(chl_interrupt,4) MDRV_CPU_ADD("mcu", M68705,2500000) - MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem) + MDRV_CPU_PROGRAM_MAP(mcu_map,0) MDRV_MACHINE_RESET(changela) diff --git a/src/mame/drivers/chqflag.c b/src/mame/drivers/chqflag.c index b3902fac325..6ae34e7eee2 100644 --- a/src/mame/drivers/chqflag.c +++ b/src/mame/drivers/chqflag.c @@ -146,53 +146,30 @@ static WRITE8_HANDLER( chqflag_sh_irqtrigger_w ) /****************************************************************************/ -static ADDRESS_MAP_START( chqflag_readmem, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) /* RAM */ - AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_BANK1) /* banked RAM (RAM/051316 (chip 1)) */ - AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_BANK2) /* palette + RAM */ - AM_RANGE(0x2000, 0x2007) AM_READ(K051937_r) /* Sprite control registers */ - AM_RANGE(0x2400, 0x27ff) AM_READ(K051960_r) /* Sprite RAM */ - AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_BANK3) /* 051316 zoom/rotation (chip 2) */ - AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1") /* DIPSW #1 */ - AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1") /* COINSW, STARTSW, test mode */ - AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0") /* DIPSW #3, SW 4 */ - AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2") /* DIPSW #2 */ - AM_RANGE(0x3400, 0x341f) AM_READ(K051733_r) /* 051733 (protection) */ - AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */ - AM_RANGE(0x3702, 0x3702) AM_READ(analog_read_r) /* accelerator/wheel */ - AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK4) /* banked ROM */ - AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM) /* ROM */ -ADDRESS_MAP_END - -static ADDRESS_MAP_START( chqflag_writemem, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) /* RAM */ - AM_RANGE(0x1000, 0x17ff) AM_WRITE(SMH_BANK1) /* banked RAM (RAM/051316 (chip 1)) */ - AM_RANGE(0x1800, 0x1fff) AM_WRITE(SMH_BANK2) /* palette + RAM */ - AM_RANGE(0x2000, 0x2007) AM_WRITE(K051937_w) /* Sprite control registers */ - AM_RANGE(0x2400, 0x27ff) AM_WRITE(K051960_w) /* Sprite RAM */ - AM_RANGE(0x2800, 0x2fff) AM_WRITE(K051316_1_w) /* 051316 zoom/rotation (chip 2) */ - AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w) /* sound code # */ - AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */ - AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */ - AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w) /* enable K051316 ROM reading */ - AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w) /* watchdog timer */ - AM_RANGE(0x3400, 0x341f) AM_WRITE(K051733_w) /* 051733 (protection) */ - AM_RANGE(0x3500, 0x350f) AM_WRITE(K051316_ctrl_0_w) /* 051316 control registers (chip 1) */ - AM_RANGE(0x3600, 0x360f) AM_WRITE(K051316_ctrl_1_w) /* 051316 control registers (chip 2) */ - AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */ - AM_RANGE(0x3702, 0x3702) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel (mirror?) */ - AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) /* banked ROM */ - AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM */ -ADDRESS_MAP_END - -static ADDRESS_MAP_START( chqflag_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) /* ROM */ - AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* RAM */ - AM_RANGE(0xa000, 0xa00d) AM_DEVREAD("konami1", k007232_r) /* 007232 (chip 1) */ - AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami2", k007232_r) /* 007232 (chip 2) */ - AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r) /* YM2151 */ - AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r) /* soundlatch_r */ - //AM_RANGE(0xe000, 0xe000) AM_READNOP /* ??? */ +static ADDRESS_MAP_START( chqflag_map, ADDRESS_SPACE_PROGRAM, 8 ) + AM_RANGE(0x0000, 0x0fff) AM_RAM /* RAM */ + AM_RANGE(0x1000, 0x17ff) AM_READWRITE(SMH_BANK1, SMH_BANK1) /* banked RAM (RAM/051316 (chip 1)) */ + AM_RANGE(0x1800, 0x1fff) AM_READWRITE(SMH_BANK2, SMH_BANK2) /* palette + RAM */ + AM_RANGE(0x2000, 0x2007) AM_READWRITE(K051937_r, K051937_w) /* Sprite control registers */ + AM_RANGE(0x2400, 0x27ff) AM_READWRITE(K051960_r, K051960_w) /* Sprite RAM */ + AM_RANGE(0x2800, 0x2fff) AM_READWRITE(SMH_BANK3, K051316_1_w) /* 051316 zoom/rotation (chip 2) */ + AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w) /* sound code # */ + AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */ + AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */ + AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w) /* enable K051316 ROM reading */ + AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1") /* DIPSW #1 */ + AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1") /* COINSW, STARTSW, test mode */ + AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0") /* DIPSW #3, SW 4 */ + AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2") /* DIPSW #2 */ + AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w) /* watchdog timer */ + AM_RANGE(0x3400, 0x341f) AM_READWRITE(K051733_r, K051733_w) /* 051733 (protection) */ + AM_RANGE(0x3500, 0x350f) AM_WRITE(K051316_ctrl_0_w) /* 051316 control registers (chip 1) */ + AM_RANGE(0x3600, 0x360f) AM_WRITE(K051316_ctrl_1_w) /* 051316 control registers (chip 2) */ + AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */ + AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */ + AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w) /* accelerator/wheel */ + AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK4) /* banked ROM */ + AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM) /* ROM */ ADDRESS_MAP_END static WRITE8_HANDLER( k007232_bankswitch_w ) @@ -210,15 +187,16 @@ static WRITE8_HANDLER( k007232_bankswitch_w ) k007232_set_bank( devtag_get_device(space->machine, "konami2"), bank_A, bank_B ); } -static ADDRESS_MAP_START( chqflag_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM) /* ROM */ - AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* RAM */ - AM_RANGE(0x9000, 0x9000) AM_WRITE(k007232_bankswitch_w) /* 007232 bankswitch */ - AM_RANGE(0xa000, 0xa00d) AM_DEVWRITE("konami1", k007232_w) /* 007232 (chip 1) */ - AM_RANGE(0xa01c, 0xa01c) AM_DEVWRITE("konami2", k007232_extvolume_w)/* extra volume, goes to the 007232 w/ A11 */ - /* selecting a different latch for the external port */ - AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami2", k007232_w) /* 007232 (chip 2) */ - AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w) /* YM2151 */ +static ADDRESS_MAP_START( chqflag_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) + AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */ + AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */ + AM_RANGE(0x9000, 0x9000) AM_WRITE(k007232_bankswitch_w) /* 007232 bankswitch */ + AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE("konami1", k007232_r, k007232_w) /* 007232 (chip 1) */ + AM_RANGE(0xa01c, 0xa01c) AM_DEVWRITE("konami2", k007232_extvolume_w) /* extra volume, goes to the 007232 w/ A11 */ + AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami2", k007232_r, k007232_w) /* 007232 (chip 2) */ + AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w) /* YM2151 */ + AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r) /* soundlatch_r */ + //AM_RANGE(0xe000, 0xe000) AM_READNOP /* ??? */ AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ??? */ ADDRESS_MAP_END @@ -350,11 +328,11 @@ static MACHINE_DRIVER_START( chqflag ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu", KONAMI,XTAL_24MHz/8) /* 052001 (verified on pcb) */ - MDRV_CPU_PROGRAM_MAP(chqflag_readmem,chqflag_writemem) + MDRV_CPU_PROGRAM_MAP(chqflag_map,0) MDRV_CPU_VBLANK_INT_HACK(chqflag_interrupt,16) /* ? */ MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */ - MDRV_CPU_PROGRAM_MAP(chqflag_readmem_sound,chqflag_writemem_sound) + MDRV_CPU_PROGRAM_MAP(chqflag_sound_map,0) MDRV_QUANTUM_TIME(HZ(600)) diff --git a/src/mame/drivers/circus.c b/src/mame/drivers/circus.c index 295aab50a30..6b6c8934633 100644 --- a/src/mame/drivers/circus.c +++ b/src/mame/drivers/circus.c @@ -55,26 +55,18 @@ static READ8_HANDLER( ripcord_IN2_r ) -static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM) - AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_ROM) - AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM) - AM_RANGE(0x8000, 0x8000) AM_READ(SMH_RAM) +static ADDRESS_MAP_START( circus_map, ADDRESS_SPACE_PROGRAM, 8 ) + AM_RANGE(0x0000, 0x01ff) AM_RAM + AM_RANGE(0x1000, 0x1fff) AM_ROM + AM_RANGE(0x2000, 0x2000) AM_WRITE(circus_clown_x_w) + AM_RANGE(0x3000, 0x3000) AM_WRITE(circus_clown_y_w) + AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(circus_videoram_w) AM_BASE(&videoram) + AM_RANGE(0x8000, 0x8000) AM_RAM_WRITE(circus_clown_z_w) AM_RANGE(0xa000, 0xa000) AM_READ_PORT("INPUTS") AM_RANGE(0xc000, 0xc000) AM_READ_PORT("DSW") AM_RANGE(0xd000, 0xd000) AM_READ_PORT("PADDLE") // AM_RANGE(0xd000, 0xd000) AM_READ(ripcord_IN2_r) - AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM) -ADDRESS_MAP_END - -static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM) - AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_ROM) - AM_RANGE(0x2000, 0x2000) AM_WRITE(circus_clown_x_w) - AM_RANGE(0x3000, 0x3000) AM_WRITE(circus_clown_y_w) - AM_RANGE(0x4000, 0x43ff) AM_WRITE(circus_videoram_w) AM_BASE(&videoram) - AM_RANGE(0x8000, 0x8000) AM_WRITE(circus_clown_z_w) - AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_ROM) + AM_RANGE(0xf000, 0xffff) AM_ROM ADDRESS_MAP_END @@ -277,7 +269,7 @@ static MACHINE_DRIVER_START( circus ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */ - MDRV_CPU_PROGRAM_MAP(readmem,writemem) + MDRV_CPU_PROGRAM_MAP(circus_map,0) MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* video hardware */ @@ -312,7 +304,7 @@ static MACHINE_DRIVER_START( robotbwl ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */ - MDRV_CPU_PROGRAM_MAP(readmem,writemem) + MDRV_CPU_PROGRAM_MAP(circus_map,0) MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* video hardware */ @@ -346,7 +338,7 @@ static MACHINE_DRIVER_START( crash ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */ - MDRV_CPU_PROGRAM_MAP(readmem,writemem) + MDRV_CPU_PROGRAM_MAP(circus_map,0) MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2) /* video hardware */ @@ -380,7 +372,7 @@ static MACHINE_DRIVER_START( ripcord ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */ - MDRV_CPU_PROGRAM_MAP(readmem,writemem) + MDRV_CPU_PROGRAM_MAP(circus_map,0) //MDRV_CPU_VBLANK_INT("screen", ripcord_interrupt) //AT /* video hardware */ diff --git a/src/mame/drivers/cischeat.c b/src/mame/drivers/cischeat.c index c437c00846d..0d9fd4dbbd6 100644 --- a/src/mame/drivers/cischeat.c +++ b/src/mame/drivers/cischeat.c @@ -254,41 +254,22 @@ static WRITE16_HANDLER( bigrun_paletteram16_w ) if ( (offset >= 0x3600/2) && (offset <= 0x37ff/2) ) { palette_set_color(space->machine, 0xe00 + offset - 0x3600/2, MAKE_RGB(r,g,b) ); return;} } -static ADDRESS_MAP_START( bigrun_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x100000, 0x13ffff) AM_READ(rom_1_r ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x083fff) AM_READ(bigrun_vregs_r ) // Vregs - AM_RANGE(0x084000, 0x087fff) AM_READ(SMH_RAM ) // Linking with other units - - /* this is the right order of sharedram's */ - AM_RANGE(0x088000, 0x08bfff) AM_READ(sharedram2_r ) // Sharedram with sub CPU#2 - AM_RANGE(0x08c000, 0x08ffff) AM_READ(sharedram1_r ) // Sharedram with sub CPU#1 - - AM_RANGE(0x090000, 0x093fff) AM_READ(SMH_RAM ) // Scroll ram 0 - AM_RANGE(0x094000, 0x097fff) AM_READ(SMH_RAM ) // Scroll ram 1 - AM_RANGE(0x098000, 0x09bfff) AM_READ(SMH_RAM ) // Scroll ram 2 - - AM_RANGE(0x09c000, 0x09ffff) AM_READ(SMH_RAM ) // Palettes -ADDRESS_MAP_END - -static ADDRESS_MAP_START( bigrun_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x100000, 0x13ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram ) // RAM - AM_RANGE(0x080000, 0x083fff) AM_WRITE(bigrun_vregs_w) AM_BASE(&megasys1_vregs ) // Vregs - AM_RANGE(0x084000, 0x087fff) AM_WRITE(SMH_RAM ) // Linking with other units - - AM_RANGE(0x088000, 0x08bfff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2 ) // Sharedram with sub CPU#2 - AM_RANGE(0x08c000, 0x08ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1 ) // Sharedram with sub CPU#1 +static ADDRESS_MAP_START( bigrun_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x083fff) AM_READWRITE(bigrun_vregs_r, bigrun_vregs_w) AM_BASE(&megasys1_vregs) // Vregs + AM_RANGE(0x084000, 0x087fff) AM_WRITE(SMH_RAM) // Linking with other units + AM_RANGE(0x088000, 0x08bfff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x08c000, 0x08ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x090000, 0x093fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0] ) // Scroll ram 0 - AM_RANGE(0x094000, 0x097fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1] ) // Scroll ram 1 - AM_RANGE(0x098000, 0x09bfff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2] ) // Scroll ram 2 + AM_RANGE(0x090000, 0x093fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x094000, 0x097fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x098000, 0x09bfff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll ram 2 - AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_BASE(&paletteram16 ) // Palettes + AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_BASE(&paletteram16 ) // Palettes + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM + AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM ADDRESS_MAP_END @@ -326,12 +307,10 @@ static WRITE16_HANDLER( cischeat_paletteram16_w ) if ( (offset >= 0x5000/2) && (offset <= 0x5fff/2) ) { palette_set_color(space->machine, 0xe00 + offset - 0x5000/2, MAKE_RGB(r,g,b) ); return;} } -static ADDRESS_MAP_START( cischeat_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x087fff) AM_READ(cischeat_vregs_r ) // Vregs - AM_RANGE(0x088000, 0x088fff) AM_READ(SMH_RAM ) // Linking with other units +static ADDRESS_MAP_START( cischeat_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x087fff) AM_READWRITE(cischeat_vregs_r, cischeat_vregs_w) AM_BASE(&megasys1_vregs) // Vregs + AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units /* Only the first 0x800 bytes are tested but: CPU #0 PC 0000278c: warning - write 68c0 to unmapped memory address 0009c7fe @@ -339,33 +318,19 @@ static ADDRESS_MAP_START( cischeat_readmem, ADDRESS_SPACE_PROGRAM, 16 ) No mem access error from the other CPU's, though.. */ /* this is the right order of sharedram's */ - AM_RANGE(0x090000, 0x097fff) AM_READ(sharedram2_r ) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READ(sharedram1_r ) // Sharedram with sub CPU#1 - - AM_RANGE(0x0a0000, 0x0a7fff) AM_READ(SMH_RAM ) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_READ(SMH_RAM ) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM ) // Scroll ram 2 - - AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM ) // Palettes -ADDRESS_MAP_END - -static ADDRESS_MAP_START( cischeat_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram ) // RAM - AM_RANGE(0x080000, 0x087fff) AM_WRITE(cischeat_vregs_w) AM_BASE(&megasys1_vregs ) // Vregs - AM_RANGE(0x088000, 0x088fff) AM_WRITE(SMH_RAM ) // Linking with other units - - AM_RANGE(0x090000, 0x097fff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2 ) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1 ) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0] ) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1] ) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2] ) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll ram 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(cischeat_paletteram16_w) AM_BASE(&paletteram16 ) // Palettes + AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_BASE(&paletteram16) // Palettes + + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM + AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM ADDRESS_MAP_END @@ -402,40 +367,24 @@ static WRITE16_HANDLER( f1gpstar_paletteram16_w ) 098800-099000 0F8000-0F9000 */ -static ADDRESS_MAP_START( f1gpstar_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x087fff) AM_READ(f1gpstar_vregs_r ) // Vregs - AM_RANGE(0x088000, 0x088fff) AM_READ(SMH_RAM ) // Linking with other units +static ADDRESS_MAP_START( f1gpstar_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstar_vregs_r, f1gpstar_vregs_w) AM_BASE(&megasys1_vregs) // Vregs + AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units - AM_RANGE(0x090000, 0x097fff) AM_READ(sharedram2_r ) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READ(sharedram1_r ) // Sharedram with sub CPU#1 - - AM_RANGE(0x0a0000, 0x0a7fff) AM_READ(SMH_RAM ) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_READ(SMH_RAM ) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM ) // Scroll ram 2 - - AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM ) // Palettes -ADDRESS_MAP_END - -static ADDRESS_MAP_START( f1gpstar_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) - AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM ) - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram ) // RAM - AM_RANGE(0x080000, 0x087fff) AM_WRITE(f1gpstar_vregs_w) AM_BASE(&megasys1_vregs ) // Vregs - AM_RANGE(0x088000, 0x088fff) AM_WRITE(SMH_RAM ) // Linking with other units - - AM_RANGE(0x090000, 0x097fff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2 ) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1 ) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0] ) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1] ) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2] ) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll ram 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16 ) // Palettes + AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16) // Palettes + + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM + AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM ADDRESS_MAP_END @@ -444,40 +393,24 @@ ADDRESS_MAP_END **************************************************************************/ // Same as f1gpstar, but vregs are slightly different: -static ADDRESS_MAP_START( f1gpstr2_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x087fff) AM_READ(f1gpstr2_vregs_r ) // Vregs (slightly different from f1gpstar) - AM_RANGE(0x088000, 0x088fff) AM_READ(SMH_RAM ) // Linking with other units +static ADDRESS_MAP_START( f1gpstr2_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstr2_vregs_r, f1gpstr2_vregs_w) AM_BASE(&megasys1_vregs) // Vregs (slightly different from f1gpstar) + AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units - AM_RANGE(0x090000, 0x097fff) AM_READ(sharedram2_r ) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READ(sharedram1_r ) // Sharedram with sub CPU#1 - - AM_RANGE(0x0a0000, 0x0a7fff) AM_READ(SMH_RAM ) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_READ(SMH_RAM ) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM ) // Scroll ram 2 - - AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM ) // Palettes -ADDRESS_MAP_END - -static ADDRESS_MAP_START( f1gpstr2_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) - AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM ) - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram ) // RAM - AM_RANGE(0x080000, 0x087fff) AM_WRITE(f1gpstr2_vregs_w) AM_BASE(&megasys1_vregs ) // Vregs (slightly different from f1gpstar) - AM_RANGE(0x088000, 0x088fff) AM_WRITE(SMH_RAM ) // Linking with other units - - AM_RANGE(0x090000, 0x097fff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2 ) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1 ) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram2_r, sharedram1_w) AM_BASE(&sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0] ) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1] ) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2] ) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll ram 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16 ) // Palettes + AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16) // Palettes + + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM + AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM) // ROM ADDRESS_MAP_END @@ -584,36 +517,22 @@ static WRITE16_HANDLER( scudhamm_oki_bank_w ) } } -static ADDRESS_MAP_START( readmem_scudhamm, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // Work RAM + Spriteram - AM_RANGE(0x082000, 0x082fff) AM_READ(SMH_RAM ) // Video Registers + RAM - AM_RANGE(0x0a0000, 0x0a3fff) AM_READ(SMH_RAM ) // Scroll RAM 0 - AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(SMH_RAM ) // Scroll RAM 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM ) // Palette - AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") // Buttons - AM_RANGE(0x100014, 0x100015) AM_DEVREAD8("oki1", okim6295_r, 0x00ff ) // Sound - AM_RANGE(0x100018, 0x100019) AM_DEVREAD8("oki2", okim6295_r, 0x00ff ) // - AM_RANGE(0x100040, 0x100041) AM_READ(scudhamm_analog_r ) // A / D - AM_RANGE(0x100044, 0x100045) AM_READ(scudhamm_motor_pos_r ) // Motor Position - AM_RANGE(0x100050, 0x100051) AM_READ(scudhamm_motor_status_r ) // Motor Limit Switches - AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("IN2") // 2 x DSW -ADDRESS_MAP_END - -static ADDRESS_MAP_START( writemem_scudhamm, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE( &megasys1_ram ) // Work RAM + Spriteram - AM_RANGE(0x082000, 0x082fff) AM_WRITE(scudhamm_vregs_w) AM_BASE( &megasys1_vregs ) // Video Registers + RAM - AM_RANGE(0x0a0000, 0x0a3fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE( &megasys1_scrollram[0] ) // Scroll RAM 0 - AM_RANGE(0x0b0000, 0x0b3fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE( &megasys1_scrollram[2] ) // Scroll RAM 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(scudhamm_paletteram16_w) AM_BASE( &paletteram16 ) // Palette - AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w ) // Sound - AM_RANGE(0x100008, 0x100009) AM_WRITE(scudhamm_leds_w ) // Leds - AM_RANGE(0x100014, 0x100015) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff ) // Sound - AM_RANGE(0x100018, 0x100019) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff ) // - AM_RANGE(0x10001c, 0x10001d) AM_WRITE(scudhamm_enable_w ) // ? - AM_RANGE(0x100040, 0x100041) AM_WRITE(SMH_NOP ) // ? 0 written before reading - AM_RANGE(0x100050, 0x100051) AM_WRITE(scudhamm_motor_command_w ) // Move Motor +static ADDRESS_MAP_START( scudhamm_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE(&megasys1_vregs) // Video Registers + RAM + AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll RAM 0 + AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll RAM 2 + AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE(&paletteram16) // Palette + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // Work RAM + Spriteram + AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w) // Sound + AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(scudhamm_leds_w) // Buttons + AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) // Sound + AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) // + AM_RANGE(0x10001c, 0x10001d) AM_WRITE(scudhamm_enable_w) // ? + AM_RANGE(0x100040, 0x100041) AM_READ(scudhamm_analog_r) AM_WRITE(SMH_NOP) // A / D + AM_RANGE(0x100044, 0x100045) AM_READ(scudhamm_motor_pos_r ) // Motor Position + AM_RANGE(0x100050, 0x100051) AM_READWRITE(scudhamm_motor_status_r, scudhamm_motor_command_w) // Motor Limit Switches + AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("IN2") // 2 x DSW ADDRESS_MAP_END @@ -680,35 +599,20 @@ static WRITE16_HANDLER( armchmp2_leds_w ) } } -static ADDRESS_MAP_START( readmem_armchmp2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // Work RAM + Spriteram - AM_RANGE(0x082000, 0x082fff) AM_READ(SMH_RAM ) // Video Registers + RAM - AM_RANGE(0x0a0000, 0x0a3fff) AM_READ(SMH_RAM ) // Scroll RAM 0 - AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(SMH_RAM ) // Scroll RAM 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM ) // Palette - AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2") // DSW - AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3") // DSW - AM_RANGE(0x100008, 0x100009) AM_READ(armchmp2_buttons_r ) // Buttons + Sensors - AM_RANGE(0x10000c, 0x10000d) AM_READ(armchmp2_analog_r ) // A / D - AM_RANGE(0x100010, 0x100011) AM_READ(armchmp2_motor_status_r ) // Motor Limit Switches? - AM_RANGE(0x100014, 0x100015) AM_DEVREAD8("oki1", okim6295_r, 0x00ff ) // Sound - AM_RANGE(0x100018, 0x100019) AM_DEVREAD8("oki2", okim6295_r, 0x00ff ) // -ADDRESS_MAP_END - -static ADDRESS_MAP_START( writemem_armchmp2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE( &megasys1_ram ) // Work RAM + Spriteram - AM_RANGE(0x082000, 0x082fff) AM_WRITE(scudhamm_vregs_w) AM_BASE( &megasys1_vregs ) // Video Registers + RAM - AM_RANGE(0x0a0000, 0x0a3fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE( &megasys1_scrollram[0] ) // Scroll RAM 0 - AM_RANGE(0x0b0000, 0x0b3fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE( &megasys1_scrollram[2] ) // Scroll RAM 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(scudhamm_paletteram16_w) AM_BASE( &paletteram16 ) // Palette - AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w ) // Sound - AM_RANGE(0x100008, 0x100009) AM_WRITE(armchmp2_leds_w ) // Leds + Coin Counters - AM_RANGE(0x10000c, 0x10000d) AM_WRITE(SMH_NOP ) // ? - AM_RANGE(0x100010, 0x100011) AM_WRITE(armchmp2_motor_command_w ) // Move Motor - AM_RANGE(0x100014, 0x100015) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff ) // Sound - AM_RANGE(0x100018, 0x100019) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff ) // +static ADDRESS_MAP_START( armchmp2_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE(&megasys1_vregs) // Video Registers + RAM + AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll RAM 0 + AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll RAM 2 + AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE(&paletteram16) // Palette + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // Work RAM + Spriteram + AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2") AM_WRITE(scudhamm_oki_bank_w) // DSW + Sound + AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3") // DSW + AM_RANGE(0x100008, 0x100009) AM_READWRITE(armchmp2_buttons_r, armchmp2_leds_w) // Leds + Coin Counters + Buttons + Sensors + AM_RANGE(0x10000c, 0x10000d) AM_READ(armchmp2_analog_r) AM_WRITE(SMH_NOP) // A / D + AM_RANGE(0x100010, 0x100011) AM_READWRITE(armchmp2_motor_status_r, armchmp2_motor_command_w) // Motor Limit Switches? + AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff ) // Sound + AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff ) // ADDRESS_MAP_END @@ -724,32 +628,18 @@ ADDRESS_MAP_END Big Run **************************************************************************/ -static ADDRESS_MAP_START( bigrun_readmem2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram1_r ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM ) // Road RAM -ADDRESS_MAP_END -static ADDRESS_MAP_START( bigrun_writemem2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM ) // RAM - /* 800 bytes tested: */ - AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram1_w ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[0] ) // Road RAM +static ADDRESS_MAP_START( bigrun_map2, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram1_r, sharedram1_w) // Shared RAM (with Main CPU) + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[0]) // Road RAM + AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM ADDRESS_MAP_END - -static ADDRESS_MAP_START( bigrun_readmem3, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram2_r ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM ) // Road RAM -ADDRESS_MAP_END -static ADDRESS_MAP_START( bigrun_writemem3, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram2_w ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[1] ) // Road RAM +static ADDRESS_MAP_START( bigrun_map3, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram2_r, sharedram1_w) // Shared RAM (with Main CPU) + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[1]) // Road RAM + AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM ADDRESS_MAP_END @@ -757,36 +647,22 @@ ADDRESS_MAP_END Cisco Heat **************************************************************************/ -static ADDRESS_MAP_START( cischeat_readmem2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_2_r ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram1_r ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM ) // Road RAM -ADDRESS_MAP_END -static ADDRESS_MAP_START( cischeat_writemem2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x200000, 0x23ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram1_w ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[0] ) // Road RAM - AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP ) // watchdog +static ADDRESS_MAP_START( cischeat_map2, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram1_r, sharedram1_w) // Shared RAM (with Main CPU) + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[0]) // Road RAM + AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM + AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP) // watchdog + AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(rom_2_r, SMH_ROM) // ROM ADDRESS_MAP_END -static ADDRESS_MAP_START( cischeat_readmem3, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_3_r ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram2_r ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM ) // Road RAM -ADDRESS_MAP_END -static ADDRESS_MAP_START( cischeat_writemem3, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x200000, 0x23ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram2_w ) // Shared RAM (with Main CPU) - AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[1] ) // Road RAM - AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP ) // watchdog +static ADDRESS_MAP_START( cischeat_map3, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram2_r, sharedram2_w) // Shared RAM (with Main CPU) + AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[1]) // Road RAM + AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM + AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP) // watchdog + AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(rom_3_r, SMH_ROM) // ROM ADDRESS_MAP_END @@ -795,32 +671,20 @@ ADDRESS_MAP_END F1 GrandPrix Star **************************************************************************/ -static ADDRESS_MAP_START( f1gpstar_readmem2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x0807ff) AM_READ(sharedram1_r ) // Shared RAM (with Main CPU) - AM_RANGE(0x100000, 0x1007ff) AM_READ(SMH_RAM ) // Road RAM -ADDRESS_MAP_END -static ADDRESS_MAP_START( f1gpstar_writemem2, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x0807ff) AM_WRITE(sharedram1_w ) // Shared RAM (with Main CPU) - AM_RANGE(0x100000, 0x1007ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[0] ) // Road RAM - AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP ) // watchdog +static ADDRESS_MAP_START( f1gpstar_map2, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x0807ff) AM_READWRITE(sharedram1_r, sharedram1_w) // Shared RAM (with Main CPU) + AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE(&cischeat_roadram[0]) // Road RAM + AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM + AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP) // watchdog ADDRESS_MAP_END -static ADDRESS_MAP_START( f1gpstar_readmem3, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x0807ff) AM_READ(sharedram2_r ) // Shared RAM (with Main CPU) - AM_RANGE(0x100000, 0x1007ff) AM_READ(SMH_RAM ) // Road RAM -ADDRESS_MAP_END -static ADDRESS_MAP_START( f1gpstar_writemem3, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x0807ff) AM_WRITE(sharedram2_w ) // Shared RAM (with Main CPU) - AM_RANGE(0x100000, 0x1007ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[1] ) // Road RAM - AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP ) // watchdog +static ADDRESS_MAP_START( f1gpstar_map3, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x0807ff) AM_READWRITE(sharedram2_r, sharedram2_w) // Shared RAM (with Main CPU) + AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE(&cischeat_roadram[1]) // Road RAM + AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM + AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP) // watchdog ADDRESS_MAP_END @@ -848,23 +712,14 @@ static WRITE16_HANDLER( bigrun_soundbank_w ) } } -static ADDRESS_MAP_START( bigrun_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x040001) AM_READ(soundlatch_word_r ) // From Main CPU - AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff ) -ADDRESS_MAP_END - -static ADDRESS_MAP_START( bigrun_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x040000, 0x040001) AM_WRITE(bigrun_soundbank_w ) // Sample Banking - AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w ) // To Main CPU - AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff ) +static ADDRESS_MAP_START( bigrun_sound_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040000, 0x040001) AM_READWRITE(soundlatch_word_r, bigrun_soundbank_w) // From Main CPU + AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w) // To Main CPU + AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff) + AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM // RAM ADDRESS_MAP_END @@ -877,24 +732,16 @@ static WRITE16_DEVICE_HANDLER( cischeat_soundbank_w ) if (ACCESSING_BITS_0_7) okim6295_set_bank_base(device, 0x40000 * (data & 1) ); } -static ADDRESS_MAP_START( cischeat_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r ) // From Main CPU - AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff ) -ADDRESS_MAP_END - -static ADDRESS_MAP_START( cischeat_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x040002, 0x040003) AM_DEVWRITE("oki1", cischeat_soundbank_w ) // Sample Banking - AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki2", cischeat_soundbank_w ) // Sample Banking - AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w ) // To Main CPU - AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff ) +static ADDRESS_MAP_START( cischeat_sound_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040002, 0x040003) AM_DEVWRITE("oki1", cischeat_soundbank_w) // Sample Banking + AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki2", cischeat_soundbank_w) // Sample Banking + AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w) // To Main CPU + AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r) // From Main CPU + AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff) + AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0f0000, 0x0fffff) AM_RAM // RAM ADDRESS_MAP_END @@ -902,24 +749,15 @@ ADDRESS_MAP_END F1 GrandPrix Star **************************************************************************/ -static ADDRESS_MAP_START( f1gpstar_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0e0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM (cischeat: f0000-fffff) - AM_RANGE(0x060000, 0x060001) AM_READ(soundlatch_word_r ) // From Main CPU (cischeat: 60004) - AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff ) -ADDRESS_MAP_END - -static ADDRESS_MAP_START( f1gpstar_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0e0000, 0x0fffff) AM_WRITE(SMH_RAM ) // RAM (cischeat: f0000-fffff) - AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w ) // Sample Banking (cischeat: 40002) - AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w ) // Sample Banking (cischeat: 40004) - AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w ) // To Main CPU (cischeat: 60002) - AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff ) +static ADDRESS_MAP_START( f1gpstar_sound_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w) // Sample Banking (cischeat: 40002) + AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w) // Sample Banking (cischeat: 40004) + AM_RANGE(0x060000, 0x060001) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w) // From Main CPU (cischeat: 60004) + AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff) + AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0e0000, 0x0fffff) AM_RAM // RAM (cischeat: f0000-fffff) ADDRESS_MAP_END @@ -927,25 +765,16 @@ ADDRESS_MAP_END F1 GrandPrix Star II **************************************************************************/ -static ADDRESS_MAP_START( f1gpstr2_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x0e0000, 0x0fffff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r ) // From Main CPU (f1gpstar: 60000) - AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff ) -ADDRESS_MAP_END - -static ADDRESS_MAP_START( f1gpstr2_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x0e0000, 0x0fffff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w) // Sample Banking - AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w) // Sample Banking - AM_RANGE(0x04000e, 0x04000f) AM_WRITE(SMH_NOP ) // ? 0 (f1gpstar: no) - AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w ) // To Main CPU (f1gpstar: 60000) - AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff ) - AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff ) - AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff ) +static ADDRESS_MAP_START( f1gpstr2_sound_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM + AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w) // Sample Banking + AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w) // Sample Banking + AM_RANGE(0x04000e, 0x04000f) AM_WRITE(SMH_NOP) // ? 0 (f1gpstar: no) + AM_RANGE(0x060004, 0x060005) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w) // From Main CPU (f1gpstar: 60000) + AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff) + AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) + AM_RANGE(0x0e0000, 0x0fffff) AM_RAM // RAM ADDRESS_MAP_END /************************************************************************** @@ -959,18 +788,12 @@ ADDRESS_MAP_END static READ16_HANDLER ( f1gpstr2_io_r ) { return megasys1_vregs[offset + 0x1000/2]; } static WRITE16_HANDLER( f1gpstr2_io_w ) { COMBINE_DATA(&megasys1_vregs[offset + 0x1000/2]); } -static ADDRESS_MAP_START( f1gpstr2_io_readmem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM ) // ROM - AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x080fff) AM_READ(f1gpstr2_io_r ) // -ADDRESS_MAP_END - -static ADDRESS_MAP_START( f1gpstr2_io_writemem, ADDRESS_SPACE_PROGRAM, 16 ) - AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM ) // ROM - AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM ) // RAM - AM_RANGE(0x080000, 0x080fff) AM_WRITE(f1gpstr2_io_w ) // - AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_RAM) AM_BASE(&f1gpstr2_ioready ) // - AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP ) // +static ADDRESS_MAP_START( f1gpstr2_io_map, ADDRESS_SPACE_PROGRAM, 16 ) + AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM + AM_RANGE(0x080000, 0x080fff) AM_READWRITE(f1gpstr2_io_r, f1gpstr2_io_w) // + AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_RAM) AM_BASE(&f1gpstr2_ioready) // + AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM + AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP) // ADDRESS_MAP_END @@ -1755,19 +1578,19 @@ static MACHINE_DRIVER_START( bigrun ) /* basic machine hardware */ MDRV_CPU_ADD("cpu1", M68000, 10000000) - MDRV_CPU_PROGRAM_MAP(bigrun_readmem,bigrun_writemem) + MDRV_CPU_PROGRAM_MAP(bigrun_map,0) MDRV_CPU_VBLANK_INT_HACK(cischeat_interrupt,CISCHEAT_INTERRUPT_NUM) MDRV_CPU_ADD("cpu2", M68000, 10000000) - MDRV_CPU_PROGRAM_MAP(bigrun_readmem2,bigrun_writemem2) + MDRV_CPU_PROGRAM_MAP(bigrun_map2,0) MDRV_CPU_VBLANK_INT("screen", irq4_line_hold) MDRV_CPU_ADD("cpu3", M68000, 10000000) - MDRV_CPU_PROGRAM_MAP(bigrun_readmem3,bigrun_writemem3) + MDRV_CPU_PROGRAM_MAP(bigrun_map3,0) MDRV_CPU_VBLANK_INT("screen", irq4_line_hold) MDRV_CPU_ADD("soundcpu", M68000, 6000000) - MDRV_CPU_PROGRAM_MAP(bigrun_sound_readmem,bigrun_sound_writemem) + MDRV_CPU_PROGRAM_MAP(bigrun_sound_map,0) MDRV_CPU_VBLANK_INT_HACK(irq4_line_hold,CISCHEAT_SOUND_INTERRUPT_NUM) MDRV_QUANTUM_TIME(HZ(1200)) @@ -1810,16 +1633,16 @@ static MACHINE_DRIVER_START( cischeat ) /* basic machine hardware */ MDRV_IMPORT_FROM(bigrun) MDRV_CPU_MODIFY("cpu1") - MDRV_CPU_PROGRAM_MAP(cischeat_readmem,cischeat_writemem) + MDRV_CPU_PROGRAM_MAP(cischeat_map,0) MDRV_CPU_MODIFY("cpu2") - MDRV_CPU_PROGRAM_MAP(cischeat_readmem2,cischeat_writemem2) + MDRV_CPU_PROGRAM_MAP(cischeat_map2,0) MDRV_CPU_MODIFY("cpu3") - MDRV_CPU_PROGRAM_MAP(cischeat_readmem3,cischeat_writemem3) + MDRV_CPU_PROGRAM_MAP(cischeat_map3,0) MDRV_CPU_MODIFY("soundcpu") - MDRV_CPU_PROGRAM_MAP(cischeat_sound_readmem,cischeat_sound_writemem) + MDRV_CPU_PROGRAM_MAP(cischeat_sound_map,0) /* video hardware */ MDRV_SCREEN_MODIFY("screen") @@ -1838,16 +1661,16 @@ static MACHINE_DRIVER_START( f1gpstar ) /* basic machine hardware */ MDRV_IMPORT_FROM(bigrun) MDRV_CPU_REPLACE("cpu1", M68000, 12000000) - MDRV_CPU_PROGRAM_MAP(f1gpstar_readmem,f1gpstar_writemem) + MDRV_CPU_PROGRAM_MAP(f1gpstar_map,0) MDRV_CPU_REPLACE("cpu2", M68000, 12000000) - MDRV_CPU_PROGRAM_MAP(f1gpstar_readmem2,f1gpstar_writemem2) + MDRV_CPU_PROGRAM_MAP(f1gpstar_map2,0) MDRV_CPU_REPLACE("cpu3", M68000, 12000000) - MDRV_CPU_PROGRAM_MAP(f1gpstar_readmem3,f1gpstar_writemem3) + MDRV_CPU_PROGRAM_MAP(f1gpstar_map3,0) MDRV_CPU_MODIFY("soundcpu") - MDRV_CPU_PROGRAM_MAP(f1gpstar_sound_readmem,f1gpstar_sound_writemem) + MDRV_CPU_PROGRAM_MAP(f1gpstar_sound_map,0) /* video hardware */ MDRV_GFXDECODE(f1gpstar) @@ -1864,13 +1687,13 @@ static MACHINE_DRIVER_START( f1gpstr2 ) MDRV_IMPORT_FROM(f1gpstar) MDRV_CPU_MODIFY("cpu1") - MDRV_CPU_PROGRAM_MAP(f1gpstr2_readmem,f1gpstr2_writemem) + MDRV_CPU_PROGRAM_MAP(f1gpstr2_map,0) MDRV_CPU_MODIFY("soundcpu") - MDRV_CPU_PROGRAM_MAP(f1gpstr2_sound_readmem,f1gpstr2_sound_writemem) + MDRV_CPU_PROGRAM_MAP(f1gpstr2_sound_map,0) MDRV_CPU_ADD("cpu5", M68000, 12000000/* was 10000000 */) - MDRV_CPU_PROGRAM_MAP(f1gpstr2_io_readmem,f1gpstr2_io_writemem) + MDRV_CPU_PROGRAM_MAP(f1gpstr2_io_map,0) MDRV_CPU_VBLANK_INT("screen", irq4_line_hold) MACHINE_DRIVER_END @@ -1901,7 +1724,7 @@ static MACHINE_DRIVER_START( scudhamm ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu",M68000, 12000000) - MDRV_CPU_PROGRAM_MAP(readmem_scudhamm,writemem_scudhamm) + MDRV_CPU_PROGRAM_MAP(scudhamm_map,0) MDRV_CPU_VBLANK_INT_HACK(interrupt_scudhamm,INTERRUPT_NUM_SCUDHAMM) /* video hardware */ @@ -1953,7 +1776,7 @@ static MACHINE_DRIVER_START( armchmp2 ) /* basic machine hardware */ MDRV_IMPORT_FROM(scudhamm) MDRV_CPU_MODIFY("maincpu") - MDRV_CPU_PROGRAM_MAP(readmem_armchmp2,writemem_armchmp2) + MDRV_CPU_PROGRAM_MAP(armchmp2_map,0) MDRV_CPU_VBLANK_INT_HACK(interrupt_armchmp2,INTERRUPT_NUM_SCUDHAMM) MACHINE_DRIVER_END