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Memory map merge for twin16 driver.

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(Rockin' the AM_RAM_WRITE handler.  Awwwwh yeah.)
This commit is contained in:
Andrew Gardner 2008-04-21 15:08:36 +00:00
parent cb8514a175
commit c9211856f1
2 changed files with 85 additions and 126 deletions
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80
src/mame/drivers/turbosub.c
View File

@ -256,17 +256,17 @@ Self-tests (initiated by CPU 0)
*/
static ADDRESS_MAP_START( game_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE(1)
AM_RANGE(0x40ff, 0x40ff) AM_RAM /* W */
AM_RANGE(0x41ff, 0x41ff) AM_RAM /* W */
AM_RANGE(0x42ff, 0x4300) AM_RAM /* W */
AM_RANGE(0x4800, 0x4800) AM_READWRITE(G_STATUS_R, G_STATUS_W) /* Status port */
AM_RANGE(0x4C00, 0x4C00) AM_RAM /* R/W - An input device? (doesn't enter auto mode depending on read) */
AM_RANGE(0x5000, 0x5000) AM_RAM /* Write - related to 4C00. Bit 8 = ? bits0..3 =???? */
AM_RANGE(0x5400, 0x54ff) AM_RAM /* UART buffer? */
AM_RANGE(0x5c00, 0x5c01) AM_READWRITE(UART_R, UART_W) /* i8251A USART */
AM_RANGE(0x6000, 0xdfff) AM_READWRITE(SMH_BANK1, SMH_ROM) /* Bank switched ROMs */
AM_RANGE(0xe000, 0xffff) AM_ROM
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE(1)
AM_RANGE(0x40ff, 0x40ff) AM_RAM /* W */
AM_RANGE(0x41ff, 0x41ff) AM_RAM /* W */
AM_RANGE(0x42ff, 0x4300) AM_RAM /* W */
AM_RANGE(0x4800, 0x4800) AM_READWRITE(G_STATUS_R, G_STATUS_W) /* Status port */
AM_RANGE(0x4C00, 0x4C00) AM_RAM /* R/W - An input device? (doesn't enter auto mode depending on read) */
AM_RANGE(0x5000, 0x5000) AM_RAM /* Write - related to 4C00. Bit 8 = ? bits0..3 =???? */
AM_RANGE(0x5400, 0x54ff) AM_RAM /* UART buffer? */
AM_RANGE(0x5c00, 0x5c01) AM_READWRITE(UART_R, UART_W) /* i8251A USART */
AM_RANGE(0x6000, 0xdfff) AM_READWRITE(SMH_BANK1, SMH_ROM) /* Bank switched ROMs */
AM_RANGE(0xe000, 0xffff) AM_ROM
ADDRESS_MAP_END
/*
@ -283,10 +283,10 @@ Others: E064
*/
static ADDRESS_MAP_START( frame_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE(1) /* 16kB RAM: Shared with game CPU */
AM_RANGE(0x4000, 0x4fff) AM_READWRITE(FDT_R, FDT_W) /* 8kB RAM: Frame Drive Table (banked) */
AM_RANGE(0x6000, 0x6000) AM_READWRITE(F_STATUS_R, F_STATUS_W) /* Status port */
AM_RANGE(0x8000, 0x8000) AM_WRITE(FRAME)
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE(1) /* 16kB RAM: Shared with game CPU */
AM_RANGE(0x4000, 0x4fff) AM_READWRITE(FDT_R, FDT_W) /* 8kB RAM: Frame Drive Table (banked) */
AM_RANGE(0x6000, 0x6000) AM_READWRITE(F_STATUS_R, F_STATUS_W) /* Status port */
AM_RANGE(0x8000, 0x8000) AM_WRITE(FRAME)
AM_RANGE(0xc000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -312,19 +312,19 @@ SWI3: e13d
/* Sound CPU */
static ADDRESS_MAP_START( sound_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x2008, 0x2008) AM_RAM /* R=status line? D7 0=Ready? 1=Not ready? */
AM_RANGE(0x2009, 0x2009) AM_RAM /* W (only written once - with value read from 2008) */
AM_RANGE(0x200a, 0x200b) AM_RAM /* W 16-bit value during FIRQ */
AM_RANGE(0x200c, 0x200c) AM_RAM /* W */
AM_RANGE(0x200d, 0x200d) AM_RAM /* W - 03 */
AM_RANGE(0x200e, 0x200e) AM_RAM /* R/W - communication with game processor */
AM_RANGE(0x200f, 0x200f) AM_RAM /* R/W - communication with game processor */
AM_RANGE(0x2020, 0x2020) AM_RAM /* W - 42 */
AM_RANGE(0x2021, 0x2021) AM_RAM /* W - 42,1 and R during FIRQ? */
AM_RANGE(0x2022, 0x2023) AM_RAM /* R/W rarely */
AM_RANGE(0x2024, 0x2025) AM_RAM /* R/W rarely */
AM_RANGE(0x8000, 0x8006) AM_RAM /* R */
AM_RANGE(0x2009, 0x2009) AM_RAM /* W (only written once - with value read from 2008) */
AM_RANGE(0x200a, 0x200b) AM_RAM /* W 16-bit value during FIRQ */
AM_RANGE(0x200c, 0x200c) AM_RAM /* W */
AM_RANGE(0x200d, 0x200d) AM_RAM /* W - 03 */
AM_RANGE(0x200e, 0x200e) AM_RAM /* R/W - communication with game processor */
AM_RANGE(0x200f, 0x200f) AM_RAM /* R/W - communication with game processor */
AM_RANGE(0x2020, 0x2020) AM_RAM /* W - 42 */
AM_RANGE(0x2021, 0x2021) AM_RAM /* W - 42,1 and R during FIRQ? */
AM_RANGE(0x2022, 0x2023) AM_RAM /* R/W rarely */
AM_RANGE(0x2024, 0x2025) AM_RAM /* R/W rarely */
AM_RANGE(0x8000, 0x8006) AM_RAM /* R */
AM_RANGE(0xc000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -350,8 +350,8 @@ static MACHINE_DRIVER_START( turbosub )
MDRV_SCREEN_VISIBLE_AREA(0*8, 34*8-1, 0, 34*8-1)
MDRV_PALETTE_LENGTH(512)
MDRV_MACHINE_RESET( turbosub )
MDRV_INTERLEAVE(100)
MDRV_MACHINE_RESET( turbosub )
MDRV_INTERLEAVE(100)
MDRV_VIDEO_START(turbosub)
MDRV_VIDEO_UPDATE(turbosub)
@ -363,24 +363,24 @@ ROM_START( turbosub )
ROM_REGION( 0x48000, REGION_CPU1, 0 ) /* Bankswitched 6809 code */
ROM_LOAD( "turbosub.u82", 0x10000, 0x2000, CRC(de32eb6f) SHA1(90bf31a5adf261d47b4f52e93b5e97f343b7ebf0) )
ROM_CONTINUE( 0x20000, 0x2000 )
ROM_CONTINUE( 0x20000, 0x2000 )
ROM_LOAD( "turbosub.u81", 0x12000, 0x2000, CRC(9ae09613) SHA1(9b5ada4a21473b30be98bcc461129b6ed4e0bb11) )
ROM_CONTINUE( 0x22000, 0x2000 )
ROM_CONTINUE( 0x22000, 0x2000 )
ROM_LOAD( "turbosub.u87", 0x14000, 0x2000, CRC(ad2284f7) SHA1(8e11b8ad0a98dd1fe6ec8f7ea9e6e4f4a45d8a1b) )
ROM_CONTINUE( 0x24000, 0x2000 )
ROM_CONTINUE( 0x24000, 0x2000 )
ROM_LOAD( "turbosub.u86", 0x16000, 0x2000, CRC(4f51e6fd) SHA1(8f51ac6412aace29279ce7b02cad45ed681c2065) )
ROM_CONTINUE( 0x26000, 0x2000 )
ROM_CONTINUE( 0x26000, 0x2000 )
ROM_LOAD( "turbosub.u80", 0x30000, 0x2000, CRC(ff2e2870) SHA1(45f91d63ad91585482c9dd05290b204b007e3f44) )
ROM_CONTINUE( 0x40000, 0x2000 )
ROM_LOAD( "turbosub.u79", 0x32000, 0x2000, CRC(13680923) SHA1(14e3daa2178853cef1fd96a68305420c11fceb96) )
ROM_CONTINUE( 0x42000, 0x2000 )
ROM_CONTINUE( 0x40000, 0x2000 )
ROM_LOAD( "turbosub.u79", 0x32000, 0x2000, CRC(13680923) SHA1(14e3daa2178853cef1fd96a68305420c11fceb96) )
ROM_CONTINUE( 0x42000, 0x2000 )
ROM_LOAD( "turbosub.u84", 0x34000, 0x2000, CRC(7059842d) SHA1(c20a8accd3fc23bc4476e1d08798d7a80915d37c) )
ROM_CONTINUE( 0x44000, 0x2000 )
ROM_CONTINUE( 0x44000, 0x2000 )
ROM_LOAD( "turbosub.u83", 0x36000, 0x2000, CRC(31b86fc6) SHA1(8e56e8a75f653c3c4da2c9f31f739894beb194db) )
ROM_CONTINUE( 0x46000, 0x2000 )
ROM_CONTINUE( 0x46000, 0x2000 )
/* e000 - ffff = Upper half of U85 (lower half is blank) */
/* e000 - ffff = Upper half of U85 (lower half is blank) */
ROM_COPY( REGION_USER1, 0x18000+0x2000, 0xe000, 0x2000 )
ROM_REGION( 0x10000, REGION_CPU2, 0 )
@ -389,7 +389,7 @@ ROM_START( turbosub )
ROM_REGION( 0x10000, REGION_CPU3, 0 )
ROM_LOAD( "turbosub.u66", 0xc000, 0x4000, CRC(5091bf3d) SHA1(7ab872cef1562a45f7533c16bbbae8772673465b) )
ROM_REGION( 0xc0000, REGION_USER2, 0) /* Unknown */
ROM_REGION( 0xc0000, REGION_USER2, 0) /* Unknown */
ROM_LOAD( "turbosub.u67", 0x00000, 0x4000, CRC(f8ae82e9) SHA1(fd27b9fe7872c3c680a1f71a4a5d5eeaa12e4a19) )
ROM_LOAD( "turbosub.u68", 0x04000, 0x4000, CRC(72e3d09b) SHA1(eefdfcd0c4c32e465f18d40f46cb5bc022c22bfd) )
ROM_LOAD( "turbosub.u69", 0x00000, 0x4000, CRC(ad04193b) SHA1(2f660302e60a7e68e079a8dd13266a77c077f939) )

131
src/mame/drivers/twin16.c
View File

@ -259,112 +259,71 @@ static WRITE16_HANDLER( cuebrckj_nvram_bank_w )
/* Memory Maps */
static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
AM_RANGE(0x9000, 0x9000) AM_READ(twin16_sres_r)
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9000) AM_READWRITE(twin16_sres_r, twin16_sres_w)
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
AM_RANGE(0xb000, 0xb00d) AM_READ(K007232_read_port_0_r)
AM_RANGE(0xc001, 0xc001) AM_READ(YM2151_status_port_0_r)
AM_RANGE(0xf000, 0xf000) AM_READ(upd7759_0_busy_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x9000, 0x9000) AM_WRITE(twin16_sres_w)
AM_RANGE(0xb000, 0xb00d) AM_WRITE(K007232_write_port_0_w)
AM_RANGE(0xb000, 0xb00d) AM_READWRITE(K007232_read_port_0_r, K007232_write_port_0_w)
AM_RANGE(0xc000, 0xc000) AM_WRITE(YM2151_register_port_0_w)
AM_RANGE(0xc001, 0xc001) AM_WRITE(YM2151_data_port_0_w)
AM_RANGE(0xc001, 0xc001) AM_READWRITE(YM2151_status_port_0_r, YM2151_data_port_0_w)
AM_RANGE(0xd000, 0xd000) AM_WRITE(upd7759_0_port_w)
AM_RANGE(0xe000, 0xe000) AM_WRITE(upd7759_0_start_w)
AM_RANGE(0xf000, 0xf000) AM_WRITE(SMH_NOP) // ???
ADDRESS_MAP_END
AM_RANGE(0xf000, 0xf000) AM_READWRITE(upd7759_0_busy_r, SMH_NOP) // ??? write ???
ADDRESS_MAP_END
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
AM_RANGE(0x040000, 0x043fff) AM_READ(COMRAM_r)
AM_RANGE(0x044000, 0x04ffff) AM_READ(SMH_RAM) // miaj
AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)
AM_RANGE(0x0a0000, 0x0a001b) AM_READ(twin16_input_r)
AM_RANGE(0x0b0000, 0x0b03ff) AM_READ(cuebrckj_nvram_r)
AM_RANGE(0x0c000e, 0x0c000f) AM_READ(twin16_sprite_status_r)
AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
AM_RANGE(0x104000, 0x105fff) AM_READ(SMH_RAM) // miaj
AM_RANGE(0x120000, 0x123fff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x040000, 0x043fff) AM_WRITE(COMRAM_w)
AM_RANGE(0x044000, 0x04ffff) AM_WRITE(SMH_RAM) // miaj
AM_RANGE(0x060000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x080000, 0x080fff) AM_WRITE(twin16_paletteram_word_w) AM_BASE(&paletteram16)
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x040000, 0x043fff) AM_READWRITE(COMRAM_r, COMRAM_w)
AM_RANGE(0x044000, 0x04ffff) AM_RAM // miaj
AM_RANGE(0x060000, 0x063fff) AM_RAM
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(twin16_paletteram_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x081000, 0x081fff) AM_WRITE(SMH_NOP)
AM_RANGE(0x0a0000, 0x0a001b) AM_READ(twin16_input_r)
AM_RANGE(0x0a0000, 0x0a0001) AM_WRITE(twin16_CPUA_register_w)
AM_RANGE(0x0a0008, 0x0a0009) AM_WRITE(sound_command_w)
AM_RANGE(0x0a0010, 0x0a0011) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0x0b0000, 0x0b03ff) AM_WRITE(cuebrckj_nvram_w)
AM_RANGE(0x0b0000, 0x0b03ff) AM_READWRITE(cuebrckj_nvram_r, cuebrckj_nvram_w)
AM_RANGE(0x0b0400, 0x0b0401) AM_WRITE(cuebrckj_nvram_bank_w)
AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(twin16_video_register_w)
AM_RANGE(0x100000, 0x103fff) AM_WRITE(twin16_videoram2_w) AM_BASE(&twin16_videoram2)
AM_RANGE(0x104000, 0x105fff) AM_WRITE(SMH_RAM) // miaj
AM_RANGE(0x120000, 0x123fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram16)
AM_RANGE(0x0c000e, 0x0c000f) AM_READ(twin16_sprite_status_r)
AM_RANGE(0x100000, 0x103fff) AM_RAM_WRITE(twin16_videoram2_w) AM_BASE(&twin16_videoram2)
AM_RANGE(0x104000, 0x105fff) AM_RAM // miaj
AM_RANGE(0x120000, 0x123fff) AM_RAM AM_BASE(&videoram16)
AM_RANGE(0x140000, 0x143fff) AM_RAM AM_SHARE(1) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
ADDRESS_MAP_END
static ADDRESS_MAP_START( readmem_sub, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
AM_RANGE(0x040000, 0x043fff) AM_READ(COMRAM_r)
AM_RANGE(0x044000, 0x04ffff) AM_READ(SMH_RAM) // miaj
AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x040000, 0x043fff) AM_READWRITE(COMRAM_r, COMRAM_w)
AM_RANGE(0x044000, 0x04ffff) AM_RAM // miaj
AM_RANGE(0x060000, 0x063fff) AM_RAM
AM_RANGE(0x080000, 0x09ffff) AM_READ(extra_rom_r)
AM_RANGE(0x480000, 0x483fff) AM_READ(videoram16_r)
AM_RANGE(0x500000, 0x53ffff) AM_READ(SMH_RAM)
AM_RANGE(0x600000, 0x6fffff) AM_READ(twin16_gfx_rom1_r)
AM_RANGE(0x700000, 0x77ffff) AM_READ(twin16_gfx_rom2_r)
AM_RANGE(0x780000, 0x79ffff) AM_READ(SMH_RAM)
ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem_sub, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x040000, 0x043fff) AM_WRITE(COMRAM_w)
AM_RANGE(0x044000, 0x04ffff) AM_WRITE(SMH_RAM) // miaj
AM_RANGE(0x060000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x0a0000, 0x0a0001) AM_WRITE(twin16_CPUB_register_w)
AM_RANGE(0x400000, 0x403fff) AM_RAM AM_SHARE(1)
AM_RANGE(0x480000, 0x483fff) AM_WRITE(videoram16_w)
AM_RANGE(0x500000, 0x53ffff) AM_WRITE(SMH_RAM) AM_BASE(&twin16_tile_gfx_ram)
AM_RANGE(0x780000, 0x79ffff) AM_WRITE(SMH_RAM) AM_BASE(&twin16_sprite_gfx_ram)
AM_RANGE(0x480000, 0x483fff) AM_READWRITE(videoram16_r, videoram16_w)
AM_RANGE(0x500000, 0x53ffff) AM_RAM AM_BASE(&twin16_tile_gfx_ram)
AM_RANGE(0x600000, 0x6fffff) AM_READ(twin16_gfx_rom1_r)
AM_RANGE(0x700000, 0x77ffff) AM_READ(twin16_gfx_rom2_r)
AM_RANGE(0x780000, 0x79ffff) AM_RAM AM_BASE(&twin16_sprite_gfx_ram)
ADDRESS_MAP_END
static ADDRESS_MAP_START( fround_readmem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
AM_RANGE(0x040000, 0x043fff) AM_READ(COMRAM_r)
AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)
static ADDRESS_MAP_START( fround_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x040000, 0x043fff) AM_READWRITE(COMRAM_r, COMRAM_w)
AM_RANGE(0x060000, 0x063fff) AM_RAM
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(twin16_paletteram_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0a0000, 0x0a001b) AM_READ(twin16_input_r)
AM_RANGE(0x0c000e, 0x0c000f) AM_READ(twin16_sprite_status_r)
AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
AM_RANGE(0x120000, 0x123fff) AM_READ(SMH_RAM)
AM_RANGE(0x140000, 0x143fff) AM_READ(SMH_RAM)
AM_RANGE(0x500000, 0x6fffff) AM_READ(twin16_gfx_rom1_r)
ADDRESS_MAP_END
static ADDRESS_MAP_START( fround_writemem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
AM_RANGE(0x040000, 0x043fff) AM_WRITE(COMRAM_w)
AM_RANGE(0x060000, 0x063fff) AM_WRITE(SMH_RAM)
AM_RANGE(0x080000, 0x080fff) AM_WRITE(twin16_paletteram_word_w) AM_BASE(&paletteram16)
AM_RANGE(0x0a0000, 0x0a0001) AM_WRITE(fround_CPU_register_w)
AM_RANGE(0x0a0008, 0x0a0009) AM_WRITE(sound_command_w)
AM_RANGE(0x0a0010, 0x0a0011) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(twin16_video_register_w)
AM_RANGE(0x0c000e, 0x0c000f) AM_READ(twin16_sprite_status_r)
AM_RANGE(0x0e0000, 0x0e0001) AM_WRITE(fround_gfx_bank_w)
AM_RANGE(0x100000, 0x103fff) AM_WRITE(twin16_videoram2_w) AM_BASE(&twin16_videoram2)
AM_RANGE(0x120000, 0x123fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram16)
AM_RANGE(0x140000, 0x143fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x100000, 0x103fff) AM_RAM_WRITE(twin16_videoram2_w) AM_BASE(&twin16_videoram2)
AM_RANGE(0x120000, 0x123fff) AM_RAM AM_BASE(&videoram16)
AM_RANGE(0x140000, 0x143fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
AM_RANGE(0x500000, 0x6fffff) AM_READ(twin16_gfx_rom1_r)
ADDRESS_MAP_END
/* Input Ports */
@ -957,14 +916,14 @@ static MACHINE_DRIVER_START( twin16 )
// basic machine hardware
MDRV_CPU_ADD(Z80, 3579545)
/* audio CPU */
MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
MDRV_CPU_PROGRAM_MAP(sound_map,0)
MDRV_CPU_ADD(M68000, XTAL_18_432MHz/2)
MDRV_CPU_PROGRAM_MAP(readmem_sub,writemem_sub)
MDRV_CPU_PROGRAM_MAP(sub_map,0)
MDRV_CPU_VBLANK_INT("main", CPUB_interrupt)
MDRV_CPU_ADD(M68000, XTAL_18_432MHz/2)
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT("main", CPUA_interrupt)
MDRV_INTERLEAVE(100)
@ -1015,10 +974,10 @@ static MACHINE_DRIVER_START( fround )
/* basic machine hardware */
MDRV_CPU_ADD(Z80, 3579545)
/* audio CPU */
MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
MDRV_CPU_PROGRAM_MAP(sound_map,0)
MDRV_CPU_ADD(M68000, 10000000)
MDRV_CPU_PROGRAM_MAP(fround_readmem,fround_writemem)
MDRV_CPU_PROGRAM_MAP(fround_map,0)
MDRV_CPU_VBLANK_INT("main", CPUA_interrupt)
MDRV_INTERLEAVE(100)