mirror of
https://github.com/holub/mame
synced 2025-06-22 20:38:50 +03:00
Cleanups and version bump
This commit is contained in:
Miodrag Milanovic
parent
a4dd32afb6
commit
c93ed344fb
@ -437,7 +437,7 @@
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<software name="choplift">
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<software name="choplift">
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<!-- Choplifter (1984)(Coleco)[a].bin -->
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<!-- Choplifter (1984)(Coleco)[a].bin -->
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<!-- Other available dump has corrupted gfx -->
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<!-- Other available dump has corrupted gfx -->
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<description>Choplifter!</description>
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<description>Choplifter!</description>
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<year>1984</year>
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<year>1984</year>
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<publisher>Coleco / CBS</publisher>
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<publisher>Coleco / CBS</publisher>
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@ -699,7 +699,7 @@
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<part name="cart" interface="coleco_cart">
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<part name="cart" interface="coleco_cart">
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<dataarea name="rom" size="16384">
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<dataarea name="rom" size="16384">
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<rom name="apshai.1" size="8192" crc="aa3ec181" sha1="7f79628c298ad6e410af82eeb33871869ad23de8" offset="0x0000" />
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<rom name="apshai.1" size="8192" crc="aa3ec181" sha1="7f79628c298ad6e410af82eeb33871869ad23de8" offset="0x0000" />
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<!-- 2nd 8K chunk containes two copies of the same 4K data -->
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<!-- 2nd 8K chunk containes two copies of the same 4K data -->
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<rom name="apshai.2" size="8192" crc="0e440f8f" sha1="09ffaeb79cdd8173882b77a8398a4e00ba826de1" offset="0x2000" />
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<rom name="apshai.2" size="8192" crc="0e440f8f" sha1="09ffaeb79cdd8173882b77a8398a4e00ba826de1" offset="0x2000" />
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</dataarea>
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</dataarea>
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</part>
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</part>
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@ -2262,7 +2262,7 @@
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<dataarea name="rom" size="24576">
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<dataarea name="rom" size="24576">
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<rom name="subroc.1" size="8192" crc="ff56b769" sha1="612a0abd13c4c7790890cbcb265a7fd786c7ec5c" offset="0x0000" />
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<rom name="subroc.1" size="8192" crc="ff56b769" sha1="612a0abd13c4c7790890cbcb265a7fd786c7ec5c" offset="0x0000" />
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<rom name="subroc.2" size="8192" crc="e9e60d4c" sha1="bfc94db65985b7a906099465a47d900f7a9a9106" offset="0x2000" />
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<rom name="subroc.2" size="8192" crc="e9e60d4c" sha1="bfc94db65985b7a906099465a47d900f7a9a9106" offset="0x2000" />
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<!-- 3rd 8K chunk containes two copies of the same 4K data -->
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<!-- 3rd 8K chunk containes two copies of the same 4K data -->
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<rom name="subroc.3" size="8192" crc="abe18f08" sha1="6ebdc68397c7b20dceba12ff754f88c955d5f98a" offset="0x4000" />
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<rom name="subroc.3" size="8192" crc="abe18f08" sha1="6ebdc68397c7b20dceba12ff754f88c955d5f98a" offset="0x4000" />
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</dataarea>
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</dataarea>
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</part>
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</part>
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@ -2370,8 +2370,8 @@
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<software name="zaxxont" cloneof="zaxxon">
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<software name="zaxxont" cloneof="zaxxon">
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<!-- The Taiwan Cooper cart contains a 32K ROM, the last 8K of which was found to
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<!-- The Taiwan Cooper cart contains a 32K ROM, the last 8K of which was found to
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contain 0x4000-0x4fff from Super Action Baseball followed by 0x1000-0x1fff
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contain 0x4000-0x4fff from Super Action Baseball followed by 0x1000-0x1fff
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from Meteoric Shower! -->
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from Meteoric Shower! -->
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<description>Zaxxon (Taiwan Cooper)</description>
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<description>Zaxxon (Taiwan Cooper)</description>
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<year>198?</year>
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<year>198?</year>
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<publisher>Taiwan Cooper</publisher>
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<publisher>Taiwan Cooper</publisher>
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@ -3,7 +3,7 @@
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<softwarelist name="fmtowns" description="FM Towns CD-ROMs">
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<softwarelist name="fmtowns" description="FM Towns CD-ROMs">
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<!-- skeleton test list -->
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<!-- skeleton test list -->
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<!-- works well on fmtmarty, keyboard seems to interfere with movements on fmtowns -->
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<!-- works well on fmtmarty, keyboard seems to interfere with movements on fmtowns -->
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<software name="raiden">
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<software name="raiden">
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<description>Raiden Densetsu / Raiden Trad</description>
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<description>Raiden Densetsu / Raiden Trad</description>
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<year>1991</year>
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<year>1991</year>
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@ -7285,7 +7285,7 @@ a certain item) -->
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</software>
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</software>
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<software name="soniclab">
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<software name="soniclab">
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<!-- A final pre-release version of this same dump was found on a proto board with 4x128K sockets and no labels -->
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<!-- A final pre-release version of this same dump was found on a proto board with 4x128K sockets and no labels -->
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<description>Sonic Labyrinth (World)</description>
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<description>Sonic Labyrinth (World)</description>
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<year>1995</year>
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<year>1995</year>
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<publisher>Sega</publisher>
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<publisher>Sega</publisher>
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@ -7594,7 +7594,7 @@ a certain item) -->
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</software>
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</software>
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<software name="sonic2d" cloneof="sonic2">
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<software name="sonic2d" cloneof="sonic2">
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<!-- This predates the final release and contains some different tiles & sprites compared to the final game -->
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<!-- This predates the final release and contains some different tiles & sprites compared to the final game -->
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<description>Sonic The Hedgehog 2 (Rolling Demo)</description>
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<description>Sonic The Hedgehog 2 (Rolling Demo)</description>
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<year>1992</year>
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<year>1992</year>
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<publisher>Sega</publisher>
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<publisher>Sega</publisher>
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@ -7609,7 +7609,7 @@ a certain item) -->
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<feature name="batt" value="" />
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<feature name="batt" value="" />
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<feature name="sw" value="ON = 1M / OFF = 256" />
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<feature name="sw" value="ON = 1M / OFF = 256" />
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<dataarea name="rom" size="262144">
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<dataarea name="rom" size="262144">
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<!-- The ROM should be split in two halves -->
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<!-- The ROM should be split in two halves -->
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<rom name="sonic_2_auto_demo_prototype_(1991-12-05)_tmr_sega_cb06_ffff.bin" size="262144" crc="15ad37a5" sha1="b780c6f059b48d1bb48ee2ad521552dab1487c88" offset="000000" />
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<rom name="sonic_2_auto_demo_prototype_(1991-12-05)_tmr_sega_cb06_ffff.bin" size="262144" crc="15ad37a5" sha1="b780c6f059b48d1bb48ee2ad521552dab1487c88" offset="000000" />
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</dataarea>
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</dataarea>
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</part>
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</part>
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@ -8634,7 +8634,7 @@ a certain item) -->
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</software>
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</software>
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<software name="tailsadv">
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<software name="tailsadv">
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<!-- A final pre-release version of this same dump was found on a proto board with 4x128K sockets and no labels -->
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<!-- A final pre-release version of this same dump was found on a proto board with 4x128K sockets and no labels -->
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<description>Tails Adventures (World)</description>
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<description>Tails Adventures (World)</description>
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<year>1995</year>
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<year>1995</year>
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<publisher>Sega</publisher>
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<publisher>Sega</publisher>
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@ -100,7 +100,7 @@
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<dataarea name="D000" size="0x4000">
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<dataarea name="D000" size="0x4000">
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<rom name="world series major league baseball.d0" size="0x4000" crc="839fa5c7" sha1="1ef12665079d1ce50bd2419b668344a08c9a872f" offset="0x0000"/>
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<rom name="world series major league baseball.d0" size="0x4000" crc="839fa5c7" sha1="1ef12665079d1ce50bd2419b668344a08c9a872f" offset="0x0000"/>
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</dataarea>
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</dataarea>
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<!-- two ROM pages -->
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<!-- two ROM pages -->
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<dataarea name="F000" size="0x4000">
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<dataarea name="F000" size="0x4000">
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<rom name="world series major league baseball (page 0).f0" size="0x2000" crc="a0f2fe49" sha1="fab397b49c5a7db53a501caea42fce169da5a31a" offset="0x0000"/>
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<rom name="world series major league baseball (page 0).f0" size="0x2000" crc="a0f2fe49" sha1="fab397b49c5a7db53a501caea42fce169da5a31a" offset="0x0000"/>
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<rom name="world series major league baseball (page 1).f0" size="0x2000" crc="94d6b056" sha1="df2a8c950dd1c398db901a624c04322d2b4f2782" offset="0x2000"/>
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<rom name="world series major league baseball (page 1).f0" size="0x2000" crc="94d6b056" sha1="df2a8c950dd1c398db901a624c04322d2b4f2782" offset="0x2000"/>
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@ -14536,12 +14536,12 @@ kept for now until finding out what those bytes affect...
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<feature name="mapper" value="NOMAPPER" />
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<feature name="mapper" value="NOMAPPER" />
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<dataarea name="rom" size="131072">
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<dataarea name="rom" size="131072">
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<!--
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<!--
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20140725:
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20140725:
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There are 3 versions of this rom floating around:
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There are 3 versions of this rom floating around:
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930eae7057af1652abae794072b296a59decd61b - a "dirty" dump; it seems to be a direct memory copy made on an MSX and contains RAM contents at 3000-3FFF and 7000-7FFF
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930eae7057af1652abae794072b296a59decd61b - a "dirty" dump; it seems to be a direct memory copy made on an MSX and contains RAM contents at 3000-3FFF and 7000-7FFF
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a45692849acf29ddb653707a62747985439f6d4f - RAM areas are set to FFs
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a45692849acf29ddb653707a62747985439f6d4f - RAM areas are set to FFs
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36d47cf70618fdb460f97a8ceb75013ec4529063 - A dump made using an eeprom reader. This dump differs one bit with the dump above (offset 8a49, bit 3)
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36d47cf70618fdb460f97a8ceb75013ec4529063 - A dump made using an eeprom reader. This dump differs one bit with the dump above (offset 8a49, bit 3)
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By looking the code it is not yet possible to say which one is 100% correct, so marking it as baddump for the moment.
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By looking the code it is not yet possible to say which one is 100% correct, so marking it as baddump for the moment.
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-->
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-->
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<rom name="msx audio (japan) (fs-ca1) (program).rom" size="131072" crc="78584d2e" sha1="a45692849acf29ddb653707a62747985439f6d4f" status="baddump" offset="0" />
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<rom name="msx audio (japan) (fs-ca1) (program).rom" size="131072" crc="78584d2e" sha1="a45692849acf29ddb653707a62747985439f6d4f" status="baddump" offset="0" />
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</dataarea>
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</dataarea>
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@ -17109,8 +17109,8 @@ legacy FM implementations cannot find it.
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</part>
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</part>
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<!-- The package came with a copy of MSX-DOS -->
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<!-- The package came with a copy of MSX-DOS -->
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<!--
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<!--
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<part name="flop1" interface="floppy_3_5">
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<part name="flop1" interface="floppy_3_5">
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</part>
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</part>
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-->
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-->
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</software>
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</software>
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@ -17126,9 +17126,9 @@ legacy FM implementations cannot find it.
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</dataarea>
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</dataarea>
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</part>
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</part>
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<!--
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<!--
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The floppy drive was most likely bundled with a copy of MSX-DOS, but we are not 100% sure yet
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The floppy drive was most likely bundled with a copy of MSX-DOS, but we are not 100% sure yet
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<part name="flop1" interface="floppy_3_5">
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<part name="flop1" interface="floppy_3_5">
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</part>
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</part>
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-->
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-->
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</software>
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</software>
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@ -35601,7 +35601,7 @@
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<feature name="pcb_model" value="NR8OV2-1" />
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<feature name="pcb_model" value="NR8OV2-1" />
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<feature name="u1" value="U1 PRG" />
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<feature name="u1" value="U1 PRG" />
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<feature name="u2" value="U2 CHR" />
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<feature name="u2" value="U2 CHR" />
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<feature name="u3" value="CME-01" /> <!-- CIC clone? -->
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<feature name="u3" value="CME-01" /> <!-- CIC clone? -->
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<feature name="mirroring" value="vertical" />
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<feature name="mirroring" value="vertical" />
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<dataarea name="prg" size="262144">
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<dataarea name="prg" size="262144">
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<rom name="sup.adv.quest.u1" size="262144" crc="6a7bf037" sha1="22b430d7d4167f16751facd3515f7c8e1133a3d9" offset="00000" />
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<rom name="sup.adv.quest.u1" size="262144" crc="6a7bf037" sha1="22b430d7d4167f16751facd3515f7c8e1133a3d9" offset="00000" />
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@ -704,9 +704,9 @@ A few comments on these:
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</part>
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</part>
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</software>
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</software>
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<!-- Redump.org sets -->
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<!-- Redump.org sets -->
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<software name="raidendx" supported="yes"> <!-- Hamster re-release) -->
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<software name="raidendx" supported="yes"> <!-- Hamster re-release) -->
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<description>Raiden DX (Japan, V1.1)</description>
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<description>Raiden DX (Japan, V1.1)</description>
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<year>199?</year>
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<year>199?</year>
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<publisher>Seibu / Hamster</publisher>
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<publisher>Seibu / Hamster</publisher>
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@ -718,7 +718,7 @@ A few comments on these:
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</part>
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</part>
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</software>
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</software>
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<software name="raidendxo" cloneof="raidendx" supported="yes"> <!-- original release) -->
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<software name="raidendxo" cloneof="raidendx" supported="yes"> <!-- original release) -->
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<description>Raiden DX (Japan, V1.0)</description>
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<description>Raiden DX (Japan, V1.0)</description>
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<year>199?</year>
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<year>199?</year>
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<publisher>Seibu</publisher>
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<publisher>Seibu</publisher>
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@ -742,7 +742,7 @@ A few comments on these:
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</part>
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</part>
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</software>
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</software>
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<!-- this image doesn't boot, some kind of copy protection? could be bad -->
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<!-- this image doesn't boot, some kind of copy protection? could be bad -->
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<software name="raidenprj" cloneof="raidenpr" supported="no">
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<software name="raidenprj" cloneof="raidenpr" supported="no">
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<description>Raiden Project (Japan)</description>
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<description>Raiden Project (Japan)</description>
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<year>1995</year>
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<year>1995</year>
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@ -235,7 +235,7 @@
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</part>
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</part>
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</software>
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</software>
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<!-- TODO: add support for RAM in this cart (0xa000-0xffff) -->
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<!-- TODO: add support for RAM in this cart (0xa000-0xffff) -->
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<software name="rwp32" supported="no">
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<software name="rwp32" supported="no">
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<description>rWP32</description>
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<description>rWP32</description>
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<year>19??</year>
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<year>19??</year>
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@ -5,7 +5,7 @@
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Implemention of the Corvus Systems CORVUS01 floppy controller
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Implemention of the Corvus Systems CORVUS01 floppy controller
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Boot PROM 0.8 fixes this at: 8", 500 blocks total, 128 bytes/block,
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Boot PROM 0.8 fixes this at: 8", 500 blocks total, 128 bytes/block,
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26 sectors/track, 77 tracks.
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26 sectors/track, 77 tracks.
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*********************************************************************/
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*********************************************************************/
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@ -21,8 +21,8 @@
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const device_type A2BUS_CORVFDC01 = &device_creator<a2bus_corvfdc01_device>;
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const device_type A2BUS_CORVFDC01 = &device_creator<a2bus_corvfdc01_device>;
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#define FDC01_ROM_REGION "fdc01_rom"
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#define FDC01_ROM_REGION "fdc01_rom"
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#define FDC01_FDC_TAG "fdc01_fdc"
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#define FDC01_FDC_TAG "fdc01_fdc"
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FLOPPY_FORMATS_MEMBER( a2bus_corvfdc01_device::corv_floppy_formats )
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FLOPPY_FORMATS_MEMBER( a2bus_corvfdc01_device::corv_floppy_formats )
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FLOPPY_IMD_FORMAT
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FLOPPY_IMD_FORMAT
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@ -161,7 +161,7 @@ UINT8 a2bus_corvfdc01_device::read_c0nx(address_space &space, UINT8 offset)
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{
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{
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switch (offset)
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switch (offset)
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{
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{
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case 0: // local status
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case 0: // local status
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if (m_curfloppy)
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if (m_curfloppy)
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{
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{
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m_fdc_local_status &= ~LS_DSKCHG_mask;
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m_fdc_local_status &= ~LS_DSKCHG_mask;
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@ -169,7 +169,7 @@ UINT8 a2bus_corvfdc01_device::read_c0nx(address_space &space, UINT8 offset)
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}
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}
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return m_fdc_local_status | LS_8IN_mask;
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return m_fdc_local_status | LS_8IN_mask;
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case 8: // WD1793 at 8-11
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case 8: // WD1793 at 8-11
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return m_wdfdc->status_r(space, offset);
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return m_wdfdc->status_r(space, offset);
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case 9:
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case 9:
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@ -278,4 +278,3 @@ WRITE_LINE_MEMBER(a2bus_corvfdc01_device::drq_w)
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else
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else
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m_fdc_local_status &= ~LS_DRQ_mask;
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m_fdc_local_status &= ~LS_DRQ_mask;
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}
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}
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@ -23,8 +23,8 @@
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const device_type A2BUS_CORVFDC02 = &device_creator<a2bus_corvfdc02_device>;
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const device_type A2BUS_CORVFDC02 = &device_creator<a2bus_corvfdc02_device>;
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#define FDC02_ROM_REGION "fdc02_rom"
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#define FDC02_ROM_REGION "fdc02_rom"
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#define FDC02_FDC_TAG "fdc02_fdc"
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#define FDC02_FDC_TAG "fdc02_fdc"
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FLOPPY_FORMATS_MEMBER( a2bus_corvfdc02_device::corv_floppy_formats )
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FLOPPY_FORMATS_MEMBER( a2bus_corvfdc02_device::corv_floppy_formats )
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FLOPPY_CONCEPT_525DSDD_FORMAT,
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FLOPPY_CONCEPT_525DSDD_FORMAT,
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@ -86,7 +86,6 @@ a2bus_corvfdc02_device::a2bus_corvfdc02_device(const machine_config &mconfig, de
|
|||||||
m_con3(*this, FDC02_FDC_TAG":2"),
|
m_con3(*this, FDC02_FDC_TAG":2"),
|
||||||
m_con4(*this, FDC02_FDC_TAG":3")
|
m_con4(*this, FDC02_FDC_TAG":3")
|
||||||
{
|
{
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
a2bus_corvfdc02_device::a2bus_corvfdc02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
a2bus_corvfdc02_device::a2bus_corvfdc02_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
||||||
@ -143,20 +142,20 @@ UINT8 a2bus_corvfdc02_device::read_c0nx(address_space &space, UINT8 offset)
|
|||||||
{
|
{
|
||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
case 0: // 765 FIFO
|
case 0: // 765 FIFO
|
||||||
return m_fdc->fifo_r(space, 0);
|
return m_fdc->fifo_r(space, 0);
|
||||||
|
|
||||||
case 1: // 765 MSR
|
case 1: // 765 MSR
|
||||||
return m_fdc->msr_r(space, 0);
|
return m_fdc->msr_r(space, 0);
|
||||||
|
|
||||||
case 2: // buffer address
|
case 2: // buffer address
|
||||||
return (m_bufptr>>1) & 0xff;
|
return (m_bufptr>>1) & 0xff;
|
||||||
|
|
||||||
case 3:
|
case 3:
|
||||||
// printf("Read buffer @ %x = %02x\n", m_bufptr, m_buffer[m_bufptr]);
|
// printf("Read buffer @ %x = %02x\n", m_bufptr, m_buffer[m_bufptr]);
|
||||||
return m_buffer[m_bufptr--];
|
return m_buffer[m_bufptr--];
|
||||||
|
|
||||||
case 4: // local status
|
case 4: // local status
|
||||||
if (m_curfloppy)
|
if (m_curfloppy)
|
||||||
{
|
{
|
||||||
m_fdc_local_status &= ~(1 | 0x40);
|
m_fdc_local_status &= ~(1 | 0x40);
|
||||||
@ -188,13 +187,13 @@ void a2bus_corvfdc02_device::write_c0nx(address_space &space, UINT8 offset, UINT
|
|||||||
case 1: // FDC ???
|
case 1: // FDC ???
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 2: // buffer address
|
case 2: // buffer address
|
||||||
m_bufptr = (data << 1) | (data & 1);
|
m_bufptr = (data << 1) | (data & 1);
|
||||||
// printf("%02x to buffer address yields %x\n", data, m_bufptr);
|
// printf("%02x to buffer address yields %x\n", data, m_bufptr);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 3: // buffer write
|
case 3: // buffer write
|
||||||
// printf("%02x to buffer[%x]\n", data, m_bufptr);
|
// printf("%02x to buffer[%x]\n", data, m_bufptr);
|
||||||
m_buffer[m_bufptr--] = data;
|
m_buffer[m_bufptr--] = data;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -233,12 +232,12 @@ void a2bus_corvfdc02_device::write_c0nx(address_space &space, UINT8 offset, UINT
|
|||||||
{
|
{
|
||||||
// motor control (active low)
|
// motor control (active low)
|
||||||
m_curfloppy->mon_w((data & 8) ? 1 : 0);
|
m_curfloppy->mon_w((data & 8) ? 1 : 0);
|
||||||
// printf("Cur drive %p motor %s\n", m_curfloppy, (data & 8) ? "OFF" : "ON");
|
// printf("Cur drive %p motor %s\n", m_curfloppy, (data & 8) ? "OFF" : "ON");
|
||||||
}
|
}
|
||||||
|
|
||||||
if (data & 0x80)
|
if (data & 0x80)
|
||||||
{
|
{
|
||||||
// printf("Reset NEC765\n");
|
// printf("Reset NEC765\n");
|
||||||
m_fdc->reset();
|
m_fdc->reset();
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -266,7 +265,7 @@ WRITE_LINE_MEMBER(a2bus_corvfdc02_device::intrq_w)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
m_fdc_local_status |= 2; // clear IRQ
|
m_fdc_local_status |= 2; // clear IRQ
|
||||||
lower_slot_irq();
|
lower_slot_irq();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -279,7 +278,7 @@ WRITE_LINE_MEMBER(a2bus_corvfdc02_device::drq_w)
|
|||||||
if (m_fdc_local_command & 0x40)
|
if (m_fdc_local_command & 0x40)
|
||||||
{
|
{
|
||||||
m_buffer[m_bufptr] = m_fdc->dma_r();
|
m_buffer[m_bufptr] = m_fdc->dma_r();
|
||||||
// printf("DMA %02x to buffer[%x]\n", m_buffer[m_bufptr], m_bufptr);
|
// printf("DMA %02x to buffer[%x]\n", m_buffer[m_bufptr], m_bufptr);
|
||||||
|
|
||||||
if (!m_bufptr)
|
if (!m_bufptr)
|
||||||
{
|
{
|
||||||
@ -296,4 +295,3 @@ WRITE_LINE_MEMBER(a2bus_corvfdc02_device::drq_w)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -56,7 +56,7 @@ private:
|
|||||||
UINT8 *m_rom;
|
UINT8 *m_rom;
|
||||||
UINT8 m_fdc_local_status, m_fdc_local_command;
|
UINT8 m_fdc_local_status, m_fdc_local_command;
|
||||||
UINT16 m_bufptr;
|
UINT16 m_bufptr;
|
||||||
UINT8 m_buffer[2048]; // 1x6116 SRAM
|
UINT8 m_buffer[2048]; // 1x6116 SRAM
|
||||||
floppy_image_device *m_curfloppy;
|
floppy_image_device *m_curfloppy;
|
||||||
bool m_in_drq;
|
bool m_in_drq;
|
||||||
emu_timer *m_timer;
|
emu_timer *m_timer;
|
||||||
|
|||||||
@ -124,12 +124,12 @@ void a2bus_laser128_device::write_c800(address_space &space, UINT16 offset, UINT
|
|||||||
// UDCREG
|
// UDCREG
|
||||||
if ((m_slot == 7) && (offset == 0x7f8))
|
if ((m_slot == 7) && (offset == 0x7f8))
|
||||||
{
|
{
|
||||||
// printf("%02x to UDCREG\n", data);
|
// printf("%02x to UDCREG\n", data);
|
||||||
|
|
||||||
m_slot7_ram_bank = (data & 0x8) ? 0x400 : 0;
|
m_slot7_ram_bank = (data & 0x8) ? 0x400 : 0;
|
||||||
m_slot7_bank = (((data >> 4) & 0x7) * 0x400);
|
m_slot7_bank = (((data >> 4) & 0x7) * 0x400);
|
||||||
|
|
||||||
// printf("\tRAM bank %x, ROM bank %x\n", m_slot7_ram_bank, m_slot7_bank);
|
// printf("\tRAM bank %x, ROM bank %x\n", m_slot7_ram_bank, m_slot7_bank);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -5,16 +5,16 @@
|
|||||||
Implemention of the Apple II Mouse Card
|
Implemention of the Apple II Mouse Card
|
||||||
|
|
||||||
Apple II Mouse Interface PCB
|
Apple II Mouse Interface PCB
|
||||||
Apple 1983
|
Apple 1983
|
||||||
|
|
||||||
This is a mouse interface for the Apple II
|
This is a mouse interface for the Apple II
|
||||||
|
|
||||||
PCB Layout
|
PCB Layout
|
||||||
----------
|
----------
|
||||||
apple computer
|
apple computer
|
||||||
MOUSE INTERFACE
|
MOUSE INTERFACE
|
||||||
670-0030-C (C) 1983
|
670-0030-C (C) 1983
|
||||||
Printed on back side - MOUSE INTERFACE 820-0104-B (C) 1983 APPLE COMPUTER
|
Printed on back side - MOUSE INTERFACE 820-0104-B (C) 1983 APPLE COMPUTER
|
||||||
|-----------------------------------|
|
|-----------------------------------|
|
||||||
| PAL16R4 6821 |
|
| PAL16R4 6821 |
|
||||||
| |
|
| |
|
||||||
@ -25,39 +25,39 @@
|
|||||||
|-------------------| |-|
|
|-------------------| |-|
|
||||||
|-------------|
|
|-------------|
|
||||||
|
|
||||||
Notes:
|
Notes:
|
||||||
J1 - 9 pin flat cable with female DB9 connector
|
J1 - 9 pin flat cable with female DB9 connector
|
||||||
68705P3 - Motorola MC68705P3 microcontroller (DIP28) labelled '341-0269 (C) APPLE'
|
68705P3 - Motorola MC68705P3 microcontroller (DIP28) labelled '341-0269 (C) APPLE'
|
||||||
PCB printed '(C) APPLE 1983 341-0269 or 342-0285'
|
PCB printed '(C) APPLE 1983 341-0269 or 342-0285'
|
||||||
8516 - Fujitsu MB8516 2k x8-bit EPROM (DIP24) labelled '341-0270-C (C) APPLE 1983'
|
8516 - Fujitsu MB8516 2k x8-bit EPROM (DIP24) labelled '341-0270-C (C) APPLE 1983'
|
||||||
PCB printed '(C) APPLE 1983 342-0270'
|
PCB printed '(C) APPLE 1983 342-0270'
|
||||||
PAL16R4 - MMI PAL16R4ACN (DIP20) marked '341-0268-A'
|
PAL16R4 - MMI PAL16R4ACN (DIP20) marked '341-0268-A'
|
||||||
PCB printed '(C) APPLE 1983 342-0268'
|
PCB printed '(C) APPLE 1983 342-0268'
|
||||||
6821 - AMI 6821 Peripheral Interface Adapter (DIP40)
|
6821 - AMI 6821 Peripheral Interface Adapter (DIP40)
|
||||||
X1/X2 - Jumper pads. X1 is open, X2 is closed.
|
X1/X2 - Jumper pads. X1 is open, X2 is closed.
|
||||||
|
|
||||||
|
|
||||||
Hookup notes:
|
Hookup notes:
|
||||||
PIA port A connects to 68705 port A in its entirety (bi-directional)
|
PIA port A connects to 68705 port A in its entirety (bi-directional)
|
||||||
PIA PB4-PB7 connects to 68705 PC0-3 (bi-directional)
|
PIA PB4-PB7 connects to 68705 PC0-3 (bi-directional)
|
||||||
PIA PB0 is 'sync latch'
|
PIA PB0 is 'sync latch'
|
||||||
PIA PB1 is A8 on the EPROM
|
PIA PB1 is A8 on the EPROM
|
||||||
PIA PB2 is A9 on the EPROM
|
PIA PB2 is A9 on the EPROM
|
||||||
PIA PB3 is A10 on the EPROM
|
PIA PB3 is A10 on the EPROM
|
||||||
|
|
||||||
68705 PB0 is mouse X1
|
68705 PB0 is mouse X1
|
||||||
68705 PB1 is mouse X0
|
68705 PB1 is mouse X0
|
||||||
68705 PB2 is mouse Y0
|
68705 PB2 is mouse Y0
|
||||||
68705 PB3 is mouse Y1
|
68705 PB3 is mouse Y1
|
||||||
68705 PB4 and 5 are N/C
|
68705 PB4 and 5 are N/C
|
||||||
68705 PB6 is IRQ for the slot
|
68705 PB6 is IRQ for the slot
|
||||||
68705 PB7 is the mouse button
|
68705 PB7 is the mouse button
|
||||||
|
|
||||||
68705 is clocked at 2M
|
68705 is clocked at 2M
|
||||||
PIA is clocked at 1M
|
PIA is clocked at 1M
|
||||||
|
|
||||||
See the schematic at:
|
See the schematic at:
|
||||||
http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Digitizers/Apple%20Mouse%20Interface%20Card/Schematics/
|
http://mirrors.apple2.org.za/Apple%20II%20Documentation%20Project/Interface%20Cards/Digitizers/Apple%20Mouse%20Interface%20Card/Schematics/
|
||||||
|
|
||||||
*********************************************************************/
|
*********************************************************************/
|
||||||
|
|
||||||
@ -73,17 +73,17 @@
|
|||||||
|
|
||||||
const device_type A2BUS_MOUSE = &device_creator<a2bus_mouse_device>;
|
const device_type A2BUS_MOUSE = &device_creator<a2bus_mouse_device>;
|
||||||
|
|
||||||
#define MOUSE_ROM_REGION "a2mse_rom"
|
#define MOUSE_ROM_REGION "a2mse_rom"
|
||||||
#define MOUSE_PIA_TAG "a2mse_pia"
|
#define MOUSE_PIA_TAG "a2mse_pia"
|
||||||
#define MOUSE_MCU_TAG "a2mse_mcu"
|
#define MOUSE_MCU_TAG "a2mse_mcu"
|
||||||
#define MOUSE_MCU_ROM "a2mse_mcurom"
|
#define MOUSE_MCU_ROM "a2mse_mcurom"
|
||||||
|
|
||||||
#define MOUSE_BUTTON_TAG "a2mse_button"
|
#define MOUSE_BUTTON_TAG "a2mse_button"
|
||||||
#define MOUSE_XAXIS_TAG "a2mse_x"
|
#define MOUSE_XAXIS_TAG "a2mse_x"
|
||||||
#define MOUSE_YAXIS_TAG "a2mse_y"
|
#define MOUSE_YAXIS_TAG "a2mse_y"
|
||||||
|
|
||||||
#define TIMER_68705 0
|
#define TIMER_68705 0
|
||||||
#define TIMER_QUADRATURE 1
|
#define TIMER_QUADRATURE 1
|
||||||
|
|
||||||
static ADDRESS_MAP_START( mcu_mem, AS_PROGRAM, 8, a2bus_mouse_device )
|
static ADDRESS_MAP_START( mcu_mem, AS_PROGRAM, 8, a2bus_mouse_device )
|
||||||
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
|
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
|
||||||
@ -241,7 +241,7 @@ void a2bus_mouse_device::device_reset()
|
|||||||
m_rom_bank = 0;
|
m_rom_bank = 0;
|
||||||
last_mx = last_my = count_x = count_y = 0;
|
last_mx = last_my = count_x = count_y = 0;
|
||||||
m_timer_cnt = 0xff;
|
m_timer_cnt = 0xff;
|
||||||
m_timer_ctl = 0x40; // disable interrupt, everything else clear
|
m_timer_ctl = 0x40; // disable interrupt, everything else clear
|
||||||
m_port_a_in = 0;
|
m_port_a_in = 0;
|
||||||
m_port_b_in = 0x80;
|
m_port_b_in = 0x80;
|
||||||
m_port_c_in = 0;
|
m_port_c_in = 0;
|
||||||
@ -394,10 +394,10 @@ WRITE8_MEMBER(a2bus_mouse_device::mcu_timer_w)
|
|||||||
m_timer_cnt = data;
|
m_timer_cnt = data;
|
||||||
recalc = true;
|
recalc = true;
|
||||||
}
|
}
|
||||||
// offset 1 = timer control: b7 = IRQ, b6 = IRQ mask (1=suppress),
|
// offset 1 = timer control: b7 = IRQ, b6 = IRQ mask (1=suppress),
|
||||||
// b5 = input select (0=CPU clk, 1=ext),
|
// b5 = input select (0=CPU clk, 1=ext),
|
||||||
// b4 = enable external timer input,
|
// b4 = enable external timer input,
|
||||||
// b3 = clear, b2-b0 = scaler (1/2/4/8/16/32/64/128)
|
// b3 = clear, b2-b0 = scaler (1/2/4/8/16/32/64/128)
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// clearing the interrupt?
|
// clearing the interrupt?
|
||||||
@ -450,10 +450,10 @@ WRITE8_MEMBER(a2bus_mouse_device::mcu_timer_w)
|
|||||||
*/
|
*/
|
||||||
void a2bus_mouse_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
void a2bus_mouse_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||||
{
|
{
|
||||||
if (id == TIMER_68705) // 68705's built-in timer
|
if (id == TIMER_68705) // 68705's built-in timer
|
||||||
{
|
{
|
||||||
m_timer_ctl |= 0x80; // indicate timer expired
|
m_timer_ctl |= 0x80; // indicate timer expired
|
||||||
if (!(m_timer_ctl & 0x40)) // if interrupt not suppressed, fire!
|
if (!(m_timer_ctl & 0x40)) // if interrupt not suppressed, fire!
|
||||||
{
|
{
|
||||||
m_mcu->set_input_line(M68705_INT_TIMER, ASSERT_LINE);
|
m_mcu->set_input_line(M68705_INT_TIMER, ASSERT_LINE);
|
||||||
}
|
}
|
||||||
@ -509,9 +509,9 @@ void a2bus_mouse_device::device_timer(emu_timer &timer, device_timer_id id, int
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
count_x--;
|
count_x--;
|
||||||
m_port_b_in |= 0x01; // X1
|
m_port_b_in |= 0x01; // X1
|
||||||
}
|
}
|
||||||
m_port_b_in |= 0x02; // X0
|
m_port_b_in |= 0x02; // X0
|
||||||
}
|
}
|
||||||
else if (count_y)
|
else if (count_y)
|
||||||
{
|
{
|
||||||
@ -522,9 +522,9 @@ void a2bus_mouse_device::device_timer(emu_timer &timer, device_timer_id id, int
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
count_y--;
|
count_y--;
|
||||||
m_port_b_in |= 0x04; // Y0
|
m_port_b_in |= 0x04; // Y0
|
||||||
}
|
}
|
||||||
m_port_b_in |= 0x08; // Y1
|
m_port_b_in |= 0x08; // Y1
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -45,9 +45,9 @@
|
|||||||
|
|
||||||
const device_type A2BUS_TIMEMASTERHO = &device_creator<a2bus_timemasterho_device>;
|
const device_type A2BUS_TIMEMASTERHO = &device_creator<a2bus_timemasterho_device>;
|
||||||
|
|
||||||
#define TIMEMASTER_ROM_REGION "timemst_rom"
|
#define TIMEMASTER_ROM_REGION "timemst_rom"
|
||||||
#define TIMEMASTER_PIA_TAG "timemst_pia"
|
#define TIMEMASTER_PIA_TAG "timemst_pia"
|
||||||
#define TIMEMASTER_M5832_TAG "timemst_msm"
|
#define TIMEMASTER_M5832_TAG "timemst_msm"
|
||||||
|
|
||||||
MACHINE_CONFIG_FRAGMENT( timemaster )
|
MACHINE_CONFIG_FRAGMENT( timemaster )
|
||||||
MCFG_DEVICE_ADD(TIMEMASTER_PIA_TAG, PIA6821, 1021800)
|
MCFG_DEVICE_ADD(TIMEMASTER_PIA_TAG, PIA6821, 1021800)
|
||||||
@ -67,20 +67,20 @@ ROM_END
|
|||||||
static INPUT_PORTS_START( tmho )
|
static INPUT_PORTS_START( tmho )
|
||||||
PORT_START("DSW1")
|
PORT_START("DSW1")
|
||||||
PORT_DIPNAME( 0x01, 0x01, "Set")
|
PORT_DIPNAME( 0x01, 0x01, "Set")
|
||||||
PORT_DIPSETTING( 0x00, "Apple can't set clock")
|
PORT_DIPSETTING( 0x00, "Apple can't set clock")
|
||||||
PORT_DIPSETTING( 0x01, "Apple can set clock")
|
PORT_DIPSETTING( 0x01, "Apple can set clock")
|
||||||
|
|
||||||
PORT_DIPNAME( 0x02, 0x00, "Mode")
|
PORT_DIPNAME( 0x02, 0x00, "Mode")
|
||||||
PORT_DIPSETTING( 0x00, "TimeMaster")
|
PORT_DIPSETTING( 0x00, "TimeMaster")
|
||||||
PORT_DIPSETTING( 0x02, "Mountain AppleClock")
|
PORT_DIPSETTING( 0x02, "Mountain AppleClock")
|
||||||
|
|
||||||
PORT_DIPNAME( 0x04, 0x00, "NMI")
|
PORT_DIPNAME( 0x04, 0x00, "NMI")
|
||||||
PORT_DIPSETTING( 0x00, DEF_STR(Off))
|
PORT_DIPSETTING( 0x00, DEF_STR(Off))
|
||||||
PORT_DIPSETTING( 0x04, DEF_STR(On))
|
PORT_DIPSETTING( 0x04, DEF_STR(On))
|
||||||
|
|
||||||
PORT_DIPNAME( 0x08, 0x08, "IRQ")
|
PORT_DIPNAME( 0x08, 0x08, "IRQ")
|
||||||
PORT_DIPSETTING( 0x00, DEF_STR(Off))
|
PORT_DIPSETTING( 0x00, DEF_STR(Off))
|
||||||
PORT_DIPSETTING( 0x08, DEF_STR(On))
|
PORT_DIPSETTING( 0x08, DEF_STR(On))
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
@ -154,7 +154,7 @@ void a2bus_timemasterho_device::device_start()
|
|||||||
|
|
||||||
void a2bus_timemasterho_device::device_reset()
|
void a2bus_timemasterho_device::device_reset()
|
||||||
{
|
{
|
||||||
m_msm5832->cs_w(ASSERT_LINE); // CS is tied to Vcc
|
m_msm5832->cs_w(ASSERT_LINE); // CS is tied to Vcc
|
||||||
m_started = true;
|
m_started = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -194,7 +194,7 @@ UINT8 a2bus_timemasterho_device::read_cnxx(address_space &space, UINT8 offset)
|
|||||||
{
|
{
|
||||||
if (m_started)
|
if (m_started)
|
||||||
{
|
{
|
||||||
if (!(m_dsw1->read() & 2)) // TimeMaster native
|
if (!(m_dsw1->read() & 2)) // TimeMaster native
|
||||||
{
|
{
|
||||||
return m_rom[offset+0xc00];
|
return m_rom[offset+0xc00];
|
||||||
}
|
}
|
||||||
@ -277,4 +277,3 @@ WRITE_LINE_MEMBER(a2bus_timemasterho_device::pia_irqb_w)
|
|||||||
m_irqb = state;
|
m_irqb = state;
|
||||||
update_irqs();
|
update_irqs();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -20,8 +20,8 @@ static SLOT_INTERFACE_START(a7800_cart)
|
|||||||
SLOT_INTERFACE_INTERNAL("a78_abs", A78_ROM_ABSOLUTE)
|
SLOT_INTERFACE_INTERNAL("a78_abs", A78_ROM_ABSOLUTE)
|
||||||
SLOT_INTERFACE_INTERNAL("a78_act", A78_ROM_ACTIVISION)
|
SLOT_INTERFACE_INTERNAL("a78_act", A78_ROM_ACTIVISION)
|
||||||
SLOT_INTERFACE_INTERNAL("a78_hsc", A78_HISCORE)
|
SLOT_INTERFACE_INTERNAL("a78_hsc", A78_HISCORE)
|
||||||
SLOT_INTERFACE_INTERNAL("a78_xboard", A78_XBOARD) // the actual XBoarD expansion (as passthru)
|
SLOT_INTERFACE_INTERNAL("a78_xboard", A78_XBOARD) // the actual XBoarD expansion (as passthru)
|
||||||
SLOT_INTERFACE_INTERNAL("a78_xm", A78_XM) // the actual XM expansion (as passthru)
|
SLOT_INTERFACE_INTERNAL("a78_xm", A78_XM) // the actual XM expansion (as passthru)
|
||||||
SLOT_INTERFACE_INTERNAL("a78_megacart", A78_ROM_MEGACART)
|
SLOT_INTERFACE_INTERNAL("a78_megacart", A78_ROM_MEGACART)
|
||||||
SLOT_INTERFACE_INTERNAL("a78_versa", A78_ROM_VERSABOARD)
|
SLOT_INTERFACE_INTERNAL("a78_versa", A78_ROM_VERSABOARD)
|
||||||
// cart variants with a POKEY at 0x0450 (typically a VersaBoard variant, or an homebrew pcb)
|
// cart variants with a POKEY at 0x0450 (typically a VersaBoard variant, or an homebrew pcb)
|
||||||
|
|||||||
@ -476,7 +476,7 @@ bool a78_cart_slot_device::call_load()
|
|||||||
|
|
||||||
|
|
||||||
void a78_partialhash(hash_collection &dest, const unsigned char *data,
|
void a78_partialhash(hash_collection &dest, const unsigned char *data,
|
||||||
unsigned long length, const char *functions)
|
unsigned long length, const char *functions)
|
||||||
{
|
{
|
||||||
if (length <= 128)
|
if (length <= 128)
|
||||||
return;
|
return;
|
||||||
@ -679,7 +679,7 @@ WRITE8_MEMBER(a78_cart_slot_device::write_40xx)
|
|||||||
53..54 | Cart type [*] | 2 bytes
|
53..54 | Cart type [*] | 2 bytes
|
||||||
-------|-------------------|------------
|
-------|-------------------|------------
|
||||||
55 | Controller 1 type | 1 byte
|
55 | Controller 1 type | 1 byte
|
||||||
| |
|
| |
|
||||||
| 0 = None |
|
| 0 = None |
|
||||||
| 1 = Joystick |
|
| 1 = Joystick |
|
||||||
| 2 = Light Gun |
|
| 2 = Light Gun |
|
||||||
@ -690,7 +690,7 @@ WRITE8_MEMBER(a78_cart_slot_device::write_40xx)
|
|||||||
-------|-------------------|------------
|
-------|-------------------|------------
|
||||||
57 | TV System | 1 byte
|
57 | TV System | 1 byte
|
||||||
| |
|
| |
|
||||||
| 0 = NTSC/1 = PAL |
|
| 0 = NTSC/1 = PAL |
|
||||||
-------|-------------------|------------
|
-------|-------------------|------------
|
||||||
58 | Save data | 1 byte
|
58 | Save data | 1 byte
|
||||||
| | (only v2)
|
| | (only v2)
|
||||||
|
|||||||
@ -12,19 +12,19 @@
|
|||||||
/* PCB */
|
/* PCB */
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
A78_TYPE0 = 0, // standard 8K/16K/32K games, no bankswitch
|
A78_TYPE0 = 0, // standard 8K/16K/32K games, no bankswitch
|
||||||
A78_TYPE1, // as TYPE0 + POKEY chip on the PCB
|
A78_TYPE1, // as TYPE0 + POKEY chip on the PCB
|
||||||
A78_TYPE2, // Atari SuperGame pcb (8x16K banks with bankswitch)
|
A78_TYPE2, // Atari SuperGame pcb (8x16K banks with bankswitch)
|
||||||
A78_TYPE3, // as TYPE1 + POKEY chip on the PCB
|
A78_TYPE3, // as TYPE1 + POKEY chip on the PCB
|
||||||
A78_TYPE6, // as TYPE1 + RAM IC on the PCB
|
A78_TYPE6, // as TYPE1 + RAM IC on the PCB
|
||||||
A78_TYPEA, // Alien Brigade, Crossbow (9x16K banks with diff bankswitch)
|
A78_TYPEA, // Alien Brigade, Crossbow (9x16K banks with diff bankswitch)
|
||||||
A78_ABSOLUTE, // F18 Hornet
|
A78_ABSOLUTE, // F18 Hornet
|
||||||
A78_ACTIVISION, // Double Dragon, Rampage
|
A78_ACTIVISION, // Double Dragon, Rampage
|
||||||
A78_HSC, // Atari HighScore cart
|
A78_HSC, // Atari HighScore cart
|
||||||
A78_XB_BOARD, // A7800 Expansion Board (it shall more or less apply to the Expansion Module too, but this is not officially released yet)
|
A78_XB_BOARD, // A7800 Expansion Board (it shall more or less apply to the Expansion Module too, but this is not officially released yet)
|
||||||
A78_XM_BOARD, // A7800 XM Expansion Module (theoretical specs only, since this is not officially released yet)
|
A78_XM_BOARD, // A7800 XM Expansion Module (theoretical specs only, since this is not officially released yet)
|
||||||
A78_MEGACART, // Homebrew by CPUWIZ, consists of SuperGame bank up to 512K + 32K RAM banked
|
A78_MEGACART, // Homebrew by CPUWIZ, consists of SuperGame bank up to 512K + 32K RAM banked
|
||||||
A78_VERSABOARD = 0x10, // Homebrew by CPUWIZ, consists of SuperGame bank up to 256K + 32K RAM banked
|
A78_VERSABOARD = 0x10, // Homebrew by CPUWIZ, consists of SuperGame bank up to 256K + 32K RAM banked
|
||||||
// VersaBoard variants configured as Type 1/3/A or VersaBoard + POKEY at $0450
|
// VersaBoard variants configured as Type 1/3/A or VersaBoard + POKEY at $0450
|
||||||
A78_TYPE0_POK450 = 0x20,
|
A78_TYPE0_POK450 = 0x20,
|
||||||
A78_TYPE1_POK450 = 0x21,
|
A78_TYPE1_POK450 = 0x21,
|
||||||
@ -68,7 +68,7 @@ protected:
|
|||||||
UINT8 *m_rom;
|
UINT8 *m_rom;
|
||||||
UINT32 m_rom_size;
|
UINT32 m_rom_size;
|
||||||
dynamic_buffer m_ram;
|
dynamic_buffer m_ram;
|
||||||
dynamic_buffer m_nvram; // HiScore cart can save scores!
|
dynamic_buffer m_nvram; // HiScore cart can save scores!
|
||||||
// helpers
|
// helpers
|
||||||
UINT32 m_base_rom;
|
UINT32 m_base_rom;
|
||||||
int m_bank_mask;
|
int m_bank_mask;
|
||||||
|
|||||||
@ -86,7 +86,7 @@ READ8_MEMBER(a78_versaboard_device::read_40xx)
|
|||||||
else if (offset < 0x8000)
|
else if (offset < 0x8000)
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
||||||
else
|
else
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(a78_versaboard_device::write_40xx)
|
WRITE8_MEMBER(a78_versaboard_device::write_40xx)
|
||||||
@ -130,5 +130,3 @@ machine_config_constructor a78_rom_p450_vb_device::device_mconfig_additions() co
|
|||||||
{
|
{
|
||||||
return MACHINE_CONFIG_NAME( a78_pokeyvb );
|
return MACHINE_CONFIG_NAME( a78_pokeyvb );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -75,4 +75,3 @@ WRITE8_MEMBER(a78_hiscore_device::write_40xx)
|
|||||||
{
|
{
|
||||||
m_hscslot->write_40xx(space, offset, data);
|
m_hscslot->write_40xx(space, offset, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -282,11 +282,11 @@ machine_config_constructor a78_rom_pokey_device::device_mconfig_additions() cons
|
|||||||
READ8_MEMBER(a78_rom_sg_device::read_40xx)
|
READ8_MEMBER(a78_rom_sg_device::read_40xx)
|
||||||
{
|
{
|
||||||
if (offset < 0x4000)
|
if (offset < 0x4000)
|
||||||
return m_rom[(offset & 0x3fff) + ((m_bank_mask - 1) * 0x4000)]; // second to last bank (is this always ok?!?)
|
return m_rom[(offset & 0x3fff) + ((m_bank_mask - 1) * 0x4000)]; // second to last bank (is this always ok?!?)
|
||||||
else if (offset < 0x8000)
|
else if (offset < 0x8000)
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
||||||
else
|
else
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(a78_rom_sg_device::write_40xx)
|
WRITE8_MEMBER(a78_rom_sg_device::write_40xx)
|
||||||
@ -312,7 +312,7 @@ READ8_MEMBER(a78_rom_sg_pokey_device::read_40xx)
|
|||||||
else if (offset < 0x8000)
|
else if (offset < 0x8000)
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
||||||
else
|
else
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(a78_rom_sg_pokey_device::write_40xx)
|
WRITE8_MEMBER(a78_rom_sg_pokey_device::write_40xx)
|
||||||
@ -347,7 +347,7 @@ READ8_MEMBER(a78_rom_sg_ram_device::read_40xx)
|
|||||||
else if (offset < 0x8000)
|
else if (offset < 0x8000)
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
||||||
else
|
else
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
return m_rom[(offset & 0x3fff) + (m_bank_mask * 0x4000)]; // last bank
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(a78_rom_sg_ram_device::write_40xx)
|
WRITE8_MEMBER(a78_rom_sg_ram_device::write_40xx)
|
||||||
@ -378,7 +378,7 @@ READ8_MEMBER(a78_rom_sg9_device::read_40xx)
|
|||||||
else if (offset < 0x8000)
|
else if (offset < 0x8000)
|
||||||
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
return m_rom[(offset & 0x3fff) + (m_bank * 0x4000)];
|
||||||
else
|
else
|
||||||
return m_rom[(offset & 0x3fff) + ((m_bank_mask + 1) * 0x4000)]; // last bank
|
return m_rom[(offset & 0x3fff) + ((m_bank_mask + 1) * 0x4000)]; // last bank
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(a78_rom_sg9_device::write_40xx)
|
WRITE8_MEMBER(a78_rom_sg9_device::write_40xx)
|
||||||
@ -495,4 +495,3 @@ machine_config_constructor a78_rom_p450_sg9_device::device_mconfig_additions() c
|
|||||||
{
|
{
|
||||||
return MACHINE_CONFIG_NAME( a78_pokey450 );
|
return MACHINE_CONFIG_NAME( a78_pokey450 );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -168,7 +168,7 @@ READ8_MEMBER(a78_xboard_device::read_04xx)
|
|||||||
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
||||||
return m_pokey->read(space, offset & 0x0f);
|
return m_pokey->read(space, offset & 0x0f);
|
||||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||||
return m_xbslot->read_04xx(space, offset - 0x10); // access second POKEY
|
return m_xbslot->read_04xx(space, offset - 0x10); // access second POKEY
|
||||||
else
|
else
|
||||||
return 0xff;
|
return 0xff;
|
||||||
}
|
}
|
||||||
@ -178,7 +178,7 @@ WRITE8_MEMBER(a78_xboard_device::write_04xx)
|
|||||||
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
if (BIT(m_reg, 4) && offset >= 0x50 && offset < 0x60)
|
||||||
m_pokey->write(space, offset & 0x0f, data);
|
m_pokey->write(space, offset & 0x0f, data);
|
||||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||||
m_xbslot->write_04xx(space, offset - 0x10, data); // access second POKEY
|
m_xbslot->write_04xx(space, offset - 0x10, data); // access second POKEY
|
||||||
else if (offset >= 0x70 && offset < 0x80)
|
else if (offset >= 0x70 && offset < 0x80)
|
||||||
{
|
{
|
||||||
m_reg = data;
|
m_reg = data;
|
||||||
@ -215,7 +215,7 @@ READ8_MEMBER(a78_xm_device::read_04xx)
|
|||||||
else if (m_ym_enabled && offset >= 0x60 && offset <= 0x61)
|
else if (m_ym_enabled && offset >= 0x60 && offset <= 0x61)
|
||||||
return m_ym->read(space, offset & 1);
|
return m_ym->read(space, offset & 1);
|
||||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||||
return m_xbslot->read_04xx(space, offset - 0x10); // access second POKEY
|
return m_xbslot->read_04xx(space, offset - 0x10); // access second POKEY
|
||||||
else
|
else
|
||||||
return 0xff;
|
return 0xff;
|
||||||
}
|
}
|
||||||
@ -227,7 +227,7 @@ WRITE8_MEMBER(a78_xm_device::write_04xx)
|
|||||||
else if (m_ym_enabled && offset >= 0x60 && offset <= 0x61)
|
else if (m_ym_enabled && offset >= 0x60 && offset <= 0x61)
|
||||||
m_ym->write(space, offset & 1, data);
|
m_ym->write(space, offset & 1, data);
|
||||||
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
else if (BIT(m_reg, 4) && offset >= 0x60 && offset < 0x70)
|
||||||
m_xbslot->write_04xx(space, offset - 0x10, data); // access second POKEY
|
m_xbslot->write_04xx(space, offset - 0x10, data); // access second POKEY
|
||||||
else if (offset >= 0x70 && offset < 0x80)
|
else if (offset >= 0x70 && offset < 0x80)
|
||||||
{
|
{
|
||||||
//printf("regs 0x%X\n", data);
|
//printf("regs 0x%X\n", data);
|
||||||
|
|||||||
@ -14,7 +14,7 @@ static SLOT_INTERFACE_START(a800_left)
|
|||||||
SLOT_INTERFACE_INTERNAL("a800_8k", A800_ROM)
|
SLOT_INTERFACE_INTERNAL("a800_8k", A800_ROM)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_8k_right", A800_ROM)
|
SLOT_INTERFACE_INTERNAL("a800_8k_right", A800_ROM)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_16k", A800_ROM)
|
SLOT_INTERFACE_INTERNAL("a800_16k", A800_ROM)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_phoenix", A800_ROM) // not really emulated at this stage
|
SLOT_INTERFACE_INTERNAL("a800_phoenix", A800_ROM) // not really emulated at this stage
|
||||||
SLOT_INTERFACE_INTERNAL("a800_bbsb", A800_ROM_BBSB)
|
SLOT_INTERFACE_INTERNAL("a800_bbsb", A800_ROM_BBSB)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_oss8k", A800_ROM_OSS8K)
|
SLOT_INTERFACE_INTERNAL("a800_oss8k", A800_ROM_OSS8K)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_oss034m", A800_ROM_OSS34)
|
SLOT_INTERFACE_INTERNAL("a800_oss034m", A800_ROM_OSS34)
|
||||||
@ -23,13 +23,13 @@ static SLOT_INTERFACE_START(a800_left)
|
|||||||
SLOT_INTERFACE_INTERNAL("a800_williams", A800_ROM_WILLIAMS)
|
SLOT_INTERFACE_INTERNAL("a800_williams", A800_ROM_WILLIAMS)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_diamond", A800_ROM_EXPRESS)
|
SLOT_INTERFACE_INTERNAL("a800_diamond", A800_ROM_EXPRESS)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_express", A800_ROM_EXPRESS)
|
SLOT_INTERFACE_INTERNAL("a800_express", A800_ROM_EXPRESS)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_sparta", A800_ROM_SPARTADOS) // this is a passthru cart with unemulated (atm) subslot
|
SLOT_INTERFACE_INTERNAL("a800_sparta", A800_ROM_SPARTADOS) // this is a passthru cart with unemulated (atm) subslot
|
||||||
SLOT_INTERFACE_INTERNAL("a800_blizzard", A800_ROM)
|
SLOT_INTERFACE_INTERNAL("a800_blizzard", A800_ROM)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_turbo64", A800_ROM_TURBO)
|
SLOT_INTERFACE_INTERNAL("a800_turbo64", A800_ROM_TURBO)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_turbo128", A800_ROM_TURBO)
|
SLOT_INTERFACE_INTERNAL("a800_turbo128", A800_ROM_TURBO)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_tlink2", A800_ROM_TELELINK2)
|
SLOT_INTERFACE_INTERNAL("a800_tlink2", A800_ROM_TELELINK2)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_sitsa", A800_ROM_MICROCALC)
|
SLOT_INTERFACE_INTERNAL("a800_sitsa", A800_ROM_MICROCALC)
|
||||||
SLOT_INTERFACE_INTERNAL("a800_corina", A800_ROM) // NOT SUPPORTED YET!
|
SLOT_INTERFACE_INTERNAL("a800_corina", A800_ROM) // NOT SUPPORTED YET!
|
||||||
SLOT_INTERFACE_INTERNAL("xegs", XEGS_ROM)
|
SLOT_INTERFACE_INTERNAL("xegs", XEGS_ROM)
|
||||||
SLOT_INTERFACE_END
|
SLOT_INTERFACE_END
|
||||||
|
|
||||||
|
|||||||
@ -69,7 +69,7 @@ void device_a800_cart_interface::rom_alloc(UINT32 size, const char *tag)
|
|||||||
m_rom_size = size;
|
m_rom_size = size;
|
||||||
|
|
||||||
// setup other helpers
|
// setup other helpers
|
||||||
m_bank_mask = (size / 0x2000) - 1; // code for XEGS carts makes use of this to simplify banking
|
m_bank_mask = (size / 0x2000) - 1; // code for XEGS carts makes use of this to simplify banking
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -267,9 +267,9 @@ bool a800_cart_slot_device::call_load()
|
|||||||
UINT8 header[16];
|
UINT8 header[16];
|
||||||
fread(header, 0x10);
|
fread(header, 0x10);
|
||||||
m_type = identify_cart_type(header);
|
m_type = identify_cart_type(header);
|
||||||
len -= 0x10; // in identify_cart_type the first 0x10 bytes are read, so we need to adjust here
|
len -= 0x10; // in identify_cart_type the first 0x10 bytes are read, so we need to adjust here
|
||||||
}
|
}
|
||||||
else // otherwise try to guess based on size
|
else // otherwise try to guess based on size
|
||||||
{
|
{
|
||||||
if (len == 0x8000)
|
if (len == 0x8000)
|
||||||
m_type = A5200_32K;
|
m_type = A5200_32K;
|
||||||
@ -423,7 +423,7 @@ void a800_cart_slot_device::get_default_card_software(astring &result)
|
|||||||
core_fread(m_file, head, 0x10);
|
core_fread(m_file, head, 0x10);
|
||||||
type = identify_cart_type(head);
|
type = identify_cart_type(head);
|
||||||
}
|
}
|
||||||
else // otherwise try to guess based on size
|
else // otherwise try to guess based on size
|
||||||
{
|
{
|
||||||
if (len == 0x4000)
|
if (len == 0x4000)
|
||||||
type = A800_16K;
|
type = A800_16K;
|
||||||
@ -549,4 +549,3 @@ WRITE8_MEMBER(a800_cart_slot_device::write_d5xx)
|
|||||||
if (m_cart)
|
if (m_cart)
|
||||||
m_cart->write_d5xx(space, offset, data, mem_mask);
|
m_cart->write_d5xx(space, offset, data, mem_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -71,7 +71,7 @@ protected:
|
|||||||
UINT8 *m_rom;
|
UINT8 *m_rom;
|
||||||
UINT32 m_rom_size;
|
UINT32 m_rom_size;
|
||||||
dynamic_buffer m_ram;
|
dynamic_buffer m_ram;
|
||||||
dynamic_buffer m_nvram; // HiScore cart can save scores!
|
dynamic_buffer m_nvram; // HiScore cart can save scores!
|
||||||
// helpers
|
// helpers
|
||||||
int m_bank_mask;
|
int m_bank_mask;
|
||||||
};
|
};
|
||||||
|
|||||||
@ -156,7 +156,7 @@ WRITE8_MEMBER(a800_rom_oss34_device::write_d5xx)
|
|||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
case 6:
|
case 6:
|
||||||
m_bank = 3; // in this case the ROM gets disabled and 0xff is returned in 0xa000-0xafff
|
m_bank = 3; // in this case the ROM gets disabled and 0xff is returned in 0xa000-0xafff
|
||||||
break;
|
break;
|
||||||
case 3:
|
case 3:
|
||||||
case 7:
|
case 7:
|
||||||
@ -200,7 +200,7 @@ WRITE8_MEMBER(a800_rom_oss43_device::write_d5xx)
|
|||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
case 6:
|
case 6:
|
||||||
m_bank = 3; // in this case the ROM gets disabled and 0xff is returned in 0xa000-0xafff
|
m_bank = 3; // in this case the ROM gets disabled and 0xff is returned in 0xa000-0xafff
|
||||||
break;
|
break;
|
||||||
case 3:
|
case 3:
|
||||||
case 7:
|
case 7:
|
||||||
@ -250,4 +250,3 @@ WRITE8_MEMBER(a800_rom_oss91_device::write_d5xx)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -253,7 +253,7 @@ READ8_MEMBER(xegs_rom_device::read_80xx)
|
|||||||
if (offset < 0x2000)
|
if (offset < 0x2000)
|
||||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||||
else
|
else
|
||||||
return m_rom[(offset & 0x1fff) + (m_bank_mask * 0x2000)]; // always last 8K bank
|
return m_rom[(offset & 0x1fff) + (m_bank_mask * 0x2000)]; // always last 8K bank
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -347,7 +347,7 @@ READ8_MEMBER(a800_rom_telelink2_device::read_80xx)
|
|||||||
|
|
||||||
WRITE8_MEMBER(a800_rom_telelink2_device::write_80xx)
|
WRITE8_MEMBER(a800_rom_telelink2_device::write_80xx)
|
||||||
{
|
{
|
||||||
m_nvram[offset & 0xff] = data | 0xf0; // low 4bits only
|
m_nvram[offset & 0xff] = data | 0xf0; // low 4bits only
|
||||||
}
|
}
|
||||||
|
|
||||||
READ8_MEMBER(a800_rom_telelink2_device::read_d5xx)
|
READ8_MEMBER(a800_rom_telelink2_device::read_d5xx)
|
||||||
@ -445,4 +445,3 @@ WRITE8_MEMBER(a5200_rom_bbsb_device::write_80xx)
|
|||||||
if (addr >= 0xff6 && addr <= 0xff9)
|
if (addr >= 0xff6 && addr <= 0xff9)
|
||||||
m_banks[BIT(offset, 12)] = (addr - 0xff6);
|
m_banks[BIT(offset, 12)] = (addr - 0xff6);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -58,7 +58,7 @@ READ8_MEMBER(a800_rom_spartados_device::read_80xx)
|
|||||||
if (!m_subslot_enabled)
|
if (!m_subslot_enabled)
|
||||||
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
return m_rom[(offset & 0x1fff) + (m_bank * 0x2000)];
|
||||||
else
|
else
|
||||||
return 0xff; // subslot, currently not implemented
|
return 0xff; // subslot, currently not implemented
|
||||||
}
|
}
|
||||||
|
|
||||||
WRITE8_MEMBER(a800_rom_spartados_device::write_d5xx)
|
WRITE8_MEMBER(a800_rom_spartados_device::write_d5xx)
|
||||||
@ -69,4 +69,3 @@ WRITE8_MEMBER(a800_rom_spartados_device::write_d5xx)
|
|||||||
m_bank = (offset ^ 0x07) & 0x0f;
|
m_bank = (offset ^ 0x07) & 0x0f;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -294,5 +294,3 @@ WRITE8_MEMBER(apf_cart_slot_device::write_ram)
|
|||||||
if (m_cart)
|
if (m_cart)
|
||||||
m_cart->write_ram(space, offset, data);
|
m_cart->write_ram(space, offset, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -39,7 +39,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_ram_size() { return m_ram.count(); }
|
UINT32 get_ram_size() { return m_ram.count(); }
|
||||||
|
|
||||||
void save_ram() { device().save_item(NAME(m_ram)); }
|
void save_ram() { device().save_item(NAME(m_ram)); }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// internal state
|
// internal state
|
||||||
@ -71,7 +71,7 @@ public:
|
|||||||
|
|
||||||
int get_type() { return m_type; }
|
int get_type() { return m_type; }
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -112,6 +112,5 @@ extern const device_type APF_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_APF_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_APF_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, APF_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, APF_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -260,4 +260,3 @@ READ8_MEMBER(arcadia_cart_slot_device::extra_rom)
|
|||||||
else
|
else
|
||||||
return 0xff;
|
return 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -99,6 +99,5 @@ extern const device_type EA2001_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_ARCADIA_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_ARCADIA_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, EA2001_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, EA2001_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -1,11 +1,11 @@
|
|||||||
/*
|
/*
|
||||||
* digiblst.h
|
* digiblst.h
|
||||||
*
|
*
|
||||||
* Digiblaster - a DIY printer port DAC for the Amstrad CPC
|
* Digiblaster - a DIY printer port DAC for the Amstrad CPC
|
||||||
* Printed in the German magazine CPC Amstrad International issue 8-9/1991
|
* Printed in the German magazine CPC Amstrad International issue 8-9/1991
|
||||||
* Uses Strobe (inverted on the CPC) for the 8th bit (CPCs only have 7-bit printer ports)
|
* Uses Strobe (inverted on the CPC) for the 8th bit (CPCs only have 7-bit printer ports)
|
||||||
*
|
*
|
||||||
* Code borrows from the Covox Speech Thing device.
|
* Code borrows from the Covox Speech Thing device.
|
||||||
*
|
*
|
||||||
* Created on: 23/08/2014
|
* Created on: 23/08/2014
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -179,7 +179,7 @@ void chanf_rom_device::common_write_2102(UINT32 offset, UINT8 data)
|
|||||||
|
|
||||||
m_read_write = BIT(data, 0);
|
m_read_write = BIT(data, 0);
|
||||||
|
|
||||||
m_addr_latch = (m_addr_latch & 0x3f3) | (BIT(data, 2) << 2) | (BIT(data, 1) << 3); // bits 2,3 come from this write!
|
m_addr_latch = (m_addr_latch & 0x3f3) | (BIT(data, 2) << 2) | (BIT(data, 1) << 3); // bits 2,3 come from this write!
|
||||||
m_addr = m_addr_latch;
|
m_addr = m_addr_latch;
|
||||||
|
|
||||||
m_data0 = BIT(data, 3);
|
m_data0 = BIT(data, 3);
|
||||||
@ -240,4 +240,3 @@ WRITE8_MEMBER(chanf_multi_final_device::write_bank)
|
|||||||
m_base_bank = data & 0x1f;
|
m_base_bank = data & 0x1f;
|
||||||
m_half_bank = BIT(data, 5);
|
m_half_bank = BIT(data, 5);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -31,7 +31,7 @@ public:
|
|||||||
|
|
||||||
protected:
|
protected:
|
||||||
// used for RAM chip in Hangman & Maze
|
// used for RAM chip in Hangman & Maze
|
||||||
UINT8 m_latch[2]; // PORT A & PORT B
|
UINT8 m_latch[2]; // PORT A & PORT B
|
||||||
UINT16 m_addr_latch, m_addr;
|
UINT16 m_addr_latch, m_addr;
|
||||||
int m_read_write, m_data0;
|
int m_read_write, m_data0;
|
||||||
};
|
};
|
||||||
|
|||||||
@ -178,9 +178,9 @@ bool channelf_cart_slot_device::call_load()
|
|||||||
// we default to "chess" slot because some homebrew programs have been written to run
|
// we default to "chess" slot because some homebrew programs have been written to run
|
||||||
// on PCBs with RAM at $2000-$2800 as Saba Schach!
|
// on PCBs with RAM at $2000-$2800 as Saba Schach!
|
||||||
if (len == 0x40000)
|
if (len == 0x40000)
|
||||||
m_type = CF_MULTI; // TODO1: differentiate multicart final and earlier from fullpath
|
m_type = CF_MULTI; // TODO1: differentiate multicart final and earlier from fullpath
|
||||||
else
|
else
|
||||||
m_type = CF_CHESS; // TODO2: is there any way to detect Maze and Hangman from fullpath?
|
m_type = CF_CHESS; // TODO2: is there any way to detect Maze and Hangman from fullpath?
|
||||||
|
|
||||||
m_cart->ram_alloc(0x800);
|
m_cart->ram_alloc(0x800);
|
||||||
}
|
}
|
||||||
@ -230,7 +230,7 @@ void channelf_cart_slot_device::get_default_card_software(astring &result)
|
|||||||
if (len == 0x40000)
|
if (len == 0x40000)
|
||||||
type = CF_MULTI;
|
type = CF_MULTI;
|
||||||
else
|
else
|
||||||
type = CF_CHESS; // is there any way to detect the other carts from fullpath?
|
type = CF_CHESS; // is there any way to detect the other carts from fullpath?
|
||||||
|
|
||||||
slot_string = chanf_get_slot(type);
|
slot_string = chanf_get_slot(type);
|
||||||
|
|
||||||
|
|||||||
@ -42,7 +42,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_ram_size() { return m_ram.count(); }
|
UINT32 get_ram_size() { return m_ram.count(); }
|
||||||
|
|
||||||
void save_ram() { device().save_item(NAME(m_ram)); }
|
void save_ram() { device().save_item(NAME(m_ram)); }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// internal state
|
// internal state
|
||||||
@ -74,7 +74,7 @@ public:
|
|||||||
|
|
||||||
int get_type() { return m_type; }
|
int get_type() { return m_type; }
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -115,6 +115,5 @@ extern const device_type CHANF_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_CHANNELF_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_CHANNELF_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, CHANF_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, CHANF_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -18,7 +18,7 @@
|
|||||||
#include "sound/dac.h"
|
#include "sound/dac.h"
|
||||||
|
|
||||||
class cpc_amdrum_device : public device_t,
|
class cpc_amdrum_device : public device_t,
|
||||||
public device_cpc_expansion_card_interface
|
public device_cpc_expansion_card_interface
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
// construction/destruction
|
// construction/destruction
|
||||||
|
|||||||
@ -47,11 +47,11 @@ static INPUT_PORTS_START(cpc_symbiface2)
|
|||||||
PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("PS/2 Mouse forward button") PORT_CODE(MOUSECODE_BUTTON5) PORT_CHANGED_MEMBER(DEVICE_SELF,cpc_symbiface2_device,mouse_change_x,NULL)
|
PORT_BIT(0x00000010, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("PS/2 Mouse forward button") PORT_CODE(MOUSECODE_BUTTON5) PORT_CHANGED_MEMBER(DEVICE_SELF,cpc_symbiface2_device,mouse_change_x,NULL)
|
||||||
|
|
||||||
// TODO: mouse scroll wheel support
|
// TODO: mouse scroll wheel support
|
||||||
// PORT_START("sf2_mouse_scroll")
|
// PORT_START("sf2_mouse_scroll")
|
||||||
// PORT_BIT(0x1f , 0, IPT_TRACKBALL_Y)
|
// PORT_BIT(0x1f , 0, IPT_TRACKBALL_Y)
|
||||||
// PORT_SENSITIVITY(100)
|
// PORT_SENSITIVITY(100)
|
||||||
// PORT_KEYDELTA(10)
|
// PORT_KEYDELTA(10)
|
||||||
// PORT_PLAYER(1)
|
// PORT_PLAYER(1)
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
|
|
||||||
@ -189,26 +189,26 @@ WRITE8_MEMBER(cpc_symbiface2_device::rtc_w)
|
|||||||
// PS/2 Mouse connector
|
// PS/2 Mouse connector
|
||||||
// #FD10 (read only) read mouse status
|
// #FD10 (read only) read mouse status
|
||||||
/*
|
/*
|
||||||
Status byte
|
Status byte
|
||||||
Bit 76543210
|
Bit 76543210
|
||||||
Use mmDDDDDD
|
Use mmDDDDDD
|
||||||
|
|
||||||
m: Mode
|
m: Mode
|
||||||
D: Use-Data
|
D: Use-Data
|
||||||
|
|
||||||
If read and...
|
If read and...
|
||||||
|
|
||||||
m = 00 -> no more data available, you can stop reading the status for a while
|
m = 00 -> no more data available, you can stop reading the status for a while
|
||||||
m = 01 -> D = X offset (signed); you will receive positive values, if the user
|
m = 01 -> D = X offset (signed); you will receive positive values, if the user
|
||||||
is moving the mouse to the right
|
is moving the mouse to the right
|
||||||
m = 10 -> D = Y offset (signed); you will receive positive values, if the user
|
m = 10 -> D = Y offset (signed); you will receive positive values, if the user
|
||||||
is moving the mouse upwards
|
is moving the mouse upwards
|
||||||
m = 11 -> D[bit5] = 0 -> D[bit0] = left button
|
m = 11 -> D[bit5] = 0 -> D[bit0] = left button
|
||||||
D[bit1] = right button
|
D[bit1] = right button
|
||||||
D[bit2] = middle button
|
D[bit2] = middle button
|
||||||
D[bit3] = forward button
|
D[bit3] = forward button
|
||||||
D[bit4] = backward button
|
D[bit4] = backward button
|
||||||
D[bit5] = 1 -> D[bit0-4] = scroll wheel offset (signed)
|
D[bit5] = 1 -> D[bit0-4] = scroll wheel offset (signed)
|
||||||
*/
|
*/
|
||||||
READ8_MEMBER(cpc_symbiface2_device::mouse_r)
|
READ8_MEMBER(cpc_symbiface2_device::mouse_r)
|
||||||
{
|
{
|
||||||
|
|||||||
@ -14,7 +14,7 @@
|
|||||||
#include "cpcexp.h"
|
#include "cpcexp.h"
|
||||||
|
|
||||||
class cpc_symbiface2_device : public device_t,
|
class cpc_symbiface2_device : public device_t,
|
||||||
public device_cpc_expansion_card_interface
|
public device_cpc_expansion_card_interface
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
// construction/destruction
|
// construction/destruction
|
||||||
|
|||||||
@ -295,4 +295,3 @@ READ8_MEMBER(crvision_cart_slot_device::read_rom80)
|
|||||||
else
|
else
|
||||||
return 0xff;
|
return 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -104,6 +104,5 @@ extern const device_type CRVISION_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_CRVISION_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_CRVISION_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, CRVISION_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, CRVISION_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -71,7 +71,7 @@ public:
|
|||||||
void set_has_battery(bool val) { has_battery = val; }
|
void set_has_battery(bool val) { has_battery = val; }
|
||||||
bool get_has_battery() { return has_battery; }
|
bool get_has_battery() { return has_battery; }
|
||||||
|
|
||||||
void save_ram() { device().save_item(NAME(m_ram)); }
|
void save_ram() { device().save_item(NAME(m_ram)); }
|
||||||
|
|
||||||
// internal state
|
// internal state
|
||||||
UINT8 *m_rom;
|
UINT8 *m_rom;
|
||||||
@ -122,7 +122,7 @@ public:
|
|||||||
|
|
||||||
void setup_ram(UINT8 banks);
|
void setup_ram(UINT8 banks);
|
||||||
void internal_header_logging(UINT8 *ROM, UINT32 len);
|
void internal_header_logging(UINT8 *ROM, UINT32 len);
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
|
|||||||
@ -42,7 +42,7 @@ public:
|
|||||||
UINT32 get_nvram_size() { return m_nvram.bytes(); }
|
UINT32 get_nvram_size() { return m_nvram.bytes(); }
|
||||||
void set_rom_size(UINT32 val) { m_rom_size = val; }
|
void set_rom_size(UINT32 val) { m_rom_size = val; }
|
||||||
|
|
||||||
void save_nvram() { device().save_item(NAME(m_nvram)); }
|
void save_nvram() { device().save_item(NAME(m_nvram)); }
|
||||||
|
|
||||||
// internal state
|
// internal state
|
||||||
UINT32 *m_rom; // this points to the cart rom region
|
UINT32 *m_rom; // this points to the cart rom region
|
||||||
@ -77,7 +77,7 @@ public:
|
|||||||
void setup_ram(UINT8 banks);
|
void setup_ram(UINT8 banks);
|
||||||
void internal_header_logging(UINT8 *ROM, UINT32 len);
|
void internal_header_logging(UINT8 *ROM, UINT32 len);
|
||||||
|
|
||||||
void save_nvram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram(); }
|
void save_nvram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -175,7 +175,7 @@ static const gba_chip_fix_conflict_item gba_chip_fix_conflict_list[] =
|
|||||||
{ "BR4J", GBA_CHIP_FLASH }, // 1586 - Rockman EXE 4.5 - Real Operation (JPN)
|
{ "BR4J", GBA_CHIP_FLASH }, // 1586 - Rockman EXE 4.5 - Real Operation (JPN)
|
||||||
{ "BG8J", GBA_CHIP_EEPROM_64K }, // 1853 - Ganbare! Dodge Fighters (JPN)
|
{ "BG8J", GBA_CHIP_EEPROM_64K }, // 1853 - Ganbare! Dodge Fighters (JPN)
|
||||||
{ "AROP", GBA_CHIP_EEPROM_4K }, // 1862 - Rocky (EUR)
|
{ "AROP", GBA_CHIP_EEPROM_4K }, // 1862 - Rocky (EUR)
|
||||||
// "A2YE" - 1906 - Top Gun - Combat Zones (USA) - multiple NVRAM chips detected, but none present (protection against emu?)
|
// "A2YE" - 1906 - Top Gun - Combat Zones (USA) - multiple NVRAM chips detected, but none present (protection against emu?)
|
||||||
{ "BKMJ", GBA_CHIP_EEPROM_4K }, // 2039 - Kim Possible (JPN)
|
{ "BKMJ", GBA_CHIP_EEPROM_4K }, // 2039 - Kim Possible (JPN)
|
||||||
{ "BKEJ", GBA_CHIP_EEPROM_64K }, // 2047 - Konjiki no Gashbell - The Card Battle for GBA (JPN)
|
{ "BKEJ", GBA_CHIP_EEPROM_64K }, // 2047 - Konjiki no Gashbell - The Card Battle for GBA (JPN)
|
||||||
{ "BKMP", GBA_CHIP_EEPROM_4K }, // 2297 - Kim Possible 2 - Drakken's Demise (EUR)
|
{ "BKMP", GBA_CHIP_EEPROM_4K }, // 2297 - Kim Possible 2 - Drakken's Demise (EUR)
|
||||||
|
|||||||
@ -121,4 +121,3 @@ WRITE8_MEMBER(generic_ram_linear_device::write_ram)
|
|||||||
{
|
{
|
||||||
m_ram[offset % m_ram.bytes()] = data;
|
m_ram[offset % m_ram.bytes()] = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -120,4 +120,3 @@ WRITE8_MEMBER(generic_romram_plain_device::write_ram)
|
|||||||
if (offset < m_ram.bytes())
|
if (offset < m_ram.bytes())
|
||||||
m_ram[offset] = data;
|
m_ram[offset] = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -283,4 +283,3 @@ WRITE8_MEMBER(generic_slot_device::write_ram)
|
|||||||
if (m_cart)
|
if (m_cart)
|
||||||
m_cart->write_ram(space, offset, data);
|
m_cart->write_ram(space, offset, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -168,11 +168,9 @@ extern const device_type GENERIC_SOCKET;
|
|||||||
#define MCFG_GENERIC_CARTSLOT_ADD(_tag, _slot_intf, _dev_intf) \
|
#define MCFG_GENERIC_CARTSLOT_ADD(_tag, _slot_intf, _dev_intf) \
|
||||||
MCFG_DEVICE_ADD(_tag, GENERIC_SOCKET, 0) \
|
MCFG_DEVICE_ADD(_tag, GENERIC_SOCKET, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, NULL, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, NULL, false) \
|
||||||
MCFG_GENERIC_INTERFACE(_dev_intf) \
|
MCFG_GENERIC_INTERFACE(_dev_intf)
|
||||||
|
|
||||||
#define MCFG_GENERIC_SOCKET_ADD(_tag, _slot_intf, _dev_intf) \
|
#define MCFG_GENERIC_SOCKET_ADD(_tag, _slot_intf, _dev_intf) \
|
||||||
MCFG_DEVICE_ADD(_tag, GENERIC_SOCKET, 0) \
|
MCFG_DEVICE_ADD(_tag, GENERIC_SOCKET, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, NULL, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, NULL, false) \
|
||||||
MCFG_GENERIC_INTERFACE(_dev_intf) \
|
MCFG_GENERIC_INTERFACE(_dev_intf)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -550,7 +550,7 @@ READ16_MEMBER(intv_ecs_device::read_rome0)
|
|||||||
{
|
{
|
||||||
if (m_bank_base[14])
|
if (m_bank_base[14])
|
||||||
return INTV_ROM16_READ(offset + 0xe000);
|
return INTV_ROM16_READ(offset + 0xe000);
|
||||||
else // if WSMLB is loaded, it shall go here, otherwise 0xffff
|
else // if WSMLB is loaded, it shall go here, otherwise 0xffff
|
||||||
return m_subslot->read_rome0(space, offset, mem_mask);
|
return m_subslot->read_rome0(space, offset, mem_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -585,4 +585,3 @@ WRITE16_MEMBER(intv_ecs_device::write_ay)
|
|||||||
if (ACCESSING_BITS_0_7)
|
if (ACCESSING_BITS_0_7)
|
||||||
return m_snd->write(space, offset, data, mem_mask);
|
return m_snd->write(space, offset, data, mem_mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -47,4 +47,3 @@ intv_wsmlb_device::intv_wsmlb_device(const machine_config &mconfig, const char *
|
|||||||
: intv_rom_device(mconfig, INTV_ROM_WSMLB, "Intellivision World Series Baseball Cart", tag, owner, clock, "intv_wsmlb", __FILE__)
|
: intv_rom_device(mconfig, INTV_ROM_WSMLB, "Intellivision World Series Baseball Cart", tag, owner, clock, "intv_wsmlb", __FILE__)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -329,7 +329,7 @@ int intv_cart_slot_device::load_fullpath()
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
sscanf(extrainfo.cstr() ,"%d %d %d %d %d %d %d", &mapper, &rom[0], &rom[1], &rom[2],
|
sscanf(extrainfo.cstr() ,"%d %d %d %d %d %d %d", &mapper, &rom[0], &rom[1], &rom[2],
|
||||||
&rom[3], &ram, &extra);
|
&rom[3], &ram, &extra);
|
||||||
//printf("extrainfo: %d %d %d %d %d %d %d \n", mapper, rom[0], rom[1], rom[2], rom[3], ram, extra);
|
//printf("extrainfo: %d %d %d %d %d %d %d \n", mapper, rom[0], rom[1], rom[2], rom[3], ram, extra);
|
||||||
|
|
||||||
if (mapper)
|
if (mapper)
|
||||||
@ -355,7 +355,7 @@ int intv_cart_slot_device::load_fullpath()
|
|||||||
}
|
}
|
||||||
if (extra & INTELLIVOICE_MASK)
|
if (extra & INTELLIVOICE_MASK)
|
||||||
{
|
{
|
||||||
printf("WARNING: This game requires emulation of the IntelliVoice module.\n");
|
printf("WARNING: This game requires emulation of the IntelliVoice module.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
if (extra & ECS_MASK)
|
if (extra & ECS_MASK)
|
||||||
@ -484,7 +484,7 @@ void intv_cart_slot_device::get_default_card_software(astring &result)
|
|||||||
if (hashfile_extrainfo(*this, extrainfo))
|
if (hashfile_extrainfo(*this, extrainfo))
|
||||||
{
|
{
|
||||||
sscanf(extrainfo.cstr() ,"%d %d %d %d %d %d %d", &mapper, &rom[0], &rom[1], &rom[2],
|
sscanf(extrainfo.cstr() ,"%d %d %d %d %d %d %d", &mapper, &rom[0], &rom[1], &rom[2],
|
||||||
&rom[3], &ram, &extra);
|
&rom[3], &ram, &extra);
|
||||||
|
|
||||||
if (ram)
|
if (ram)
|
||||||
{
|
{
|
||||||
@ -567,6 +567,5 @@ SLOT_INTERFACE_START(intv_cart)
|
|||||||
SLOT_INTERFACE_INTERNAL("intv_wsmlb", INTV_ROM_WSMLB)
|
SLOT_INTERFACE_INTERNAL("intv_wsmlb", INTV_ROM_WSMLB)
|
||||||
SLOT_INTERFACE_INTERNAL("intv_voice", INTV_ROM_VOICE)
|
SLOT_INTERFACE_INTERNAL("intv_voice", INTV_ROM_VOICE)
|
||||||
SLOT_INTERFACE_INTERNAL("intv_ecs", INTV_ROM_ECS)
|
SLOT_INTERFACE_INTERNAL("intv_ecs", INTV_ROM_ECS)
|
||||||
// SLOT_INTERFACE_INTERNAL("intv_keycomp", INTV_ROM_KEYCOMP)
|
// SLOT_INTERFACE_INTERNAL("intv_keycomp", INTV_ROM_KEYCOMP)
|
||||||
SLOT_INTERFACE_END
|
SLOT_INTERFACE_END
|
||||||
|
|
||||||
|
|||||||
@ -11,7 +11,7 @@ enum
|
|||||||
{
|
{
|
||||||
INTV_STD = 0,
|
INTV_STD = 0,
|
||||||
INTV_RAM,
|
INTV_RAM,
|
||||||
INTV_GFACT, // has RAM too but at diff offset
|
INTV_GFACT, // has RAM too but at diff offset
|
||||||
INTV_WSMLB,
|
INTV_WSMLB,
|
||||||
INTV_VOICE,
|
INTV_VOICE,
|
||||||
INTV_ECS,
|
INTV_ECS,
|
||||||
@ -71,7 +71,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_ram_size() { return m_ram.count(); }
|
UINT32 get_ram_size() { return m_ram.count(); }
|
||||||
|
|
||||||
void save_ram() { device().save_item(NAME(m_ram)); }
|
void save_ram() { device().save_item(NAME(m_ram)); }
|
||||||
virtual void late_subslot_setup() {}
|
virtual void late_subslot_setup() {}
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
@ -105,7 +105,7 @@ public:
|
|||||||
int get_type() { return m_type; }
|
int get_type() { return m_type; }
|
||||||
int load_fullpath();
|
int load_fullpath();
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -176,8 +176,7 @@ extern const device_type INTV_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_INTV_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_INTV_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, INTV_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, INTV_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
|
|
||||||
SLOT_INTERFACE_EXTERN(intv_cart);
|
SLOT_INTERFACE_EXTERN(intv_cart);
|
||||||
|
|
||||||
|
|||||||
@ -370,12 +370,12 @@ ROM_END
|
|||||||
|
|
||||||
static ADDRESS_MAP_START(sb16_io, AS_IO, 8, sb16_lle_device)
|
static ADDRESS_MAP_START(sb16_io, AS_IO, 8, sb16_lle_device)
|
||||||
AM_RANGE(0x0000, 0x0000) AM_MIRROR(0xff00) AM_READWRITE(dsp_data_r, dsp_data_w)
|
AM_RANGE(0x0000, 0x0000) AM_MIRROR(0xff00) AM_READWRITE(dsp_data_r, dsp_data_w)
|
||||||
// AM_RANGE(0x0001, 0x0001) // MIDI related?
|
// AM_RANGE(0x0001, 0x0001) // MIDI related?
|
||||||
// AM_RANGE(0x0002, 0x0002)
|
// AM_RANGE(0x0002, 0x0002)
|
||||||
AM_RANGE(0x0004, 0x0004) AM_MIRROR(0xff00) AM_READWRITE(mode_r, mode_w)
|
AM_RANGE(0x0004, 0x0004) AM_MIRROR(0xff00) AM_READWRITE(mode_r, mode_w)
|
||||||
AM_RANGE(0x0005, 0x0005) AM_MIRROR(0xff00) AM_READWRITE(dac_ctrl_r, dac_ctrl_w)
|
AM_RANGE(0x0005, 0x0005) AM_MIRROR(0xff00) AM_READWRITE(dac_ctrl_r, dac_ctrl_w)
|
||||||
AM_RANGE(0x0006, 0x0006) AM_MIRROR(0xff00) AM_READ(dma_stat_r)
|
AM_RANGE(0x0006, 0x0006) AM_MIRROR(0xff00) AM_READ(dma_stat_r)
|
||||||
// AM_RANGE(0x0007, 0x0007) // unknown
|
// AM_RANGE(0x0007, 0x0007) // unknown
|
||||||
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(ctrl8_r, ctrl8_w)
|
AM_RANGE(0x0008, 0x0008) AM_MIRROR(0xff00) AM_READWRITE(ctrl8_r, ctrl8_w)
|
||||||
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xff00) AM_WRITE(rate_w)
|
AM_RANGE(0x0009, 0x0009) AM_MIRROR(0xff00) AM_WRITE(rate_w)
|
||||||
AM_RANGE(0x000A, 0x000A) AM_MIRROR(0xff00) AM_READ(dma8_cnt_lo_r)
|
AM_RANGE(0x000A, 0x000A) AM_MIRROR(0xff00) AM_READ(dma8_cnt_lo_r)
|
||||||
@ -393,9 +393,9 @@ static ADDRESS_MAP_START(sb16_io, AS_IO, 8, sb16_lle_device)
|
|||||||
AM_RANGE(0x001B, 0x001B) AM_MIRROR(0xff00) AM_READ(adc_data_r)
|
AM_RANGE(0x001B, 0x001B) AM_MIRROR(0xff00) AM_READ(adc_data_r)
|
||||||
AM_RANGE(0x001D, 0x001D) AM_MIRROR(0xff00) AM_WRITE(dma8_w)
|
AM_RANGE(0x001D, 0x001D) AM_MIRROR(0xff00) AM_WRITE(dma8_w)
|
||||||
AM_RANGE(0x001F, 0x001F) AM_MIRROR(0xff00) AM_READ(dma8_r)
|
AM_RANGE(0x001F, 0x001F) AM_MIRROR(0xff00) AM_READ(dma8_r)
|
||||||
// AM_RANGE(0x0080, 0x0080) // ASP comms
|
// AM_RANGE(0x0080, 0x0080) // ASP comms
|
||||||
// AM_RANGE(0x0081, 0x0081)
|
// AM_RANGE(0x0081, 0x0081)
|
||||||
// AM_RANGE(0x0082, 0x0082)
|
// AM_RANGE(0x0082, 0x0082)
|
||||||
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_READWRITE(p1_r, p1_w)
|
AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_READWRITE(p1_r, p1_w)
|
||||||
AM_RANGE(MCS51_PORT_P2, MCS51_PORT_P2) AM_READWRITE(p2_r, p2_w)
|
AM_RANGE(MCS51_PORT_P2, MCS51_PORT_P2) AM_READWRITE(p2_r, p2_w)
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|||||||
@ -87,10 +87,10 @@ void isa8_svga_tgui9680_device::device_start()
|
|||||||
m_isa->install_memory(0xa0000, 0xbffff, 0, 0, read8_delegate(FUNC(trident_vga_device::mem_r),m_vga), write8_delegate(FUNC(trident_vga_device::mem_w),m_vga));
|
m_isa->install_memory(0xa0000, 0xbffff, 0, 0, read8_delegate(FUNC(trident_vga_device::mem_r),m_vga), write8_delegate(FUNC(trident_vga_device::mem_w),m_vga));
|
||||||
|
|
||||||
// uncomment to test Windows 3.1 TGUI9440AGi driver
|
// uncomment to test Windows 3.1 TGUI9440AGi driver
|
||||||
// m_isa->install_memory(0x4400000, 0x45fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
|
// m_isa->install_memory(0x4400000, 0x45fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
|
||||||
|
|
||||||
// win95 drivers
|
// win95 drivers
|
||||||
// m_isa->install_memory(0x4000000, 0x41fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
|
// m_isa->install_memory(0x4000000, 0x41fffff, 0, 0, read8_delegate(FUNC(trident_vga_device::vram_r),m_vga), write8_delegate(FUNC(trident_vga_device::vram_w),m_vga));
|
||||||
|
|
||||||
// acceleration ports
|
// acceleration ports
|
||||||
m_isa->install_device(0x2120, 0x21ff, 0, 0, read8_delegate(FUNC(trident_vga_device::accel_r),m_vga), write8_delegate(FUNC(trident_vga_device::accel_w),m_vga));
|
m_isa->install_device(0x2120, 0x21ff, 0, 0, read8_delegate(FUNC(trident_vga_device::accel_r),m_vga), write8_delegate(FUNC(trident_vga_device::accel_w),m_vga));
|
||||||
|
|||||||
@ -45,21 +45,21 @@ UINT8 trident_vga_device::READPIXEL8(INT16 x, INT16 y)
|
|||||||
UINT16 trident_vga_device::READPIXEL15(INT16 x, INT16 y)
|
UINT16 trident_vga_device::READPIXEL15(INT16 x, INT16 y)
|
||||||
{
|
{
|
||||||
return (vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*2) % vga.svga_intf.vram_size] |
|
return (vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*2) % vga.svga_intf.vram_size] |
|
||||||
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*2)+1) % vga.svga_intf.vram_size] << 8));
|
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*2)+1) % vga.svga_intf.vram_size] << 8));
|
||||||
}
|
}
|
||||||
|
|
||||||
UINT16 trident_vga_device::READPIXEL16(INT16 x, INT16 y)
|
UINT16 trident_vga_device::READPIXEL16(INT16 x, INT16 y)
|
||||||
{
|
{
|
||||||
return (vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*2) % vga.svga_intf.vram_size] |
|
return (vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*2) % vga.svga_intf.vram_size] |
|
||||||
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*2)+1) % vga.svga_intf.vram_size] << 8));
|
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*2)+1) % vga.svga_intf.vram_size] << 8));
|
||||||
}
|
}
|
||||||
|
|
||||||
UINT32 trident_vga_device::READPIXEL32(INT16 x, INT16 y)
|
UINT32 trident_vga_device::READPIXEL32(INT16 x, INT16 y)
|
||||||
{
|
{
|
||||||
return (vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*4) % vga.svga_intf.vram_size] |
|
return (vga.memory[((y & 0xfff)*offset() + (x & 0xfff)*4) % vga.svga_intf.vram_size] |
|
||||||
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+1) % vga.svga_intf.vram_size] << 8) |
|
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+1) % vga.svga_intf.vram_size] << 8) |
|
||||||
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+2) % vga.svga_intf.vram_size] << 16) |
|
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+2) % vga.svga_intf.vram_size] << 16) |
|
||||||
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+3) % vga.svga_intf.vram_size] << 24));
|
(vga.memory[((y & 0xfff)*offset() + ((x & 0xfff)*4)+3) % vga.svga_intf.vram_size] << 24));
|
||||||
}
|
}
|
||||||
|
|
||||||
void trident_vga_device::WRITEPIXEL8(INT16 x, INT16 y, UINT8 data)
|
void trident_vga_device::WRITEPIXEL8(INT16 x, INT16 y, UINT8 data)
|
||||||
@ -249,9 +249,9 @@ UINT32 trident_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bi
|
|||||||
for(x=0;x<cursor_size;x++)
|
for(x=0;x<cursor_size;x++)
|
||||||
{
|
{
|
||||||
UINT32 bitb = (vga.memory[(src+3) % vga.svga_intf.vram_size]
|
UINT32 bitb = (vga.memory[(src+3) % vga.svga_intf.vram_size]
|
||||||
| ((vga.memory[(src+2) % vga.svga_intf.vram_size]) << 8)
|
| ((vga.memory[(src+2) % vga.svga_intf.vram_size]) << 8)
|
||||||
| ((vga.memory[(src+1) % vga.svga_intf.vram_size]) << 16)
|
| ((vga.memory[(src+1) % vga.svga_intf.vram_size]) << 16)
|
||||||
| ((vga.memory[(src+0) % vga.svga_intf.vram_size]) << 24));
|
| ((vga.memory[(src+0) % vga.svga_intf.vram_size]) << 24));
|
||||||
UINT32 bita = (vga.memory[(src+7) % vga.svga_intf.vram_size]
|
UINT32 bita = (vga.memory[(src+7) % vga.svga_intf.vram_size]
|
||||||
| ((vga.memory[(src+6) % vga.svga_intf.vram_size]) << 8)
|
| ((vga.memory[(src+6) % vga.svga_intf.vram_size]) << 8)
|
||||||
| ((vga.memory[(src+5) % vga.svga_intf.vram_size]) << 16)
|
| ((vga.memory[(src+5) % vga.svga_intf.vram_size]) << 16)
|
||||||
@ -1131,60 +1131,60 @@ UINT8 trident_vga_device::old_mmio_r(address_space& space, UINT32 offset)
|
|||||||
/*
|
/*
|
||||||
Graphics Engine for 9440/9660/9680
|
Graphics Engine for 9440/9660/9680
|
||||||
|
|
||||||
#define GER_STATUS 0x2120
|
#define GER_STATUS 0x2120
|
||||||
#define GE_BUSY 0x80
|
#define GE_BUSY 0x80
|
||||||
#define GER_OPERMODE 0x2122 Byte for 9440, Word for 96xx
|
#define GER_OPERMODE 0x2122 Byte for 9440, Word for 96xx
|
||||||
#define DST_ENABLE 0x200 // Destination Transparency
|
#define DST_ENABLE 0x200 // Destination Transparency
|
||||||
#define GER_COMMAND 0x2124
|
#define GER_COMMAND 0x2124
|
||||||
#define GE_NOP 0x00 // No Operation
|
#define GE_NOP 0x00 // No Operation
|
||||||
#define GE_BLT 0x01 // BitBLT ROP3 only
|
#define GE_BLT 0x01 // BitBLT ROP3 only
|
||||||
#define GE_BLT_ROP4 0x02 // BitBLT ROP4 (96xx only)
|
#define GE_BLT_ROP4 0x02 // BitBLT ROP4 (96xx only)
|
||||||
#define GE_SCANLINE 0x03 // Scan Line
|
#define GE_SCANLINE 0x03 // Scan Line
|
||||||
#define GE_BRESLINE 0x04 // Bresenham Line
|
#define GE_BRESLINE 0x04 // Bresenham Line
|
||||||
#define GE_SHVECTOR 0x05 // Short Vector
|
#define GE_SHVECTOR 0x05 // Short Vector
|
||||||
#define GE_FASTLINE 0x06 // Fast Line (96xx only)
|
#define GE_FASTLINE 0x06 // Fast Line (96xx only)
|
||||||
#define GE_TRAPEZ 0x07 // Trapezoidal fill (96xx only)
|
#define GE_TRAPEZ 0x07 // Trapezoidal fill (96xx only)
|
||||||
#define GE_ELLIPSE 0x08 // Ellipse (96xx only) (RES)
|
#define GE_ELLIPSE 0x08 // Ellipse (96xx only) (RES)
|
||||||
#define GE_ELLIP_FILL 0x09 // Ellipse Fill (96xx only) (RES)
|
#define GE_ELLIP_FILL 0x09 // Ellipse Fill (96xx only) (RES)
|
||||||
#define GER_FMIX 0x2127
|
#define GER_FMIX 0x2127
|
||||||
#define GER_DRAWFLAG 0x2128 // long
|
#define GER_DRAWFLAG 0x2128 // long
|
||||||
#define FASTMODE 1<<28
|
#define FASTMODE 1<<28
|
||||||
#define STENCIL 0x8000
|
#define STENCIL 0x8000
|
||||||
#define SOLIDFILL 0x4000
|
#define SOLIDFILL 0x4000
|
||||||
#define TRANS_ENABLE 0x1000
|
#define TRANS_ENABLE 0x1000
|
||||||
#define TRANS_REVERSE 0x2000
|
#define TRANS_REVERSE 0x2000
|
||||||
#define YMAJ 0x0400
|
#define YMAJ 0x0400
|
||||||
#define XNEG 0x0200
|
#define XNEG 0x0200
|
||||||
#define YNEG 0x0100
|
#define YNEG 0x0100
|
||||||
#define SRCMONO 0x0040
|
#define SRCMONO 0x0040
|
||||||
#define PATMONO 0x0020
|
#define PATMONO 0x0020
|
||||||
#define SCR2SCR 0x0004
|
#define SCR2SCR 0x0004
|
||||||
#define PAT2SCR 0x0002
|
#define PAT2SCR 0x0002
|
||||||
#define GER_FCOLOUR 0x212C // Word for 9440, long for 96xx
|
#define GER_FCOLOUR 0x212C // Word for 9440, long for 96xx
|
||||||
#define GER_BCOLOUR 0x2130 // Word for 9440, long for 96xx
|
#define GER_BCOLOUR 0x2130 // Word for 9440, long for 96xx
|
||||||
#define GER_PATLOC 0x2134 // Word
|
#define GER_PATLOC 0x2134 // Word
|
||||||
#define GER_DEST_XY 0x2138
|
#define GER_DEST_XY 0x2138
|
||||||
#define GER_DEST_X 0x2138 // Word
|
#define GER_DEST_X 0x2138 // Word
|
||||||
#define GER_DEST_Y 0x213A // Word
|
#define GER_DEST_Y 0x213A // Word
|
||||||
#define GER_SRC_XY 0x213C
|
#define GER_SRC_XY 0x213C
|
||||||
#define GER_SRC_X 0x213C // Word
|
#define GER_SRC_X 0x213C // Word
|
||||||
#define GER_SRC_Y 0x213E // Word
|
#define GER_SRC_Y 0x213E // Word
|
||||||
#define GER_DIM_XY 0x2140
|
#define GER_DIM_XY 0x2140
|
||||||
#define GER_DIM_X 0x2140 // Word
|
#define GER_DIM_X 0x2140 // Word
|
||||||
#define GER_DIM_Y 0x2142 // Word
|
#define GER_DIM_Y 0x2142 // Word
|
||||||
#define GER_STYLE 0x2144 // Long
|
#define GER_STYLE 0x2144 // Long
|
||||||
#define GER_CKEY 0x2168 // Long
|
#define GER_CKEY 0x2168 // Long
|
||||||
#define GER_FPATCOL 0x2178
|
#define GER_FPATCOL 0x2178
|
||||||
#define GER_BPATCOL 0x217C
|
#define GER_BPATCOL 0x217C
|
||||||
#define GER_PATTERN 0x2180 // from 0x2180 to 0x21FF
|
#define GER_PATTERN 0x2180 // from 0x2180 to 0x21FF
|
||||||
|
|
||||||
Additional - Graphics Engine for 96xx
|
Additional - Graphics Engine for 96xx
|
||||||
#define GER_SRCCLIP_XY 0x2148
|
#define GER_SRCCLIP_XY 0x2148
|
||||||
#define GER_SRCCLIP_X 0x2148 // Word
|
#define GER_SRCCLIP_X 0x2148 // Word
|
||||||
#define GER_SRCCLIP_Y 0x214A // Word
|
#define GER_SRCCLIP_Y 0x214A // Word
|
||||||
#define GER_DSTCLIP_XY 0x214C
|
#define GER_DSTCLIP_XY 0x214C
|
||||||
#define GER_DSTCLIP_X 0x214C // Word
|
#define GER_DSTCLIP_X 0x214C // Word
|
||||||
#define GER_DSTCLIP_Y 0x214E // Word
|
#define GER_DSTCLIP_Y 0x214E // Word
|
||||||
*/
|
*/
|
||||||
|
|
||||||
READ8_MEMBER(trident_vga_device::accel_r)
|
READ8_MEMBER(trident_vga_device::accel_r)
|
||||||
|
|||||||
@ -144,7 +144,7 @@ WRITE16_MEMBER(md_rom_ggenie_device::write)
|
|||||||
|
|
||||||
//printf("mode %X\n", data);
|
//printf("mode %X\n", data);
|
||||||
//for (int i = 0; i < 6; i++)
|
//for (int i = 0; i < 6; i++)
|
||||||
// printf("addr %d = 0x%X - data 0x%X\n", i, m_gg_addr[i], m_gg_data[i]);
|
// printf("addr %d = 0x%X - data 0x%X\n", i, m_gg_addr[i], m_gg_data[i]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else if (offset == 1)
|
else if (offset == 1)
|
||||||
|
|||||||
@ -164,7 +164,7 @@ msx_cart_fsfd1::msx_cart_fsfd1(const machine_config &mconfig, const char *tag, d
|
|||||||
|
|
||||||
|
|
||||||
msx_cart_fscf351::msx_cart_fscf351(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
msx_cart_fscf351::msx_cart_fscf351(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||||
: msx_cart_disk_type2(mconfig, MSX_CART_FSCF351, "MSX Cartridge - FS-CF351", tag, owner, clock, "msx_cart_fscf351")
|
: msx_cart_disk_type2(mconfig, MSX_CART_FSCF351, "MSX Cartridge - FS-CF351", tag, owner, clock, "msx_cart_fscf351")
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -624,4 +624,3 @@ WRITE8_MEMBER(msx_cart_fsfd1a::write_cart)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -809,4 +809,3 @@ WRITE8_MEMBER(msx_slot_disk6_device::write)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -273,16 +273,16 @@ WRITE8_MEMBER(nes_disksys_device::write_ex)
|
|||||||
case 0x06:
|
case 0x06:
|
||||||
// external connector
|
// external connector
|
||||||
break;
|
break;
|
||||||
case 0x60: // $4080 - Volume envelope - read through $4090
|
case 0x60: // $4080 - Volume envelope - read through $4090
|
||||||
case 0x62: // $4082 - Frequency low
|
case 0x62: // $4082 - Frequency low
|
||||||
case 0x63: // $4083 - Frequency high
|
case 0x63: // $4083 - Frequency high
|
||||||
case 0x64: // $4084 - Mod envelope - read through $4092
|
case 0x64: // $4084 - Mod envelope - read through $4092
|
||||||
case 0x65: // $4085 - Mod counter
|
case 0x65: // $4085 - Mod counter
|
||||||
case 0x66: // $4086 - Mod frequency low
|
case 0x66: // $4086 - Mod frequency low
|
||||||
case 0x67: // $4087 - Mod frequency high
|
case 0x67: // $4087 - Mod frequency high
|
||||||
case 0x68: // $4088 - Mod table write
|
case 0x68: // $4088 - Mod table write
|
||||||
case 0x69: // $4089 - Wave write / master volume
|
case 0x69: // $4089 - Wave write / master volume
|
||||||
case 0x6a: // $408a - Envelope speed
|
case 0x6a: // $408a - Envelope speed
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -355,8 +355,8 @@ READ8_MEMBER(nes_disksys_device::read_ex)
|
|||||||
// $4033 - external connector (bits 0-6) + battery status (bit 7)
|
// $4033 - external connector (bits 0-6) + battery status (bit 7)
|
||||||
ret = 0x80;
|
ret = 0x80;
|
||||||
break;
|
break;
|
||||||
case 0x70: // $4090 - Volume gain - write through $4080
|
case 0x70: // $4090 - Volume gain - write through $4080
|
||||||
case 0x72: // $4092 - Mod gain - read through $4084
|
case 0x72: // $4092 - Mod gain - read through $4084
|
||||||
default:
|
default:
|
||||||
ret = 0x00;
|
ret = 0x00;
|
||||||
break;
|
break;
|
||||||
@ -381,7 +381,7 @@ void nes_disksys_device::device_timer(emu_timer &timer, device_timer_id id, int
|
|||||||
m_maincpu->set_input_line(M6502_IRQ_LINE, HOLD_LINE);
|
m_maincpu->set_input_line(M6502_IRQ_LINE, HOLD_LINE);
|
||||||
m_irq_enable = 0;
|
m_irq_enable = 0;
|
||||||
m_fds_status0 |= 0x01;
|
m_fds_status0 |= 0x01;
|
||||||
m_irq_count_latch = 0; // used in Kaettekita Mario Bros
|
m_irq_count_latch = 0; // used in Kaettekita Mario Bros
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -430,4 +430,3 @@ void nes_disksys_device::unload_disk(device_image_interface &image)
|
|||||||
/* TODO: should write out changes here as well */
|
/* TODO: should write out changes here as well */
|
||||||
m_fds_sides = 0;
|
m_fds_sides = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -674,7 +674,7 @@ void device_nes_cart_interface::pcb_start(running_machine &machine, UINT8 *ciram
|
|||||||
// main NES CPU here, even if it does not belong to this device.
|
// main NES CPU here, even if it does not belong to this device.
|
||||||
m_maincpu = machine.device<cpu_device>("maincpu");
|
m_maincpu = machine.device<cpu_device>("maincpu");
|
||||||
|
|
||||||
if (cart_mounted) // disksys expansion can arrive here without the memory banks!
|
if (cart_mounted) // disksys expansion can arrive here without the memory banks!
|
||||||
{
|
{
|
||||||
// Setup PRG
|
// Setup PRG
|
||||||
m_prg_bank_mem[0] = machine.root_device().membank("prg0");
|
m_prg_bank_mem[0] = machine.root_device().membank("prg0");
|
||||||
|
|||||||
@ -12,9 +12,8 @@
|
|||||||
|
|
||||||
class o2_chess_device : public o2_rom_device
|
class o2_chess_device : public o2_rom_device
|
||||||
{
|
{
|
||||||
|
|
||||||
virtual machine_config_constructor device_mconfig_additions() const;
|
virtual machine_config_constructor device_mconfig_additions() const;
|
||||||
// virtual const rom_entry *device_rom_region() const;
|
// virtual const rom_entry *device_rom_region() const;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
// construction/destruction
|
// construction/destruction
|
||||||
|
|||||||
@ -94,4 +94,3 @@ READ8_MEMBER(o2_rom16_device::read_rom0c)
|
|||||||
{
|
{
|
||||||
return m_rom[offset + 0xc00 + (m_bank_base & 0x03) * 0x1000];
|
return m_rom[offset + 0xc00 + (m_bank_base & 0x03) * 0x1000];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -278,4 +278,3 @@ SLOT_INTERFACE_START(o2_cart)
|
|||||||
SLOT_INTERFACE_INTERNAL("o2_chess", O2_ROM_CHESS)
|
SLOT_INTERFACE_INTERNAL("o2_chess", O2_ROM_CHESS)
|
||||||
SLOT_INTERFACE_INTERNAL("o2_voice", O2_ROM_VOICE)
|
SLOT_INTERFACE_INTERNAL("o2_voice", O2_ROM_VOICE)
|
||||||
SLOT_INTERFACE_END
|
SLOT_INTERFACE_END
|
||||||
|
|
||||||
|
|||||||
@ -92,7 +92,7 @@ public:
|
|||||||
virtual DECLARE_WRITE8_MEMBER(io_write);
|
virtual DECLARE_WRITE8_MEMBER(io_write);
|
||||||
virtual DECLARE_READ8_MEMBER(t0_read) { if (m_cart) return m_cart->t0_read(space, offset); else return 0; }
|
virtual DECLARE_READ8_MEMBER(t0_read) { if (m_cart) return m_cart->t0_read(space, offset); else return 0; }
|
||||||
|
|
||||||
virtual void write_bank(int bank) { if (m_cart) m_cart->write_bank(bank); }
|
virtual void write_bank(int bank) { if (m_cart) m_cart->write_bank(bank); }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
|
|
||||||
@ -114,8 +114,7 @@ extern const device_type O2_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_O2_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_O2_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, O2_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, O2_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
|
|
||||||
SLOT_INTERFACE_EXTERN(o2_cart);
|
SLOT_INTERFACE_EXTERN(o2_cart);
|
||||||
|
|
||||||
|
|||||||
@ -27,7 +27,7 @@ public:
|
|||||||
virtual DECLARE_READ8_MEMBER(read_rom04) { if (m_subslot->exists()) return m_subslot->read_rom04(space, offset); else return 0xff; }
|
virtual DECLARE_READ8_MEMBER(read_rom04) { if (m_subslot->exists()) return m_subslot->read_rom04(space, offset); else return 0xff; }
|
||||||
virtual DECLARE_READ8_MEMBER(read_rom0c) { if (m_subslot->exists()) return m_subslot->read_rom0c(space, offset); else return 0xff; }
|
virtual DECLARE_READ8_MEMBER(read_rom0c) { if (m_subslot->exists()) return m_subslot->read_rom0c(space, offset); else return 0xff; }
|
||||||
|
|
||||||
virtual void write_bank(int bank) { if (m_subslot->exists()) m_subslot->write_bank(bank); }
|
virtual void write_bank(int bank) { if (m_subslot->exists()) m_subslot->write_bank(bank); }
|
||||||
|
|
||||||
DECLARE_WRITE_LINE_MEMBER(lrq_callback);
|
DECLARE_WRITE_LINE_MEMBER(lrq_callback);
|
||||||
DECLARE_WRITE8_MEMBER(io_write);
|
DECLARE_WRITE8_MEMBER(io_write);
|
||||||
|
|||||||
@ -65,4 +65,3 @@ DECLARE_WRITE_LINE_MEMBER( pet_userport_cb2_sound_device::input_m )
|
|||||||
{
|
{
|
||||||
m_dac->write_unsigned8(state ? 0xff : 0x00);
|
m_dac->write_unsigned8(state ? 0xff : 0x00);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -93,7 +93,7 @@ void jvc_xvd701_device::send_response()
|
|||||||
{
|
{
|
||||||
if (m_response_index < sizeof(m_response) && is_transmit_register_empty())
|
if (m_response_index < sizeof(m_response) && is_transmit_register_empty())
|
||||||
{
|
{
|
||||||
// printf("sending %02x\n", m_response[m_response_index]);
|
// printf("sending %02x\n", m_response[m_response_index]);
|
||||||
transmit_register_setup(m_response[m_response_index++]);
|
transmit_register_setup(m_response[m_response_index++]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -115,7 +115,7 @@ void jvc_xvd701_device::rcv_complete()
|
|||||||
// printf("xvd701");
|
// printf("xvd701");
|
||||||
|
|
||||||
//for (int i = 0; i < sizeof(m_command); i++)
|
//for (int i = 0; i < sizeof(m_command); i++)
|
||||||
// printf(" %02x", m_command[i]);
|
// printf(" %02x", m_command[i]);
|
||||||
|
|
||||||
//printf("\n");
|
//printf("\n");
|
||||||
|
|
||||||
|
|||||||
@ -317,4 +317,3 @@ WRITE8_MEMBER(scv_cart_slot_device::write_bank)
|
|||||||
if (m_cart)
|
if (m_cart)
|
||||||
m_cart->write_bank(space, offset, data);
|
m_cart->write_bank(space, offset, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -42,7 +42,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_ram_size() { return m_ram.count(); }
|
UINT32 get_ram_size() { return m_ram.count(); }
|
||||||
|
|
||||||
void save_ram() { device().save_item(NAME(m_ram)); }
|
void save_ram() { device().save_item(NAME(m_ram)); }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// internal state
|
// internal state
|
||||||
@ -75,7 +75,7 @@ public:
|
|||||||
int get_type() { return m_type; }
|
int get_type() { return m_type; }
|
||||||
int get_cart_type(UINT8 *ROM, UINT32 len);
|
int get_cart_type(UINT8 *ROM, UINT32 len);
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -115,6 +115,5 @@ extern const device_type SCV_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_SCV_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_SCV_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, SCV_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, SCV_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -752,7 +752,7 @@ READ8_MEMBER(sega8_4pak_device::read_cart)
|
|||||||
{
|
{
|
||||||
int bank = offset / 0x4000;
|
int bank = offset / 0x4000;
|
||||||
|
|
||||||
return m_rom[m_rom_bank_base[bank] * 0x4000 + (offset & 0x3fff)];
|
return m_rom[m_rom_bank_base[bank] * 0x4000 + (offset & 0x3fff)];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -873,4 +873,3 @@ SLOT_INTERFACE_START(gg_cart)
|
|||||||
SLOT_INTERFACE_INTERNAL("codemasters", SEGA8_ROM_CODEMASTERS)
|
SLOT_INTERFACE_INTERNAL("codemasters", SEGA8_ROM_CODEMASTERS)
|
||||||
SLOT_INTERFACE_INTERNAL("mgear", SEGA8_ROM_MGEAR)
|
SLOT_INTERFACE_INTERNAL("mgear", SEGA8_ROM_MGEAR)
|
||||||
SLOT_INTERFACE_END
|
SLOT_INTERFACE_END
|
||||||
|
|
||||||
|
|||||||
@ -121,7 +121,7 @@ public:
|
|||||||
int verify_cart(UINT8 *magic, int size);
|
int verify_cart(UINT8 *magic, int size);
|
||||||
void set_lphaser_xoffset(UINT8 *rom, int size);
|
void set_lphaser_xoffset(UINT8 *rom, int size);
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
void set_mandatory(bool val) { m_must_be_loaded = val; }
|
void set_mandatory(bool val) { m_must_be_loaded = val; }
|
||||||
void set_intf(const char * interface) { m_interface = interface; }
|
void set_intf(const char * interface) { m_interface = interface; }
|
||||||
|
|||||||
@ -45,11 +45,11 @@ const device_type SMS_GRAPHIC = &device_creator<sms_graphic_device>;
|
|||||||
|
|
||||||
|
|
||||||
static INPUT_PORTS_START( sms_graphic )
|
static INPUT_PORTS_START( sms_graphic )
|
||||||
PORT_START("BUTTONS")
|
PORT_START("BUTTONS")
|
||||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // MENU
|
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // MENU
|
||||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // DO
|
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // DO
|
||||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) // PEN
|
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) // PEN
|
||||||
PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNUSED )
|
PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||||
|
|
||||||
PORT_START("X")
|
PORT_START("X")
|
||||||
PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_X) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(15)
|
PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_X) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(15)
|
||||||
@ -110,8 +110,8 @@ UINT8 sms_graphic_device::peripheral_r()
|
|||||||
{
|
{
|
||||||
case 0: // Initial state / "I am a board"
|
case 0: // Initial state / "I am a board"
|
||||||
// If any regular button is pressed raise/lower TL ?
|
// If any regular button is pressed raise/lower TL ?
|
||||||
// if ((m_buttons->read() & 0x07) != 0x07)
|
// if ((m_buttons->read() & 0x07) != 0x07)
|
||||||
// return 0xf0;
|
// return 0xf0;
|
||||||
return 0xd0;
|
return 0xd0;
|
||||||
|
|
||||||
case 1: // Read buttons (active low)
|
case 1: // Read buttons (active low)
|
||||||
@ -155,4 +155,3 @@ void sms_graphic_device::peripheral_w(UINT8 data)
|
|||||||
|
|
||||||
m_previous_write = data;
|
m_previous_write = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -125,8 +125,8 @@ public:
|
|||||||
UINT32 get_rtc_ram_size() { return m_rtc_ram.count(); };
|
UINT32 get_rtc_ram_size() { return m_rtc_ram.count(); };
|
||||||
|
|
||||||
void rom_map_setup(UINT32 size);
|
void rom_map_setup(UINT32 size);
|
||||||
void save_nvram() { device().save_item(NAME(m_nvram)); }
|
void save_nvram() { device().save_item(NAME(m_nvram)); }
|
||||||
void save_rtc_ram() { device().save_item(NAME(m_rtc_ram)); }
|
void save_rtc_ram() { device().save_item(NAME(m_rtc_ram)); }
|
||||||
|
|
||||||
// internal state
|
// internal state
|
||||||
UINT8 *m_rom;
|
UINT8 *m_rom;
|
||||||
@ -166,7 +166,7 @@ public:
|
|||||||
void setup_nvram();
|
void setup_nvram();
|
||||||
void internal_header_logging(UINT8 *ROM, UINT32 len);
|
void internal_header_logging(UINT8 *ROM, UINT32 len);
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram();
|
void save_ram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram();
|
||||||
if (m_cart && m_cart->get_rtc_ram_size()) m_cart->save_rtc_ram(); }
|
if (m_cart && m_cart->get_rtc_ram_size()) m_cart->save_rtc_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
|
|||||||
@ -37,7 +37,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_eeprom_size() { return m_eeprom.count(); }
|
UINT32 get_eeprom_size() { return m_eeprom.count(); }
|
||||||
|
|
||||||
void save_eeprom() { device().save_item(NAME(m_eeprom)); }
|
void save_eeprom() { device().save_item(NAME(m_eeprom)); }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// internal state
|
// internal state
|
||||||
@ -71,7 +71,7 @@ public:
|
|||||||
int get_type() { return m_type; }
|
int get_type() { return m_type; }
|
||||||
int get_cart_type(UINT8 *ROM, UINT32 len);
|
int get_cart_type(UINT8 *ROM, UINT32 len);
|
||||||
|
|
||||||
void save_eeprom() { if (m_cart && m_cart->get_eeprom_size()) m_cart->save_eeprom(); }
|
void save_eeprom() { if (m_cart && m_cart->get_eeprom_size()) m_cart->save_eeprom(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -111,6 +111,5 @@ extern const device_type VBOY_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_VBOY_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_VBOY_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, VBOY_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, VBOY_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -294,5 +294,3 @@ WRITE8_MEMBER(vc4000_cart_slot_device::write_ram)
|
|||||||
if (m_cart)
|
if (m_cart)
|
||||||
m_cart->write_ram(space, offset, data);
|
m_cart->write_ram(space, offset, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -39,7 +39,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_ram_size() { return m_ram.count(); }
|
UINT32 get_ram_size() { return m_ram.count(); }
|
||||||
|
|
||||||
void save_ram() { device().save_item(NAME(m_ram)); }
|
void save_ram() { device().save_item(NAME(m_ram)); }
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// internal state
|
// internal state
|
||||||
@ -71,7 +71,7 @@ public:
|
|||||||
|
|
||||||
int get_type() { return m_type; }
|
int get_type() { return m_type; }
|
||||||
|
|
||||||
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
void save_ram() { if (m_cart && m_cart->get_ram_size()) m_cart->save_ram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -112,6 +112,5 @@ extern const device_type VC4000_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_VC4000_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_VC4000_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, VC4000_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, VC4000_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -279,4 +279,3 @@ DIRECT_UPDATE_MEMBER(a26_rom_dpc_device::cart_opbase)
|
|||||||
}
|
}
|
||||||
return address;
|
return address;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -19,7 +19,7 @@ struct df_t {
|
|||||||
UINT8 osc_clk; /* Only used by data fetchers 5,6, and 7 */
|
UINT8 osc_clk; /* Only used by data fetchers 5,6, and 7 */
|
||||||
};
|
};
|
||||||
|
|
||||||
// m_dpc.oscillator = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(a2600_state::modeDPC_timer_callback),this));
|
// m_dpc.oscillator = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(a2600_state::modeDPC_timer_callback),this));
|
||||||
|
|
||||||
class dpc_device : public device_t
|
class dpc_device : public device_t
|
||||||
{
|
{
|
||||||
@ -83,7 +83,7 @@ public:
|
|||||||
virtual void setup_addon_ptr(UINT8 *ptr);
|
virtual void setup_addon_ptr(UINT8 *ptr);
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
// int m_reset_bank;
|
// int m_reset_bank;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -62,13 +62,13 @@ a26_rom_4k_device::a26_rom_4k_device(const machine_config &mconfig, const char *
|
|||||||
|
|
||||||
a26_rom_f6_device::a26_rom_f6_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
a26_rom_f6_device::a26_rom_f6_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
||||||
: a26_rom_2k_device(mconfig, type, name, tag, owner, clock, shortname, source),
|
: a26_rom_2k_device(mconfig, type, name, tag, owner, clock, shortname, source),
|
||||||
m_base_bank(-1) // set to -1 to help the Xin1 multicart...
|
m_base_bank(-1) // set to -1 to help the Xin1 multicart...
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
a26_rom_f6_device::a26_rom_f6_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
a26_rom_f6_device::a26_rom_f6_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||||
: a26_rom_2k_device(mconfig, A26_ROM_F6, "Atari VCS 2600 ROM Carts w/F6 bankswitch", tag, owner, clock, "vcs_f6", __FILE__),
|
: a26_rom_2k_device(mconfig, A26_ROM_F6, "Atari VCS 2600 ROM Carts w/F6 bankswitch", tag, owner, clock, "vcs_f6", __FILE__),
|
||||||
m_base_bank(-1) // set to -1 to help the Xin1 multicart...
|
m_base_bank(-1) // set to -1 to help the Xin1 multicart...
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1046,4 +1046,3 @@ READ8_MEMBER(a26_rom_32in1_device::read_rom)
|
|||||||
{
|
{
|
||||||
return m_rom[(offset & 0x7ff) + (m_base_bank * 0x800)];
|
return m_rom[(offset & 0x7ff) + (m_base_bank * 0x800)];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -21,7 +21,7 @@
|
|||||||
- Audio input register [0x1ff9]
|
- Audio input register [0x1ff9]
|
||||||
|
|
||||||
7 0
|
7 0
|
||||||
---------
|
---------
|
||||||
1FF9: 0000 000A
|
1FF9: 0000 000A
|
||||||
|
|
||||||
A: Supercharger audio data. 0 = low input, 1 = high input.
|
A: Supercharger audio data. 0 = low input, 1 = high input.
|
||||||
@ -83,8 +83,8 @@ static MACHINE_CONFIG_FRAGMENT( a26_ss )
|
|||||||
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED)
|
MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED)
|
||||||
MCFG_CASSETTE_INTERFACE("a2600_cass")
|
MCFG_CASSETTE_INTERFACE("a2600_cass")
|
||||||
|
|
||||||
// MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
|
// MCFG_SOUND_WAVE_ADD(WAVE_TAG, "cassette")
|
||||||
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
// MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
|
||||||
MACHINE_CONFIG_END
|
MACHINE_CONFIG_END
|
||||||
|
|
||||||
machine_config_constructor a26_rom_ss_device::device_mconfig_additions() const
|
machine_config_constructor a26_rom_ss_device::device_mconfig_additions() const
|
||||||
|
|||||||
@ -18,7 +18,7 @@ enum
|
|||||||
A26_F8SW,
|
A26_F8SW,
|
||||||
A26_FA,
|
A26_FA,
|
||||||
A26_FE,
|
A26_FE,
|
||||||
A26_3E, // to test
|
A26_3E, // to test
|
||||||
A26_3F,
|
A26_3F,
|
||||||
A26_E0,
|
A26_E0,
|
||||||
A26_E7,
|
A26_E7,
|
||||||
@ -26,7 +26,7 @@ enum
|
|||||||
A26_DC,
|
A26_DC,
|
||||||
A26_CV,
|
A26_CV,
|
||||||
A26_FV,
|
A26_FV,
|
||||||
A26_JVP, // to test
|
A26_JVP, // to test
|
||||||
A26_32IN1,
|
A26_32IN1,
|
||||||
A26_8IN1,
|
A26_8IN1,
|
||||||
A26_4IN1,
|
A26_4IN1,
|
||||||
|
|||||||
@ -278,5 +278,3 @@ WRITE8_MEMBER(vectrex_cart_slot_device::write_bank)
|
|||||||
if (m_cart)
|
if (m_cart)
|
||||||
m_cart->write_bank(space, offset, data);
|
m_cart->write_bank(space, offset, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -111,6 +111,5 @@ extern const device_type VECTREX_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_VECTREX_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_VECTREX_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, VECTREX_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, VECTREX_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -11,11 +11,11 @@
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
TODO:
|
TODO:
|
||||||
|
|
||||||
- fe3diag register error#2 hp=5592 (same error in VICE)
|
- fe3diag register error#2 hp=5592 (same error in VICE)
|
||||||
- SD card
|
- SD card
|
||||||
- RTC
|
- RTC
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -32,25 +32,25 @@
|
|||||||
#define ATF1504AS_TAG "ic4"
|
#define ATF1504AS_TAG "ic4"
|
||||||
|
|
||||||
#define REG1_BANK \
|
#define REG1_BANK \
|
||||||
((m_reg1 & 0x7f) << 15)
|
((m_reg1 & 0x7f) << 15)
|
||||||
|
|
||||||
#define LORAM_HIDDEN \
|
#define LORAM_HIDDEN \
|
||||||
(m_reg2 & REG2_BLK0)
|
(m_reg2 & REG2_BLK0)
|
||||||
|
|
||||||
#define BLK1_HIDDEN \
|
#define BLK1_HIDDEN \
|
||||||
(m_reg2 & REG2_BLK1)
|
(m_reg2 & REG2_BLK1)
|
||||||
|
|
||||||
#define BLK2_HIDDEN \
|
#define BLK2_HIDDEN \
|
||||||
(m_reg2 & REG2_BLK2)
|
(m_reg2 & REG2_BLK2)
|
||||||
|
|
||||||
#define BLK3_HIDDEN \
|
#define BLK3_HIDDEN \
|
||||||
(m_reg2 & REG2_BLK3)
|
(m_reg2 & REG2_BLK3)
|
||||||
|
|
||||||
#define BLK5_HIDDEN \
|
#define BLK5_HIDDEN \
|
||||||
(m_reg2 & REG2_BLK5)
|
(m_reg2 & REG2_BLK5)
|
||||||
|
|
||||||
#define REGISTERS_HIDDEN \
|
#define REGISTERS_HIDDEN \
|
||||||
((m_lockbit && ((m_reg1 & REG1_MODE_MASK) == REG1_START)) || (m_reg2 & REG2_IO3))
|
((m_lockbit && ((m_reg1 & REG1_MODE_MASK) == REG1_START)) || (m_reg2 & REG2_IO3))
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -27,7 +27,7 @@
|
|||||||
// ======================> vic20_final_expansion_3_t
|
// ======================> vic20_final_expansion_3_t
|
||||||
|
|
||||||
class vic20_final_expansion_3_t : public device_t,
|
class vic20_final_expansion_3_t : public device_t,
|
||||||
public device_vic20_expansion_card_interface
|
public device_vic20_expansion_card_interface
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
// construction/destruction
|
// construction/destruction
|
||||||
|
|||||||
@ -377,20 +377,20 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
|
|||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
case 0x06: /* EEPROM address lower bits port/EEPROM address and command port
|
case 0x06: /* EEPROM address lower bits port/EEPROM address and command port
|
||||||
1KBit EEPROM:
|
1KBit EEPROM:
|
||||||
Bit 0-5 - EEPROM address bit 1-6
|
Bit 0-5 - EEPROM address bit 1-6
|
||||||
Bit 6-7 - Command
|
Bit 6-7 - Command
|
||||||
00 - Extended command address bit 4-5:
|
00 - Extended command address bit 4-5:
|
||||||
00 - Write disable
|
00 - Write disable
|
||||||
01 - Write all
|
01 - Write all
|
||||||
10 - Erase all
|
10 - Erase all
|
||||||
11 - Write enable
|
11 - Write enable
|
||||||
01 - Write
|
01 - Write
|
||||||
10 - Read
|
10 - Read
|
||||||
11 - Erase
|
11 - Erase
|
||||||
16KBit EEPROM:
|
16KBit EEPROM:
|
||||||
Bit 0-7 - EEPROM address bit 1-8
|
Bit 0-7 - EEPROM address bit 1-8
|
||||||
*/
|
*/
|
||||||
switch (m_eeprom_mode)
|
switch (m_eeprom_mode)
|
||||||
{
|
{
|
||||||
case EEPROM_1K:
|
case EEPROM_1K:
|
||||||
@ -412,23 +412,23 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x07: /* EEPROM higher bits/command bits port
|
case 0x07: /* EEPROM higher bits/command bits port
|
||||||
1KBit EEPROM:
|
1KBit EEPROM:
|
||||||
Bit 0 - Start
|
Bit 0 - Start
|
||||||
Bit 1-7 - Unknown
|
Bit 1-7 - Unknown
|
||||||
16KBit EEPROM:
|
16KBit EEPROM:
|
||||||
Bit 0-1 - EEPROM address bit 9-10
|
Bit 0-1 - EEPROM address bit 9-10
|
||||||
Bit 2-3 - Command
|
Bit 2-3 - Command
|
||||||
00 - Extended command address bit 0-1:
|
00 - Extended command address bit 0-1:
|
||||||
00 - Write disable
|
00 - Write disable
|
||||||
01 - Write all
|
01 - Write all
|
||||||
10 - Erase all
|
10 - Erase all
|
||||||
11 - Write enable
|
11 - Write enable
|
||||||
01 - Write
|
01 - Write
|
||||||
10 - Read
|
10 - Read
|
||||||
11 - Erase
|
11 - Erase
|
||||||
Bit 4 - Start
|
Bit 4 - Start
|
||||||
Bit 5-7 - Unknown
|
Bit 5-7 - Unknown
|
||||||
*/
|
*/
|
||||||
switch (m_eeprom_mode)
|
switch (m_eeprom_mode)
|
||||||
{
|
{
|
||||||
case EEPROM_1K:
|
case EEPROM_1K:
|
||||||
@ -458,18 +458,18 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x08: /* EEPROM command
|
case 0x08: /* EEPROM command
|
||||||
Bit 0 - Read complete (read only)
|
Bit 0 - Read complete (read only)
|
||||||
Bit 1 - Write complete (read only)
|
Bit 1 - Write complete (read only)
|
||||||
Bit 2-3 - Unknown
|
Bit 2-3 - Unknown
|
||||||
Bit 4 - Read
|
Bit 4 - Read
|
||||||
Bit 5 - Write
|
Bit 5 - Write
|
||||||
Bit 6 - Protect
|
Bit 6 - Protect
|
||||||
Bit 7 - Initialize
|
Bit 7 - Initialize
|
||||||
*/
|
*/
|
||||||
if (data & 0x80) // Initialize
|
if (data & 0x80) // Initialize
|
||||||
logerror("Unsupported EEPROM command 'Initialize'\n");
|
logerror("Unsupported EEPROM command 'Initialize'\n");
|
||||||
|
|
||||||
if (data & 0x40) // Protect
|
if (data & 0x40) // Protect
|
||||||
{
|
{
|
||||||
switch (m_eeprom_command)
|
switch (m_eeprom_command)
|
||||||
{
|
{
|
||||||
@ -487,7 +487,7 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (data & 0x20) // Write
|
if (data & 0x20) // Write
|
||||||
{
|
{
|
||||||
if (m_eeprom_write_enabled)
|
if (m_eeprom_write_enabled)
|
||||||
{
|
{
|
||||||
@ -505,7 +505,7 @@ WRITE8_MEMBER(ws_rom_eeprom_device::write_io)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (data & 0x10) // Read
|
if (data & 0x10) // Read
|
||||||
{
|
{
|
||||||
m_io_regs[0x04] = m_nvram[(m_eeprom_address << 1) + 1];
|
m_io_regs[0x04] = m_nvram[(m_eeprom_address << 1) + 1];
|
||||||
m_io_regs[0x05] = m_nvram[m_eeprom_address << 1];
|
m_io_regs[0x05] = m_nvram[m_eeprom_address << 1];
|
||||||
|
|||||||
@ -261,35 +261,35 @@ int ws_cart_slot_device::get_cart_type(UINT8 *ROM, UINT32 len, UINT32 &nvram_len
|
|||||||
{
|
{
|
||||||
case 0x00:
|
case 0x00:
|
||||||
break;
|
break;
|
||||||
case 0x01: // SRAM 64Kbit
|
case 0x01: // SRAM 64Kbit
|
||||||
type = WS_SRAM;
|
type = WS_SRAM;
|
||||||
nvram_len = 0x2000;
|
nvram_len = 0x2000;
|
||||||
break;
|
break;
|
||||||
case 0x02: // SRAM 256Kbit
|
case 0x02: // SRAM 256Kbit
|
||||||
type = WS_SRAM;
|
type = WS_SRAM;
|
||||||
nvram_len = 0x8000;
|
nvram_len = 0x8000;
|
||||||
break;
|
break;
|
||||||
case 0x05: // SRAM 512Kbit
|
case 0x05: // SRAM 512Kbit
|
||||||
type = WS_SRAM;
|
type = WS_SRAM;
|
||||||
nvram_len = 0x10000;
|
nvram_len = 0x10000;
|
||||||
break;
|
break;
|
||||||
case 0x03: // SRAM 1Mbit
|
case 0x03: // SRAM 1Mbit
|
||||||
type = WS_SRAM;
|
type = WS_SRAM;
|
||||||
nvram_len = 0x20000;
|
nvram_len = 0x20000;
|
||||||
break;
|
break;
|
||||||
case 0x04: // SRAM 2Mbit
|
case 0x04: // SRAM 2Mbit
|
||||||
type = WS_SRAM;
|
type = WS_SRAM;
|
||||||
nvram_len = 0x40000;
|
nvram_len = 0x40000;
|
||||||
break;
|
break;
|
||||||
case 0x10: // EEPROM 1Kbit
|
case 0x10: // EEPROM 1Kbit
|
||||||
type = WS_EEPROM;
|
type = WS_EEPROM;
|
||||||
nvram_len = 0x80;
|
nvram_len = 0x80;
|
||||||
break;
|
break;
|
||||||
case 0x50: // EEPROM 8Kbit
|
case 0x50: // EEPROM 8Kbit
|
||||||
type = WS_EEPROM;
|
type = WS_EEPROM;
|
||||||
nvram_len = 0x400;
|
nvram_len = 0x400;
|
||||||
break;
|
break;
|
||||||
case 0x20: // EEPROM 16Kbit
|
case 0x20: // EEPROM 16Kbit
|
||||||
type = WS_EEPROM;
|
type = WS_EEPROM;
|
||||||
nvram_len = 0x800;
|
nvram_len = 0x800;
|
||||||
break;
|
break;
|
||||||
@ -427,7 +427,7 @@ void ws_cart_slot_device::internal_header_logging(UINT8 *ROM, UINT32 offs, UINT3
|
|||||||
int sum = 0, banks = len / 0x10000;
|
int sum = 0, banks = len / 0x10000;
|
||||||
UINT8 romsize, ramtype, ramsize;
|
UINT8 romsize, ramtype, ramsize;
|
||||||
romsize = ROM[offs + 0xfffa];
|
romsize = ROM[offs + 0xfffa];
|
||||||
ramtype = (ROM[offs + 0xfffb] & 0xf0) ? 1 : 0; // 1 = EEPROM, 0 = SRAM
|
ramtype = (ROM[offs + 0xfffb] & 0xf0) ? 1 : 0; // 1 = EEPROM, 0 = SRAM
|
||||||
ramsize = ramtype ? ((ROM[offs + 0xfffb] & 0xf0) >> 4) : (ROM[offs + 0xfffb] & 0x0f);
|
ramsize = ramtype ? ((ROM[offs + 0xfffb] & 0xf0) >> 4) : (ROM[offs + 0xfffb] & 0x0f);
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -40,7 +40,7 @@ public:
|
|||||||
UINT32 get_rom_size() { return m_rom_size; }
|
UINT32 get_rom_size() { return m_rom_size; }
|
||||||
UINT32 get_nvram_size() { return m_nvram.count(); }
|
UINT32 get_nvram_size() { return m_nvram.count(); }
|
||||||
|
|
||||||
void save_nvram() { device().save_item(NAME(m_nvram)); }
|
void save_nvram() { device().save_item(NAME(m_nvram)); }
|
||||||
void set_has_rtc(bool val) { m_has_rtc = val; }
|
void set_has_rtc(bool val) { m_has_rtc = val; }
|
||||||
void set_is_rotated(bool val) { m_is_rotated = val; }
|
void set_is_rotated(bool val) { m_is_rotated = val; }
|
||||||
int get_is_rotated() { return m_is_rotated ? 1 : 0; }
|
int get_is_rotated() { return m_is_rotated ? 1 : 0; }
|
||||||
@ -81,7 +81,7 @@ public:
|
|||||||
int get_cart_type(UINT8 *ROM, UINT32 len, UINT32 &nvram_len);
|
int get_cart_type(UINT8 *ROM, UINT32 len, UINT32 &nvram_len);
|
||||||
void internal_header_logging(UINT8 *ROM, UINT32 offs, UINT32 len);
|
void internal_header_logging(UINT8 *ROM, UINT32 offs, UINT32 len);
|
||||||
|
|
||||||
void save_nvram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram(); }
|
void save_nvram() { if (m_cart && m_cart->get_nvram_size()) m_cart->save_nvram(); }
|
||||||
|
|
||||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||||
virtual bool is_readable() const { return 1; }
|
virtual bool is_readable() const { return 1; }
|
||||||
@ -125,6 +125,5 @@ extern const device_type WS_CART_SLOT;
|
|||||||
|
|
||||||
#define MCFG_WSWAN_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
#define MCFG_WSWAN_CARTRIDGE_ADD(_tag,_slot_intf,_def_slot) \
|
||||||
MCFG_DEVICE_ADD(_tag, WS_CART_SLOT, 0) \
|
MCFG_DEVICE_ADD(_tag, WS_CART_SLOT, 0) \
|
||||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false) \
|
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -106,13 +106,13 @@ const device_type DSP56156 = &device_creator<dsp56k_device>;
|
|||||||
* Internal Memory Maps
|
* Internal Memory Maps
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
static ADDRESS_MAP_START( dsp56156_program_map, AS_PROGRAM, 16, dsp56k_device )
|
static ADDRESS_MAP_START( dsp56156_program_map, AS_PROGRAM, 16, dsp56k_device )
|
||||||
AM_RANGE(0x0000,0x07ff) AM_READWRITE(program_r, program_w) /* 1-5 */
|
AM_RANGE(0x0000,0x07ff) AM_READWRITE(program_r, program_w) /* 1-5 */
|
||||||
// AM_RANGE(0x2f00,0x2fff) AM_ROM /* 1-5 PROM reserved memory. Is this the right spot for it? */
|
// AM_RANGE(0x2f00,0x2fff) AM_ROM /* 1-5 PROM reserved memory. Is this the right spot for it? */
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
static ADDRESS_MAP_START( dsp56156_x_data_map, AS_DATA, 16, dsp56k_device )
|
static ADDRESS_MAP_START( dsp56156_x_data_map, AS_DATA, 16, dsp56k_device )
|
||||||
AM_RANGE(0x0000,0x07ff) AM_RAM /* 1-5 */
|
AM_RANGE(0x0000,0x07ff) AM_RAM /* 1-5 */
|
||||||
AM_RANGE(0xffc0,0xffff) AM_READWRITE(peripheral_register_r, peripheral_register_w) /* 1-5 On-chip peripheral registers memory mapped in data space */
|
AM_RANGE(0xffc0,0xffff) AM_READWRITE(peripheral_register_r, peripheral_register_w) /* 1-5 On-chip peripheral registers memory mapped in data space */
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
|
|
||||||
@ -514,4 +514,3 @@ offs_t dsp56k_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
|
|||||||
extern CPU_DISASSEMBLE( dsp56k );
|
extern CPU_DISASSEMBLE( dsp56k );
|
||||||
return CPU_DISASSEMBLE_NAME(dsp56k)(this, buffer, pc, oprom, opram, options);
|
return CPU_DISASSEMBLE_NAME(dsp56k)(this, buffer, pc, oprom, opram, options);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -112,8 +112,8 @@ void mcs96_device::execute_run()
|
|||||||
{
|
{
|
||||||
internal_update(total_cycles());
|
internal_update(total_cycles());
|
||||||
|
|
||||||
// if(inst_substate)
|
// if(inst_substate)
|
||||||
// do_exec_partial();
|
// do_exec_partial();
|
||||||
|
|
||||||
while(icount > 0) {
|
while(icount > 0) {
|
||||||
while(icount > bcount) {
|
while(icount > bcount) {
|
||||||
@ -125,8 +125,8 @@ void mcs96_device::execute_run()
|
|||||||
}
|
}
|
||||||
while(bcount && icount <= bcount)
|
while(bcount && icount <= bcount)
|
||||||
internal_update(total_cycles() + icount - bcount);
|
internal_update(total_cycles() + icount - bcount);
|
||||||
// if(inst_substate)
|
// if(inst_substate)
|
||||||
// do_exec_partial();
|
// do_exec_partial();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -2483,7 +2483,7 @@ int mips3_device::generate_get_cop0_reg(drcuml_block *block, compiler_state *com
|
|||||||
void mips3_device::generate_badcop(drcuml_block *block, const int cop)
|
void mips3_device::generate_badcop(drcuml_block *block, const int cop)
|
||||||
{
|
{
|
||||||
UML_TEST(block, CPR032(COP0_Status), SR_COP0 << cop); // test [Status], SR_COP0 << cop
|
UML_TEST(block, CPR032(COP0_Status), SR_COP0 << cop); // test [Status], SR_COP0 << cop
|
||||||
UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], cop); // exh badcop,cop,Z
|
UML_EXHc(block, COND_Z, *m_exception[EXCEPTION_BADCOP], cop); // exh badcop,cop,Z
|
||||||
}
|
}
|
||||||
|
|
||||||
/*-------------------------------------------------------------------------
|
/*-------------------------------------------------------------------------
|
||||||
|
|||||||
@ -466,30 +466,30 @@ void rsp_device::device_start()
|
|||||||
m_regmap[regnum] = (regnum == 0) ? uml::parameter(0) : uml::parameter::make_memory(&m_rsp_state->r[regnum]);
|
m_regmap[regnum] = (regnum == 0) ? uml::parameter(0) : uml::parameter::make_memory(&m_rsp_state->r[regnum]);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
drcbe_info beinfo;
|
drcbe_info beinfo;
|
||||||
m_drcuml->get_backend_info(beinfo);
|
m_drcuml->get_backend_info(beinfo);
|
||||||
if (beinfo.direct_iregs > 2)
|
if (beinfo.direct_iregs > 2)
|
||||||
{
|
{
|
||||||
m_regmap[30] = I2;
|
m_regmap[30] = I2;
|
||||||
}
|
}
|
||||||
if (beinfo.direct_iregs > 3)
|
if (beinfo.direct_iregs > 3)
|
||||||
{
|
{
|
||||||
m_regmap[31] = I3;
|
m_regmap[31] = I3;
|
||||||
}
|
}
|
||||||
if (beinfo.direct_iregs > 4)
|
if (beinfo.direct_iregs > 4)
|
||||||
{
|
{
|
||||||
m_regmap[2] = I4;
|
m_regmap[2] = I4;
|
||||||
}
|
}
|
||||||
if (beinfo.direct_iregs > 5)
|
if (beinfo.direct_iregs > 5)
|
||||||
{
|
{
|
||||||
m_regmap[3] = I5;
|
m_regmap[3] = I5;
|
||||||
}
|
}
|
||||||
if (beinfo.direct_iregs > 6)
|
if (beinfo.direct_iregs > 6)
|
||||||
{
|
{
|
||||||
m_regmap[4] = I6;
|
m_regmap[4] = I6;
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* mark the cache dirty so it is updated on next execute */
|
/* mark the cache dirty so it is updated on next execute */
|
||||||
m_cache_dirty = TRUE;
|
m_cache_dirty = TRUE;
|
||||||
@ -870,7 +870,7 @@ void rsp_device::device_stop()
|
|||||||
}
|
}
|
||||||
if (m_drcfe )
|
if (m_drcfe )
|
||||||
{
|
{
|
||||||
auto_free(machine(), m_drcfe);
|
auto_free(machine(), m_drcfe);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3565,5 +3565,3 @@ void rsp_device::execute_run()
|
|||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -9029,4 +9029,3 @@ void rsp_device::log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 o
|
|||||||
block->append_comment("%08X: %s", pc, buffer); // comment
|
block->append_comment("%08X: %s", pc, buffer); // comment
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -3080,8 +3080,8 @@ void sh4_base_device::device_reset()
|
|||||||
|
|
||||||
inline void sh34_base_device::execute_one_0000(const UINT16 opcode)
|
inline void sh34_base_device::execute_one_0000(const UINT16 opcode)
|
||||||
{
|
{
|
||||||
switch(opcode & 0xff)
|
switch(opcode & 0xff)
|
||||||
{
|
{
|
||||||
// 0x00
|
// 0x00
|
||||||
case 0x00: NOP(opcode); break;
|
case 0x00: NOP(opcode); break;
|
||||||
case 0x10: NOP(opcode); break;
|
case 0x10: NOP(opcode); break;
|
||||||
|
|||||||
@ -2415,54 +2415,54 @@ TIMER_CALLBACK_MEMBER( tlcs90_device::t90_timer_callback )
|
|||||||
if ( (m_internal_registers[ T90_TRUN - T90_IOBASE ] & (1 << i)) == 0 )
|
if ( (m_internal_registers[ T90_TRUN - T90_IOBASE ] & (1 << i)) == 0 )
|
||||||
return;
|
return;
|
||||||
|
|
||||||
timer_fired = 0;
|
timer_fired = 0;
|
||||||
|
|
||||||
mode = (m_internal_registers[ T90_TMOD - T90_IOBASE ] >> ((i & ~1) + 2)) & 0x03;
|
mode = (m_internal_registers[ T90_TMOD - T90_IOBASE ] >> ((i & ~1) + 2)) & 0x03;
|
||||||
// Match
|
// Match
|
||||||
switch (mode)
|
switch (mode)
|
||||||
{
|
{
|
||||||
case 0x02: // 8bit PPG
|
case 0x02: // 8bit PPG
|
||||||
case 0x03: // 8bit PWM
|
case 0x03: // 8bit PWM
|
||||||
logerror("CPU Timer %d expired with unhandled mode %d\n", i, mode);
|
logerror("CPU Timer %d expired with unhandled mode %d\n", i, mode);
|
||||||
// TODO: hmm...
|
// TODO: hmm...
|
||||||
case 0x00: // 8bit
|
case 0x00: // 8bit
|
||||||
m_timer_value[i]++;
|
m_timer_value[i]++;
|
||||||
if ( m_timer_value[i] == m_internal_registers[ T90_TREG0+i - T90_IOBASE ] )
|
if ( m_timer_value[i] == m_internal_registers[ T90_TREG0+i - T90_IOBASE ] )
|
||||||
timer_fired = 1;
|
timer_fired = 1;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x01: // 16bit
|
case 0x01: // 16bit
|
||||||
if(i & 1)
|
if(i & 1)
|
||||||
break;
|
break;
|
||||||
m_timer_value[i]++;
|
m_timer_value[i]++;
|
||||||
if(m_timer_value[i] == 0) m_timer_value[i+1]++;
|
if(m_timer_value[i] == 0) m_timer_value[i+1]++;
|
||||||
if(m_timer_value[i+1] == m_internal_registers[ T90_TREG0+i+1 - T90_IOBASE ])
|
if(m_timer_value[i+1] == m_internal_registers[ T90_TREG0+i+1 - T90_IOBASE ])
|
||||||
if(m_timer_value[i] == m_internal_registers[ T90_TREG0+i - T90_IOBASE ])
|
if(m_timer_value[i] == m_internal_registers[ T90_TREG0+i - T90_IOBASE ])
|
||||||
timer_fired = 1;
|
timer_fired = 1;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if(timer_fired) {
|
if(timer_fired) {
|
||||||
// special stuff handling
|
// special stuff handling
|
||||||
switch(mode) {
|
switch(mode) {
|
||||||
case 0x02: // 8bit PPG
|
case 0x02: // 8bit PPG
|
||||||
case 0x03: // 8bit PWM
|
case 0x03: // 8bit PWM
|
||||||
// TODO: hmm...
|
// TODO: hmm...
|
||||||
case 0x00: // 8bit
|
case 0x00: // 8bit
|
||||||
if(i & 1)
|
if(i & 1)
|
||||||
break;
|
break;
|
||||||
if ( (m_internal_registers[ T90_TCLK - T90_IOBASE ] & (0x0C << (i * 2))) == 0 ) // T0/T1 match signal clocks T1/T3
|
if ( (m_internal_registers[ T90_TCLK - T90_IOBASE ] & (0x0C << (i * 2))) == 0 ) // T0/T1 match signal clocks T1/T3
|
||||||
t90_timer_callback(ptr, i+1);
|
t90_timer_callback(ptr, i+1);
|
||||||
break;
|
break;
|
||||||
case 0x01: // 16bit, only can happen for i=0,2
|
case 0x01: // 16bit, only can happen for i=0,2
|
||||||
m_timer_value[i+1] = 0;
|
m_timer_value[i+1] = 0;
|
||||||
set_irq_line(INTT0 + i+1, 1);
|
set_irq_line(INTT0 + i+1, 1);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
// regular handling
|
// regular handling
|
||||||
m_timer_value[i] = 0;
|
m_timer_value[i] = 0;
|
||||||
set_irq_line(INTT0 + i, 1);
|
set_irq_line(INTT0 + i, 1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
TIMER_CALLBACK_MEMBER( tlcs90_device::t90_timer4_callback )
|
TIMER_CALLBACK_MEMBER( tlcs90_device::t90_timer4_callback )
|
||||||
|
|||||||
@ -45,7 +45,7 @@ const device_type TMS32051 = &device_creator<tms32051_device>;
|
|||||||
**************************************************************************/
|
**************************************************************************/
|
||||||
|
|
||||||
static ADDRESS_MAP_START( internal_pgm, AS_PROGRAM, 16, tms32051_device )
|
static ADDRESS_MAP_START( internal_pgm, AS_PROGRAM, 16, tms32051_device )
|
||||||
// AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
|
// AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
|
||||||
AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
|
AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
|
||||||
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
|
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|||||||
@ -202,7 +202,7 @@ typedef device_delegate<void (screen_device &screen, bitmap_ind16 &bitmap, int s
|
|||||||
#define TMS340X0_SCANLINE_IND16_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params)
|
#define TMS340X0_SCANLINE_IND16_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params)
|
||||||
|
|
||||||
#define MCFG_TMS340X0_SCANLINE_IND16_CB(_class, _method) \
|
#define MCFG_TMS340X0_SCANLINE_IND16_CB(_class, _method) \
|
||||||
tms340x0_device::set_scanline_ind16_callback(*device, scanline_ind16_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
tms340x0_device::set_scanline_ind16_callback(*device, scanline_ind16_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
||||||
|
|
||||||
|
|
||||||
typedef device_delegate<void (screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params)> scanline_rgb32_cb_delegate;
|
typedef device_delegate<void (screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params)> scanline_rgb32_cb_delegate;
|
||||||
@ -210,7 +210,7 @@ typedef device_delegate<void (screen_device &screen, bitmap_rgb32 &bitmap, int s
|
|||||||
#define TMS340X0_SCANLINE_RGB32_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params)
|
#define TMS340X0_SCANLINE_RGB32_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params)
|
||||||
|
|
||||||
#define MCFG_TMS340X0_SCANLINE_RGB32_CB(_class, _method) \
|
#define MCFG_TMS340X0_SCANLINE_RGB32_CB(_class, _method) \
|
||||||
tms340x0_device::set_scanline_rgb32_callback(*device, scanline_rgb32_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
tms340x0_device::set_scanline_rgb32_callback(*device, scanline_rgb32_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
||||||
|
|
||||||
|
|
||||||
#define MCFG_TMS340X0_OUTPUT_INT_CB(_devcb) \
|
#define MCFG_TMS340X0_OUTPUT_INT_CB(_devcb) \
|
||||||
@ -222,7 +222,7 @@ typedef device_delegate<void (address_space &space, offs_t address, UINT16 *shif
|
|||||||
#define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, UINT16 *shiftreg)
|
#define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, UINT16 *shiftreg)
|
||||||
|
|
||||||
#define MCFG_TMS340X0_TO_SHIFTREG_CB(_class, _method) \
|
#define MCFG_TMS340X0_TO_SHIFTREG_CB(_class, _method) \
|
||||||
tms340x0_device::set_to_shiftreg_callback(*device, to_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
tms340x0_device::set_to_shiftreg_callback(*device, to_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
||||||
|
|
||||||
|
|
||||||
typedef device_delegate<void (address_space &space, offs_t address, UINT16 *shiftreg)> from_shiftreg_cb_delegate;
|
typedef device_delegate<void (address_space &space, offs_t address, UINT16 *shiftreg)> from_shiftreg_cb_delegate;
|
||||||
@ -230,7 +230,7 @@ typedef device_delegate<void (address_space &space, offs_t address, UINT16 *shif
|
|||||||
#define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, UINT16 *shiftreg)
|
#define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(address_space &space, offs_t address, UINT16 *shiftreg)
|
||||||
|
|
||||||
#define MCFG_TMS340X0_FROM_SHIFTREG_CB(_class, _method) \
|
#define MCFG_TMS340X0_FROM_SHIFTREG_CB(_class, _method) \
|
||||||
tms340x0_device::set_from_shiftreg_callback(*device, from_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
tms340x0_device::set_from_shiftreg_callback(*device, from_shiftreg_cb_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner)));
|
||||||
|
|
||||||
|
|
||||||
class tms340x0_device : public cpu_device,
|
class tms340x0_device : public cpu_device,
|
||||||
|
|||||||
@ -38,4 +38,3 @@ cpu_device::cpu_device(const machine_config &mconfig, device_type type, const ch
|
|||||||
cpu_device::~cpu_device()
|
cpu_device::~cpu_device()
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -80,7 +80,7 @@ void wozfdc_device::device_start()
|
|||||||
save_item(NAME(cur_lss.data_reg));
|
save_item(NAME(cur_lss.data_reg));
|
||||||
save_item(NAME(cur_lss.address));
|
save_item(NAME(cur_lss.address));
|
||||||
save_item(NAME(cur_lss.write_start_time));
|
save_item(NAME(cur_lss.write_start_time));
|
||||||
// save_item(NAME(cur_lss.write_buffer));
|
// save_item(NAME(cur_lss.write_buffer));
|
||||||
save_item(NAME(cur_lss.write_position));
|
save_item(NAME(cur_lss.write_position));
|
||||||
save_item(NAME(cur_lss.write_line_active));
|
save_item(NAME(cur_lss.write_line_active));
|
||||||
save_item(NAME(predicted_lss.tm));
|
save_item(NAME(predicted_lss.tm));
|
||||||
@ -88,7 +88,7 @@ void wozfdc_device::device_start()
|
|||||||
save_item(NAME(predicted_lss.data_reg));
|
save_item(NAME(predicted_lss.data_reg));
|
||||||
save_item(NAME(predicted_lss.address));
|
save_item(NAME(predicted_lss.address));
|
||||||
save_item(NAME(predicted_lss.write_start_time));
|
save_item(NAME(predicted_lss.write_start_time));
|
||||||
// save_item(NAME(predicted_lss.write_buffer));
|
// save_item(NAME(predicted_lss.write_buffer));
|
||||||
save_item(NAME(predicted_lss.write_position));
|
save_item(NAME(predicted_lss.write_position));
|
||||||
save_item(NAME(predicted_lss.write_line_active));
|
save_item(NAME(predicted_lss.write_line_active));
|
||||||
save_item(NAME(drvsel));
|
save_item(NAME(drvsel));
|
||||||
|
|||||||
@ -91,10 +91,10 @@ private:
|
|||||||
int m_k;
|
int m_k;
|
||||||
int m_memory;
|
int m_memory;
|
||||||
int m_type;
|
int m_type;
|
||||||
double m_R1;
|
double m_R1;
|
||||||
double m_R2;
|
double m_R2;
|
||||||
double m_R3;
|
double m_R3;
|
||||||
double m_C;
|
double m_C;
|
||||||
};
|
};
|
||||||
|
|
||||||
extern const device_type FILTER_RC;
|
extern const device_type FILTER_RC;
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user