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Remove no longer used C7x support now that all MCUs have been dumped (nw)

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This commit is contained in:
R. Belmont 2011-06-26 15:07:32 +00:00
parent 47817e5c78
commit c982c12945
4 changed files with 0 additions and 253 deletions
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2
.gitattributes vendored
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@ -1669,8 +1669,6 @@ src/mame/audio/namco52.c svneol=native#text/plain
src/mame/audio/namco52.h svneol=native#text/plain
src/mame/audio/namco54.c svneol=native#text/plain
src/mame/audio/namco54.h svneol=native#text/plain
src/mame/audio/namcoc7x.c svneol=native#text/plain
src/mame/audio/namcoc7x.h svneol=native#text/plain
src/mame/audio/nitedrvr.c svneol=native#text/plain
src/mame/audio/norautp.c svneol=native#text/plain
src/mame/audio/orbit.c svneol=native#text/plain

196
src/mame/audio/namcoc7x.c
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@ -1,196 +0,0 @@
/*
namcoc7x.c - sound hardware for mid-90s Namco systems
System MCU Synthesizer
------------------------------------
NB-1 C351 C352
NB-2 C351 C352
System 22 C74 C352
FL C75 C352
System 11 C76 C352
All of these MCUs are Mitsubishi M377xx family (65c816 based)
with 16k of internal BIOS ROM. The BIOS is the same for all
chips of the same number. We currently use the BIOS from a
Super System 22 game (Prop Cycle) to substitute for the
BIOS in these chips. This is compatible enough to play
the sound and music, but not enough to read the inputs or
handle coinage (the other task these MCUs have).
These systems have 48k of shared RAM with the host. Due to
the MCU's work variables being moved around we cannot enable
full sharing or else the main CPU can overwrite important
MCU work variables and crash it.
Emulation by R. Belmont.
Thanks to Cync and Cap for invaluable assistance.
*/
#include "emu.h"
#include "cpu/m37710/m37710.h"
#include "deprecat.h"
#include "audio/namcoc7x.h"
static UINT16 *namcoc7x_mcuram;
static UINT16 su_82;
static UINT32 *namcoc7x_hostram;
static READ16_HANDLER( speedup_r )
{
if ((cpu_get_pc(&space->device()) == 0xc12d) && (!(su_82 & 0xff00)))
{
device_spin_until_interrupt(&space->device());
}
return su_82;
}
static WRITE16_HANDLER( speedup_w )
{
COMBINE_DATA(&su_82);
}
WRITE16_HANDLER(namcoc7x_soundram16_w)
{
COMBINE_DATA(namcoc7x_mcuram+offset);
}
READ16_HANDLER(namcoc7x_soundram16_r)
{
return namcoc7x_mcuram[offset];
}
WRITE32_HANDLER(namcoc7x_soundram32_w)
{
namcoc7x_soundram16_w(space, offset*2, data >> 16, mem_mask >> 16);
namcoc7x_soundram16_w(space, offset*2+1, data, mem_mask);
}
READ32_HANDLER(namcoc7x_soundram32_r)
{
return (namcoc7x_soundram16_r(space, offset*2, mem_mask >> 16) << 16) |
namcoc7x_soundram16_r(space, offset*2+1, mem_mask);
}
void namcoc7x_sound_write16(UINT16 command, UINT32 offset)
{
namcoc7x_mcuram[offset] = command;
}
void namcoc7x_on_driver_init(running_machine &machine)
{
UINT8 *pROM = (UINT8 *)machine.region("c7x")->base();
device_t *cpu;
// clear the two 16-bits magic values at the start of the rom
// (prevents external init routines from getting called - they assume a
// ROM layout for a different BIOS and crash ours)
memset(pROM, 0, 4);
// install speedup cheat
for (cpu = machine.device("maincpu"); cpu != NULL; cpu = cpu->typenext())
if (cpu->type() == M37702)
cpu->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x82, 0x83, FUNC(speedup_r), FUNC(speedup_w));
}
void namcoc7x_set_host_ram(UINT32 *hostram)
{
namcoc7x_hostram = hostram;
}
// Only share the sound work area
static READ16_HANDLER( c7x_shared_r )
{
UINT16 *share16 = (UINT16 *)namcoc7x_hostram;
if (offset >= 0x400/2)
{
return namcoc7x_mcuram[offset];
}
return share16[BYTE_XOR_LE(offset)];
}
static WRITE16_HANDLER( c7x_shared_w )
{
UINT16 *share16 = (UINT16 *)namcoc7x_hostram;
if (offset >= 0x400/2)
{
COMBINE_DATA(&namcoc7x_mcuram[offset]);
}
else
{
COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
}
}
ADDRESS_MAP_START( namcoc7x_mcu_map, AS_PROGRAM, 16 )
AM_RANGE(0x002000, 0x002fff) AM_DEVREADWRITE_MODERN("c352", c352_device, read, write)
AM_RANGE(0x004000, 0x00bfff) AM_RAM AM_BASE(&namcoc7x_mcuram)
AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c7x", 0x8c000)
AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("c7x", 0)
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c7x", 0)
AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("c7x", 0)
AM_RANGE(0x301000, 0x301001) AM_NOP // watchdog? LEDs?
AM_RANGE(0x308000, 0x308003) AM_NOP // volume control IC?
ADDRESS_MAP_END
ADDRESS_MAP_START( namcoc7x_mcu_share_map, AS_PROGRAM, 16 )
AM_RANGE(0x002000, 0x002fff) AM_DEVREADWRITE_MODERN("c352", c352_device, read, write)
AM_RANGE(0x004000, 0x00bfff) AM_READWRITE( c7x_shared_r, c7x_shared_w ) AM_BASE(&namcoc7x_mcuram)
AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c7x", 0x8c000)
AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("c7x", 0)
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c7x", 0)
AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("c7x", 0)
AM_RANGE(0x301000, 0x301001) AM_NOP // watchdog? LEDs?
AM_RANGE(0x308000, 0x308003) AM_NOP // volume control IC?
ADDRESS_MAP_END
static int p4;
static READ8_HANDLER( mcu_port5_r )
{
return 0xff;
}
static WRITE8_HANDLER( mcu_port4_w )
{
p4 = data;
}
static READ8_HANDLER( mcu_port4_r )
{
return p4;
}
static WRITE8_HANDLER( mcu_port5_w )
{
}
static READ8_HANDLER( mcu_port6_r )
{
return 0;
}
static READ8_HANDLER( mcu_port7_r )
{
return 0;
}
ADDRESS_MAP_START( namcoc7x_mcu_io, AS_IO, 8 )
AM_RANGE(M37710_PORT4, M37710_PORT4) AM_READ( mcu_port4_r ) AM_WRITE( mcu_port4_w )
AM_RANGE(M37710_PORT5, M37710_PORT5) AM_READ( mcu_port5_r ) AM_WRITE( mcu_port5_w )
AM_RANGE(M37710_PORT6, M37710_PORT6) AM_READ( mcu_port6_r ) AM_WRITENOP
AM_RANGE(M37710_PORT7, M37710_PORT7) AM_READ( mcu_port7_r )
AM_RANGE(0x10, 0x1f) AM_NOP
ADDRESS_MAP_END
INTERRUPT_GEN( namcoc7x_interrupt )
{
if (cpu_getiloops(device) == 0)
device_set_input_line(device, M37710_LINE_IRQ0, HOLD_LINE);
else
device_set_input_line(device, M37710_LINE_IRQ2, HOLD_LINE);
}

54
src/mame/audio/namcoc7x.h
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@ -1,54 +0,0 @@
/*
namcoc7x.c - sound hardware for mid-90s Namco systems
System MCU Synthesizer
------------------------------------
NB-1 C351 C352
NB-2 C351 C352
System 22 C74 C352
FL C75 C352
System 11 C76 C352
*/
#include "sound/c352.h"
#include "cpu/m37710/m37710.h"
ADDRESS_MAP_EXTERN(namcoc7x_mcu_map, 16);
ADDRESS_MAP_EXTERN(namcoc7x_mcu_share_map, 16);
ADDRESS_MAP_EXTERN(namcoc7x_mcu_io, 8);
INTERRUPT_GEN( namcoc7x_interrupt );
WRITE16_HANDLER(namcoc7x_soundram16_w);
READ16_HANDLER(namcoc7x_soundram16_r);
WRITE32_HANDLER(namcoc7x_soundram32_w);
READ32_HANDLER(namcoc7x_soundram32_r);
void namcoc7x_sound_write16(UINT16 command, UINT32 offset);
void namcoc7x_on_driver_init(running_machine &machine);
void namcoc7x_set_host_ram(UINT32 *hostram);
/* BIOS from Prop Cycle used as a substitute until we can trojan the real BIOSes for these games */
#define NAMCO_C7X_BIOS \
ROM_LOAD( "pr1data.8k", 0x80000, 0x80000, BAD_DUMP CRC(2e5767a4) SHA1(390bf05c90044d841fe2dd4a427177fa1570b9a6) )
#define NAMCO_C7X_MCU(clock) \
MCFG_CPU_ADD("mcu", M37702, clock) \
MCFG_CPU_PROGRAM_MAP(namcoc7x_mcu_map) \
MCFG_CPU_IO_MAP(namcoc7x_mcu_io) \
MCFG_CPU_VBLANK_INT_HACK(namcoc7x_interrupt, 2)
#define NAMCO_C7X_MCU_SHARED(clock) \
MCFG_CPU_ADD("mcu", M37702, clock) \
MCFG_CPU_PROGRAM_MAP(namcoc7x_mcu_share_map) \
MCFG_CPU_IO_MAP(namcoc7x_mcu_io) \
MCFG_CPU_VBLANK_INT_HACK(namcoc7x_interrupt, 2)
#define NAMCO_C7X_SOUND(clock) \
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") \
MCFG_SOUND_ADD("c352", C352, clock) \
MCFG_SOUND_ROUTE(0, "rspeaker", 1.00) \
MCFG_SOUND_ROUTE(1, "lspeaker", 1.00) \
MCFG_SOUND_ROUTE(2, "rspeaker", 1.00) \
MCFG_SOUND_ROUTE(3, "lspeaker", 1.00)

1
src/mame/mame.mak
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@ -1004,7 +1004,6 @@ $(MAMEOBJ)/namco.a: \
$(MACHINE)/namco62.o \
$(AUDIO)/namco52.o \
$(AUDIO)/namco54.o \
$(AUDIO)/namcoc7x.o \
$(VIDEO)/bosco.o \
$(VIDEO)/digdug.o \
$(MACHINE)/xevious.o $(VIDEO)/xevious.o \