mirror of
https://github.com/holub/mame
synced 2025-04-19 23:12:11 +03:00
tmp68301: Reimplement in the new68k framework. The timers are not yet implemented, couldn't find a driver which cared. Hopefully the regression testing will find some.
This commit is contained in:
Olivier Galibert
parent
fb89dcf6d3
commit
ca6e220dbb
@ -1918,6 +1918,7 @@ end
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--@src/devices/cpu/m68000/scc68070.h,CPUS["M680X0"] = true
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--@src/devices/cpu/m68000/fscpu32.h,CPUS["M680X0"] = true
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--@src/devices/cpu/m68000/mcf5206e.h,CPUS["M680X0"] = true
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--@src/devices/cpu/m68000/tmp68301.h,CPUS["M680X0"] = true
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--------------------------------------------------
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if CPUS["M680X0"] then
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@ -1961,6 +1962,8 @@ if CPUS["M680X0"] then
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MAME_DIR .. "src/devices/cpu/m68000/fscpu32.cpp",
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MAME_DIR .. "src/devices/cpu/m68000/mcf5206e.h",
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MAME_DIR .. "src/devices/cpu/m68000/mcf5206e.cpp",
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MAME_DIR .. "src/devices/cpu/m68000/tmp68301.h",
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MAME_DIR .. "src/devices/cpu/m68000/tmp68301.cpp",
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}
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end
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@ -3508,18 +3508,6 @@ if (MACHINES["TMC208K"]~=null) then
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}
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end
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---------------------------------------------------
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--
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--@src/devices/machine/tmp68301.h,MACHINES["TMP68301"] = true
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---------------------------------------------------
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if (MACHINES["TMP68301"]~=null) then
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files {
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MAME_DIR .. "src/devices/machine/tmp68301.cpp",
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MAME_DIR .. "src/devices/machine/tmp68301.h",
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}
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end
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---------------------------------------------------
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--
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--@src/devices/machine/tms1024.h,MACHINES["TMS1024"] = true
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@ -464,3 +464,105 @@ void m68000_device::end_interrupt_vector_lookup()
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m_int_vector = (m_edb & 0xff) << 2;
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m_int_next_state = 0;
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}
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m68000_mcu_device::m68000_mcu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
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m68000_device(mconfig, type, tag, owner, clock)
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{
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}
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void m68000_mcu_device::execute_run()
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{
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internal_update(total_cycles());
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m_icount -= m_count_before_instruction_step;
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if(m_icount < 0) {
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m_count_before_instruction_step = -m_icount;
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m_icount = 0;
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} else
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m_count_before_instruction_step = 0;
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while(m_bcount && m_icount <= m_bcount)
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internal_update(total_cycles() + m_icount - m_bcount);
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while(m_icount > 0) {
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for(;;) {
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if(m_icount > m_bcount && m_inst_substate)
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(this->*(m_handlers_p[m_inst_state]))();
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while(m_icount > m_bcount) {
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if(m_inst_state >= S_first_instruction) {
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m_ipc = m_pc - 2;
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m_irdi = m_ird;
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if(machine().debug_flags & DEBUG_FLAG_ENABLED)
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debugger_instruction_hook(m_ipc);
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}
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(this->*(m_handlers_f[m_inst_state]))();
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}
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if(m_post_run)
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do_post_run();
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else
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break;
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}
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if(m_icount > 0)
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while(m_bcount && m_icount <= m_bcount)
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internal_update(total_cycles() + m_icount - m_bcount);
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if(m_icount > 0 && m_inst_substate) {
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(this->*(m_handlers_p[m_inst_state]))();
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if(m_post_run)
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do_post_run();
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}
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}
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if(m_icount < 0) {
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m_count_before_instruction_step = -m_icount;
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m_icount = 0;
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}
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}
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void m68000_mcu_device::recompute_bcount(uint64_t event_time)
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{
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if(!event_time || event_time >= total_cycles() + m_icount) {
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m_bcount = 0;
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return;
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}
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m_bcount = total_cycles() + m_icount - event_time;
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}
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void m68000_mcu_device::add_event(uint64_t &event_time, uint64_t new_event)
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{
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if(!new_event)
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return;
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if(!event_time || event_time > new_event)
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event_time = new_event;
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}
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void m68000_mcu_device::device_start()
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{
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m68000_device::device_start();
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if(m_mmu) {
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m_handlers_f = s_handlers_ifm;
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m_handlers_p = s_handlers_ipm;
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} else {
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m_handlers_f = s_handlers_dfm;
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m_handlers_p = s_handlers_dpm;
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}
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}
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void m68000_mcu_device::set_current_interrupt_level(u32 level)
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{
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if(level == m_int_level)
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return;
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m_int_level = level;
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/* A transition from < 7 to 7 always interrupts (NMI) */
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/* Note: Level 7 can also level trigger like a normal IRQ */
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if(m_int_level == 7)
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m_nmi_pending = true;
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update_interrupt();
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}
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@ -927,6 +927,22 @@ protected:
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}
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};
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class m68000_mcu_device : public m68000_device
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{
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protected:
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m68000_mcu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
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virtual void execute_run() override;
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void recompute_bcount(uint64_t event_time);
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static void add_event(uint64_t &event_time, uint64_t new_event);
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void internal_update();
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virtual void internal_update(uint64_t current_time) = 0;
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virtual void device_start() override;
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void set_current_interrupt_level(u32 level);
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};
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DECLARE_DEVICE_TYPE(M68000, m68000_device)
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#endif
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1206
src/devices/cpu/m68000/tmp68301.cpp
Normal file
1206
src/devices/cpu/m68000/tmp68301.cpp
Normal file
File diff suppressed because it is too large
Load Diff
289
src/devices/cpu/m68000/tmp68301.h
Normal file
289
src/devices/cpu/m68000/tmp68301.h
Normal file
@ -0,0 +1,289 @@
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// license:BSD-3-Clause
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// copyright-holders:Olivier Galibert
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#ifndef MAME_CPU_M68000_TMP68301_H
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#define MAME_CPU_M68000_TMP68301_H
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#pragma once
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#include "m68000.h"
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class tmp68301_device : public m68000_mcu_device
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{
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public:
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tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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void set_serial_external_clock(u32 hz) { m_serial_external_clock = hz; }
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auto parallel_r_cb() { return m_parallel_r_cb.bind(); }
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auto parallel_w_cb() { return m_parallel_w_cb.bind(); }
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DECLARE_WRITE_LINE_MEMBER(rx0_w) { serial_rx_w(0, state); }
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DECLARE_WRITE_LINE_MEMBER(rx1_w) { serial_rx_w(1, state); }
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DECLARE_WRITE_LINE_MEMBER(rx2_w) { serial_rx_w(2, state); }
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auto tx0_handler() { return m_tx_cb[0].bind(); }
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auto tx1_handler() { return m_tx_cb[1].bind(); }
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auto tx2_handler() { return m_tx_cb[2].bind(); }
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void timer_in_w(int state);
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protected:
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devcb_read16 m_parallel_r_cb;
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devcb_write16 m_parallel_w_cb;
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devcb_write_line m_tx_cb[3];
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void device_start() override;
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void device_reset() override;
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u32 execute_input_lines() const noexcept override;
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void execute_set_input(int inputnum, int state) override;
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void internal_update(uint64_t current_time = 0) override;
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void internal_map(address_map &map);
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void cpu_space_map(address_map &map);
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// Address decoder
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u8 m_amar[2], m_aamr[2], m_aacr[3];
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u8 m_ator;
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u16 m_arelr;
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void show_cs(int cs);
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void show_iack();
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void amar_w(int reg, u8 data);
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void aamr_w(int reg, u8 data);
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void aacr_w(int reg, u8 data);
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u8 amar0_r();
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void amar0_w(u8 data);
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u8 amar1_r();
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void amar1_w(u8 data);
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u8 aamr0_r();
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void aamr0_w(u8 data);
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u8 aamr1_r();
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void aamr1_w(u8 data);
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u8 aacr0_r();
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void aacr0_w(u8 data);
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u8 aacr1_r();
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void aacr1_w(u8 data);
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u8 aacr2_r();
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void aacr2_w(u8 data);
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u8 ator_r();
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void ator_w(u8 data);
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u16 arelr_r();
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void arelr_w(offs_t, u16 data, u16 mem_mask);
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// Interrupt controller
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static const char *const interrupt_slot_names[11];
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static const int interrupt_vector_to_slot[32];
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static const int interrupt_slot_to_priority[11];
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u16 m_external_interrupt_state;
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u32 m_interrupt_state;
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u8 m_icr[10];
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u16 m_imr, m_ipr, m_iisr;
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u8 m_ivnr, m_ieir;
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u8 icr_r(offs_t reg);
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void icr_w(offs_t reg, u8 data);
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u16 imr_r();
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void imr_w(offs_t, u16 data, u16 mem_mask);
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u16 ipr_r();
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void ipr_w(offs_t, u16 data, u16 mem_mask);
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u16 iisr_r();
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void iisr_w(offs_t, u16 data, u16 mem_mask);
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u8 ivnr_r();
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void ivnr_w(u8 data);
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u8 ieir_r();
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void ieir_w(u8 data);
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u8 interrupt_callback();
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void interrupt_update();
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void interrupt_internal_trigger(int id);
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std::tuple<u32, u8, u32> interrupt_get_current() const;
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// Parallel interface
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static const int parallel_mode_table[16];
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static const char *const parallel_mode_names[10];
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u16 m_pdir;
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u8 m_pcr, m_psr, m_pcmr, m_pmr;
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u16 m_pdr;
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u8 m_ppr1, m_ppr2;
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u8 m_parallel_mode;
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u8 parallel_get_interrupt() const;
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u16 pdir_r();
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void pdir_w(offs_t, u16 data, u16 mem_mask);
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u8 pcr_r();
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void pcr_w(u8 data);
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u8 psr_r();
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void psr_w(u8 data);
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u8 pcmr_r();
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void pcmr_w(u8 data);
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u8 pmr_r();
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void pmr_w(u8 data);
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u16 pdr_r();
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void pdr_w(offs_t, u16 data, u16 mem_mask);
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u8 ppr1_r();
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void ppr1_w(u8 data);
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u8 ppr2_r();
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void ppr2_w(u8 data);
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// Serial interface
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enum {
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SCR_INTM = 0x01,
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SCR_RES = 0x20,
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SCR_CKSE = 0x80,
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SMR_ST = 0x01,
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SMR_TXINTM = 0x02,
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SMR_CL_SFT = 2,
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SMR_PEN = 0x10,
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SMR_PEO = 0x20,
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SMR_ERINTM = 0x40,
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SMR_RXINTM = 0x80,
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SCMR_TXEN = 0x01,
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SCMR_DTR = 0x02,
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SCMR_RXEN = 0x04,
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SCMR_SBRK = 0x08,
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SCMR_ERS = 0x10,
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SCMR_RTS = 0x20,
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SSR_TXRDY = 0x01,
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SSR_RXRDY = 0x02,
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SSR_TXE = 0x04,
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SSR_PE = 0x08,
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SSR_OE = 0x10,
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SSR_FE = 0x20,
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SSR_RBRK = 0x40,
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SSR_DSR = 0x80,
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SR_INT_ERR = 0,
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SR_INT_RX = 1,
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SR_INT_TX = 2,
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SR_INT_UNK = 3,
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};
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enum {
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SR_IDLE,
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SR_START,
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SR_BIT_0,
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SR_BIT_1,
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SR_BIT_2,
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SR_BIT_3,
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SR_BIT_4,
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SR_BIT_5,
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SR_BIT_6,
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SR_BIT_7,
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SR_PARITY,
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SR_STOP,
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SR_DONE,
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};
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u64 m_serial_tx_next_event[3], m_serial_rx_next_event[3];
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u64 m_serial_gclk[3];
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u32 m_serial_external_clock;
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u8 m_smr[3], m_scmr[3], m_sbrr[3], m_ssr[3], m_sdrr[3], m_sdrt[3], m_sr_intr[3], m_serial_rx[3], m_serial_tx[3];
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u8 m_serial_tx_state[3], m_serial_rx_state[3], m_serial_rx_line[3];
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u8 m_spr, m_scr;
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static u8 sbrr_to_div(u8 value);
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void serial_clock_update(int ch);
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u64 serial_get_next_edge(int ch);
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bool serial_validate_interrupt(u8 vector) const;
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void serial_check_interrupt(int ch);
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void serial_tx_update(int ch);
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void serial_rx_update(int ch);
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void serial_rx_w(int ch, int state);
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void ssr_set(int ch, u8 val, u8 mask);
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void smr_w(int ch, u8 data);
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void scmr_w(int ch, u8 data);
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void sbrr_w(int ch, u8 data);
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u8 sdr_r(int ch);
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void sdr_w(int ch, u8 data);
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u8 smr0_r();
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void smr0_w(u8 data);
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u8 smr1_r();
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void smr1_w(u8 data);
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u8 smr2_r();
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void smr2_w(u8 data);
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u8 scmr0_r();
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void scmr0_w(u8 data);
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u8 scmr1_r();
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void scmr1_w(u8 data);
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u8 scmr2_r();
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void scmr2_w(u8 data);
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u8 sbrr0_r();
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void sbrr0_w(u8 data);
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u8 sbrr1_r();
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void sbrr1_w(u8 data);
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u8 sbrr2_r();
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void sbrr2_w(u8 data);
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u8 ssr0_r();
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u8 ssr1_r();
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u8 ssr2_r();
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u8 sdr0_r();
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void sdr0_w(u8 data);
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u8 sdr1_r();
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void sdr1_w(u8 data);
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u8 sdr2_r();
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void sdr2_w(u8 data);
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u8 spr_r();
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void spr_w(u8 data);
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u8 scr_r();
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void scr_w(u8 data);
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// 16-bit timer
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u16 m_tcr[3], m_tmcr1[3], m_tmcr2[3], m_tctr[3];
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static const int timer_source_id[3][2];
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static const char *const timer_source_names[3][4];
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static const int timer_divider[16];
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void tcr_w(int ch, u16 data, u16 mem_mask);
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void tmcr1_w(int ch, u16 data, u16 mem_mask);
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void tmcr2_w(int ch, u16 data, u16 mem_mask);
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void tctr_w(int ch, u16 data, u16 mem_mask);
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void tcr0_w(offs_t, u16 data, u16 mem_mask);
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u16 tcr0_r();
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void tcr1_w(offs_t, u16 data, u16 mem_mask);
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u16 tcr1_r();
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void tcr2_w(offs_t, u16 data, u16 mem_mask);
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u16 tcr2_r();
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void tmcr01_w(offs_t, u16 data, u16 mem_mask);
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u16 tmcr01_r();
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void tmcr11_w(offs_t, u16 data, u16 mem_mask);
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u16 tmcr11_r();
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void tmcr12_w(offs_t, u16 data, u16 mem_mask);
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u16 tmcr12_r();
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void tmcr21_w(offs_t, u16 data, u16 mem_mask);
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u16 tmcr21_r();
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||||
void tmcr22_w(offs_t, u16 data, u16 mem_mask);
|
||||
u16 tmcr22_r();
|
||||
|
||||
void tctr0_w(offs_t, u16 data, u16 mem_mask);
|
||||
u16 tctr0_r();
|
||||
void tctr1_w(offs_t, u16 data, u16 mem_mask);
|
||||
u16 tctr1_r();
|
||||
void tctr2_w(offs_t, u16 data, u16 mem_mask);
|
||||
u16 tctr2_r();
|
||||
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(TMP68301, tmp68301_device)
|
||||
|
||||
#endif
|
||||
@ -555,7 +555,7 @@ void t10mmc::ReadData( uint8_t *data, int dataLength )
|
||||
|
||||
case T10SBC_CMD_READ_10:
|
||||
case T10SBC_CMD_READ_12:
|
||||
//m_device->logerror("T10MMC: read %x dataLength, \n", dataLength);
|
||||
//m_device->logerror("T10MMC: read %x dataLength lba=%x\n", dataLength, m_lba);
|
||||
if ((m_cdrom) && (m_blocks))
|
||||
{
|
||||
while (dataLength > 0)
|
||||
@ -822,6 +822,17 @@ void t10mmc::ReadData( uint8_t *data, int dataLength )
|
||||
data[21] = 0;
|
||||
break;
|
||||
|
||||
case 0x0d: // CD page
|
||||
data[1] = 0x06;
|
||||
data[0] = 0x0d;
|
||||
data[2] = 0;
|
||||
data[3] = 0;
|
||||
data[4] = 0;
|
||||
data[5] = 60;
|
||||
data[6] = 0;
|
||||
data[7] = 75;
|
||||
break;
|
||||
|
||||
default:
|
||||
m_device->logerror("T10MMC: MODE SENSE unknown page %x\n", command[2] & 0x3f);
|
||||
break;
|
||||
|
||||
@ -1,380 +0,0 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Luca Elia, AJR
|
||||
/***************************************************************************
|
||||
|
||||
TMP68301 basic emulation + Interrupt Handling
|
||||
|
||||
The Toshiba TMP68301 is a 68HC000 + serial I/O, parallel I/O,
|
||||
3 timers, address decoder, wait generator, interrupt controller,
|
||||
all integrated in a single chip.
|
||||
|
||||
TODO:
|
||||
- Interrupt generation: edge detection, input expansion (INT3-INT9)
|
||||
- Parallel port: handle timing latency
|
||||
- Serial port: not done at all
|
||||
- (and many other things)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "machine/tmp68301.h"
|
||||
|
||||
DEFINE_DEVICE_TYPE(TMP68301, tmp68301_device, "tmp68301", "Toshiba TMP68301")
|
||||
|
||||
void tmp68301_device::tmp68301_regs(address_map &map)
|
||||
{
|
||||
map(0x000, 0x3ff).rw(FUNC(tmp68301_device::regs_r), FUNC(tmp68301_device::regs_w));
|
||||
|
||||
map(0x080, 0x093).rw(FUNC(tmp68301_device::icr_r), FUNC(tmp68301_device::icr_w)).umask16(0x00ff);
|
||||
|
||||
map(0x094, 0x095).rw(FUNC(tmp68301_device::imr_r), FUNC(tmp68301_device::imr_w));
|
||||
map(0x096, 0x097).rw(FUNC(tmp68301_device::ipr_r), FUNC(tmp68301_device::ipr_w));
|
||||
map(0x098, 0x099).rw(FUNC(tmp68301_device::iisr_r), FUNC(tmp68301_device::iisr_w));
|
||||
|
||||
/* Parallel Port */
|
||||
map(0x100, 0x101).rw(FUNC(tmp68301_device::pdir_r), FUNC(tmp68301_device::pdir_w));
|
||||
map(0x10a, 0x10b).rw(FUNC(tmp68301_device::pdr_r), FUNC(tmp68301_device::pdr_w));
|
||||
|
||||
/* Serial Port */
|
||||
map(0x18e, 0x18f).rw(FUNC(tmp68301_device::scr_r), FUNC(tmp68301_device::scr_w));
|
||||
}
|
||||
|
||||
// IRQ Mask register
|
||||
uint16_t tmp68301_device::imr_r()
|
||||
{
|
||||
return m_imr;
|
||||
}
|
||||
|
||||
void tmp68301_device::imr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_imr);
|
||||
update_ipl();
|
||||
}
|
||||
|
||||
// IRQ Pending Register
|
||||
uint16_t tmp68301_device::ipr_r()
|
||||
{
|
||||
return m_ipr;
|
||||
}
|
||||
|
||||
void tmp68301_device::ipr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
// software writes only clear bits
|
||||
m_ipr &= data | ~mem_mask;
|
||||
update_ipl();
|
||||
}
|
||||
|
||||
// IRQ In-Service Register
|
||||
uint16_t tmp68301_device::iisr_r()
|
||||
{
|
||||
return m_iisr;
|
||||
}
|
||||
|
||||
void tmp68301_device::iisr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
// software writes only clear bits
|
||||
m_iisr &= data | ~mem_mask;
|
||||
}
|
||||
|
||||
// Serial Control Register (TODO: 8-bit wide)
|
||||
uint16_t tmp68301_device::scr_r()
|
||||
{
|
||||
return m_scr;
|
||||
}
|
||||
|
||||
void tmp68301_device::scr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
/*
|
||||
*--- ---- CKSE
|
||||
--*- ---- RES
|
||||
---- ---* INTM
|
||||
*/
|
||||
|
||||
COMBINE_DATA(&m_scr);
|
||||
m_scr &= 0xa1;
|
||||
}
|
||||
|
||||
/* Parallel direction: 1 = output, 0 = input */
|
||||
uint16_t tmp68301_device::pdir_r()
|
||||
{
|
||||
return m_pdir;
|
||||
}
|
||||
|
||||
void tmp68301_device::pdir_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_pdir);
|
||||
}
|
||||
|
||||
uint16_t tmp68301_device::pdr_r()
|
||||
{
|
||||
return (m_in_parallel_cb(0) & ~m_pdir) | (m_pdr & m_pdir);
|
||||
}
|
||||
|
||||
void tmp68301_device::pdr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t old = m_pdr;
|
||||
COMBINE_DATA(&m_pdr);
|
||||
m_pdr = (old & ~m_pdir) | (m_pdr & m_pdir);
|
||||
m_out_parallel_cb(0, m_pdr, mem_mask);
|
||||
}
|
||||
|
||||
uint8_t tmp68301_device::icr_r(offs_t offset)
|
||||
{
|
||||
return m_icr[offset];
|
||||
}
|
||||
|
||||
void tmp68301_device::icr_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/*
|
||||
--x- ---- Vector number is autogenerated if 1, else use external source
|
||||
---x x--- 00 falling edge, 01 low level, 10 rising edge, 11 high level
|
||||
^ applies only to external irqs (offset 0 to 2)
|
||||
---- -xxx irq level
|
||||
*/
|
||||
m_icr[offset] = data;
|
||||
}
|
||||
|
||||
tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: m68000_device(mconfig, TMP68301, tag, owner, clock),
|
||||
m_in_parallel_cb(*this),
|
||||
m_out_parallel_cb(*this),
|
||||
m_ipl(0),
|
||||
m_imr(0),
|
||||
m_ipr(0),
|
||||
m_iisr(0),
|
||||
m_scr(0),
|
||||
m_pdir(0),
|
||||
m_pdr(0)
|
||||
{
|
||||
memset(m_regs, 0, sizeof(m_regs));
|
||||
memset(m_icr, 0, sizeof(m_icr));
|
||||
m_cpu_space_config.m_internal_map = address_map_constructor(FUNC(tmp68301_device::internal_vectors_r), this);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void tmp68301_device::device_start()
|
||||
{
|
||||
m68000_device::device_start();
|
||||
|
||||
for (int i = 0; i < 3; i++)
|
||||
m_tmp68301_timer[i] = timer_alloc(FUNC(tmp68301_device::timer_callback), this);
|
||||
|
||||
m_in_parallel_cb.resolve_safe(0);
|
||||
m_out_parallel_cb.resolve_safe();
|
||||
|
||||
m_s_program->install_device(0xfffc00, 0xffffff, *this, &tmp68301_device::tmp68301_regs);
|
||||
|
||||
save_item(NAME(m_regs));
|
||||
save_item(NAME(m_icr));
|
||||
save_item(NAME(m_ipl));
|
||||
save_item(NAME(m_imr));
|
||||
save_item(NAME(m_ipr));
|
||||
save_item(NAME(m_iisr));
|
||||
save_item(NAME(m_scr));
|
||||
save_item(NAME(m_pdir));
|
||||
save_item(NAME(m_pdr));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void tmp68301_device::device_reset()
|
||||
{
|
||||
m68000_device::device_reset();
|
||||
|
||||
m_ipr = 0;
|
||||
m_iisr = 0;
|
||||
m_imr = 0x7f7; // mask all irqs
|
||||
std::fill(std::begin(m_icr), std::end(m_icr), 0x07);
|
||||
update_ipl();
|
||||
}
|
||||
|
||||
//**************************************************************************
|
||||
// INLINE HELPERS
|
||||
//**************************************************************************
|
||||
|
||||
void tmp68301_device::internal_vectors_r(address_map &map)
|
||||
{
|
||||
map(0xfffff0, 0xffffff).r(FUNC(tmp68301_device::irq_callback)).umask16(0x00ff);
|
||||
}
|
||||
|
||||
|
||||
uint8_t tmp68301_device::irq_callback(offs_t offset)
|
||||
{
|
||||
uint8_t IVNR = m_regs[0x9a/2] & 0xe0; // Interrupt Vector Number Register (IVNR)
|
||||
|
||||
for (int src : { 0, 7, 3, 1, 8, 4, 5, 9, 2 })
|
||||
{
|
||||
// check if the IPL matches
|
||||
if (offset == (m_icr[src] & 0x07))
|
||||
{
|
||||
// check if interrupt is pending and not masked out
|
||||
u16 mask = (src > 2 ? 2 : 1) << src;
|
||||
if ((m_ipr & mask) != 0 && (m_imr & mask) == 0)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
// add cause to interrupt in-service register
|
||||
m_iisr |= mask;
|
||||
|
||||
// no longer pending
|
||||
m_ipr &= ~mask;
|
||||
update_ipl();
|
||||
}
|
||||
|
||||
// vary vector number by type
|
||||
if (src > 6)
|
||||
return IVNR | (src - 3);
|
||||
else if (src > 2)
|
||||
return IVNR | (src - 1) << 2 | serial_interrupt_cause(src - 3);
|
||||
else /*if (BIT(m_icr[src], 5))*/ // TODO: use external vector otherwise
|
||||
return IVNR | src;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// default vector
|
||||
return IVNR | 0x1f;
|
||||
}
|
||||
|
||||
TIMER_CALLBACK_MEMBER(tmp68301_device::timer_callback)
|
||||
{
|
||||
int i = param;
|
||||
uint16_t TCR = m_regs[(0x200 + i * 0x20)/2];
|
||||
|
||||
// logerror("s: callback timer %04X, j = %d\n",machine().describe_context(),i,tcount);
|
||||
|
||||
if (TCR & 0x0004) // INT
|
||||
{
|
||||
m_ipr |= 0x100 << i;
|
||||
update_ipl();
|
||||
}
|
||||
|
||||
if (TCR & 0x0080) // N/1
|
||||
{
|
||||
// Repeat
|
||||
update_timer(i);
|
||||
}
|
||||
else
|
||||
{
|
||||
// One Shot
|
||||
}
|
||||
}
|
||||
|
||||
void tmp68301_device::update_timer(int i)
|
||||
{
|
||||
uint16_t TCR = m_regs[(0x200 + i * 0x20)/2];
|
||||
uint16_t MAX1 = m_regs[(0x204 + i * 0x20)/2];
|
||||
uint16_t MAX2 = m_regs[(0x206 + i * 0x20)/2];
|
||||
|
||||
int max = 0;
|
||||
attotime duration = attotime::zero;
|
||||
|
||||
m_tmp68301_timer[i]->adjust(attotime::never,i);
|
||||
|
||||
// timers 1&2 only
|
||||
switch( (TCR & 0x0030)>>4 ) // MR2..1
|
||||
{
|
||||
case 1:
|
||||
max = MAX1;
|
||||
break;
|
||||
case 2:
|
||||
max = MAX2;
|
||||
break;
|
||||
}
|
||||
|
||||
switch ( (TCR & 0xc000)>>14 ) // CK2..1
|
||||
{
|
||||
case 0: // System clock (CLK)
|
||||
if (max)
|
||||
{
|
||||
int scale = (TCR & 0x3c00)>>10; // P4..1
|
||||
if (scale > 8) scale = 8;
|
||||
duration = attotime::from_hz(unscaled_clock()) * ((1 << scale) * max);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
// logerror("%s: TMP68301 Timer %d, duration %lf, max %04X\n",machine().describe_context(),i,duration,max);
|
||||
|
||||
if (!(TCR & 0x0002)) // CS
|
||||
{
|
||||
if (duration != attotime::zero)
|
||||
m_tmp68301_timer[i]->adjust(duration,i);
|
||||
else
|
||||
logerror("%s: TMP68301 error, timer %d duration is 0\n",machine().describe_context(),i);
|
||||
}
|
||||
}
|
||||
|
||||
/* Update the IRQ state based on all possible causes */
|
||||
void tmp68301_device::update_ipl()
|
||||
{
|
||||
uint8_t new_ipl = 0;
|
||||
|
||||
for (int src = 0; src < 10; src++)
|
||||
{
|
||||
u16 mask = (src > 2 ? 2 : 1) << src;
|
||||
if ((m_ipr & mask) != 0 && (m_imr & mask) == 0 && new_ipl < (m_icr[src] & 0x07))
|
||||
new_ipl = m_icr[src] & 0x07;
|
||||
}
|
||||
|
||||
if (new_ipl != m_ipl)
|
||||
{
|
||||
if (m_ipl != 0)
|
||||
set_input_line(m_ipl, CLEAR_LINE);
|
||||
if (new_ipl != 0)
|
||||
set_input_line(new_ipl, ASSERT_LINE);
|
||||
|
||||
m_ipl = new_ipl;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t tmp68301_device::serial_interrupt_cause(int channel)
|
||||
{
|
||||
/*
|
||||
* 00 error occurred
|
||||
* 01 receive completed
|
||||
* 10 transmit ready
|
||||
* 11 interrupt cause cleared while interrupt pending
|
||||
*/
|
||||
(void)channel;
|
||||
return 3;
|
||||
}
|
||||
|
||||
|
||||
uint16_t tmp68301_device::regs_r(offs_t offset)
|
||||
{
|
||||
return m_regs[offset];
|
||||
}
|
||||
|
||||
void tmp68301_device::regs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_regs[offset]);
|
||||
|
||||
if (!ACCESSING_BITS_0_7) return;
|
||||
|
||||
// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n", >pc(),offset*2,data,mem_mask^0xffff);
|
||||
|
||||
switch( offset * 2 )
|
||||
{
|
||||
// Timers
|
||||
case 0x200:
|
||||
case 0x220:
|
||||
case 0x240:
|
||||
{
|
||||
int i = ((offset*2) >> 5) & 3;
|
||||
|
||||
update_timer( i );
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void tmp68301_device::external_interrupt_0() { m_ipr |= EXT_IRQ0; update_ipl(); }
|
||||
void tmp68301_device::external_interrupt_1() { m_ipr |= EXT_IRQ1; update_ipl(); }
|
||||
void tmp68301_device::external_interrupt_2() { m_ipr |= EXT_IRQ2; update_ipl(); }
|
||||
@ -1,100 +0,0 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Luca Elia
|
||||
#ifndef MAME_MACHINE_TMP68301_H
|
||||
#define MAME_MACHINE_TMP68301_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "cpu/m68000/m68000.h"
|
||||
|
||||
/* TODO: serial ports, frequency & hook it up with m68k */
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
|
||||
|
||||
class tmp68301_device : public m68000_device
|
||||
{
|
||||
public:
|
||||
tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
auto in_parallel_callback() { return m_in_parallel_cb.bind(); }
|
||||
auto out_parallel_callback() { return m_out_parallel_cb.bind(); }
|
||||
|
||||
// Interrupts
|
||||
void external_interrupt_0();
|
||||
void external_interrupt_1();
|
||||
void external_interrupt_2();
|
||||
|
||||
private:
|
||||
uint16_t imr_r();
|
||||
void imr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t ipr_r();
|
||||
void ipr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t iisr_r();
|
||||
void iisr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t scr_r();
|
||||
void scr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t pdr_r();
|
||||
void pdr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t pdir_r();
|
||||
void pdir_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint8_t icr_r(offs_t offset);
|
||||
void icr_w(offs_t offset, uint8_t data);
|
||||
|
||||
// Hardware Registers
|
||||
uint16_t regs_r(offs_t offset);
|
||||
void regs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
void tmp68301_regs(address_map &map);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
TIMER_CALLBACK_MEMBER(timer_callback);
|
||||
void update_timer(int i);
|
||||
void update_ipl();
|
||||
uint8_t serial_interrupt_cause(int channel);
|
||||
|
||||
static constexpr uint16_t EXT_IRQ0 = 1 << 0;
|
||||
static constexpr uint16_t EXT_IRQ1 = 1 << 1;
|
||||
static constexpr uint16_t EXT_IRQ2 = 1 << 2;
|
||||
static constexpr uint16_t SERIAL_IRQ_CH0 = 1 << 4;
|
||||
static constexpr uint16_t SERIAL_IRQ_CH1 = 1 << 5;
|
||||
static constexpr uint16_t SERIAL_IRQ_CH2 = 1 << 6;
|
||||
static constexpr uint16_t PARALLEL_IRQ = 1 << 7;
|
||||
static constexpr uint16_t TIMER0_IRQ = 1 << 8;
|
||||
static constexpr uint16_t TIMER1_IRQ = 1 << 9;
|
||||
static constexpr uint16_t TIMER2_IRQ = 1 << 10;
|
||||
|
||||
devcb_read16 m_in_parallel_cb;
|
||||
devcb_write16 m_out_parallel_cb;
|
||||
|
||||
// internal state
|
||||
uint16_t m_regs[0x400];
|
||||
|
||||
emu_timer *m_tmp68301_timer[3]; // 3 Timers
|
||||
|
||||
uint8_t m_ipl; // internal interrupt level
|
||||
|
||||
uint16_t m_imr;
|
||||
uint16_t m_ipr;
|
||||
uint16_t m_iisr;
|
||||
uint16_t m_scr;
|
||||
uint16_t m_pdir;
|
||||
uint16_t m_pdr;
|
||||
uint8_t m_icr[10];
|
||||
|
||||
void internal_vectors_r(address_map &map);
|
||||
uint8_t irq_callback(offs_t offset);
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(TMP68301, tmp68301_device)
|
||||
|
||||
#endif // MAME_MACHINE_TMP68301_H
|
||||
@ -46,7 +46,6 @@ To Do:
|
||||
#include "emu.h"
|
||||
#include "realbrk.h"
|
||||
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "sound/ymopl.h"
|
||||
#include "sound/ymz280b.h"
|
||||
#include "speaker.h"
|
||||
@ -748,29 +747,22 @@ GFXDECODE_END
|
||||
Billiard Academy Real Break
|
||||
***************************************************************************/
|
||||
|
||||
WRITE_LINE_MEMBER(realbrk_state::vblank_irq)
|
||||
{
|
||||
/* VBlank is connected to INT1 (external interrupts pin 1) */
|
||||
if (state)
|
||||
m_maincpu->external_interrupt_1();
|
||||
}
|
||||
|
||||
void realbrk_state::realbrk(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
TMP68301(config, m_maincpu, XTAL(32'000'000) / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &realbrk_state::realbrk_mem);
|
||||
m_maincpu->out_parallel_callback().set(FUNC(realbrk_state::realbrk_flipscreen_w));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(realbrk_state::realbrk_flipscreen_w));
|
||||
|
||||
/* video hardware */
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(60);
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0));
|
||||
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500));
|
||||
m_screen->set_size(0x140, 0xe0);
|
||||
m_screen->set_visarea(0, 0x140-1, 0, 0xe0-1);
|
||||
m_screen->set_screen_update(FUNC(realbrk_state::screen_update));
|
||||
m_screen->set_palette(m_palette);
|
||||
m_screen->screen_vblank().set(FUNC(realbrk_state::vblank_irq));
|
||||
m_screen->screen_vblank().set_inputline(m_maincpu, 1);
|
||||
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_realbrk);
|
||||
PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 0x8000);
|
||||
@ -793,7 +785,7 @@ void realbrk_state::pkgnsh(machine_config &config)
|
||||
realbrk(config);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &realbrk_state::pkgnsh_mem);
|
||||
m_maincpu->out_parallel_callback().set_nop();
|
||||
m_maincpu->parallel_w_cb().set_nop();
|
||||
}
|
||||
|
||||
void realbrk_state::pkgnshdx(machine_config &config)
|
||||
@ -808,7 +800,7 @@ void realbrk_state::dai2kaku(machine_config &config)
|
||||
realbrk(config);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &realbrk_state::dai2kaku_mem);
|
||||
m_maincpu->out_parallel_callback().set(FUNC(realbrk_state::dai2kaku_flipscreen_w));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(realbrk_state::dai2kaku_flipscreen_w));
|
||||
|
||||
m_gfxdecode->set_info(gfx_dai2kaku);
|
||||
m_screen->set_screen_update(FUNC(realbrk_state::screen_update_dai2kaku));
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "machine/tmp68301.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "emupal.h"
|
||||
#include "screen.h"
|
||||
#include "tilemap.h"
|
||||
|
||||
@ -31,11 +31,10 @@
|
||||
#include "bus/nscsi/cd.h"
|
||||
#include "bus/nscsi/hd.h"
|
||||
#include "cpu/m6502/m3745x.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "imagedev/floppy.h"
|
||||
#include "machine/bankdev.h"
|
||||
#include "machine/ncr5380.h"
|
||||
#include "machine/tmp68301.h"
|
||||
#include "machine/upd765.h"
|
||||
#include "video/t6963c.h"
|
||||
|
||||
|
||||
@ -93,12 +93,11 @@ TODO:
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "machine/bankdev.h"
|
||||
#include "machine/eepromser.h"
|
||||
#include "machine/intelfsh.h"
|
||||
#include "machine/msm6242.h"
|
||||
#include "machine/tmp68301.h"
|
||||
#include "sound/okim6295.h"
|
||||
#include "sound/ymopl.h"
|
||||
#include "emupal.h"
|
||||
@ -556,20 +555,13 @@ void joystand_state::machine_reset()
|
||||
{
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(joystand_state::joystand_interrupt)
|
||||
{
|
||||
// VBlank is connected to INT1 (external interrupts pin 1)
|
||||
m_maincpu->external_interrupt_1();
|
||||
}
|
||||
|
||||
void joystand_state::joystand(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
TMP68301(config, m_maincpu, XTAL(16'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &joystand_state::joystand_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(joystand_state::joystand_interrupt));
|
||||
m_maincpu->in_parallel_callback().set(FUNC(joystand_state::eeprom_r));
|
||||
m_maincpu->out_parallel_callback().set(FUNC(joystand_state::eeprom_w));
|
||||
m_maincpu->parallel_r_cb().set(FUNC(joystand_state::eeprom_r));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(joystand_state::eeprom_w));
|
||||
|
||||
ADDRESS_MAP_BANK(config, m_cartflash_bankdev).set_map(&joystand_state::cart_map).set_options(ENDIANNESS_BIG, 16, 24, 0x800000); // TODO: address bit per carts?
|
||||
// video hardware
|
||||
@ -578,6 +570,7 @@ void joystand_state::joystand(machine_config &config)
|
||||
screen.set_screen_update(FUNC(joystand_state::screen_update));
|
||||
screen.set_size(0x200, 0x100);
|
||||
screen.set_visarea(0x40, 0x40+0x178-1, 0x10, 0x100-1);
|
||||
screen.screen_vblank().set_inputline(m_maincpu, 1);
|
||||
|
||||
PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x1000);
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_joystand);
|
||||
|
||||
@ -12,39 +12,58 @@
|
||||
- csplayh1: inputs doesn't work at all, slower than the others too.
|
||||
Probably not a DVD but CD rom game?
|
||||
|
||||
|
||||
DVD Notes:
|
||||
- Testing currently requires converting the data to cd mode 1
|
||||
format (extracthd, rename to .iso, createcd) then change the
|
||||
checksum. This will be fixed and the checksums changed to
|
||||
something different again, so don't do the intermediate step
|
||||
yet
|
||||
|
||||
- TMP68301 communicates with h8 via their respective internal serial comms
|
||||
- First command is a "?P<CR>", which, according to the Pioneer V5000 protocol manual
|
||||
is an Active Mode request. Manual is at:
|
||||
http://www.pioneerelectronics.com/ephox/StaticFiles/Manuals/Business/Pio%20V5000-RS232%20-%20CPM.pdf
|
||||
After returning a correct status code, tmp68301 sends "FSDVD04.MPG00001<CR>" to serial, probably tries
|
||||
to playback the file ...
|
||||
|
||||
- TMP sends "?P", h8 answers "P01", TMP tends "?S", h8 answers "NG", games says the dvd drive has a problem
|
||||
|
||||
- h8 board components:
|
||||
H8/3002
|
||||
MN7100 8-bit channel data acquisition system
|
||||
Fujitsu MD0208
|
||||
Heatsinked chip (TBD)
|
||||
IDE and RS232c ports
|
||||
xtal 27 MHz
|
||||
xtal 27 MHz, 12.288MHz
|
||||
|
||||
H8 ports directions:
|
||||
8: fe /5 ---ooooi
|
||||
9: c3 /6 --iiiioo
|
||||
a: ff /8 oooooooo
|
||||
b: 3f /8 iioooooo
|
||||
|
||||
***********************************************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "bus/ata/atadev.h"
|
||||
#include "bus/ata/atapicdr.h"
|
||||
#include "bus/ata/ataintf.h"
|
||||
#include "cpu/h8/h83002.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "machine/tmp68301.h"
|
||||
#include "machine/idectrl.h"
|
||||
#include "machine/timer.h"
|
||||
#include "video/v9938.h"
|
||||
#include "nichisnd.h"
|
||||
|
||||
class hrdvd_ata_controller_device : public abstract_ata_interface_device
|
||||
{
|
||||
public:
|
||||
hrdvd_ata_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
|
||||
|
||||
namespace {
|
||||
uint16_t dma_read();
|
||||
void dma_write(uint16_t data);
|
||||
|
||||
#define USE_H8 0
|
||||
#define DVD_CLOCK XTAL(27'000'000)
|
||||
uint16_t read(offs_t offset, uint16_t mem_mask);
|
||||
void write(offs_t offset, uint16_t data, uint16_t mem_mask);
|
||||
};
|
||||
|
||||
DEFINE_DEVICE_TYPE(HRDVD_ATA_CONTROLLER_DEVICE, hrdvd_ata_controller_device, "hrdvd_atactrl", "High Rate DVD ATA controller device")
|
||||
|
||||
class csplayh5_state : public driver_device
|
||||
{
|
||||
@ -52,53 +71,44 @@ public:
|
||||
csplayh5_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_subcpu(*this, "subcpu"),
|
||||
m_ata(*this, "ata"),
|
||||
m_nichisnd(*this, "nichisnd"),
|
||||
m_key(*this, "KEY.%u", 0),
|
||||
m_region_maincpu(*this, "maincpu")
|
||||
{ }
|
||||
|
||||
required_device<tmp68301_device> m_maincpu;
|
||||
required_device<h83002_device> m_subcpu;
|
||||
required_device<hrdvd_ata_controller_device> m_ata;
|
||||
required_device<nichisnd_device> m_nichisnd;
|
||||
required_ioport_array<5> m_key;
|
||||
required_memory_region m_region_maincpu;
|
||||
|
||||
uint16_t m_mux_data;
|
||||
|
||||
uint8_t m_p5, m_pa, m_pb;
|
||||
|
||||
uint16_t pb_r();
|
||||
void pb_w(uint16_t data);
|
||||
void pa_w(uint16_t data);
|
||||
|
||||
uint8_t cs0_r(offs_t offset);
|
||||
void cs0_w(offs_t offset, uint8_t data);
|
||||
|
||||
uint8_t sec_r();
|
||||
void sec_w(uint8_t data);
|
||||
void sec2_w(uint8_t data);
|
||||
void sec3_w(uint8_t data);
|
||||
|
||||
uint16_t csplayh5_mux_r();
|
||||
void csplayh5_mux_w(uint16_t data);
|
||||
void tmp68301_parallel_port_w(uint16_t data);
|
||||
|
||||
#if USE_H8
|
||||
uint16_t test_r();
|
||||
DECLARE_WRITE_LINE_MEMBER(ide_irq);
|
||||
#endif
|
||||
|
||||
void init_csplayh1();
|
||||
|
||||
void init_aimode();
|
||||
void init_bikiniko();
|
||||
void init_csplayh5();
|
||||
void init_csplayh6();
|
||||
void init_csplayh7();
|
||||
void init_fuudol();
|
||||
void init_junai();
|
||||
void init_junai2();
|
||||
void init_konhaji();
|
||||
void init_mjgalpri();
|
||||
void init_mjmania();
|
||||
void init_mogitate();
|
||||
void init_nichisel();
|
||||
void init_nuretemi();
|
||||
void init_pokoachu();
|
||||
void init_renaimj();
|
||||
void init_sengomjk();
|
||||
void init_thenanpa();
|
||||
void init_torarech();
|
||||
void init_tsuwaku();
|
||||
DECLARE_WRITE_LINE_MEMBER(ata_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(ata_drq);
|
||||
|
||||
virtual void machine_reset() override;
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(csplayh5_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(csplayh5_vdp0_interrupt);
|
||||
|
||||
void general_init(int patchaddress, int patchvalue);
|
||||
void csplayh5(machine_config &config);
|
||||
@ -107,9 +117,52 @@ public:
|
||||
void csplayh5_sub_map(address_map &map);
|
||||
};
|
||||
|
||||
// Some kind of device a table is sent to
|
||||
uint8_t csplayh5_state::sec_r()
|
||||
{
|
||||
// Bit 3 means ready for upload
|
||||
return 0x08;
|
||||
}
|
||||
|
||||
void csplayh5_state::sec_w(uint8_t data)
|
||||
{
|
||||
// Table is 0xe00 bytes at offset 0x1000 of the h8 rom
|
||||
}
|
||||
|
||||
void csplayh5_state::sec2_w(uint8_t data)
|
||||
{
|
||||
// Table is 0x1000 bytes at offset 0x1e00 of the h8 rom
|
||||
}
|
||||
|
||||
void csplayh5_state::sec3_w(uint8_t data)
|
||||
{
|
||||
// Another table, partially hardcoded, partially generated
|
||||
}
|
||||
|
||||
uint16_t csplayh5_state::pb_r()
|
||||
{
|
||||
return m_pb;
|
||||
}
|
||||
|
||||
void csplayh5_state::pb_w(uint16_t data)
|
||||
{
|
||||
m_pb = (m_pb & 0xc0) | (data & 0x3f);
|
||||
logerror("pb %02x\n", data);
|
||||
}
|
||||
|
||||
void csplayh5_state::pa_w(uint16_t data)
|
||||
{
|
||||
if((m_pa & 0x80) && !(data & 0x80))
|
||||
logerror("bit %c\n", data & 0x40 ? '1' : '0');
|
||||
if(m_pa & 0x20)
|
||||
logerror("bit reset\n");
|
||||
m_pa = data;
|
||||
logerror("pa %02x %c%c%c\n",
|
||||
data,
|
||||
data & 0x80 ? 'c' : '-',
|
||||
data & 0x40 ? 'd' : '-',
|
||||
data & 0x20 ? '#' : '-');
|
||||
}
|
||||
|
||||
uint16_t csplayh5_state::csplayh5_mux_r()
|
||||
{
|
||||
@ -129,6 +182,46 @@ void csplayh5_state::csplayh5_mux_w(uint16_t data)
|
||||
m_mux_data = (~data & 0x1f);
|
||||
}
|
||||
|
||||
hrdvd_ata_controller_device::hrdvd_ata_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
abstract_ata_interface_device(mconfig, HRDVD_ATA_CONTROLLER_DEVICE, tag, owner, clock)
|
||||
{
|
||||
}
|
||||
|
||||
uint16_t hrdvd_ata_controller_device::dma_read()
|
||||
{
|
||||
write_dmack(1);
|
||||
uint16_t r = swapendian_int16(read_dma());
|
||||
write_dmack(0);
|
||||
return r;
|
||||
}
|
||||
|
||||
void hrdvd_ata_controller_device::dma_write(uint16_t data)
|
||||
{
|
||||
write_dmack(1);
|
||||
write_dma(swapendian_int16(data));
|
||||
write_dmack(0);
|
||||
}
|
||||
|
||||
uint16_t hrdvd_ata_controller_device::read(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
if(mem_mask == 0xffff)
|
||||
return swapendian_int16(internal_read_cs0(offset * 2, 0xffff));
|
||||
else if(ACCESSING_BITS_0_7)
|
||||
return internal_read_cs0(offset * 2 + 1, 0xff);
|
||||
else
|
||||
return internal_read_cs0(offset * 2, 0xff) << 8;
|
||||
}
|
||||
|
||||
void hrdvd_ata_controller_device::write(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if(mem_mask == 0xffff)
|
||||
internal_write_cs0(offset * 2, swapendian_int16(data), 0xffff);
|
||||
else if(ACCESSING_BITS_0_7)
|
||||
internal_write_cs0(offset * 2 + 1, data, 0xff);
|
||||
else
|
||||
internal_write_cs0(offset * 2, data >> 8, 0xff);
|
||||
}
|
||||
|
||||
void csplayh5_state::csplayh5_map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x03ffff).rom();
|
||||
@ -142,25 +235,18 @@ void csplayh5_state::csplayh5_map(address_map &map)
|
||||
|
||||
map(0x800000, 0xbfffff).rom().region("blit_gfx", 0); // GFX ROM routes here
|
||||
|
||||
map(0xc00000, 0xc7ffff).ram().share("nvram").mirror(0x380000); // work RAM
|
||||
}
|
||||
|
||||
#if USE_H8
|
||||
uint16_t csplayh5_state::test_r()
|
||||
{
|
||||
return machine().rand();
|
||||
map(0xe80000, 0xefffff).ram(); // work RAM
|
||||
}
|
||||
|
||||
void csplayh5_state::csplayh5_sub_map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x01ffff).rom();
|
||||
|
||||
map(0x02000a, 0x02000b).r(FUNC(csplayh5_state::test_r));
|
||||
// map(0x020008, 0x02000f).rw("ide", FUNC(ide_controller_device::cs0_r), FUNC(ide_controller_device::cs0_w));
|
||||
|
||||
map(0x040018, 0x040019).r(FUNC(csplayh5_state::test_r));
|
||||
map(0x040028, 0x04002f).rw("ide", FUNC(ide_controller_device::cs0_r), FUNC(ide_controller_device::cs0_w)); // correct?
|
||||
map(0x040036, 0x040037).r(FUNC(csplayh5_state::test_r));
|
||||
map(0x020008, 0x020008).w (FUNC(csplayh5_state::sec3_w));
|
||||
map(0x02000a, 0x02000a).rw(FUNC(csplayh5_state::sec_r), FUNC(csplayh5_state::sec_w));
|
||||
map(0x02000e, 0x02000e).w (FUNC(csplayh5_state::sec2_w));
|
||||
map(0x040018, 0x040019).rw(m_ata, FUNC(hrdvd_ata_controller_device::dma_read), FUNC(hrdvd_ata_controller_device::dma_write));
|
||||
map(0x040028, 0x04002f).rw(m_ata, FUNC(hrdvd_ata_controller_device::read), FUNC(hrdvd_ata_controller_device::write));
|
||||
|
||||
map(0x078000, 0x07ffff).mirror(0xf80000).ram(); //.share("nvram");
|
||||
}
|
||||
@ -168,9 +254,11 @@ void csplayh5_state::csplayh5_sub_map(address_map &map)
|
||||
|
||||
void csplayh5_state::csplayh5_sub_io_map(address_map &map)
|
||||
{
|
||||
map(0x0a, 0x0b).r(FUNC(csplayh5_state::test_r));
|
||||
map(h8_device::PORT_A, h8_device::PORT_A).w (FUNC(csplayh5_state::pa_w));
|
||||
map(h8_device::PORT_B, h8_device::PORT_B).rw(FUNC(csplayh5_state::pb_r), FUNC(csplayh5_state::pb_w));
|
||||
// map(h8_device::PORT_6, h8_device::PORT_6).noprw();
|
||||
// map(h8_device::PORT_A, h8_device::PORT_A).nopw();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static INPUT_PORTS_START( csplayh5 )
|
||||
@ -322,29 +410,22 @@ INPUT_PORTS_END
|
||||
|
||||
void csplayh5_state::machine_reset()
|
||||
{
|
||||
m_p5 = 0;
|
||||
m_pa = 0;
|
||||
m_pb = 0;
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(csplayh5_state::csplayh5_irq)
|
||||
WRITE_LINE_MEMBER(csplayh5_state::ata_irq)
|
||||
{
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 212*2)
|
||||
m_maincpu->external_interrupt_0();
|
||||
// logerror("ata irq %d\n", state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(csplayh5_state::csplayh5_vdp0_interrupt)
|
||||
WRITE_LINE_MEMBER(csplayh5_state::ata_drq)
|
||||
{
|
||||
/* this is not used as the v9938 interrupt callbacks are broken
|
||||
interrupts seem to be fired quite randomly */
|
||||
// logerror("ata drq %d\n", state);
|
||||
m_pb = (m_pb & 0x7f) | (state ? 0x00 : 0x80);
|
||||
}
|
||||
|
||||
#if USE_H8
|
||||
WRITE_LINE_MEMBER(csplayh5_state::ide_irq)
|
||||
{
|
||||
printf("h8 ide alive %d\n",state);
|
||||
}
|
||||
#endif
|
||||
|
||||
void csplayh5_state::tmp68301_parallel_port_w(uint16_t data)
|
||||
{
|
||||
/*
|
||||
@ -352,89 +433,45 @@ void csplayh5_state::tmp68301_parallel_port_w(uint16_t data)
|
||||
---- x--- enable DVD sound? Used by aimode at very least
|
||||
*/
|
||||
|
||||
if(data & ~0x48)
|
||||
printf("%04x\n",data);
|
||||
logerror("tmp: %02x\n", data);
|
||||
}
|
||||
|
||||
static void atapi_devs(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("cdrom", ATAPI_FIXED_CDROM);
|
||||
}
|
||||
|
||||
void csplayh5_state::csplayh5(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
TMP68301(config, m_maincpu, 16000000); /* TMP68301-16 */
|
||||
TMP68301(config, m_maincpu, 12.288_MHz_XTAL); /* TMP68301-16 */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &csplayh5_state::csplayh5_map);
|
||||
m_maincpu->out_parallel_callback().set(FUNC(csplayh5_state::tmp68301_parallel_port_w));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(csplayh5_state::tmp68301_parallel_port_w));
|
||||
|
||||
TIMER(config, "scantimer", 0).configure_scanline(FUNC(csplayh5_state::csplayh5_irq), "screen", 0, 1);
|
||||
H83002(config, m_subcpu, 27_MHz_XTAL/2);
|
||||
m_subcpu->set_addrmap(AS_PROGRAM, &csplayh5_state::csplayh5_sub_map);
|
||||
m_subcpu->set_addrmap(AS_IO, &csplayh5_state::csplayh5_sub_io_map);
|
||||
|
||||
#if USE_H8
|
||||
h830002_device &subcpu(H83002(config, "subcpu", DVD_CLOCK/2)); /* unknown divider */
|
||||
subcpu.set_addrmap(AS_PROGRAM, &csplayh5_state::csplayh5_sub_map);
|
||||
subcpu.set_addrmap(AS_IO, &csplayh5_state::csplayh5_sub_io_map);
|
||||
m_maincpu->tx0_handler().set(*m_subcpu->subdevice<h8_sci_device>("sci0"), FUNC(h8_sci_device::rx_w));
|
||||
m_subcpu->subdevice<h8_sci_device>("sci0")->tx_handler().set(m_maincpu, FUNC(tmp68301_device::rx0_w));
|
||||
|
||||
ide_controller_device &ide(IDE_CONTROLLER(config, "ide").options(ata_devices, "hdd", nullptr, true)); // dvd
|
||||
ide.irq_handler().set(FUNC(csplayh5_state::ide_irq));
|
||||
#endif
|
||||
HRDVD_ATA_CONTROLLER_DEVICE(config, m_ata).options(atapi_devs, "cdrom", nullptr, true); // dvd
|
||||
m_ata->irq_handler().set(FUNC(csplayh5_state::ata_irq));
|
||||
m_ata->dmarq_handler().set(FUNC(csplayh5_state::ata_drq));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
/* video hardware */
|
||||
v9958_device &v9958(V9958(config, "v9958", XTAL(21'477'272))); // typical 9958 clock, not verified
|
||||
v9958.set_screen_ntsc("screen");
|
||||
v9958.set_vram_size(0x20000);
|
||||
v9958.int_cb().set(FUNC(csplayh5_state::csplayh5_vdp0_interrupt));
|
||||
v9958.int_cb().set_inputline(m_maincpu, 0);
|
||||
SCREEN(config, "screen", SCREEN_TYPE_RASTER);
|
||||
|
||||
/* sound hardware */
|
||||
NICHISND(config, m_nichisnd, 0);
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
Game driver(s)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
void csplayh5_state::general_init(int patchaddress, int patchvalue)
|
||||
{
|
||||
#if !USE_H8
|
||||
uint16_t *MAINROM = (uint16_t *)m_region_maincpu->base();
|
||||
/* patch DVD comms check */
|
||||
MAINROM[patchaddress] = patchvalue;
|
||||
#endif
|
||||
|
||||
//uint8_t *SNDROM = m_region_:nichisnd:audiorom->base();
|
||||
|
||||
/* initialize sound rom bank */
|
||||
//soundbank_w(0);
|
||||
|
||||
/* patch sound program */
|
||||
//SNDROM[0x0213] = 0x00; // DI -> NOP
|
||||
|
||||
}
|
||||
|
||||
void csplayh5_state::init_csplayh1() { general_init(0x6880/2, 0x6020); }
|
||||
|
||||
void csplayh5_state::init_aimode() { general_init(0x9cda/2, 0x6018); }
|
||||
void csplayh5_state::init_bikiniko() { general_init(0x585c/2, 0x6018); }
|
||||
void csplayh5_state::init_csplayh5() { general_init(0x4cb4/2, 0x6018); }
|
||||
void csplayh5_state::init_csplayh6() { general_init(0x5976/2, 0x6018); }
|
||||
void csplayh5_state::init_csplayh7() { general_init(0x7a20/2, 0x6018); }
|
||||
void csplayh5_state::init_fuudol() { general_init(0x9166/2, 0x6018); }
|
||||
void csplayh5_state::init_junai() { general_init(0x679c/2, 0x6018); }
|
||||
void csplayh5_state::init_junai2() { general_init(0x6588/2, 0x6018); }
|
||||
void csplayh5_state::init_konhaji() { general_init(0x9200/2, 0x6018); }
|
||||
void csplayh5_state::init_mjgalpri() { general_init(0x5396/2, 0x6018); }
|
||||
void csplayh5_state::init_mjmania() { general_init(0x6b96/2, 0x6018); }
|
||||
void csplayh5_state::init_mogitate() { general_init(0x6ab4/2, 0x6018); }
|
||||
void csplayh5_state::init_nichisel() { general_init(0x9cd6/2, 0x6018); }
|
||||
void csplayh5_state::init_nuretemi() { general_init(0x8de2/2, 0x6018); }
|
||||
void csplayh5_state::init_pokoachu() { general_init(0x7b1e/2, 0x6018); }
|
||||
void csplayh5_state::init_renaimj() { general_init(0x568c/2, 0x6018); }
|
||||
void csplayh5_state::init_sengomjk() { general_init(0x5226/2, 0x6018); }
|
||||
void csplayh5_state::init_thenanpa() { general_init(0x69ec/2, 0x6018); }
|
||||
void csplayh5_state::init_torarech() { general_init(0x9384/2, 0x6018); }
|
||||
void csplayh5_state::init_tsuwaku() { general_init(0x856e/2, 0x6018); }
|
||||
|
||||
|
||||
/*
|
||||
* Base BIOS root (DVD board is common for all DVD games)
|
||||
@ -463,7 +500,7 @@ ROM_START( nichidvd )
|
||||
|
||||
ROM_REGION16_BE( 0x400000, "blit_gfx", ROMREGION_ERASEFF ) // blitter based gfxs
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
ROM_END
|
||||
|
||||
// TODO: this surely uses a different subboard
|
||||
@ -482,7 +519,7 @@ ROM_START( csplayh1 )
|
||||
ROM_LOAD16_BYTE( "4.bin", 0x000001, 0x080000, CRC(2e63ee15) SHA1(78fefbc277234458212cded997d393bd8b82cf76) )
|
||||
ROM_LOAD16_BYTE( "8.bin", 0x000000, 0x080000, CRC(a8567f1b) SHA1(2a854ef8b1988ad097bbcbeddc4b275ad738e1e1) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "csplayh1", 0, SHA1(d6514882c2626e62c5079df9ac68ecb70fc33209) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -506,7 +543,7 @@ ROM_START( mjgalpri )
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD( "gal16v8b.020", 0x000000, 0x040000, CRC(4c92a523) SHA1(51da73fdfdfccdc070fa8a13163e031438b50876) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8001", 0, SHA1(30f356af4e08567273a88758bb0ddd3544eea228) )
|
||||
ROM_END
|
||||
|
||||
@ -524,7 +561,7 @@ ROM_START( sengomjk )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(20791a5a) SHA1(03c38e9b8e60b0dded7504b2725210df5405110c) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(1ed72387) SHA1(7e2b8ce49561d6fd79dcf0d427569e5f6ef8dc67) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8002", 0, SHA1(d3502496526e62a877f12dccc27b32ae33d3704d) )
|
||||
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
@ -546,8 +583,9 @@ ROM_START( junai )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x00000, 0x80000, CRC(4182dc30) SHA1(89601c62b74aff3d65b075d4b5cd1eb2ccf4e386) )
|
||||
// 0x100000 - 0x3fffff empty sockets
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "junai", 0, SHA1(0491533e0ce3e4d2af608ea0b9d9646316b512bd) )
|
||||
// DISK_IMAGE_READONLY( "junai", 0, SHA1(282cc528ff175ac55f1545481ca1c40377cf9347) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( csplayh5 )
|
||||
@ -565,7 +603,7 @@ ROM_START( csplayh5 )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x00000, 0x80000, CRC(113d7e96) SHA1(f3fb9c719544417a6a018b82f07c65bf73de21ff) )
|
||||
// 0x100000 - 0x3fffff empty sockets
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "csplayh5", 0, SHA1(ce4883ce1351ce5299e41bfbd9a5ae8078b82b8c) )
|
||||
ROM_END
|
||||
|
||||
@ -584,7 +622,7 @@ ROM_START( junai2 )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x00000, 0x80000, CRC(5b37c8dd) SHA1(8de5e2f92721c6679c6506850a442cafff89653f) )
|
||||
// 0x100000 - 0x3fffff empty sockets
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "junai2", 0, SHA1(dc9633a101f20f03fd9b4414c10274d2539fb7c2) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -606,7 +644,7 @@ ROM_START( mogitate )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(ea655990) SHA1(7f59cfab21e8858625e82a9501acc943b07f799c) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(4c910b86) SHA1(48007f03f4e445b9de15531afe821c1b18fccae1) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8006", 0, SHA1(aa911e46e791d89ce4fed4a32b4b0637ba3a9920) )
|
||||
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
@ -627,7 +665,7 @@ ROM_START( mjmania )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(37dde764) SHA1(0530b63d8e682cdf01128057fdc3a8c23262afc9) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(dea4a2d2) SHA1(0118eb1330c9da8fead99f64fc015fd343fed79b) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "mjmania", 0, SHA1(7117f2045fd04a3d8f8e06a6a98e8f585c4da301) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -649,7 +687,7 @@ ROM_START( renaimj )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x00000, 0x80000, CRC(6d1c9efd) SHA1(c9ea9d6e6d34db5635fc55d41e7bb54a41948d27) )
|
||||
// 0x100000 - 0x3fffff empty sockets
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8008", 0, SHA1(49c92cb9b08ee7773f3d93fce0bbecc3c0ae654d) )
|
||||
|
||||
ROM_REGION( 0x40000, "gal", ROMREGION_ERASE00 )
|
||||
@ -671,7 +709,7 @@ ROM_START( bikiniko )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x00000, 0x80000, CRC(1e2e1cf3) SHA1(f71b5dedf4f897644d519e412651152d0d81edb8) )
|
||||
// 0x100000 - 0x3fffff empty sockets
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "bikiniko", 0, SHA1(2189b676746dd848b9b5eb69f9663d6dccd63787) )
|
||||
ROM_END
|
||||
|
||||
@ -690,7 +728,7 @@ ROM_START( csplayh6 )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x00000, 0x80000, CRC(858e0604) SHA1(64c23bc06898188798937770129697b3c4b547d6) )
|
||||
// 0x100000 - 0x3fffff empty sockets
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8010", 0, SHA1(01e247fe1b86bbfe743e09a625432874f881a9a0) )
|
||||
|
||||
ROM_REGION( 0x40000, "gal", ROMREGION_ERASE00 )
|
||||
@ -711,7 +749,7 @@ ROM_START( thenanpa )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(ee6b88c4) SHA1(64ae66a24f1639801c7bdda7faa0d604bb97ceb1) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(ce987845) SHA1(2f7dca32a79ad6afbc55ca1d492b582f952688ff) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "thenanpa", 0, SHA1(72bf8c75189e877508c5a64d5591738d23ed7e96) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -732,7 +770,7 @@ ROM_START( pokoachu )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(843c288e) SHA1(2741b9da83fd35c7472b8c67bc02313a1c5e4e25) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(6920a9b8) SHA1(0a4cb9e2a0d871aed60c1293b7cac4bf79a9446c) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8012", 0, SHA1(06c611f110377f5d02bbde1ab1d43d3623772b7b) )
|
||||
|
||||
ROM_REGION( 0x40000, "gal", ROMREGION_ERASE00 )
|
||||
@ -753,7 +791,7 @@ ROM_START( csplayh7 )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(1d67ca95) SHA1(9b45045b6fa67308bade324f91c21010aa8d121e) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(b4f5f990) SHA1(88cccae04f89fef43d88f4e82b65de3de946e9af) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "csplayh7", 0, SHA1(f81e772745b0c62b17d91bd294993e49fe8da4d9) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -774,7 +812,7 @@ ROM_START( aimode )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(4a9863cf) SHA1(ccf08befe773fb94fa78423ed19b6b8d255ca3a7) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(893aac1a) SHA1(14dd3f07363858c2be3a9400793f720b1f5baf1a) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8014", 0, SHA1(c5ad9bd66f0930e1c477126301286e38f077c164) )
|
||||
|
||||
ROM_REGION( 0x40000, "gal", ROMREGION_ERASE00 )
|
||||
@ -795,7 +833,7 @@ ROM_START( fuudol )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(5c9e8665) SHA1(2a1b040e5c72d4400d4b5c467c75ae99e9bb01e2) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(fdd79d8f) SHA1(f8bb82afaa28affb04b83270eb407129f1c7e611) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "fuudol", 0, SHA1(fabab43543ed14da4fe7c63a2a2cc4e68936938a) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -816,7 +854,7 @@ ROM_START( nuretemi )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(5c7af7f6) SHA1(78e58e3a81a6585c2c61f0026b7dc73a72c0d862) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(335b6388) SHA1(c5427b42af011b5a5026d905b1740684b9f6f953) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8016", 0, SHA1(607d9f390265da3f0c50753d0ea32257b12e8c08) )
|
||||
|
||||
ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 )
|
||||
@ -837,7 +875,7 @@ ROM_START( tsuwaku )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(00657ca3) SHA1(a02bb8a177f3915ddf0bf97fd69426a3a28061a5) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(edf56c94) SHA1(76d95a45aced3ad8bfe8a561f355731f4f99603e) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8017", 0, SHA1(6c86985574d53f990c4eec573d7fa84782cb9c4c) )
|
||||
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
@ -858,7 +896,7 @@ ROM_START( torarech )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(cbbbab5c) SHA1(ab8ae64b1f2acfab55ba7cbb173f3036a46001e6) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(18412fd8) SHA1(6907ce2739549519e1f3dcee2186f6add219a3c2) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8018", 0, SHA1(cf8758bb2caaba6377b354694123ddec71a4f8e1) )
|
||||
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
@ -879,7 +917,7 @@ ROM_START( nichisel )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(5ab63481) SHA1(fc81fbdd1df496813fc0d80bcab6d0434b75d311) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(50085861) SHA1(b8f99a66a743c9bf66ef307fe4b581586e293fe5) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb80sp", 0, SHA1(48eb9f8adba0ea5f59cfcbdee61c29b4af84ac97) )
|
||||
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
@ -900,15 +938,13 @@ ROM_START( konhaji )
|
||||
ROM_LOAD16_BYTE( "3.ic40", 0x000001, 0x080000, CRC(88f31da7) SHA1(dc76532fa3261b3b238a42e2ca8f270f2b2ea1fa) )
|
||||
ROM_LOAD16_BYTE( "4.ic41", 0x000000, 0x080000, CRC(35893109) SHA1(6a55bd147a75913af59bc355abf010e1b75063bf) )
|
||||
|
||||
DISK_REGION( "ide:0:hdd:image" )
|
||||
DISK_REGION( "ata:0:cdrom" )
|
||||
DISK_IMAGE_READONLY( "nb8019", 0, SHA1(f59ac1587009d7d15618549dc60cbd24c263a95f) )
|
||||
|
||||
ROM_REGION( 0x040000, "gal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD( "gal16v8b.bin", 0x000000, 0x000117, CRC(9f0dec43) SHA1(d836e564da496c3049e16f025daf362cced413d4) )
|
||||
ROM_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
|
||||
@ -917,35 +953,35 @@ ROM_END
|
||||
***************************************************************************/
|
||||
|
||||
// 1995
|
||||
GAME( 1995, csplayh1, 0, csplayh5, csplayh5, csplayh5_state, init_csplayh1, ROT0, "Sphinx/AV Japan/Astro System Japan", "Super CD Dai8dan Mahjong Hanafuda Cosplay Tengoku (Japan)", MACHINE_NOT_WORKING )
|
||||
GAME( 1995, csplayh1, 0, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Sphinx/AV Japan/Astro System Japan", "Super CD Dai8dan Mahjong Hanafuda Cosplay Tengoku (Japan)", MACHINE_NOT_WORKING )
|
||||
|
||||
GAME( 1998, nichidvd, 0, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu", "Nichibutsu High Rate DVD BIOS", MACHINE_IS_BIOS_ROOT )
|
||||
|
||||
// 1998
|
||||
/* 01 */ GAME( 1998, mjgalpri, nichidvd, csplayh5, csplayh5, csplayh5_state, init_mjgalpri, ROT0, "Nichibutsu/Just&Just", "Mahjong Gal-pri - World Gal-con Grandprix (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 02 */ GAME( 1998, sengomjk, nichidvd, csplayh5, csplayh5, csplayh5_state, init_sengomjk, ROT0, "Nichibutsu/Just&Just", "Sengoku Mahjong Kurenai Otome-tai (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 03 */ GAME( 1998, junai, nichidvd, csplayh5, csplayh5, csplayh5_state, init_junai, ROT0, "Nichibutsu/eic", "Junai - Manatsu no First Kiss (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 04 */ GAME( 1998, csplayh5, nichidvd, csplayh5, csplayh5, csplayh5_state, init_csplayh5, ROT0, "Nichibutsu", "Mahjong Hanafuda Cosplay Tengoku 5 (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 05 */ GAME( 1998, junai2, nichidvd, csplayh5, csplayh5, csplayh5_state, init_junai2, ROT0, "Nichibutsu/eic", "Junai 2 - White Love Story (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 06 */ GAME( 1998, mogitate, nichidvd, csplayh5, csplayh5, csplayh5_state, init_mogitate, ROT0, "Nichibutsu/Just&Just/NVS/Astro System/AV Japan", "Mahjong Mogitate (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 01 */ GAME( 1998, mjgalpri, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Just&Just", "Mahjong Gal-pri - World Gal-con Grandprix (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 02 */ GAME( 1998, sengomjk, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Just&Just", "Sengoku Mahjong Kurenai Otome-tai (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 03 */ GAME( 1998, junai, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Junai - Manatsu no First Kiss (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 04 */ GAME( 1998, csplayh5, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu", "Mahjong Hanafuda Cosplay Tengoku 5 (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 05 */ GAME( 1998, junai2, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Junai 2 - White Love Story (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 06 */ GAME( 1998, mogitate, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Just&Just/NVS/Astro System/AV Japan", "Mahjong Mogitate (Japan)", MACHINE_NOT_WORKING )
|
||||
|
||||
// 1999
|
||||
/* 07 */ GAME( 1999, mjmania, nichidvd, csplayh5, csplayh5, csplayh5_state, init_mjmania, ROT0, "Sphinx/Just&Just", "Mahjong Mania - Kairakukan e Youkoso (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 08 */ GAME( 1999, renaimj, nichidvd, csplayh5, csplayh5, csplayh5_state, init_renaimj, ROT0, "Nichibutsu/eic", "Renai Mahjong Idol Gakuen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 09 */ GAME( 1999, bikiniko, nichidvd, csplayh5, csplayh5, csplayh5_state, init_bikiniko, ROT0, "Nichibutsu/eic", "BiKiNikko - Okinawa de Ippai Shichaimashita (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 10 */ GAME( 1999, csplayh6, nichidvd, csplayh5, csplayh5, csplayh5_state, init_csplayh6, ROT0, "Nichibutsu/eic", "Mahjong Hanafuda Cosplay Tengoku 6 - Junai-hen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 11 */ GAME( 1999, thenanpa, nichidvd, csplayh5, csplayh5, csplayh5_state, init_thenanpa, ROT0, "Nichibutsu/Love Factory/eic", "The Nanpa (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 12 */ GAME( 1999, pokoachu, nichidvd, csplayh5, csplayh5, csplayh5_state, init_pokoachu, ROT0, "Nichibutsu/eic", "PokoaPoka Onsen de CHU - Bijin 3 Shimai ni Kiotsukete! (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 13 */ GAME( 1999, csplayh7, nichidvd, csplayh5, csplayh5, csplayh5_state, init_csplayh7, ROT0, "Nichibutsu/eic", "Cosplay Tengoku 7 - Super Kogal Ranking (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 14 */ GAME( 1999, aimode, nichidvd, csplayh5, csplayh5, csplayh5_state, init_aimode, ROT0, "Nichibutsu/eic", "Ai-mode - Pet Shiiku (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 07 */ GAME( 1999, mjmania, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Sphinx/Just&Just", "Mahjong Mania - Kairakukan e Youkoso (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 08 */ GAME( 1999, renaimj, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Renai Mahjong Idol Gakuen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 09 */ GAME( 1999, bikiniko, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "BiKiNikko - Okinawa de Ippai Shichaimashita (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 10 */ GAME( 1999, csplayh6, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Mahjong Hanafuda Cosplay Tengoku 6 - Junai-hen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 11 */ GAME( 1999, thenanpa, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Love Factory/eic", "The Nanpa (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 12 */ GAME( 1999, pokoachu, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "PokoaPoka Onsen de CHU - Bijin 3 Shimai ni Kiotsukete! (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 13 */ GAME( 1999, csplayh7, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Cosplay Tengoku 7 - Super Kogal Ranking (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 14 */ GAME( 1999, aimode, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Ai-mode - Pet Shiiku (Japan)", MACHINE_NOT_WORKING )
|
||||
|
||||
// 2000
|
||||
/* 15 */ GAME( 2000, fuudol, nichidvd, csplayh5, csplayh5, csplayh5_state, init_fuudol, ROT0, "Nichibutsu/eic", "Fuudol (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 16 */ GAME( 2000, nuretemi, nichidvd, csplayh5, csplayh5, csplayh5_state, init_nuretemi, ROT0, "Nichibutsu/Love Factory", "Nurete Mitaino... - Net Idol Hen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 17 */ GAME( 2000, tsuwaku, nichidvd, csplayh5, csplayh5, csplayh5_state, init_tsuwaku, ROT0, "Nichibutsu/Love Factory/Just&Just", "Tsuugakuro no Yuuwaku (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 18 */ GAME( 2000, torarech, nichidvd, csplayh5, csplayh5, csplayh5_state, init_torarech, ROT0, "Nichibutsu/Love Factory/M Friend", "Torarechattano - AV Kantoku Hen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* sp */ GAME( 2000, nichisel, nichidvd, csplayh5, csplayh5, csplayh5_state, init_nichisel, ROT0, "Nichibutsu", "DVD Select (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 15 */ GAME( 2000, fuudol, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/eic", "Fuudol (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 16 */ GAME( 2000, nuretemi, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Love Factory", "Nurete Mitaino... - Net Idol Hen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 17 */ GAME( 2000, tsuwaku, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Love Factory/Just&Just", "Tsuugakuro no Yuuwaku (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 18 */ GAME( 2000, torarech, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Love Factory/M Friend", "Torarechattano - AV Kantoku Hen (Japan)", MACHINE_NOT_WORKING )
|
||||
/* sp */ GAME( 2000, nichisel, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu", "DVD Select (Japan)", MACHINE_NOT_WORKING )
|
||||
|
||||
// 2001
|
||||
/* 19 */ GAME( 2001, konhaji, nichidvd, csplayh5, csplayh5, csplayh5_state, init_konhaji, ROT0, "Nichibutsu/Love Factory", "Konnano Hajimete! (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 19 */ GAME( 2001, konhaji, nichidvd, csplayh5, csplayh5, csplayh5_state, empty_init, ROT0, "Nichibutsu/Love Factory", "Konnano Hajimete! (Japan)", MACHINE_NOT_WORKING )
|
||||
/* 20 */ // Uwasa no Deaikei Site : Nichibutsu/Love Factory/eic
|
||||
|
||||
@ -38,9 +38,7 @@ Memo:
|
||||
#include "emu.h"
|
||||
#include "niyanpai.h"
|
||||
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "machine/tmp68301.h"
|
||||
|
||||
|
||||
|
||||
@ -676,19 +674,12 @@ static INPUT_PORTS_START( zokumahj ) // I don't have manual for this game.
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
WRITE_LINE_MEMBER(niyanpai_state::vblank_irq)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->external_interrupt_0();
|
||||
}
|
||||
|
||||
|
||||
void niyanpai_state::niyanpai(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
TMP68301(config, m_maincpu, 12288000/2); /* TMP68301, 6.144 MHz */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &niyanpai_state::niyanpai_map);
|
||||
m_maincpu->out_parallel_callback().set(FUNC(niyanpai_state::tmp68301_parallel_port_w));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(niyanpai_state::tmp68301_parallel_port_w));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
@ -700,7 +691,7 @@ void niyanpai_state::niyanpai(machine_config &config)
|
||||
m_screen->set_visarea(0, 640-1, 0, 240-1);
|
||||
m_screen->set_screen_update(FUNC(niyanpai_state::screen_update));
|
||||
m_screen->set_palette(m_palette);
|
||||
m_screen->screen_vblank().set(FUNC(niyanpai_state::vblank_irq));
|
||||
m_screen->screen_vblank().set_inputline(m_maincpu, 0);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(256*3);
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Takahiro Nogi
|
||||
|
||||
#include "machine/tmp68301.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "screen.h"
|
||||
#include "nichisnd.h"
|
||||
#include "nb1413m3.h"
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "machine/tmp68301.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "sound/x1_010.h"
|
||||
#include "video/x1_001.h"
|
||||
@ -71,12 +71,6 @@ u16 kiwame_state::input_r(offs_t offset)
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(kiwame_state::kiwame_vblank)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->external_interrupt_0();
|
||||
}
|
||||
|
||||
u32 kiwame_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
bitmap.fill(0x1f0, cliprect);
|
||||
@ -275,7 +269,7 @@ void kiwame_state::kiwame(machine_config &config)
|
||||
/* basic machine hardware */
|
||||
TMP68301(config, m_maincpu, 16000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &kiwame_state::kiwame_map);
|
||||
m_maincpu->out_parallel_callback().set(FUNC(kiwame_state::row_select_w));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(kiwame_state::row_select_w));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // 2x LH52B256D-70LL + battery (possibly only lower bytes battery-backed)
|
||||
|
||||
@ -292,7 +286,7 @@ void kiwame_state::kiwame(machine_config &config)
|
||||
screen.set_size(64*8, 32*8);
|
||||
screen.set_visarea(0*8, 56*8-1, 1*8, 31*8-1);
|
||||
screen.set_screen_update(FUNC(kiwame_state::screen_update));
|
||||
screen.screen_vblank().set(FUNC(kiwame_state::kiwame_vblank));
|
||||
screen.screen_vblank().set_inputline(m_maincpu, 0);
|
||||
screen.set_palette("palette");
|
||||
|
||||
PALETTE(config, "palette").set_format(palette_device::xRGB_555, 512); // sprites only
|
||||
|
||||
@ -49,7 +49,6 @@ P0-145-1 2002 Trophy Hunting - Bear & Moose (test) Sammy
|
||||
|
||||
TODO:
|
||||
|
||||
- Proper emulation of the TMP68301 CPU, in a core file.
|
||||
- Proper emulation of the ColdFire CPU, in a core file.
|
||||
- improvements to Flip screen / Zooming support. (Flip Screen is often done with 'negative zoom value')
|
||||
- Fix some graphics imperfections (e.g. color depth selection, "tilemap" sprites) [all done? - NS]
|
||||
@ -2271,22 +2270,10 @@ GFXDECODE_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
INTERRUPT_GEN_MEMBER(seta2_state::seta2_interrupt)
|
||||
{
|
||||
/* VBlank is connected to INT0 (external interrupts pin 0) */
|
||||
downcast<tmp68301_device &>(*m_maincpu).external_interrupt_0();
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(seta2_state::samshoot_interrupt)
|
||||
{
|
||||
downcast<tmp68301_device &>(*m_maincpu).external_interrupt_2(); // to do: hook up x1-10 interrupts
|
||||
}
|
||||
|
||||
void seta2_state::seta2(machine_config &config)
|
||||
{
|
||||
TMP68301(config, m_maincpu, XTAL(50'000'000)/3); // Verified on some PCBs
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::mj4simai_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(seta2_state::seta2_interrupt));
|
||||
|
||||
WATCHDOG_TIMER(config, "watchdog");
|
||||
|
||||
@ -2298,6 +2285,7 @@ void seta2_state::seta2(machine_config &config)
|
||||
m_screen->set_visarea(0x00, 0x180-1, 0x00, 0xf0-1);
|
||||
m_screen->set_screen_update(FUNC(seta2_state::screen_update));
|
||||
m_screen->screen_vblank().set(FUNC(seta2_state::screen_vblank));
|
||||
m_screen->screen_vblank().append_inputline(m_maincpu, 0);
|
||||
m_screen->set_palette(m_palette);
|
||||
//m_screen->set_video_attributes(VIDEO_UPDATE_SCANLINE);
|
||||
|
||||
@ -2333,8 +2321,8 @@ void seta2_state::gundamex(machine_config &config)
|
||||
seta2_32m(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::gundamex_map);
|
||||
|
||||
downcast<tmp68301_device &>(*m_maincpu).in_parallel_callback().set(FUNC(seta2_state::gundamex_eeprom_r));
|
||||
downcast<tmp68301_device &>(*m_maincpu).out_parallel_callback().set(FUNC(seta2_state::gundamex_eeprom_w));
|
||||
downcast<tmp68301_device &>(*m_maincpu).parallel_r_cb().set(FUNC(seta2_state::gundamex_eeprom_r));
|
||||
downcast<tmp68301_device &>(*m_maincpu).parallel_w_cb().set(FUNC(seta2_state::gundamex_eeprom_w));
|
||||
|
||||
EEPROM_93C46_16BIT(config, "eeprom");
|
||||
|
||||
@ -2413,7 +2401,7 @@ void seta2_state::reelquak(machine_config &config)
|
||||
seta2(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::reelquak_map);
|
||||
|
||||
downcast<tmp68301_device &>(*m_maincpu).out_parallel_callback().set(FUNC(seta2_state::reelquak_leds_w));
|
||||
downcast<tmp68301_device &>(*m_maincpu).parallel_w_cb().set(FUNC(seta2_state::reelquak_leds_w));
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
TICKET_DISPENSER(config, m_dispenser, attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
|
||||
@ -2426,9 +2414,10 @@ void seta2_state::samshoot(machine_config &config)
|
||||
{
|
||||
seta2(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::samshoot_map);
|
||||
m_maincpu->set_periodic_int(FUNC(seta2_state::samshoot_interrupt), attotime::from_hz(60));
|
||||
m_screen->screen_vblank().set(FUNC(seta2_state::screen_vblank));
|
||||
m_screen->screen_vblank().append_inputline(m_maincpu, 2);
|
||||
|
||||
downcast<tmp68301_device &>(*m_maincpu).in_parallel_callback().set_ioport("DSW2");
|
||||
downcast<tmp68301_device &>(*m_maincpu).parallel_w_cb().set_ioport("DSW2");
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
@ -2457,7 +2446,7 @@ void seta2_state::telpacfl(machine_config &config)
|
||||
seta2(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::telpacfl_map);
|
||||
|
||||
downcast<tmp68301_device &>(*m_maincpu).in_parallel_callback().set_ioport("KNOB");
|
||||
downcast<tmp68301_device &>(*m_maincpu).parallel_r_cb().set_ioport("KNOB");
|
||||
|
||||
EEPROM_93C46_16BIT(config, "eeprom"); // not hooked up, seems unused
|
||||
|
||||
@ -2562,7 +2551,6 @@ void seta2_state::namcostr(machine_config &config)
|
||||
{
|
||||
TMP68301(config, m_maincpu, XTAL(50'000'000)/3); // !! TMP68301 !!
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::namcostr_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(seta2_state::seta2_interrupt));
|
||||
// does this have a ticket dispenser?
|
||||
|
||||
// video hardware
|
||||
@ -2573,6 +2561,7 @@ void seta2_state::namcostr(machine_config &config)
|
||||
m_screen->set_visarea(0x40, 0x1c0-1, 0x00, 0xf0-1);
|
||||
m_screen->set_screen_update(FUNC(seta2_state::screen_update));
|
||||
m_screen->screen_vblank().set(FUNC(seta2_state::screen_vblank));
|
||||
m_screen->screen_vblank().append_inputline(m_maincpu, 0);
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
GFXDECODE(config, m_gfxdecode, m_palette, gfx_seta2);
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
#pragma once
|
||||
|
||||
|
||||
#include "machine/tmp68301.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "machine/eepromser.h"
|
||||
#include "machine/intelfsh.h"
|
||||
#include "machine/ticket.h"
|
||||
@ -99,9 +99,6 @@ protected:
|
||||
|
||||
void sound_bank_w(offs_t offset, uint8_t data);
|
||||
|
||||
INTERRUPT_GEN_MEMBER(seta2_interrupt);
|
||||
INTERRUPT_GEN_MEMBER(samshoot_interrupt);
|
||||
|
||||
void ablastb_map(address_map &map);
|
||||
void grdians_map(address_map &map);
|
||||
void gundamex_map(address_map &map);
|
||||
|
||||
@ -781,7 +781,7 @@ TIMER_CALLBACK_MEMBER(seta2_state::raster_timer_done)
|
||||
{
|
||||
if (m_rasterenabled & 1)
|
||||
{
|
||||
tmp68301->external_interrupt_1();
|
||||
tmp68301->set_input_line(1, HOLD_LINE);
|
||||
logerror("external int (vpos is %d)\n", m_screen->vpos());
|
||||
m_screen->update_partial(m_screen->vpos() - 1);
|
||||
}
|
||||
|
||||
@ -40,10 +40,9 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "speaker.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "machine/te7750.h"
|
||||
#include "machine/tmp68301.h"
|
||||
#include "sound/ymopn.h"
|
||||
#include "taitosnd.h"
|
||||
|
||||
|
||||
@ -33,7 +33,7 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "machine/tmp68301.h"
|
||||
#include "cpu/m68000/tmp68301.h"
|
||||
#include "video/t6963c.h"
|
||||
|
||||
namespace {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user