mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
ay31015: Replace generic pin setters and getters with READ_LINE and WRITE_LINE handlers (nw)
This commit is contained in:
AJR
parent
b67bd1aeff
commit
ca733d81b3
@ -208,22 +208,22 @@ void ay31015_device::device_reset()
|
||||
inline uint8_t ay31015_device::get_si()
|
||||
{
|
||||
if (!m_read_si_cb.isnull())
|
||||
m_pins[AY31015_SI] = m_read_si_cb();
|
||||
m_pins[SI] = m_read_si_cb();
|
||||
|
||||
return m_pins[AY31015_SI];
|
||||
return m_pins[SI];
|
||||
}
|
||||
|
||||
|
||||
inline void ay31015_device::set_so( int data )
|
||||
{
|
||||
m_pins[AY31015_SO] = data ? 1 : 0;
|
||||
m_pins[SO] = data ? 1 : 0;
|
||||
|
||||
if (!m_write_so_cb.isnull())
|
||||
m_write_so_cb(m_pins[AY31015_SO]);
|
||||
m_write_so_cb(m_pins[SO]);
|
||||
}
|
||||
|
||||
|
||||
inline void ay31015_device::update_status_pin(uint8_t reg_bit, ay31015_output_pin_t pin, devcb_write_line &write_cb)
|
||||
inline void ay31015_device::update_status_pin(uint8_t reg_bit, ay31015_device::output_pin pin, devcb_write_line &write_cb)
|
||||
{
|
||||
int new_value = (m_status_reg & reg_bit) ? 1 : 0;
|
||||
|
||||
@ -243,16 +243,16 @@ inline void ay31015_device::update_status_pin(uint8_t reg_bit, ay31015_output_pi
|
||||
void ay31015_device::update_status_pins()
|
||||
{
|
||||
/* Should status pins be updated? */
|
||||
if (!m_pins[AY31015_SWE])
|
||||
if (!m_pins[SWE])
|
||||
{
|
||||
update_status_pin(STATUS_PE, AY31015_PE, m_write_pe_cb);
|
||||
update_status_pin(STATUS_FE, AY31015_FE, m_write_fe_cb);
|
||||
update_status_pin(STATUS_OR, AY31015_OR, m_write_or_cb);
|
||||
update_status_pin(STATUS_DAV, AY31015_DAV, m_write_dav_cb);
|
||||
update_status_pin(STATUS_TBMT, AY31015_TBMT, m_write_tbmt_cb);
|
||||
update_status_pin(STATUS_PE, PE, m_write_pe_cb);
|
||||
update_status_pin(STATUS_FE, FE, m_write_fe_cb);
|
||||
update_status_pin(STATUS_OR, OR, m_write_or_cb);
|
||||
update_status_pin(STATUS_DAV, DAV, m_write_dav_cb);
|
||||
update_status_pin(STATUS_TBMT, TBMT, m_write_tbmt_cb);
|
||||
}
|
||||
|
||||
update_status_pin(STATUS_EOC, AY31015_EOC, m_write_eoc_cb);
|
||||
update_status_pin(STATUS_EOC, EOC, m_write_eoc_cb);
|
||||
}
|
||||
|
||||
void ay31015_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
@ -573,7 +573,7 @@ void ay31015_device::internal_reset()
|
||||
m_tx_data = 0;
|
||||
m_rx_state = PREP_TIME;
|
||||
m_tx_state = IDLE;
|
||||
m_pins[AY31015_SI] = 1;
|
||||
m_pins[SI] = 1;
|
||||
set_so(1);
|
||||
|
||||
m_rx_data = 0;
|
||||
@ -598,7 +598,7 @@ void ay51013_device::internal_reset()
|
||||
m_tx_data = 0;
|
||||
m_rx_state = PREP_TIME;
|
||||
m_tx_state = IDLE;
|
||||
m_pins[AY31015_SI] = 1;
|
||||
m_pins[SI] = 1;
|
||||
set_so(1);
|
||||
// no m_rx_data = 0 in this case
|
||||
}
|
||||
@ -611,11 +611,11 @@ void ay31015_device::transfer_control_pins()
|
||||
{
|
||||
uint8_t control = 0;
|
||||
|
||||
control |= m_pins[AY31015_NP ] ? CONTROL_NP : 0;
|
||||
control |= m_pins[AY31015_TSB] ? CONTROL_TSB : 0;
|
||||
control |= m_pins[AY31015_NB1] ? CONTROL_NB1 : 0;
|
||||
control |= m_pins[AY31015_NB2] ? CONTROL_NB2 : 0;
|
||||
control |= m_pins[AY31015_EPS] ? CONTROL_EPS : 0;
|
||||
control |= m_pins[NP ] ? CONTROL_NP : 0;
|
||||
control |= m_pins[TSB] ? CONTROL_TSB : 0;
|
||||
control |= m_pins[NB1] ? CONTROL_NB1 : 0;
|
||||
control |= m_pins[NB2] ? CONTROL_NB2 : 0;
|
||||
control |= m_pins[EPS] ? CONTROL_EPS : 0;
|
||||
|
||||
if (m_control_reg != control)
|
||||
{
|
||||
@ -628,50 +628,50 @@ void ay31015_device::transfer_control_pins()
|
||||
/*-------------------------------------------------
|
||||
ay31015_set_input_pin - set an input pin
|
||||
-------------------------------------------------*/
|
||||
void ay31015_device::set_input_pin( ay31015_input_pin_t pin, int data )
|
||||
void ay31015_device::set_input_pin( ay31015_device::input_pin pin, int data )
|
||||
{
|
||||
data = data ? 1 : 0;
|
||||
|
||||
switch (pin)
|
||||
{
|
||||
case AY31015_RCP:
|
||||
case RCP:
|
||||
if (!m_pins[pin] && data)
|
||||
rx_process();
|
||||
m_pins[pin] = data;
|
||||
break;
|
||||
case AY31015_TCP:
|
||||
case TCP:
|
||||
if (m_pins[pin] && !data)
|
||||
tx_process();
|
||||
m_pins[pin] = data;
|
||||
break;
|
||||
case AY31015_SWE:
|
||||
case SWE:
|
||||
m_pins[pin] = data;
|
||||
update_status_pins();
|
||||
break;
|
||||
case AY31015_RDAV:
|
||||
case RDAV:
|
||||
m_pins[pin] = data;
|
||||
if (!data)
|
||||
{
|
||||
m_status_reg &= ~STATUS_DAV;
|
||||
m_pins[AY31015_DAV] = 0;
|
||||
m_pins[DAV] = 0;
|
||||
}
|
||||
break;
|
||||
case AY31015_SI:
|
||||
case SI:
|
||||
m_pins[pin] = data;
|
||||
break;
|
||||
case AY31015_XR:
|
||||
case XR:
|
||||
m_pins[pin] = data;
|
||||
if (data)
|
||||
internal_reset();
|
||||
break;
|
||||
case AY31015_CS:
|
||||
case AY31015_NP:
|
||||
case AY31015_TSB:
|
||||
case AY31015_NB1:
|
||||
case AY31015_NB2:
|
||||
case AY31015_EPS:
|
||||
case CS:
|
||||
case NP:
|
||||
case TSB:
|
||||
case NB1:
|
||||
case NB2:
|
||||
case EPS:
|
||||
m_pins[pin] = data;
|
||||
if (m_pins[AY31015_CS])
|
||||
if (m_pins[CS])
|
||||
transfer_control_pins();
|
||||
break;
|
||||
}
|
||||
@ -682,7 +682,7 @@ void ay31015_device::set_input_pin( ay31015_input_pin_t pin, int data )
|
||||
ay31015_get_output_pin - get the status of an output pin
|
||||
-------------------------------------------------*/
|
||||
|
||||
int ay31015_device::get_output_pin( ay31015_output_pin_t pin )
|
||||
int ay31015_device::get_output_pin( ay31015_device::output_pin pin )
|
||||
{
|
||||
return m_pins[pin];
|
||||
}
|
||||
|
||||
@ -11,40 +11,6 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
enum ay31015_input_pin_t
|
||||
{
|
||||
AY31015_SWE = 16, /* -SWE - Pin 16 - Status word enable */
|
||||
AY31015_RCP = 17, /* RCP - Pin 17 - Receiver clock pulse */
|
||||
AY31015_RDAV = 18, /* -RDAV - Pin 18 - Reset data available */
|
||||
AY31015_SI = 20, /* SI - Pin 20 - Serial input */
|
||||
AY31015_XR = 21, /* XR - Pin 21 - External reset */
|
||||
AY31015_CS = 34, /* CS - Pin 34 - Control strobe */
|
||||
AY31015_NP = 35, /* NP - Pin 35 - No parity */
|
||||
AY31015_TSB = 36, /* TSB - Pin 36 - Number of stop bits */
|
||||
AY31015_NB2 = 37, /* NB2 - Pin 37 - Number of bits #2 */
|
||||
AY31015_NB1 = 38, /* NB1 - Pin 38 - Number of bits #1 */
|
||||
AY31015_EPS = 39, /* EPS - Pin 39 - Odd/Even parity select */
|
||||
AY31015_TCP = 40 /* TCP - Pin 40 - Transmitter clock pulse */
|
||||
};
|
||||
|
||||
|
||||
enum ay31015_output_pin_t
|
||||
{
|
||||
AY31015_PE = 13, /* PE - Pin 13 - Parity error */
|
||||
AY31015_FE = 14, /* FE - Pin 14 - Framing error */
|
||||
AY31015_OR = 15, /* OR - Pin 15 - Over-run */
|
||||
AY31015_DAV = 19, /* DAV - Pin 19 - Data available */
|
||||
AY31015_TBMT = 22, /* TBMT - Pin 22 - Transmit buffer empty */
|
||||
AY31015_EOC = 24, /* EOC - Pin 24 - End of character */
|
||||
AY31015_SO = 25 /* SO - Pin 25 - Serial output */
|
||||
};
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE INTERFACE
|
||||
***************************************************************************/
|
||||
@ -68,10 +34,27 @@ public:
|
||||
template <class Object> static devcb_base &set_write_eoc_callback(device_t &device, Object &&cb) { return downcast<ay31015_device &>(device).m_write_eoc_cb.set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
/* Set an input pin */
|
||||
void set_input_pin( ay31015_input_pin_t pin, int data );
|
||||
DECLARE_WRITE_LINE_MEMBER(write_swe) { set_input_pin(SWE, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_rcp) { set_input_pin(RCP, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_rdav) { set_input_pin(RDAV, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_si) { set_input_pin(SI, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_xr) { set_input_pin(XR, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_cs) { set_input_pin(CS, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_np) { set_input_pin(NP, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_tsb) { set_input_pin(TSB, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_nb2) { set_input_pin(NB2, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_nb1) { set_input_pin(NB1, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_eps) { set_input_pin(EPS, state); }
|
||||
DECLARE_WRITE_LINE_MEMBER(write_tcp) { set_input_pin(TCP, state); }
|
||||
|
||||
/* Get an output pin */
|
||||
int get_output_pin( ay31015_output_pin_t pin );
|
||||
DECLARE_READ_LINE_MEMBER(pe_r) { return get_output_pin(PE); }
|
||||
DECLARE_READ_LINE_MEMBER(fe_r) { return get_output_pin(FE); }
|
||||
DECLARE_READ_LINE_MEMBER(or_r) { return get_output_pin(OR); }
|
||||
DECLARE_READ_LINE_MEMBER(dav_r) { return get_output_pin(DAV); }
|
||||
DECLARE_READ_LINE_MEMBER(tbmt_r) { return get_output_pin(TBMT); }
|
||||
DECLARE_READ_LINE_MEMBER(eoc_r) { return get_output_pin(EOC); }
|
||||
DECLARE_READ_LINE_MEMBER(so_r) { return get_output_pin(SO); }
|
||||
|
||||
/* Set a new transmitter clock (new_clock is in Hz) */
|
||||
void set_transmitter_clock( double new_clock );
|
||||
@ -91,6 +74,33 @@ public:
|
||||
void tx_process();
|
||||
|
||||
protected:
|
||||
enum input_pin
|
||||
{
|
||||
SWE = 16, // -SWE - Pin 16 - Status word enable
|
||||
RCP = 17, // RCP - Pin 17 - Receiver clock pulse
|
||||
RDAV = 18, // -RDAV - Pin 18 - Reset data available
|
||||
SI = 20, // SI - Pin 20 - Serial input
|
||||
XR = 21, // XR - Pin 21 - External reset
|
||||
CS = 34, // CS - Pin 34 - Control strobe
|
||||
NP = 35, // NP - Pin 35 - No parity
|
||||
TSB = 36, // TSB - Pin 36 - Number of stop bits
|
||||
NB2 = 37, // NB2 - Pin 37 - Number of bits #2
|
||||
NB1 = 38, // NB1 - Pin 38 - Number of bits #1
|
||||
EPS = 39, // EPS - Pin 39 - Odd/Even parity select
|
||||
TCP = 40 // TCP - Pin 40 - Transmitter clock pulse
|
||||
};
|
||||
|
||||
enum output_pin
|
||||
{
|
||||
PE = 13, // PE - Pin 13 - Parity error
|
||||
FE = 14, // FE - Pin 14 - Framing error
|
||||
OR = 15, // OR - Pin 15 - Over-run
|
||||
DAV = 19, // DAV - Pin 19 - Data available
|
||||
TBMT = 22, // TBMT - Pin 22 - Transmit buffer empty
|
||||
EOC = 24, // EOC - Pin 24 - End of character
|
||||
SO = 25 // SO - Pin 25 - Serial output
|
||||
};
|
||||
|
||||
enum state_t : u8
|
||||
{
|
||||
IDLE,
|
||||
@ -117,9 +127,11 @@ protected:
|
||||
// internal state
|
||||
inline uint8_t get_si();
|
||||
inline void set_so(int data);
|
||||
inline void update_status_pin(uint8_t reg_bit, ay31015_output_pin_t pin, devcb_write_line &write_cb);
|
||||
inline void update_status_pin(uint8_t reg_bit, output_pin pin, devcb_write_line &write_cb);
|
||||
void update_status_pins();
|
||||
void transfer_control_pins();
|
||||
void set_input_pin(input_pin pin, int data);
|
||||
int get_output_pin(output_pin pin);
|
||||
inline void update_rx_timer();
|
||||
inline void update_tx_timer();
|
||||
|
||||
|
||||
@ -91,10 +91,10 @@ WRITE8_MEMBER(ampex_state::write_5840)
|
||||
|
||||
READ8_MEMBER(ampex_state::read_5841)
|
||||
{
|
||||
u8 result = m_uart->get_output_pin(AY31015_DAV) << 3;
|
||||
result |= m_uart->get_output_pin(AY31015_OR) << 4;
|
||||
result |= m_uart->get_output_pin(AY31015_PE) << 5;
|
||||
result |= m_uart->get_output_pin(AY31015_FE) << 6;
|
||||
u8 result = m_uart->dav_r() << 3;
|
||||
result |= m_uart->or_r() << 4;
|
||||
result |= m_uart->pe_r() << 5;
|
||||
result |= m_uart->fe_r() << 6;
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -118,9 +118,9 @@ WRITE8_MEMBER(ampex_state::write_5842)
|
||||
|
||||
READ8_MEMBER(ampex_state::read_5843)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->write_rdav(0);
|
||||
u8 data = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(1);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -190,7 +190,7 @@ void ampex_state::machine_start()
|
||||
m_attr_readback = false;
|
||||
m_paged_ram = std::make_unique<u16[]>(0x1800 * 4);
|
||||
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart->write_swe(0);
|
||||
|
||||
save_item(NAME(m_page));
|
||||
save_item(NAME(m_attr));
|
||||
|
||||
@ -68,14 +68,14 @@ WRITE8_MEMBER( cm1800_state::port00_w )
|
||||
|
||||
READ8_MEMBER( cm1800_state::port01_r )
|
||||
{
|
||||
return (m_uart->get_output_pin(AY31015_DAV)) | (m_uart->get_output_pin(AY31015_TBMT) << 2);
|
||||
return (m_uart->dav_r()) | (m_uart->tbmt_r() << 2);
|
||||
}
|
||||
|
||||
READ8_MEMBER( cm1800_state::port00_r )
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->write_rdav(0);
|
||||
u8 result = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(1);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -98,16 +98,16 @@ INPUT_PORTS_END
|
||||
|
||||
void cm1800_state::machine_reset()
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_XR, 0);
|
||||
m_uart->set_input_pin(AY31015_XR, 1);
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart->set_input_pin(AY31015_NP, 1);
|
||||
m_uart->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->write_xr(0);
|
||||
m_uart->write_xr(1);
|
||||
m_uart->write_swe(0);
|
||||
m_uart->write_np(1);
|
||||
m_uart->write_tsb(0);
|
||||
m_uart->write_nb1(1);
|
||||
m_uart->write_nb2(1);
|
||||
m_uart->write_eps(1);
|
||||
m_uart->write_cs(1);
|
||||
m_uart->write_cs(0);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(cm1800_state::cm1800)
|
||||
|
||||
@ -256,10 +256,10 @@ void hp2645_state::machine_reset()
|
||||
m_blanking = true;
|
||||
m_dma_on = true;
|
||||
m_eop = true;
|
||||
m_uart->set_input_pin(AY31015_XR , 1);
|
||||
m_uart->set_input_pin(AY31015_SWE , 0);
|
||||
m_uart->set_input_pin(AY31015_CS , 1);
|
||||
m_uart->set_input_pin(AY31015_NB2 , 1);
|
||||
m_uart->write_xr(1);
|
||||
m_uart->write_swe(0);
|
||||
m_uart->write_cs(1);
|
||||
m_uart->write_nb2(1);
|
||||
m_async_control = 0;
|
||||
m_uart->set_receiver_clock(0);
|
||||
m_uart->set_transmitter_clock(0);
|
||||
@ -439,7 +439,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(hp2645_state::timer_cursor_blink_inh)
|
||||
READ8_MEMBER(hp2645_state::async_data_r)
|
||||
{
|
||||
uint8_t res = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV , 0);
|
||||
m_uart->write_rdav(0);
|
||||
LOG("ASYNC RX=%02x\n" , res);
|
||||
// Update datacomm IRQ
|
||||
update_async_irq();
|
||||
@ -450,16 +450,16 @@ READ8_MEMBER(hp2645_state::async_status_r)
|
||||
{
|
||||
uint8_t res = 0;
|
||||
|
||||
if (m_uart->get_output_pin(AY31015_DAV)) {
|
||||
if (m_uart->dav_r()) {
|
||||
BIT_SET(res, 0);
|
||||
}
|
||||
if (m_uart->get_output_pin(AY31015_TBMT)) {
|
||||
if (m_uart->tbmt_r()) {
|
||||
BIT_SET(res, 1);
|
||||
}
|
||||
if (m_uart->get_output_pin(AY31015_OR)) {
|
||||
if (m_uart->or_r()) {
|
||||
BIT_SET(res, 2);
|
||||
}
|
||||
if (m_uart->get_output_pin(AY31015_PE)) {
|
||||
if (m_uart->pe_r()) {
|
||||
BIT_SET(res, 3);
|
||||
}
|
||||
if (m_rs232->dcd_r()) {
|
||||
@ -492,7 +492,7 @@ WRITE_LINE_MEMBER(hp2645_state::async_dav_w)
|
||||
|
||||
WRITE_LINE_MEMBER(hp2645_state::async_txd_w)
|
||||
{
|
||||
m_rs232->write_txd(!BIT(m_async_control , 6) && m_uart->get_output_pin(AY31015_SO));
|
||||
m_rs232->write_txd(!BIT(m_async_control , 6) && m_uart->so_r());
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(hp2645_state::timer_beep_exp)
|
||||
@ -716,13 +716,13 @@ void hp2645_state::update_async_control(uint8_t new_control)
|
||||
}
|
||||
m_uart->set_receiver_clock(rxc_txc_freq);
|
||||
m_uart->set_transmitter_clock(rxc_txc_freq);
|
||||
m_uart->set_input_pin(AY31015_TSB , new_rate_idx == 1);
|
||||
m_uart->write_tsb(new_rate_idx == 1);
|
||||
LOG("ASYNC freq=%f\n" , rxc_txc_freq);
|
||||
}
|
||||
if (diff & 0x30) {
|
||||
m_uart->set_input_pin(AY31015_NP , BIT(new_control , 5));
|
||||
m_uart->set_input_pin(AY31015_NB1 , BIT(new_control , 5));
|
||||
m_uart->set_input_pin(AY31015_EPS , BIT(new_control , 4));
|
||||
m_uart->write_np(BIT(new_control , 5));
|
||||
m_uart->write_nb1(BIT(new_control , 5));
|
||||
m_uart->write_eps(BIT(new_control , 4));
|
||||
}
|
||||
// Update TxD
|
||||
async_txd_w(0);
|
||||
@ -730,7 +730,7 @@ void hp2645_state::update_async_control(uint8_t new_control)
|
||||
|
||||
void hp2645_state::update_async_irq()
|
||||
{
|
||||
m_datacom_irq = m_uart->get_output_pin(AY31015_DAV);
|
||||
m_datacom_irq = m_uart->dav_r();
|
||||
LOG("ASYNC IRQ=%d\n" , m_datacom_irq);
|
||||
update_irq();
|
||||
}
|
||||
|
||||
@ -85,14 +85,14 @@ private:
|
||||
|
||||
READ8_MEMBER( hpz80unk_state::port00_r )
|
||||
{
|
||||
return (m_uart1->get_output_pin(AY31015_DAV) << 1) | (m_uart1->get_output_pin(AY31015_TBMT)) | 0xfc;
|
||||
return (m_uart1->dav_r() << 1) | (m_uart1->tbmt_r()) | 0xfc;
|
||||
}
|
||||
|
||||
READ8_MEMBER( hpz80unk_state::port01_r )
|
||||
{
|
||||
m_uart1->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart1->write_rdav(0);
|
||||
uint8_t result = m_uart1->get_received_data();
|
||||
m_uart1->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart1->write_rdav(1);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -109,14 +109,14 @@ READ8_MEMBER( hpz80unk_state::port02_r )
|
||||
|
||||
READ8_MEMBER( hpz80unk_state::port03_r )
|
||||
{
|
||||
return (m_uart2->get_output_pin(AY31015_DAV) << 1) | (m_uart2->get_output_pin(AY31015_TBMT)) | 0xfc;
|
||||
return (m_uart2->dav_r() << 1) | (m_uart2->tbmt_r()) | 0xfc;
|
||||
}
|
||||
|
||||
READ8_MEMBER( hpz80unk_state::port04_r )
|
||||
{
|
||||
m_uart2->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart2->write_rdav(0);
|
||||
uint8_t result = m_uart2->get_received_data();
|
||||
m_uart2->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart2->write_rdav(1);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -127,7 +127,7 @@ WRITE8_MEMBER( hpz80unk_state::port04_w )
|
||||
|
||||
READ8_MEMBER( hpz80unk_state::port0d_r )
|
||||
{
|
||||
return (m_uart3->get_output_pin(AY31015_DAV) << 1) | (m_uart3->get_output_pin(AY31015_TBMT)) | 0xfc;
|
||||
return (m_uart3->dav_r() << 1) | (m_uart3->tbmt_r()) | 0xfc;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( hpz80unk_state::port0e_w )
|
||||
@ -180,38 +180,38 @@ void hpz80unk_state::machine_reset()
|
||||
m_maincpu->set_pc(0xc000);
|
||||
|
||||
// no idea if these are hard-coded, or programmable
|
||||
m_uart1->set_input_pin(AY31015_XR, 0);
|
||||
m_uart1->set_input_pin(AY31015_XR, 1);
|
||||
m_uart1->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart1->set_input_pin(AY31015_NP, 1);
|
||||
m_uart1->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart1->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart1->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart1->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart1->set_input_pin(AY31015_CS, 1);
|
||||
m_uart1->set_input_pin(AY31015_CS, 0);
|
||||
m_uart1->write_xr(0);
|
||||
m_uart1->write_xr(1);
|
||||
m_uart1->write_swe(0);
|
||||
m_uart1->write_np(1);
|
||||
m_uart1->write_tsb(0);
|
||||
m_uart1->write_nb1(1);
|
||||
m_uart1->write_nb2(1);
|
||||
m_uart1->write_eps(1);
|
||||
m_uart1->write_cs(1);
|
||||
m_uart1->write_cs(0);
|
||||
|
||||
m_uart2->set_input_pin(AY31015_XR, 0);
|
||||
m_uart2->set_input_pin(AY31015_XR, 1);
|
||||
m_uart2->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart2->set_input_pin(AY31015_NP, 1);
|
||||
m_uart2->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart2->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart2->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart2->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart2->set_input_pin(AY31015_CS, 1);
|
||||
m_uart2->set_input_pin(AY31015_CS, 0);
|
||||
m_uart2->write_xr(0);
|
||||
m_uart2->write_xr(1);
|
||||
m_uart2->write_swe(0);
|
||||
m_uart2->write_np(1);
|
||||
m_uart2->write_tsb(0);
|
||||
m_uart2->write_nb1(1);
|
||||
m_uart2->write_nb2(1);
|
||||
m_uart2->write_eps(1);
|
||||
m_uart2->write_cs(1);
|
||||
m_uart2->write_cs(0);
|
||||
|
||||
m_uart3->set_input_pin(AY31015_XR, 0);
|
||||
m_uart3->set_input_pin(AY31015_XR, 1);
|
||||
m_uart3->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart3->set_input_pin(AY31015_NP, 1);
|
||||
m_uart3->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart3->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart3->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart3->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart3->set_input_pin(AY31015_CS, 1);
|
||||
m_uart3->set_input_pin(AY31015_CS, 0);
|
||||
m_uart3->write_xr(0);
|
||||
m_uart3->write_xr(1);
|
||||
m_uart3->write_swe(0);
|
||||
m_uart3->write_np(1);
|
||||
m_uart3->write_tsb(0);
|
||||
m_uart3->write_nb1(1);
|
||||
m_uart3->write_nb2(1);
|
||||
m_uart3->write_eps(1);
|
||||
m_uart3->write_cs(1);
|
||||
m_uart3->write_cs(0);
|
||||
// this should be rom/ram banking
|
||||
}
|
||||
|
||||
|
||||
@ -89,9 +89,9 @@ INPUT_PORTS_END
|
||||
|
||||
READ8_MEMBER( mcb216_state::port01_r )
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->write_rdav(0);
|
||||
u8 result = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(1);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -99,7 +99,7 @@ READ8_MEMBER( mcb216_state::port01_r )
|
||||
// 0x80 - ok to send to terminal
|
||||
READ8_MEMBER( mcb216_state::port00_r )
|
||||
{
|
||||
return (m_uart->get_output_pin(AY31015_DAV) << 6) | (m_uart->get_output_pin(AY31015_TBMT) << 7);
|
||||
return (m_uart->dav_r() << 6) | (m_uart->tbmt_r() << 7);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( mcb216_state::port01_w )
|
||||
@ -109,30 +109,30 @@ WRITE8_MEMBER( mcb216_state::port01_w )
|
||||
|
||||
MACHINE_RESET_MEMBER( mcb216_state, mcb216 )
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_XR, 0);
|
||||
m_uart->set_input_pin(AY31015_XR, 1);
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart->set_input_pin(AY31015_NP, 1);
|
||||
m_uart->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->write_xr(0);
|
||||
m_uart->write_xr(1);
|
||||
m_uart->write_swe(0);
|
||||
m_uart->write_np(1);
|
||||
m_uart->write_tsb(0);
|
||||
m_uart->write_nb1(1);
|
||||
m_uart->write_nb2(1);
|
||||
m_uart->write_eps(1);
|
||||
m_uart->write_cs(1);
|
||||
m_uart->write_cs(0);
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER( mcb216_state, cb308 )
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_XR, 0);
|
||||
m_uart->set_input_pin(AY31015_XR, 1);
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart->set_input_pin(AY31015_NP, 1);
|
||||
m_uart->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->write_xr(0);
|
||||
m_uart->write_xr(1);
|
||||
m_uart->write_swe(0);
|
||||
m_uart->write_np(1);
|
||||
m_uart->write_tsb(0);
|
||||
m_uart->write_nb1(1);
|
||||
m_uart->write_nb2(1);
|
||||
m_uart->write_eps(1);
|
||||
m_uart->write_cs(1);
|
||||
m_uart->write_cs(0);
|
||||
m_maincpu->set_state_int(Z80_PC, 0xe000);
|
||||
}
|
||||
|
||||
|
||||
@ -99,7 +99,7 @@ private:
|
||||
|
||||
READ8_MEMBER( micral_state::status_r )
|
||||
{
|
||||
return m_uart->get_output_pin(AY31015_DAV) | 4;
|
||||
return m_uart->dav_r() | 4;
|
||||
}
|
||||
|
||||
READ8_MEMBER( micral_state::unk_r )
|
||||
@ -109,9 +109,9 @@ READ8_MEMBER( micral_state::unk_r )
|
||||
|
||||
READ8_MEMBER( micral_state::keyin_r )
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->write_rdav(0);
|
||||
u8 result = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(1);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -358,16 +358,16 @@ MACHINE_RESET_MEMBER( micral_state, micral )
|
||||
m_maincpu->set_state_int(Z80_PC, 0xf800);
|
||||
|
||||
// no idea if these are hard-coded, or programmable
|
||||
m_uart->set_input_pin(AY31015_XR, 0);
|
||||
m_uart->set_input_pin(AY31015_XR, 1);
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart->set_input_pin(AY31015_NP, 1);
|
||||
m_uart->set_input_pin(AY31015_TSB, 0);
|
||||
m_uart->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->write_xr(0);
|
||||
m_uart->write_xr(1);
|
||||
m_uart->write_swe(0);
|
||||
m_uart->write_np(1);
|
||||
m_uart->write_tsb(0);
|
||||
m_uart->write_nb1(1);
|
||||
m_uart->write_nb2(1);
|
||||
m_uart->write_eps(1);
|
||||
m_uart->write_cs(1);
|
||||
m_uart->write_cs(0);
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START(micral_state::micral)
|
||||
|
||||
@ -199,13 +199,13 @@ READ8_MEMBER( nascom_state::nascom1_port_02_r )
|
||||
{
|
||||
uint8_t data = 0x31;
|
||||
|
||||
m_hd6402->set_input_pin(AY31015_SWE, 0);
|
||||
data |= m_hd6402->get_output_pin(AY31015_OR ) ? 0x02 : 0;
|
||||
data |= m_hd6402->get_output_pin(AY31015_PE ) ? 0x04 : 0;
|
||||
data |= m_hd6402->get_output_pin(AY31015_FE ) ? 0x08 : 0;
|
||||
data |= m_hd6402->get_output_pin(AY31015_TBMT) ? 0x40 : 0;
|
||||
data |= m_hd6402->get_output_pin(AY31015_DAV ) ? 0x80 : 0;
|
||||
m_hd6402->set_input_pin(AY31015_SWE, 1);
|
||||
m_hd6402->write_swe(0);
|
||||
data |= m_hd6402->or_r( ) ? 0x02 : 0;
|
||||
data |= m_hd6402->pe_r( ) ? 0x04 : 0;
|
||||
data |= m_hd6402->fe_r( ) ? 0x08 : 0;
|
||||
data |= m_hd6402->tbmt_r() ? 0x40 : 0;
|
||||
data |= m_hd6402->dav_r( ) ? 0x80 : 0;
|
||||
m_hd6402->write_swe(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -335,15 +335,15 @@ image_init_result nascom2_state::load_cart(device_image_interface &image, generi
|
||||
void nascom_state::machine_reset()
|
||||
{
|
||||
// Set up hd6402 pins
|
||||
m_hd6402->set_input_pin(AY31015_SWE, 1);
|
||||
m_hd6402->write_swe(1);
|
||||
|
||||
m_hd6402->set_input_pin(AY31015_CS, 0);
|
||||
m_hd6402->set_input_pin(AY31015_NP, 1);
|
||||
m_hd6402->set_input_pin(AY31015_NB1, 1);
|
||||
m_hd6402->set_input_pin(AY31015_NB2, 1);
|
||||
m_hd6402->set_input_pin(AY31015_EPS, 1);
|
||||
m_hd6402->set_input_pin(AY31015_TSB, 1);
|
||||
m_hd6402->set_input_pin(AY31015_CS, 1);
|
||||
m_hd6402->write_cs(0);
|
||||
m_hd6402->write_np(1);
|
||||
m_hd6402->write_nb1(1);
|
||||
m_hd6402->write_nb2(1);
|
||||
m_hd6402->write_eps(1);
|
||||
m_hd6402->write_tsb(1);
|
||||
m_hd6402->write_cs(1);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER( nascom_state, nascom )
|
||||
|
||||
@ -319,8 +319,8 @@ READ16_MEMBER( notetaker_state::ReadOPStatus_r ) // 74ls368 hex inverter at #l7
|
||||
data |= (m_outfifo_count >= 1) ? 0 : 0x08; // m_FIFOOutRdy is true if the fifo has at least 1 word in it, false otherwise
|
||||
data |= (m_outfifo_count < 16) ? 0 : 0x04; // m_FIFOInRdy is true if the fifo has less than 16 words in it, false otherwise
|
||||
// note /SWE is permanently enabled, so we don't enable it here for HD6402 reading
|
||||
data |= m_kbduart->get_output_pin(AY31015_DAV ) ? 0 : 0x02; // DR - pin 19
|
||||
data |= m_kbduart->get_output_pin(AY31015_TBMT) ? 0 : 0x01; // TBRE - pin 22
|
||||
data |= m_kbduart->dav_r( ) ? 0 : 0x02; // DR - pin 19
|
||||
data |= m_kbduart->tbmt_r() ? 0 : 0x01; // TBRE - pin 22
|
||||
#ifdef DEBUG_READOPSTATUS
|
||||
logerror("ReadOPStatus read, returning %04x\n", data);
|
||||
#endif
|
||||
@ -334,25 +334,25 @@ WRITE16_MEMBER( notetaker_state::LoadKeyData_w )
|
||||
|
||||
WRITE16_MEMBER( notetaker_state::LoadKeyCtlReg_w )
|
||||
{
|
||||
m_kbduart->set_input_pin(AY31015_CS, 0);
|
||||
m_kbduart->set_input_pin(AY31015_NP, BIT(data, 4)); // PI - pin 35
|
||||
m_kbduart->set_input_pin(AY31015_TSB, BIT(data, 3)); // SBS - pin 36
|
||||
m_kbduart->set_input_pin(AY31015_NB2, BIT(data, 2)); // CLS2 - pin 37
|
||||
m_kbduart->set_input_pin(AY31015_NB1, BIT(data, 1)); // CLS1 - pin 38
|
||||
m_kbduart->set_input_pin(AY31015_EPS, BIT(data, 0)); // EPE - pin 39
|
||||
m_kbduart->set_input_pin(AY31015_CS, 1);
|
||||
m_kbduart->write_cs(0);
|
||||
m_kbduart->write_np(BIT(data, 4)); // PI - pin 35
|
||||
m_kbduart->write_tsb(BIT(data, 3)); // SBS - pin 36
|
||||
m_kbduart->write_nb2(BIT(data, 2)); // CLS2 - pin 37
|
||||
m_kbduart->write_nb1(BIT(data, 1)); // CLS1 - pin 38
|
||||
m_kbduart->write_eps(BIT(data, 0)); // EPE - pin 39
|
||||
m_kbduart->write_cs(1);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( notetaker_state::KeyDataReset_w )
|
||||
{
|
||||
m_kbduart->set_input_pin(AY31015_RDAV, 0); // DDR - pin 18
|
||||
m_kbduart->set_input_pin(AY31015_RDAV, 1); // ''
|
||||
m_kbduart->write_rdav(0); // DDR - pin 18
|
||||
m_kbduart->write_rdav(1); // ''
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( notetaker_state::KeyChipReset_w )
|
||||
{
|
||||
m_kbduart->set_input_pin(AY31015_XR, 0); // MR - pin 21
|
||||
m_kbduart->set_input_pin(AY31015_XR, 1); // ''
|
||||
m_kbduart->write_xr(0); // MR - pin 21
|
||||
m_kbduart->write_xr(1); // ''
|
||||
}
|
||||
|
||||
/* FIFO (DAC) Stuff and ADC stuff */
|
||||
@ -457,8 +457,8 @@ READ16_MEMBER( notetaker_state::ReadEIAStatus_r ) // 74ls368 hex inverter at #f1
|
||||
{
|
||||
uint16_t data = 0xFFFC;
|
||||
// note /SWE is permanently enabled, so we don't enable it here for HD6402 reading
|
||||
data |= m_eiauart->get_output_pin(AY31015_DAV ) ? 0 : 0x02; // DR - pin 19
|
||||
data |= m_eiauart->get_output_pin(AY31015_TBMT) ? 0 : 0x01; // TBRE - pin 22
|
||||
data |= m_eiauart->dav_r( ) ? 0 : 0x02; // DR - pin 19
|
||||
data |= m_eiauart->tbmt_r() ? 0 : 0x01; // TBRE - pin 22
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -469,25 +469,25 @@ WRITE16_MEMBER( notetaker_state::LoadEIAData_w )
|
||||
|
||||
WRITE16_MEMBER( notetaker_state::LoadEIACtlReg_w )
|
||||
{
|
||||
m_eiauart->set_input_pin(AY31015_CS, 0);
|
||||
m_eiauart->set_input_pin(AY31015_NP, BIT(data, 4)); // PI - pin 35
|
||||
m_eiauart->set_input_pin(AY31015_TSB, BIT(data, 3)); // SBS - pin 36
|
||||
m_eiauart->set_input_pin(AY31015_NB2, BIT(data, 2)); // CLS2 - pin 37
|
||||
m_eiauart->set_input_pin(AY31015_NB1, BIT(data, 1)); // CLS1 - pin 38
|
||||
m_eiauart->set_input_pin(AY31015_EPS, BIT(data, 0)); // EPE - pin 39
|
||||
m_eiauart->set_input_pin(AY31015_CS, 1);
|
||||
m_eiauart->write_cs(0);
|
||||
m_eiauart->write_np(BIT(data, 4)); // PI - pin 35
|
||||
m_eiauart->write_tsb(BIT(data, 3)); // SBS - pin 36
|
||||
m_eiauart->write_nb2(BIT(data, 2)); // CLS2 - pin 37
|
||||
m_eiauart->write_nb1(BIT(data, 1)); // CLS1 - pin 38
|
||||
m_eiauart->write_eps(BIT(data, 0)); // EPE - pin 39
|
||||
m_eiauart->write_cs(1);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( notetaker_state::EIADataReset_w )
|
||||
{
|
||||
m_eiauart->set_input_pin(AY31015_RDAV, 0); // DDR - pin 18
|
||||
m_eiauart->set_input_pin(AY31015_RDAV, 1); // ''
|
||||
m_eiauart->write_rdav(0); // DDR - pin 18
|
||||
m_eiauart->write_rdav(1); // ''
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( notetaker_state::EIAChipReset_w )
|
||||
{
|
||||
m_eiauart->set_input_pin(AY31015_XR, 0); // MR - pin 21
|
||||
m_eiauart->set_input_pin(AY31015_XR, 1); // ''
|
||||
m_eiauart->write_xr(0); // MR - pin 21
|
||||
m_eiauart->write_xr(1); // ''
|
||||
}
|
||||
|
||||
|
||||
@ -757,9 +757,9 @@ void notetaker_state::machine_start()
|
||||
// FDC: /DDEN is tied permanently LOW so MFM mode is ALWAYS ON
|
||||
m_fdc->dden_w(0);
|
||||
// Keyboard UART: /SWE is tied permanently LOW
|
||||
m_kbduart->set_input_pin(AY31015_SWE, 0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active)
|
||||
m_kbduart->write_swe(0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active)
|
||||
// EIA UART: /SWE is tied permanently LOW
|
||||
m_eiauart->set_input_pin(AY31015_SWE, 0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active)
|
||||
m_eiauart->write_swe(0); // status word outputs are permanently enabled (pin 16 SFD(SWE) tied low, active)
|
||||
// savestate stuff
|
||||
// TODO: add me!
|
||||
}
|
||||
@ -775,11 +775,11 @@ void notetaker_state::machine_reset()
|
||||
void notetaker_state::ip_reset()
|
||||
{
|
||||
// reset the Keyboard UART
|
||||
m_kbduart->set_input_pin(AY31015_XR, 0); // MR - pin 21
|
||||
m_kbduart->set_input_pin(AY31015_XR, 1); // ''
|
||||
m_kbduart->write_xr(0); // MR - pin 21
|
||||
m_kbduart->write_xr(1); // ''
|
||||
// reset the EIA UART
|
||||
m_eiauart->set_input_pin(AY31015_XR, 0); // MR - pin 21
|
||||
m_eiauart->set_input_pin(AY31015_XR, 1); // ''
|
||||
m_eiauart->write_xr(0); // MR - pin 21
|
||||
m_eiauart->write_xr(1); // ''
|
||||
// reset the IPConReg latch at #f1
|
||||
m_BootSeqDone = 0;
|
||||
m_ProcLock = 0;
|
||||
|
||||
@ -262,7 +262,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
|
||||
m_cass_data.input.level = cass_ws;
|
||||
m_cass_data.input.bit = ((m_cass_data.input.length < 0x6) || (m_cass_data.input.length > 0x20)) ? 1 : 0;
|
||||
m_cass_data.input.length = 0;
|
||||
m_uart->set_input_pin(AY31015_SI, m_cass_data.input.bit);
|
||||
m_uart->write_si(m_cass_data.input.bit);
|
||||
}
|
||||
|
||||
/* saving a tape - convert the serial stream from the uart, into 1200 and 2400 Hz frequencies.
|
||||
@ -271,7 +271,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
|
||||
m_cass_data.output.length++;
|
||||
if (!(m_cass_data.output.length & 0x1f))
|
||||
{
|
||||
cass_ws = m_uart->get_output_pin(AY31015_SO);
|
||||
cass_ws = m_uart->so_r();
|
||||
if (cass_ws != m_cass_data.output.bit)
|
||||
{
|
||||
m_cass_data.output.bit = cass_ws;
|
||||
@ -303,7 +303,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
|
||||
m_cass_data.input.length = 0;
|
||||
m_cass_data.input.level = cass_ws;
|
||||
}
|
||||
m_uart->set_input_pin(AY31015_SI, m_cass_data.input.bit);
|
||||
m_uart->write_si(m_cass_data.input.bit);
|
||||
}
|
||||
|
||||
/* saving a tape - convert the serial stream from the uart, into 600 and 1200 Hz frequencies. */
|
||||
@ -311,7 +311,7 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
|
||||
m_cass_data.output.length++;
|
||||
if (!(m_cass_data.output.length & 7))
|
||||
{
|
||||
cass_ws = m_uart->get_output_pin(AY31015_SO);
|
||||
cass_ws = m_uart->so_r();
|
||||
if (cass_ws != m_cass_data.output.bit)
|
||||
{
|
||||
m_cass_data.output.bit = cass_ws;
|
||||
@ -333,17 +333,17 @@ TIMER_CALLBACK_MEMBER(sol20_state::sol20_cassette_tc)
|
||||
|
||||
READ8_MEMBER( sol20_state::sol20_f8_r )
|
||||
{
|
||||
// d7 - TMBT; d6 - DAV; d5 - CTS; d4 - OE; d3 - PE; d2 - FE; d1 - DSR; d0 - CD
|
||||
// d7 - TBMT; d6 - DAV; d5 - CTS; d4 - OE; d3 - PE; d2 - FE; d1 - DSR; d0 - CD
|
||||
/* set unemulated bits (CTS/DSR/CD) high */
|
||||
uint8_t data = 0x23;
|
||||
|
||||
m_uart_s->set_input_pin(AY31015_SWE, 0);
|
||||
data |= m_uart_s->get_output_pin(AY31015_TBMT) ? 0x80 : 0;
|
||||
data |= m_uart_s->get_output_pin(AY31015_DAV ) ? 0x40 : 0;
|
||||
data |= m_uart_s->get_output_pin(AY31015_OR ) ? 0x10 : 0;
|
||||
data |= m_uart_s->get_output_pin(AY31015_PE ) ? 0x08 : 0;
|
||||
data |= m_uart_s->get_output_pin(AY31015_FE ) ? 0x04 : 0;
|
||||
m_uart_s->set_input_pin(AY31015_SWE, 1);
|
||||
m_uart_s->write_swe(0);
|
||||
data |= m_uart_s->tbmt_r() ? 0x80 : 0;
|
||||
data |= m_uart_s->dav_r( ) ? 0x40 : 0;
|
||||
data |= m_uart_s->or_r( ) ? 0x10 : 0;
|
||||
data |= m_uart_s->pe_r( ) ? 0x08 : 0;
|
||||
data |= m_uart_s->fe_r( ) ? 0x04 : 0;
|
||||
m_uart_s->write_swe(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -351,8 +351,8 @@ READ8_MEMBER( sol20_state::sol20_f8_r )
|
||||
READ8_MEMBER( sol20_state::sol20_f9_r)
|
||||
{
|
||||
uint8_t data = m_uart_s->get_received_data();
|
||||
m_uart_s->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart_s->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart_s->write_rdav(0);
|
||||
m_uart_s->write_rdav(1);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -361,12 +361,12 @@ READ8_MEMBER( sol20_state::sol20_fa_r )
|
||||
/* set unused bits high */
|
||||
uint8_t data = 0x26;
|
||||
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
data |= m_uart->get_output_pin(AY31015_TBMT) ? 0x80 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_DAV ) ? 0x40 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_OR ) ? 0x10 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_FE ) ? 0x08 : 0;
|
||||
m_uart->set_input_pin(AY31015_SWE, 1);
|
||||
m_uart->write_swe(0);
|
||||
data |= m_uart->tbmt_r() ? 0x80 : 0;
|
||||
data |= m_uart->dav_r( ) ? 0x40 : 0;
|
||||
data |= m_uart->or_r( ) ? 0x10 : 0;
|
||||
data |= m_uart->fe_r( ) ? 0x08 : 0;
|
||||
m_uart->write_swe(1);
|
||||
|
||||
bool arrowkey = m_iop_arrows->read() ? 0 : 1;
|
||||
bool keydown = m_sol20_fa & 1;
|
||||
@ -377,8 +377,8 @@ READ8_MEMBER( sol20_state::sol20_fa_r )
|
||||
READ8_MEMBER( sol20_state::sol20_fb_r)
|
||||
{
|
||||
uint8_t data = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(0);
|
||||
m_uart->write_rdav(1);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -583,23 +583,23 @@ void sol20_state::machine_reset()
|
||||
m_sol20_fa=1;
|
||||
|
||||
// set hard-wired uart pins
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->set_input_pin(AY31015_NB1, 1);
|
||||
m_uart->set_input_pin(AY31015_NB2, 1);
|
||||
m_uart->set_input_pin(AY31015_TSB, 1);
|
||||
m_uart->set_input_pin(AY31015_EPS, 1);
|
||||
m_uart->set_input_pin(AY31015_NP, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->write_cs(0);
|
||||
m_uart->write_nb1(1);
|
||||
m_uart->write_nb2(1);
|
||||
m_uart->write_tsb(1);
|
||||
m_uart->write_eps(1);
|
||||
m_uart->write_np(1);
|
||||
m_uart->write_cs(1);
|
||||
|
||||
// set switched uart pins
|
||||
data = m_iop_s4->read();
|
||||
m_uart_s->set_input_pin(AY31015_CS, 0);
|
||||
m_uart_s->set_input_pin(AY31015_NB1, BIT(data, 1));
|
||||
m_uart_s->set_input_pin(AY31015_NB2, BIT(data, 2));
|
||||
m_uart_s->set_input_pin(AY31015_TSB, BIT(data, 3));
|
||||
m_uart_s->set_input_pin(AY31015_EPS, BIT(data, 0));
|
||||
m_uart_s->set_input_pin(AY31015_NP, BIT(data, 4));
|
||||
m_uart_s->set_input_pin(AY31015_CS, 1);
|
||||
m_uart_s->write_cs(0);
|
||||
m_uart_s->write_nb1(BIT(data, 1));
|
||||
m_uart_s->write_nb2(BIT(data, 2));
|
||||
m_uart_s->write_tsb(BIT(data, 3));
|
||||
m_uart_s->write_eps(BIT(data, 0));
|
||||
m_uart_s->write_np(BIT(data, 4));
|
||||
m_uart_s->write_cs(1);
|
||||
|
||||
// set rs232 baud rate
|
||||
data = m_iop_s3->read();
|
||||
|
||||
@ -503,10 +503,10 @@ void sapi1_state::kbd_put(u8 data)
|
||||
READ8_MEMBER(sapi1_state::uart_status_r)
|
||||
{
|
||||
uint8_t result = 0;
|
||||
result |= m_uart->get_output_pin(AY31015_TBMT) || m_uart->get_output_pin(AY31015_DAV);
|
||||
result |= m_uart->get_output_pin(AY31015_OR) << 1;
|
||||
result |= m_uart->get_output_pin(AY31015_FE) << 2;
|
||||
result |= m_uart->get_output_pin(AY31015_PE) << 3;
|
||||
result |= m_uart->tbmt_r() || m_uart->dav_r();
|
||||
result |= m_uart->or_r() << 1;
|
||||
result |= m_uart->fe_r() << 2;
|
||||
result |= m_uart->pe_r() << 3;
|
||||
// RD4 = RI (= SI)
|
||||
result |= m_v24->dcd_r() << 5;
|
||||
result |= m_v24->dsr_r() << 6;
|
||||
@ -528,25 +528,25 @@ WRITE8_MEMBER(sapi1_state::modem_control_w)
|
||||
|
||||
READ8_MEMBER(sapi1_state::uart_ready_r)
|
||||
{
|
||||
return (m_uart->get_output_pin(AY31015_DAV) << 7) | (m_uart->get_output_pin(AY31015_TBMT) << 6) | 0x3f;
|
||||
return (m_uart->dav_r() << 7) | (m_uart->tbmt_r() << 6) | 0x3f;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(sapi1_state::uart_mode_w)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_NP, BIT(data, 0));
|
||||
m_uart->set_input_pin(AY31015_TSB, BIT(data, 1));
|
||||
m_uart->set_input_pin(AY31015_NB1, BIT(data, 3));
|
||||
m_uart->set_input_pin(AY31015_NB2, BIT(data, 2));
|
||||
m_uart->set_input_pin(AY31015_EPS, BIT(data, 4));
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->write_np(BIT(data, 0));
|
||||
m_uart->write_tsb(BIT(data, 1));
|
||||
m_uart->write_nb1(BIT(data, 3));
|
||||
m_uart->write_nb2(BIT(data, 2));
|
||||
m_uart->write_eps(BIT(data, 4));
|
||||
m_uart->write_cs(1);
|
||||
m_uart->write_cs(0);
|
||||
}
|
||||
|
||||
READ8_MEMBER(sapi1_state::uart_data_r)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->write_rdav(0);
|
||||
uint8_t result = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(1);
|
||||
return result;
|
||||
}
|
||||
|
||||
@ -557,8 +557,8 @@ WRITE8_MEMBER(sapi1_state::uart_data_w)
|
||||
|
||||
WRITE8_MEMBER(sapi1_state::uart_reset_w)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_XR, 0);
|
||||
m_uart->set_input_pin(AY31015_XR, 1);
|
||||
m_uart->write_xr(0);
|
||||
m_uart->write_xr(1);
|
||||
}
|
||||
|
||||
/**************************************
|
||||
@ -611,7 +611,7 @@ DRIVER_INIT_MEMBER( sapi1_state, sapizps3a )
|
||||
{
|
||||
uint8_t *RAM = memregion("maincpu")->base();
|
||||
m_bank1->configure_entries(0, 2, &RAM[0x0000], 0xf800);
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
m_uart->write_swe(0);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER( sapi1_state, sapizps3b )
|
||||
|
||||
@ -99,7 +99,6 @@ public:
|
||||
DECLARE_READ8_MEMBER(uart_status_r);
|
||||
DECLARE_READ8_MEMBER(uart_data_r);
|
||||
DECLARE_WRITE8_MEMBER(uart_data_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(uart_reset_w);
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
DECLARE_WRITE8_MEMBER(output_40c);
|
||||
|
||||
@ -204,22 +203,22 @@ READ8_MEMBER(tv912_state::keyboard_r)
|
||||
|
||||
READ8_MEMBER(tv912_state::uart_status_r)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
u8 status = m_uart->get_output_pin(AY31015_DAV) << 0;
|
||||
status |= m_uart->get_output_pin(AY31015_TBMT) << 1;
|
||||
status |= m_uart->get_output_pin(AY31015_PE) << 2;
|
||||
status |= m_uart->get_output_pin(AY31015_FE) << 3;
|
||||
m_uart->write_swe(0);
|
||||
u8 status = m_uart->dav_r() << 0;
|
||||
status |= m_uart->tbmt_r() << 1;
|
||||
status |= m_uart->pe_r() << 2;
|
||||
status |= m_uart->fe_r() << 3;
|
||||
status |= BIT(m_jumpers->read(), offset) << 4;
|
||||
status |= m_option->read();
|
||||
m_uart->set_input_pin(AY31015_SWE, 1);
|
||||
m_uart->write_swe(1);
|
||||
return status;
|
||||
}
|
||||
|
||||
READ8_MEMBER(tv912_state::uart_data_r)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->write_rdav(0);
|
||||
u8 data = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(1);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -228,11 +227,6 @@ WRITE8_MEMBER(tv912_state::uart_data_w)
|
||||
m_uart->set_transmit_data(data);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(tv912_state::uart_reset_w)
|
||||
{
|
||||
m_uart->set_input_pin(AY31015_XR, state);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(tv912_state::output_40c)
|
||||
{
|
||||
// DB6: -PRTOL
|
||||
@ -265,8 +259,8 @@ void tv912_state::device_timer(emu_timer &timer, device_timer_id id, int param,
|
||||
switch (id)
|
||||
{
|
||||
case TIMER_BAUDGEN:
|
||||
m_uart->set_input_pin(AY31015_RCP, param);
|
||||
m_uart->set_input_pin(AY31015_TCP, param);
|
||||
m_uart->write_rcp(param);
|
||||
m_uart->write_tcp(param);
|
||||
|
||||
ioport_value sel = (m_lpt_select ? m_printer_baud : m_modem_baud)->read();
|
||||
for (int b = 0; b < 10; b++)
|
||||
@ -365,12 +359,12 @@ void tv912_state::machine_start()
|
||||
void tv912_state::machine_reset()
|
||||
{
|
||||
ioport_value uart_ctrl = m_uart_control->read();
|
||||
m_uart->set_input_pin(AY31015_NP, BIT(uart_ctrl, 4));
|
||||
m_uart->set_input_pin(AY31015_TSB, BIT(uart_ctrl, 3));
|
||||
m_uart->set_input_pin(AY31015_NB1, BIT(uart_ctrl, 2));
|
||||
m_uart->set_input_pin(AY31015_NB2, BIT(uart_ctrl, 1));
|
||||
m_uart->set_input_pin(AY31015_EPS, BIT(uart_ctrl, 0));
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->write_np(BIT(uart_ctrl, 4));
|
||||
m_uart->write_tsb(BIT(uart_ctrl, 3));
|
||||
m_uart->write_nb1(BIT(uart_ctrl, 2));
|
||||
m_uart->write_nb2(BIT(uart_ctrl, 1));
|
||||
m_uart->write_eps(BIT(uart_ctrl, 0));
|
||||
m_uart->write_cs(1);
|
||||
}
|
||||
|
||||
ADDRESS_MAP_START(tv912_state::prog_map)
|
||||
@ -395,11 +389,11 @@ ADDRESS_MAP_END
|
||||
INPUT_CHANGED_MEMBER(tv912_state::uart_settings_changed)
|
||||
{
|
||||
ioport_value uart_ctrl = m_uart_control->read();
|
||||
m_uart->set_input_pin(AY31015_NP, BIT(uart_ctrl, 4));
|
||||
m_uart->set_input_pin(AY31015_TSB, BIT(uart_ctrl, 3));
|
||||
m_uart->set_input_pin(AY31015_NB1, BIT(uart_ctrl, 2));
|
||||
m_uart->set_input_pin(AY31015_NB2, BIT(uart_ctrl, 1));
|
||||
m_uart->set_input_pin(AY31015_EPS, BIT(uart_ctrl, 0));
|
||||
m_uart->write_np(BIT(uart_ctrl, 4));
|
||||
m_uart->write_tsb(BIT(uart_ctrl, 3));
|
||||
m_uart->write_nb1(BIT(uart_ctrl, 2));
|
||||
m_uart->write_nb2(BIT(uart_ctrl, 1));
|
||||
m_uart->write_eps(BIT(uart_ctrl, 0));
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START( switches )
|
||||
@ -897,7 +891,7 @@ MACHINE_CONFIG_START(tv912_state::tv912)
|
||||
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(tv912_state, p2_w))
|
||||
MCFG_MCS48_PORT_T0_IN_CB(DEVREADLINE("rs232", rs232_port_device, cts_r))
|
||||
MCFG_MCS48_PORT_T1_IN_CB(DEVREADLINE("crtc", tms9927_device, bl_r)) MCFG_DEVCB_INVERT
|
||||
MCFG_MCS48_PORT_PROG_OUT_CB(WRITELINE(tv912_state, uart_reset_w)) MCFG_DEVCB_INVERT
|
||||
MCFG_MCS48_PORT_PROG_OUT_CB(DEVWRITELINE("uart", ay51013_device, write_xr)) MCFG_DEVCB_INVERT
|
||||
|
||||
MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(bank_map)
|
||||
|
||||
@ -22,8 +22,8 @@ TIMER_CALLBACK_MEMBER(sorcerer_state::sorcerer_serial_tc)
|
||||
if (BIT(m_fe, 7))
|
||||
{
|
||||
/* connect to rs232 */
|
||||
m_rs232->write_txd(m_uart->get_output_pin(AY31015_SO));
|
||||
m_uart->set_input_pin(AY31015_SI, m_rs232->rxd_r());
|
||||
m_rs232->write_txd(m_uart->so_r());
|
||||
m_uart->write_si(m_rs232->rxd_r());
|
||||
}
|
||||
}
|
||||
|
||||
@ -68,7 +68,7 @@ TIMER_CALLBACK_MEMBER(sorcerer_state::sorcerer_cassette_tc)
|
||||
m_cass_data.input.level = cass_ws;
|
||||
m_cass_data.input.bit = ((m_cass_data.input.length < 0x6) || (m_cass_data.input.length > 0x20)) ? 1 : 0;
|
||||
m_cass_data.input.length = 0;
|
||||
m_uart->set_input_pin(AY31015_SI, m_cass_data.input.bit);
|
||||
m_uart->write_si(m_cass_data.input.bit);
|
||||
}
|
||||
|
||||
/* saving a tape - convert the serial stream from the uart, into 1200 and 2400 Hz frequencies.
|
||||
@ -77,7 +77,7 @@ TIMER_CALLBACK_MEMBER(sorcerer_state::sorcerer_cassette_tc)
|
||||
m_cass_data.output.length++;
|
||||
if (!(m_cass_data.output.length & 0x1f))
|
||||
{
|
||||
cass_ws = m_uart->get_output_pin(AY31015_SO);
|
||||
cass_ws = m_uart->so_r();
|
||||
if (cass_ws != m_cass_data.output.bit)
|
||||
{
|
||||
m_cass_data.output.bit = cass_ws;
|
||||
@ -109,7 +109,7 @@ TIMER_CALLBACK_MEMBER(sorcerer_state::sorcerer_cassette_tc)
|
||||
m_cass_data.input.length = 0;
|
||||
m_cass_data.input.level = cass_ws;
|
||||
}
|
||||
m_uart->set_input_pin(AY31015_SI, m_cass_data.input.bit);
|
||||
m_uart->write_si(m_cass_data.input.bit);
|
||||
}
|
||||
|
||||
/* saving a tape - convert the serial stream from the uart, into 600 and 1200 Hz frequencies. */
|
||||
@ -117,7 +117,7 @@ TIMER_CALLBACK_MEMBER(sorcerer_state::sorcerer_cassette_tc)
|
||||
m_cass_data.output.length++;
|
||||
if (!(m_cass_data.output.length & 7))
|
||||
{
|
||||
cass_ws = m_uart->get_output_pin(AY31015_SO);
|
||||
cass_ws = m_uart->so_r();
|
||||
if (cass_ws != m_cass_data.output.bit)
|
||||
{
|
||||
m_cass_data.output.bit = cass_ws;
|
||||
@ -154,13 +154,13 @@ WRITE8_MEMBER(sorcerer_state::sorcerer_fd_w)
|
||||
{
|
||||
/* Translate data to control signals */
|
||||
|
||||
m_uart->set_input_pin(AY31015_CS, 0);
|
||||
m_uart->set_input_pin(AY31015_NB1, BIT(data, 0));
|
||||
m_uart->set_input_pin(AY31015_NB2, BIT(data, 1));
|
||||
m_uart->set_input_pin(AY31015_TSB, BIT(data, 2));
|
||||
m_uart->set_input_pin(AY31015_EPS, BIT(data, 3));
|
||||
m_uart->set_input_pin(AY31015_NP, BIT(data, 4));
|
||||
m_uart->set_input_pin(AY31015_CS, 1);
|
||||
m_uart->write_cs(0);
|
||||
m_uart->write_nb1(BIT(data, 0));
|
||||
m_uart->write_nb2(BIT(data, 1));
|
||||
m_uart->write_tsb(BIT(data, 2));
|
||||
m_uart->write_eps(BIT(data, 3));
|
||||
m_uart->write_np(BIT(data, 4));
|
||||
m_uart->write_cs(1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(sorcerer_state::sorcerer_fe_w)
|
||||
@ -248,8 +248,8 @@ WRITE8_MEMBER(sorcerer_state::sorcerer_ff_w)
|
||||
READ8_MEMBER(sorcerer_state::sorcerer_fc_r)
|
||||
{
|
||||
uint8_t data = m_uart->get_received_data();
|
||||
m_uart->set_input_pin(AY31015_RDAV, 0);
|
||||
m_uart->set_input_pin(AY31015_RDAV, 1);
|
||||
m_uart->write_rdav(0);
|
||||
m_uart->write_rdav(1);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -258,13 +258,13 @@ READ8_MEMBER(sorcerer_state::sorcerer_fd_r)
|
||||
/* set unused bits high */
|
||||
uint8_t data = 0xe0;
|
||||
|
||||
m_uart->set_input_pin(AY31015_SWE, 0);
|
||||
data |= m_uart->get_output_pin(AY31015_TBMT) ? 0x01 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_DAV ) ? 0x02 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_OR ) ? 0x04 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_FE ) ? 0x08 : 0;
|
||||
data |= m_uart->get_output_pin(AY31015_PE ) ? 0x10 : 0;
|
||||
m_uart->set_input_pin(AY31015_SWE, 1);
|
||||
m_uart->write_swe(0);
|
||||
data |= m_uart->tbmt_r() ? 0x01 : 0;
|
||||
data |= m_uart->dav_r( ) ? 0x02 : 0;
|
||||
data |= m_uart->or_r( ) ? 0x04 : 0;
|
||||
data |= m_uart->fe_r( ) ? 0x08 : 0;
|
||||
data |= m_uart->pe_r( ) ? 0x10 : 0;
|
||||
m_uart->write_swe(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -126,13 +126,13 @@ READ8_MEMBER( trs80_state::trs80m4_ea_r )
|
||||
d2..d0 Not used */
|
||||
|
||||
uint8_t data=7;
|
||||
m_ay31015->set_input_pin(AY31015_SWE, 0);
|
||||
data |= m_ay31015->get_output_pin(AY31015_TBMT) ? 0x40 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_DAV ) ? 0x80 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_OR ) ? 0x20 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_FE ) ? 0x10 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_PE ) ? 0x08 : 0;
|
||||
m_ay31015->set_input_pin(AY31015_SWE, 1);
|
||||
m_ay31015->write_swe(0);
|
||||
data |= m_ay31015->tbmt_r() ? 0x40 : 0;
|
||||
data |= m_ay31015->dav_r( ) ? 0x80 : 0;
|
||||
data |= m_ay31015->or_r( ) ? 0x20 : 0;
|
||||
data |= m_ay31015->fe_r( ) ? 0x10 : 0;
|
||||
data |= m_ay31015->pe_r( ) ? 0x08 : 0;
|
||||
m_ay31015->write_swe(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -141,8 +141,8 @@ READ8_MEMBER( trs80_state::trs80m4_eb_r )
|
||||
{
|
||||
/* UART received data */
|
||||
uint8_t data = m_ay31015->get_received_data();
|
||||
m_ay31015->set_input_pin(AY31015_RDAV, 0);
|
||||
m_ay31015->set_input_pin(AY31015_RDAV, 1);
|
||||
m_ay31015->write_rdav(0);
|
||||
m_ay31015->write_rdav(1);
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -166,13 +166,13 @@ READ8_MEMBER( trs80_state::sys80_f9_r )
|
||||
d0 Data Available */
|
||||
|
||||
uint8_t data = 70;
|
||||
m_ay31015->set_input_pin(AY31015_SWE, 0);
|
||||
data |= m_ay31015->get_output_pin(AY31015_TBMT) ? 0 : 0x80;
|
||||
data |= m_ay31015->get_output_pin(AY31015_DAV ) ? 0x01 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_OR ) ? 0x02 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_FE ) ? 0x04 : 0;
|
||||
data |= m_ay31015->get_output_pin(AY31015_PE ) ? 0x08 : 0;
|
||||
m_ay31015->set_input_pin(AY31015_SWE, 1);
|
||||
m_ay31015->write_swe(0);
|
||||
data |= m_ay31015->tbmt_r() ? 0 : 0x80;
|
||||
data |= m_ay31015->dav_r( ) ? 0x01 : 0;
|
||||
data |= m_ay31015->or_r( ) ? 0x02 : 0;
|
||||
data |= m_ay31015->fe_r( ) ? 0x04 : 0;
|
||||
data |= m_ay31015->pe_r( ) ? 0x08 : 0;
|
||||
m_ay31015->write_swe(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -464,13 +464,13 @@ WRITE8_MEMBER( trs80_state::trs80m4_ea_w )
|
||||
d0 Data-Terminal-Ready (DTR), pin 20 */
|
||||
|
||||
{
|
||||
m_ay31015->set_input_pin(AY31015_CS, 0);
|
||||
m_ay31015->set_input_pin(AY31015_NB1, BIT(data, 6));
|
||||
m_ay31015->set_input_pin(AY31015_NB2, BIT(data, 5));
|
||||
m_ay31015->set_input_pin(AY31015_TSB, BIT(data, 4));
|
||||
m_ay31015->set_input_pin(AY31015_EPS, BIT(data, 7));
|
||||
m_ay31015->set_input_pin(AY31015_NP, BIT(data, 3));
|
||||
m_ay31015->set_input_pin(AY31015_CS, 1);
|
||||
m_ay31015->write_cs(0);
|
||||
m_ay31015->write_nb1(BIT(data, 6));
|
||||
m_ay31015->write_nb2(BIT(data, 5));
|
||||
m_ay31015->write_tsb(BIT(data, 4));
|
||||
m_ay31015->write_eps(BIT(data, 7));
|
||||
m_ay31015->write_np(BIT(data, 3));
|
||||
m_ay31015->write_cs(1);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@ -48,7 +48,7 @@ TIMER_CALLBACK_MEMBER(z80ne_state::z80ne_cassette_tc)
|
||||
m_cass_data.input.level = cass_ws;
|
||||
m_cass_data.input.bit = ((m_cass_data.input.length < m_cass_data.wave_filter) || (m_cass_data.input.length > 0x20)) ? 1 : 0;
|
||||
m_cass_data.input.length = 0;
|
||||
m_ay31015->set_input_pin(AY31015_SI, m_cass_data.input.bit);
|
||||
m_ay31015->write_si(m_cass_data.input.bit);
|
||||
}
|
||||
m_cass_data.input.level = cass_ws;
|
||||
|
||||
@ -63,7 +63,7 @@ TIMER_CALLBACK_MEMBER(z80ne_state::z80ne_cassette_tc)
|
||||
else
|
||||
{
|
||||
m_cass_data.output.level=1;
|
||||
cass_ws = m_ay31015->get_output_pin(AY31015_SO);
|
||||
cass_ws = m_ay31015->so_r();
|
||||
m_cass_data.wave_length = cass_ws ? m_cass_data.wave_short : m_cass_data.wave_long;
|
||||
}
|
||||
cassette_device_image()->output(m_cass_data.output.level ? -1.0 : +1.0);
|
||||
@ -275,13 +275,13 @@ MACHINE_RESET_MEMBER(z80ne_state,z80ne_base)
|
||||
m_cass_data.input.length = 0;
|
||||
m_cass_data.input.bit = 1;
|
||||
|
||||
m_ay31015->set_input_pin(AY31015_CS, 0);
|
||||
m_ay31015->set_input_pin(AY31015_NB1, 1);
|
||||
m_ay31015->set_input_pin(AY31015_NB2, 1);
|
||||
m_ay31015->set_input_pin(AY31015_TSB, 1);
|
||||
m_ay31015->set_input_pin(AY31015_EPS, 1);
|
||||
m_ay31015->set_input_pin(AY31015_NP, m_io_lx_385->read() & 0x80 ? 1 : 0);
|
||||
m_ay31015->set_input_pin(AY31015_CS, 1);
|
||||
m_ay31015->write_cs(0);
|
||||
m_ay31015->write_nb1(1);
|
||||
m_ay31015->write_nb2(1);
|
||||
m_ay31015->write_tsb(1);
|
||||
m_ay31015->write_eps(1);
|
||||
m_ay31015->write_np(m_io_lx_385->read() & 0x80 ? 1 : 0);
|
||||
m_ay31015->write_cs(1);
|
||||
m_ay31015->set_receiver_clock(m_cass_data.speed * 16.0);
|
||||
m_ay31015->set_transmitter_clock(m_cass_data.speed * 16.0);
|
||||
|
||||
@ -491,14 +491,14 @@ READ8_MEMBER(z80ne_state::lx385_ctrl_r)
|
||||
/* set unused bits high */
|
||||
uint8_t data = 0xc0;
|
||||
|
||||
m_ay31015->set_input_pin(AY31015_SWE, 0);
|
||||
data |= (m_ay31015->get_output_pin(AY31015_OR ) ? 0x01 : 0);
|
||||
data |= (m_ay31015->get_output_pin(AY31015_FE ) ? 0x02 : 0);
|
||||
data |= (m_ay31015->get_output_pin(AY31015_PE ) ? 0x04 : 0);
|
||||
data |= (m_ay31015->get_output_pin(AY31015_TBMT) ? 0x08 : 0);
|
||||
data |= (m_ay31015->get_output_pin(AY31015_DAV ) ? 0x10 : 0);
|
||||
data |= (m_ay31015->get_output_pin(AY31015_EOC ) ? 0x20 : 0);
|
||||
m_ay31015->set_input_pin(AY31015_SWE, 1);
|
||||
m_ay31015->write_swe(0);
|
||||
data |= (m_ay31015->or_r( ) ? 0x01 : 0);
|
||||
data |= (m_ay31015->fe_r( ) ? 0x02 : 0);
|
||||
data |= (m_ay31015->pe_r( ) ? 0x04 : 0);
|
||||
data |= (m_ay31015->tbmt_r() ? 0x08 : 0);
|
||||
data |= (m_ay31015->dav_r( ) ? 0x10 : 0);
|
||||
data |= (m_ay31015->eoc_r( ) ? 0x20 : 0);
|
||||
m_ay31015->write_swe(1);
|
||||
|
||||
return data;
|
||||
}
|
||||
@ -533,14 +533,14 @@ WRITE8_MEMBER(z80ne_state::lx385_ctrl_w)
|
||||
/* UART Reset and RDAV */
|
||||
if (uart_reset)
|
||||
{
|
||||
m_ay31015->set_input_pin(AY31015_XR, 1);
|
||||
m_ay31015->set_input_pin(AY31015_XR, 0);
|
||||
m_ay31015->write_xr(1);
|
||||
m_ay31015->write_xr(0);
|
||||
}
|
||||
|
||||
if (uart_rdav)
|
||||
{
|
||||
m_ay31015->set_input_pin(AY31015_RDAV, 1);
|
||||
m_ay31015->set_input_pin(AY31015_RDAV, 0);
|
||||
m_ay31015->write_rdav(1);
|
||||
m_ay31015->write_rdav(0);
|
||||
}
|
||||
|
||||
if (!changed_bits) return;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user