z80: remove boguswait pin (tried to fix super6 properly but no luck)

This commit is contained in:
hap 2024-08-31 13:41:17 +02:00
parent 0fb6939425
commit ca82f994fb
9 changed files with 25 additions and 18 deletions

View File

@ -59,7 +59,6 @@ void nsc800_device::execute_set_input(int inputnum, int state)
{
switch (inputnum)
{
case INPUT_LINE_IRQ0:
case NSC800_RSTA:
m_nsc800_irq_state[0] = state;
break;

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@ -10,7 +10,6 @@
enum
{
Z80_INPUT_LINE_WAIT = INPUT_LINE_IRQ0 + 1,
Z80_INPUT_LINE_BOGUSWAIT, // WAIT pin implementation used to be nonexistent, please remove this when all drivers are updated with Z80_INPUT_LINE_WAIT
Z80_INPUT_LINE_BUSRQ,
Z80_INPUT_LINE_MAX

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@ -2,20 +2,17 @@
// copyright-holders:Curt Coder
/*
ToDo:
TODO:
- peripheral interfaces
- Fix floppy. It needs to WAIT the cpu whenever port 0x14 is read, wait
for either DRQ or INTRQ to assert, then release the cpu and then do the
actual port read. Our Z80 cannot do that.
actual port read. But it doesn't work properly at the moment. It gets stuck
if you load up the cpm disk (from software list). The other disks are useless.
The schematic isn't clear, but it seems the 2 halves of U16 (as shown) have
a common element, so that activity on one side can affect what happens on
the other side.
If you uncomment the line in fdc_intrq_w, and change the BOGUSWAIT to WAIT
in fdc_r, then load up the cpm disk (from software list), it will read the
CP/M boot track into memory and attempt to run it. However, it has an issue
and returns to the monitor. The other disks are useless.
*/
@ -201,7 +198,16 @@ uint8_t super6_state::fdc_r()
*/
m_maincpu->set_input_line(Z80_INPUT_LINE_BOGUSWAIT, ASSERT_LINE);
if (!machine().side_effects_disabled())
{
if (!m_z80_wait)
{
m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE);
m_maincpu->defer_access();
}
m_z80_wait = !m_z80_wait;
}
return m_fdc->intrq_r() ? 0x7f : 0xff;
}
@ -384,7 +390,6 @@ void super6_state::fdc_intrq_w(int state)
if (state) m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
m_ctc->trg3(state); // J6 pin 7-8
// m_maincpu->set_state_int(Z80_AF, 0x7f00); // hack, see notes
}
void super6_state::fdc_drq_w(int state)
@ -420,6 +425,7 @@ void super6_state::fdc_drq_w(int state)
void super6_state::machine_start()
{
// state saving
save_item(NAME(m_z80_wait));
save_item(NAME(m_s100));
save_item(NAME(m_bank0));
save_item(NAME(m_bank1));
@ -428,6 +434,7 @@ void super6_state::machine_start()
void super6_state::machine_reset()
{
m_z80_wait = false;
m_bank0 = m_bank1 = 0;
bankswitch();

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@ -80,6 +80,8 @@ private:
required_region_ptr<uint8_t> m_rom;
required_ioport m_j7;
bool m_z80_wait = false;
// memory state
uint8_t m_s100 = 0;
uint8_t m_bank0 = 0;

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@ -608,7 +608,7 @@ void ep64_state::ep64(machine_config &config)
m_exp->set_io_space(m_dave, AS_IO);
m_exp->irq_wr().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
m_exp->nmi_wr().set_inputline(m_maincpu, INPUT_LINE_NMI);
m_exp->wait_wr().set_inputline(m_maincpu, Z80_INPUT_LINE_BOGUSWAIT);
m_exp->wait_wr().set_inputline(m_maincpu, Z80_INPUT_LINE_WAIT);
CENTRONICS(config, m_centronics, centronics_devices, "printer");
m_centronics->busy_handler().set(FUNC(ep64_state::write_centronics_busy));

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@ -723,7 +723,7 @@ void mpz80_state::mpz80(machine_config &config)
S100_BUS(config, m_s100, XTAL(4'000'000) / 2);
m_s100->irq().set(FUNC(mpz80_state::s100_pint_w));
m_s100->nmi().set(FUNC(mpz80_state::s100_nmi_w));
m_s100->rdy().set_inputline(m_maincpu, Z80_INPUT_LINE_BOGUSWAIT);
m_s100->rdy().set_inputline(m_maincpu, Z80_INPUT_LINE_WAIT);
S100_SLOT(config, S100_TAG ":1", mpz80_s100_cards, "mm65k16s");
S100_SLOT(config, S100_TAG ":2", mpz80_s100_cards, "wunderbus");
S100_SLOT(config, S100_TAG ":3", mpz80_s100_cards, "dj2db");

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@ -213,7 +213,7 @@ void horizon_state::horizon(machine_config &config)
// S-100
S100_BUS(config, m_s100, XTAL(8'000'000) / 4);
m_s100->rdy().set_inputline(m_maincpu, Z80_INPUT_LINE_BOGUSWAIT);
m_s100->rdy().set_inputline(m_maincpu, Z80_INPUT_LINE_WAIT);
//S100_SLOT(config, S100_TAG":1", horizon_s100_cards, nullptr, nullptr); // CPU
S100_SLOT(config, "s100:2", horizon_s100_cards, nullptr); // RAM
S100_SLOT(config, "s100:3", horizon_s100_cards, "mdsad"); // MDS

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@ -728,7 +728,7 @@ void mrgame_state::mrgame(machine_config &config)
dacvol.add_route(0, "rdac", -1.0, DAC_INPUT_RANGE_LO);
tms5220_device &tms(TMS5220(config, "tms", 672000)); // uses a RC combination. 672k copied from jedi.h
tms.ready_cb().set_inputline("audiocpu2", Z80_INPUT_LINE_BOGUSWAIT);
tms.ready_cb().set_inputline("audiocpu2", Z80_INPUT_LINE_WAIT);
tms.add_route(ALL_OUTPUTS, "lspeaker", 1.0);
tms.add_route(ALL_OUTPUTS, "rspeaker", 1.0);

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@ -32,7 +32,7 @@ Note some of the commands are a bit buggy, eg F doesn't fill the last byte
TODO:
- Fix floppy. It needs to WAIT the cpu whenever port 0xFC is read, wait
for either DRQ or INTRQ to assert, then release the cpu and then do the
actual port read. Our Z80 cannot do that.
actual port read.
- The only available disks crash MAME when loaded.
- honor jumper settings
- CTC signal header
@ -280,7 +280,7 @@ uint8_t xor100_state::fdc_wait_r()
{
if (!m_fdc_irq && !m_fdc_drq)
{
m_maincpu->set_input_line(Z80_INPUT_LINE_BOGUSWAIT, ASSERT_LINE);
//m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE);
}
}
@ -640,7 +640,7 @@ void xor100_state::xor100(machine_config &config)
// S-100
S100_BUS(config, m_s100, 8_MHz_XTAL / 4);
m_s100->rdy().set_inputline(m_maincpu, Z80_INPUT_LINE_BOGUSWAIT);
m_s100->rdy().set_inputline(m_maincpu, Z80_INPUT_LINE_WAIT);
S100_SLOT(config, S100_TAG ":1", xor100_s100_cards, nullptr);
S100_SLOT(config, S100_TAG ":2", xor100_s100_cards, nullptr);
S100_SLOT(config, S100_TAG ":3", xor100_s100_cards, nullptr);