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Merge branch 'local'

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Happy 2015-09-07 22:26:24 -06:00
commit caf277a3cc
4 changed files with 72 additions and 23 deletions
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32
src/emu/cpu/mips/mips3.c
View File

@ -2845,11 +2845,23 @@ void mips3_device::execute_run()
case 0x2e: /* SWR */ (this->*m_swr)(op); break;
case 0x2f: /* CACHE */ /* effective no-op */ break;
case 0x30: /* LL */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; m_ll_value = RTVAL32; break;
case 0x31: /* LWC1 */ if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop1_reg32(RTREG, temp); break;
case 0x31: /* LWC1 */
if (!(SR & SR_COP1))
{
m_badcop_value = 1;
generate_exception(EXCEPTION_BADCOP, 1);
}
if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop1_reg32(RTREG, temp); break;
case 0x32: /* LWC2 */ if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop2_reg(RTREG, temp); break;
case 0x33: /* PREF */ /* effective no-op */ break;
case 0x34: /* LLD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; m_lld_value = temp64; break;
case 0x35: /* LDC1 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop1_reg64(RTREG, temp64); break;
case 0x35: /* LDC1 */
if (!(SR & SR_COP1))
{
m_badcop_value = 1;
generate_exception(EXCEPTION_BADCOP, 1);
}
if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop1_reg64(RTREG, temp64); break;
case 0x36: /* LDC2 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop2_reg(RTREG, temp64); break;
case 0x37: /* LD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; break;
case 0x38: /* SC */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG)
@ -2865,7 +2877,13 @@ void mips3_device::execute_run()
}
}
break;
case 0x39: /* SWC1 */ WWORD(SIMMVAL+RSVAL32, get_cop1_reg32(RTREG)); break;
case 0x39: /* SWC1 */
if (!(SR & SR_COP1))
{
m_badcop_value = 1;
generate_exception(EXCEPTION_BADCOP, 1);
}
WWORD(SIMMVAL+RSVAL32, get_cop1_reg32(RTREG)); break;
case 0x3a: /* SWC2 */ WWORD(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break;
case 0x3b: /* SWC3 */ invalid_instruction(op); break;
case 0x3c: /* SCD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG)
@ -2881,7 +2899,13 @@ void mips3_device::execute_run()
}
}
break;
case 0x3d: /* SDC1 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop1_reg64(RTREG)); break;
case 0x3d: /* SDC1 */
if (!(SR & SR_COP1))
{
m_badcop_value = 1;
generate_exception(EXCEPTION_BADCOP, 1);
}
WDOUBLE(SIMMVAL+RSVAL32, get_cop1_reg64(RTREG)); break;
case 0x3e: /* SDC2 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break;
case 0x3f: /* SD */ WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); break;
default: /* ??? */ invalid_instruction(op); break;

3
src/mame/includes/n64.h
View File

@ -86,6 +86,7 @@ public:
TIMER_CALLBACK_MEMBER(vi_scanline_callback);
TIMER_CALLBACK_MEMBER(ai_timer_callback);
TIMER_CALLBACK_MEMBER(pi_dma_callback);
TIMER_CALLBACK_MEMBER(si_dma_callback);
DECLARE_READ32_MEMBER( dp_reg_r );
DECLARE_WRITE32_MEMBER( dp_reg_w );
DECLARE_READ32_MEMBER( sp_reg_r );
@ -96,6 +97,7 @@ public:
void ai_timer_tick();
void pi_dma_tick();
void si_dma_tick();
void vi_scanline_tick();
void reset_tick();
@ -242,6 +244,7 @@ private:
UINT32 pi_dma_dir;
// Serial Interface (SI) registers and functions
emu_timer *si_dma_timer;
void pif_dma(int direction);
void handle_pif();
int pif_channel_handle_command(int channel, int slength, UINT8 *sdata, int rlength, UINT8 *rdata);

58
src/mame/machine/n64.c
View File

@ -109,6 +109,7 @@ void n64_periphs::device_start()
{
ai_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::ai_timer_callback),this));
pi_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::pi_dma_callback),this));
si_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::si_dma_callback),this));
vi_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::vi_scanline_callback),this));
reset_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::reset_timer_callback),this));
}
@ -202,8 +203,9 @@ void n64_periphs::device_reset()
si_dram_addr = 0;
si_pif_addr = 0;
si_status = 0;
si_dma_timer->adjust(attotime::never);
memset(m_save_data.eeprom, 0, 2048);
//memset(m_save_data.eeprom, 0, 2048);
dp_clock = 0;
@ -225,7 +227,7 @@ void n64_periphs::device_reset()
pif_ram[0x26] = 0x3f;
pif_ram[0x27] = 0x3f;
cic_type=2;
mem_map->write_dword(0x00000318, 0x800000);
mem_map->write_dword(0x00000318, 0x800000); /* RDRAM Size */
if (boot_checksum == U64(0x00000000001ff230))
{
@ -993,7 +995,7 @@ void n64_periphs::vi_scanline_tick()
// Video Interface
void n64_periphs::vi_recalculate_resolution()
{
n64_state *state = machine().driver_data<n64_state>();
//n64_state *state = machine().driver_data<n64_state>();
int x_start = (vi_hstart & 0x03ff0000) >> 16;
int x_end = vi_hstart & 0x000003ff;
@ -1025,7 +1027,12 @@ void n64_periphs::vi_recalculate_resolution()
if (height > 480)
height = 480;
state->m_rdp->m_misc_state.m_fb_height = height;
if(vi_control & 0x40) /* Interlace */
{
height *= 2;
}
//state->m_rdp->m_misc_state.m_fb_height = height;
visarea.max_x = width - 1;
visarea.max_y = height - 1;
@ -1054,7 +1061,7 @@ READ32_MEMBER( n64_periphs::vi_reg_r )
break;
case 0x10/4: // VI_CURRENT_REG
ret = m_screen->vpos() << 1;
ret = (m_screen->vpos() << 1) + 1;
break;
case 0x14/4: // VI_BURST_REG
@ -1103,7 +1110,7 @@ READ32_MEMBER( n64_periphs::vi_reg_r )
WRITE32_MEMBER( n64_periphs::vi_reg_w )
{
n64_state *state = machine().driver_data<n64_state>();
//n64_state *state = machine().driver_data<n64_state>();
switch (offset)
{
@ -1122,7 +1129,7 @@ WRITE32_MEMBER( n64_periphs::vi_reg_w )
vi_recalculate_resolution();
}
vi_width = data;
state->m_rdp->m_misc_state.m_fb_width = data;
//state->m_rdp->m_misc_state.m_fb_width = data;
break;
case 0x0c/4: // VI_INTR_REG
@ -1214,7 +1221,7 @@ void n64_periphs::ai_fifo_push(UINT32 address, UINT32 length)
if (! (ai_status & 0x40000000))
{
signal_rcp_interrupt(AI_INTERRUPT);
//signal_rcp_interrupt(AI_INTERRUPT);
ai_dma();
}
}
@ -1237,7 +1244,7 @@ void n64_periphs::ai_fifo_pop()
if (ai_fifo_num < AUDIO_DMA_DEPTH)
{
ai_status &= ~0x80000001; // FIFO not full
signal_rcp_interrupt(AI_INTERRUPT);
//signal_rcp_interrupt(AI_INTERRUPT);
}
}
@ -1277,7 +1284,7 @@ void n64_periphs::ai_dma()
ai_status |= 0x40000000;
// adjust the timer
period = attotime::from_hz(DACRATE_NTSC) * ((ai_dacrate + 1) * (current->length / 4));
period = attotime::from_hz(DACRATE_NTSC) * (ai_dacrate + 1) * (current->length / 4);
ai_timer->adjust(period);
}
@ -1289,12 +1296,12 @@ TIMER_CALLBACK_MEMBER(n64_periphs::ai_timer_callback)
void n64_periphs::ai_timer_tick()
{
ai_fifo_pop();
signal_rcp_interrupt(AI_INTERRUPT);
// keep playing if there's another DMA queued
if (ai_fifo_get_top() != NULL)
{
ai_dma();
signal_rcp_interrupt(AI_INTERRUPT);
}
else
{
@ -1325,7 +1332,9 @@ READ32_MEMBER( n64_periphs::ai_reg_r )
}
break;
}
case 0x08/4:
ret = ai_control;
break;
case 0x0c/4: // AI_STATUS_REG
ret = ai_status;
break;
@ -1425,9 +1434,9 @@ void n64_periphs::pi_dma_tick()
{
UINT32 dma_length = pi_wr_len + 1;
//logerror("PI Write, %X, %X, %X\n", pi_cart_addr, pi_dram_addr, pi_wr_len);
if (dma_length & 7)
if (dma_length & 1)
{
dma_length = (dma_length + 7) & ~7;
dma_length = (dma_length + 1) & ~1;
}
if (pi_dram_addr != 0xffffffff)
@ -1445,9 +1454,9 @@ void n64_periphs::pi_dma_tick()
{
UINT32 dma_length = pi_rd_len + 1;
//logerror("PI Read, %X, %X, %X\n", pi_cart_addr, pi_dram_addr, pi_rd_len);
if (dma_length & 7)
if (dma_length & 1)
{
dma_length = (dma_length + 7) & ~7;
dma_length = (dma_length + 1) & ~1;
}
if (pi_dram_addr != 0xffffffff)
@ -2076,6 +2085,18 @@ void n64_periphs::handle_pif()
}*/
}
TIMER_CALLBACK_MEMBER(n64_periphs::si_dma_callback)
{
machine().device<n64_periphs>("rcp")->si_dma_tick();
}
void n64_periphs::si_dma_tick()
{
si_dma_timer->adjust(attotime::never);
si_status |= 0x1000;
signal_rcp_interrupt(SI_INTERRUPT);
}
void n64_periphs::pif_dma(int direction)
{
if (si_dram_addr & 0x3)
@ -2116,8 +2137,9 @@ void n64_periphs::pif_dma(int direction)
}
}
si_status |= 0x1000;
signal_rcp_interrupt(SI_INTERRUPT);
si_dma_timer->adjust(attotime::from_hz(500));
//si_status |= 0x1000;
//signal_rcp_interrupt(SI_INTERRUPT);
}
READ32_MEMBER( n64_periphs::si_reg_r )

2
src/mess/drivers/n64.c
View File

@ -414,7 +414,7 @@ static MACHINE_CONFIG_START( n64, n64_mess_state )
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(640, 525)
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 239)
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
MCFG_SCREEN_UPDATE_DRIVER(n64_state, screen_update_n64)
MCFG_SCREEN_VBLANK_DRIVER(n64_state, screen_eof_n64)