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https://github.com/holub/mame
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kl5c80a12: Internalize internal RAM and clock divider; update notes
This commit is contained in:
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@ -1,28 +1,35 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:David Haywood,AJR
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// copyright-holders:AJR
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/***************************************************************************
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/***************************************************************************
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Kawasaki LSI
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Kawasaki Steel (Kawatetsu) KL5C80A12 CPU
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KL5C80A12 CPU (KL5C80A12CFP on hng64.c)
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Binary compatible with Z80, significantly faster opcode timings, operating at up to 10Mhz
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This is based on KC82, an MMU-enhanced version of KC80 (KL5C8400),
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Timers / Counters, Parallel / Serial ports/ MMU, Interrupt Controller
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Kawasaki's Z80-compatible core with an internal 16-bit architecture
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and significantly faster opcode timings, operating at up to 10 MHz
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(CLK = XIN/2).
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(is this different enough to need it's own core?)
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Important functional blocks:
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(todo: everything except MMU)
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— MMU
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— USART (KP51) (unemulated)
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— 16-bit timer/counters (KP64, KP63) (unemulated)
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— 16-level interrupt controller (KP69) (unemulated)
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— Parallel ports (KP65, KP66) (unemulated)
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— 512-byte high-speed RAM
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— External bus interface unit (unemulated)
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***************************************************************************/
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***************************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "kl5c80a12.h"
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#include "kl5c80a12.h"
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DEFINE_DEVICE_TYPE(KL5C80A12, kl5c80a12_device, "kl5c80a12", "Kawasaki LSI KL5C80A12")
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DEFINE_DEVICE_TYPE(KL5C80A12, kl5c80a12_device, "kl5c80a12", "Kawasaki Steel KL5C80A12")
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kl5c80a12_device::kl5c80a12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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kl5c80a12_device::kl5c80a12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: z80_device(mconfig, KL5C80A12, tag, owner, clock)
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: z80_device(mconfig, KL5C80A12, tag, owner, clock)
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, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0, 16, 10)
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, m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0, 16, 10, address_map_constructor(FUNC(kl5c80a12_device::internal_ram), this))
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, m_opcodes_config("opcodes", ENDIANNESS_LITTLE, 8, 20, 0, 16, 10)
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, m_opcodes_config("opcodes", ENDIANNESS_LITTLE, 8, 20, 0, 16, 10, address_map_constructor(FUNC(kl5c80a12_device::internal_ram), this))
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, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0, address_map_constructor(FUNC(kl5c80a12_device::internal_io), this))
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, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0, address_map_constructor(FUNC(kl5c80a12_device::internal_io), this))
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{
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{
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std::fill_n(&m_mmu_a[0], 4, 0);
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std::fill_n(&m_mmu_a[0], 4, 0);
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@ -31,6 +38,16 @@ kl5c80a12_device::kl5c80a12_device(const machine_config &mconfig, const char *ta
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}
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}
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//-------------------------------------------------
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// internal_ram - map for high-speed internal RAM
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//-------------------------------------------------
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void kl5c80a12_device::internal_ram(address_map &map)
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{
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map(0xffe00, 0xfffff).ram().share("ram");
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}
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//-------------------------------------------------
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//-------------------------------------------------
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// internal_io - map for internal I/O registers
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// internal_io - map for internal I/O registers
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//-------------------------------------------------
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//-------------------------------------------------
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@ -138,7 +155,7 @@ void kl5c80a12_device::mmu_remap_pages()
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{
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{
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int n = 4;
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int n = 4;
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u32 base = 0xf0000; // A4 is fixed
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u32 base = 0xf0000; // A4 is fixed
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for (int i = 0x3f; i >= 0; --i)
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for (u8 i = 0x3f; i != 0; --i)
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{
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{
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while (n != 0 && m_mmu_b[n] >= i)
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while (n != 0 && m_mmu_b[n] >= i)
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{
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{
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@ -1,15 +1,8 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:David Haywood,AJR
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// copyright-holders:AJR
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/***************************************************************************
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/***************************************************************************
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Kawasaki LSI
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Kawasaki Steel (Kawatetsu) KL5C80A12 CPU
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KL5C80A12 CPU (KL5C80A12CFP on hng64.c)
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Binary compatible with Z80, significantly faster opcode timings, operating at up to 10Mhz
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Timers / Counters, Parallel / Serial ports/ MMU, Interrupt Controller
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(is this different enough to need it's own core?)
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(todo: everything, some code currently lives in machine/hng64_net.c but not much)
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***************************************************************************/
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***************************************************************************/
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@ -19,17 +12,11 @@
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#pragma once
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#pragma once
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#include "z80.h"
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#include "z80.h"
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#include "machine/z80ctc.h"
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/***************************************************************************
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//**************************************************************************
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DEVICE CONFIGURATION MACROS
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// TYPE DEFINITIONS
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***************************************************************************/
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//**************************************************************************
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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class kl5c80a12_device : public z80_device
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class kl5c80a12_device : public z80_device
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{
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{
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@ -49,6 +36,10 @@ protected:
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virtual void device_reset() override;
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virtual void device_reset() override;
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virtual void device_post_load() override;
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virtual void device_post_load() override;
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// device_execute_interface overrides
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virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
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virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 2); }
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// device_memory_interface overrides
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// device_memory_interface overrides
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virtual space_config_vector memory_space_config() const override;
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virtual space_config_vector memory_space_config() const override;
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virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
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virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
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@ -61,7 +52,9 @@ protected:
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virtual u16 arg16() override;
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virtual u16 arg16() override;
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private:
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private:
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void internal_ram(address_map &map);
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void internal_io(address_map &map);
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void internal_io(address_map &map);
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void mmu_remap_pages();
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void mmu_remap_pages();
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u8 mmu_r(offs_t offset);
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u8 mmu_r(offs_t offset);
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void mmu_w(offs_t offset, u8 data);
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void mmu_w(offs_t offset, u8 data);
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@ -10023,7 +10023,7 @@ WRITE_LINE_MEMBER(ddenlovr_state::hanakanz_rtc_irq)
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void ddenlovr_state::hanakanz(machine_config &config)
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void ddenlovr_state::hanakanz(machine_config &config)
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{
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{
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/* basic machine hardware */
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/* basic machine hardware */
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KL5C80A12(config, m_maincpu, 8000000); // KL5C80A12
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KL5C80A12(config, m_maincpu, 20'000'000); // KL5C80A12
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::hanakanz_portmap);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::hanakanz_portmap);
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@ -10068,7 +10068,7 @@ void ddenlovr_state::hkagerou(machine_config &config)
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void ddenlovr_state::kotbinyo(machine_config &config)
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void ddenlovr_state::kotbinyo(machine_config &config)
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{
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{
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/* basic machine hardware */
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/* basic machine hardware */
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KL5C80A12(config, m_maincpu, XTAL(20'000'000) / 2); // !! KL5C80A12CFP @ 10MHz? (actually 4 times faster than Z80) !!
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KL5C80A12(config, m_maincpu, XTAL(20'000'000)); // !! KL5C80A12CFP @ 10MHz? (actually 4 times faster than Z80) !!
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::kotbinyo_portmap);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::kotbinyo_portmap);
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@ -10471,7 +10471,7 @@ void ddenlovr_state::hparadis(machine_config &config)
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void ddenlovr_state::jongtei(machine_config &config)
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void ddenlovr_state::jongtei(machine_config &config)
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{
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{
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/* basic machine hardware */
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/* basic machine hardware */
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KL5C80A12(config, m_maincpu, XTAL(20'000'000) / 2); // KL5C80A12
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KL5C80A12(config, m_maincpu, XTAL(20'000'000)); // KL5C80A12
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::jongtei_portmap);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::jongtei_portmap);
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@ -10685,7 +10685,7 @@ void ddenlovr_state::seljan2(machine_config &config)
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void ddenlovr_state::daimyojn(machine_config &config)
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void ddenlovr_state::daimyojn(machine_config &config)
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{
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{
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/* basic machine hardware */
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/* basic machine hardware */
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KL5C80A12(config, m_maincpu, XTAL(20'000'000) / 2);
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KL5C80A12(config, m_maincpu, XTAL(20'000'000));
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &ddenlovr_state::hanakanz_map);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::daimyojn_portmap);
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m_maincpu->set_addrmap(AS_IO, &ddenlovr_state::daimyojn_portmap);
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@ -38,7 +38,7 @@ Dumped games: ROMs: Video:
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Sammy Kids Medal Series
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Sammy Kids Medal Series
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CPU : Kawasaki KL5C80A120FP (Z80 Compatible High Speed Microcontroller)
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CPU : Kawasaki KL5C80A12CFP (Z80 Compatible High Speed Microcontroller)
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Video : TAXAN KY-3211
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Video : TAXAN KY-3211
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Sound : OKI M9810B
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Sound : OKI M9810B
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NVRAM : 93C46 and battery backed RAM
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NVRAM : 93C46 and battery backed RAM
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@ -1362,7 +1362,6 @@ void sigmab98_state::animalc_map(address_map &map)
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable?
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map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable?
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map(0x73013, 0x73013).rw(FUNC(sigmab98_state::vblank_r), FUNC(sigmab98_state::vblank_w)); // IRQ Ack?
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map(0x73013, 0x73013).rw(FUNC(sigmab98_state::vblank_r), FUNC(sigmab98_state::vblank_w)); // IRQ Ack?
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map(0xffe00, 0xfffff).ram(); // High speed internal RAM
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}
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}
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void sigmab98_state::animalc_io(address_map &map)
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void sigmab98_state::animalc_io(address_map &map)
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@ -1393,7 +1392,6 @@ void sigmab98_state::gocowboy_map(address_map &map)
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map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette");
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map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette");
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map(0x72800, 0x7287f).ram().share("vtable");
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map(0x72800, 0x7287f).ram().share("vtable");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0xffe00, 0xfffff).ram(); // High speed internal RAM
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}
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}
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@ -1474,7 +1472,6 @@ void sigmab98_state::haekaka_map(address_map &map)
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map(0x72800, 0x7287f).ram().share("vtable");
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map(0x72800, 0x7287f).ram().share("vtable");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73013, 0x73013).r(FUNC(sigmab98_state::haekaka_vblank_r));
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map(0x73013, 0x73013).r(FUNC(sigmab98_state::haekaka_vblank_r));
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map(0xffe00, 0xfffff).ram(); // High speed internal RAM
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}
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}
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void sigmab98_state::haekaka_io(address_map &map)
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void sigmab98_state::haekaka_io(address_map &map)
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@ -1507,7 +1504,6 @@ void sigmab98_state::itazuram_map(address_map &map)
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable?
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map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable?
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map(0x73013, 0x73013).r(FUNC(sigmab98_state::haekaka_vblank_r)).nopw(); // IRQ Ack?
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map(0x73013, 0x73013).r(FUNC(sigmab98_state::haekaka_vblank_r)).nopw(); // IRQ Ack?
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map(0xffe00, 0xfffff).ram(); // High speed internal RAM
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}
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}
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void sigmab98_state::itazuram_io(address_map &map)
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void sigmab98_state::itazuram_io(address_map &map)
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@ -1549,7 +1545,6 @@ void sigmab98_state::tdoboon_map(address_map &map)
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map(0x72800, 0x7287f).ram().share("vtable");
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map(0x72800, 0x7287f).ram().share("vtable");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73000, 0x73021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs");
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map(0x73013, 0x73013).r(FUNC(sigmab98_state::haekaka_vblank_r));
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map(0x73013, 0x73013).r(FUNC(sigmab98_state::haekaka_vblank_r));
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map(0xffe00, 0xfffff).ram(); // High speed internal RAM
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}
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}
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void sigmab98_state::tdoboon_io(address_map &map)
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void sigmab98_state::tdoboon_io(address_map &map)
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@ -2018,7 +2013,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(sigmab98_state::sammymdl_irq)
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void sigmab98_state::sammymdl(machine_config &config)
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void sigmab98_state::sammymdl(machine_config &config)
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{
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{
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KL5C80A12(config, m_maincpu, XTAL(20'000'000) / 2); // !! KL5C80A120FP @ 10MHz? (actually 4 times faster than Z80) !!
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KL5C80A12(config, m_maincpu, XTAL(20'000'000)); // !! KL5C80A12CFP @ 10MHz? (actually 4 times faster than Z80) !!
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m_maincpu->set_addrmap(AS_PROGRAM, &sigmab98_state::animalc_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &sigmab98_state::animalc_map);
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m_maincpu->set_addrmap(AS_IO, &sigmab98_state::animalc_io);
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m_maincpu->set_addrmap(AS_IO, &sigmab98_state::animalc_io);
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@ -2535,15 +2530,16 @@ void lufykzku_state::init_lufykzku()
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CPU:
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CPU:
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KAWASAKI KL5C80A120FP (@U1) - Z80 Compatible High Speed Microcontroller
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KAWASAKI KL5C80A12CFP (@U1) - Z80 Compatible High Speed Microcontroller
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XTAL 20 MHz (@X1)
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XTAL 20 MHz (@X1)
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MX29F040TC-12 VM1211L01 (@U2) - 4M-bit [512kx8] CMOS Equal Sector Flash Memory
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MX29F040TC-12 VM1211L01 (@U2) - 4M-bit [512kx8] CMOS Equal Sector Flash Memory
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BSI BS62LV256SC-70 (@U4) - Very Low Power/Voltage CMOS SRAM 32K X 8 bit
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BSI BS62LV256SC-70 (@U4) - Very Low Power/Voltage CMOS SRAM 32K X 8 bit
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(or Toshiba TC55257DFL-70L)
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Video:
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Video:
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TAXAN KY-3211 ? (@U17)
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TAXAN KY-3211 (@U17)
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M548262-60 (@U18) - 262144-Word x 8-Bit Multiport DRAM
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OKI M548262-60 (@U18) - 262144-Word x 8-Bit Multiport DRAM
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XTAL 27 MHz (@X3)
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XTAL 27 MHz (@X3)
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Sound:
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Sound:
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@ -2556,13 +2552,18 @@ void lufykzku_state::init_lufykzku()
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|||||||
Other:
|
Other:
|
||||||
|
|
||||||
Xilinx XC9536 VM1212F01 (@U5) - In-System Programmable CPLD
|
Xilinx XC9536 VM1212F01 (@U5) - In-System Programmable CPLD
|
||||||
MX29F0??C (@U3) - Empty 32 Pin ROM Socket
|
MX29F0?TC (@U3) - Empty 32 Pin DIP Socket
|
||||||
M5295A (@U8) - Watchdog Timer (Near CUT-DEBUG MODE Jumper)
|
M5295A (@U8) - Watchdog Timer (Near CUT-DEBUG MODE Jumper)
|
||||||
M93C46MN6T (@U11?) - Serial EEPROM
|
M93C46MN6T (@U6) - Serial EEPROM
|
||||||
|
RTC8564 (@U7) - not populated
|
||||||
|
SN75C1168 (@U10) - Dual RS-422 Transceiver
|
||||||
Cell Battery (@BAT)
|
Cell Battery (@BAT)
|
||||||
25 Pin Edge Connector
|
25 Pin Edge Connector
|
||||||
56 Pin Cartridge Connector
|
56 Pin Cartridge Connector
|
||||||
6 Pin Connector
|
6 Pin Connector - +5V (1), GND (2), TCLK (3), TDO (4), TDI (5), TMS (6)
|
||||||
|
|
||||||
|
On Go Go Cowboy, U2 and U10 are unpopulated, but U3 is occupied by a
|
||||||
|
ST M27C4001-10F1 EPROM.
|
||||||
|
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user