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Fix PIL handling in SPARC core. (nw)

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This commit is contained in:
therealmogminer@gmail.com 2016-07-14 20:58:06 +02:00
parent 1cdc1d5c8f
commit cb1c1557cf
2 changed files with 10 additions and 7 deletions
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7
src/devices/cpu/sparc/mb86901.cpp
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@ -2735,8 +2735,10 @@ void mb86901_device::execute_trap()
PSR |= PSR_S_MASK;
int cwp = PSR & PSR_CWP_MASK;
int new_cwp = ((cwp + NWINDOWS) - 1) % NWINDOWS;
PSR &= ~PSR_CWP_MASK;
PSR |= ((cwp + NWINDOWS) - 1) % NWINDOWS;
PSR |= new_cwp;
update_gpr_pointers();
@ -2863,6 +2865,7 @@ void mb86901_device::dispatch_instruction(UINT32 op)
if (illegal_IU_instr)
{
printf("illegal instruction at %08x\n", PC);
m_trap = 1;
m_illegal_instruction = 1;
}
@ -2958,7 +2961,7 @@ void mb86901_device::execute_step()
m_reset_mode = 1;
return;
}
else if ((PSR & PSR_ET_MASK) && (m_bp_irl == 15 || m_bp_irl > ((PSR >> PSR_PIL_SHIFT) & PSR_PIL_MASK)))
else if ((PSR & PSR_ET_MASK) && (m_bp_irl == 15 || m_bp_irl > ((PSR & PSR_PIL_MASK) >> PSR_PIL_SHIFT)))
{
m_trap = 1;
m_interrupt_level = m_bp_irl;

10
src/devices/cpu/sparc/ss1fcode.ipp
View File

@ -20,7 +20,7 @@ void mb86901_device::log_fcodes()
opcode >>= 16;
}
if (opcode == 0x4627)
if (false)//opcode == 0x6304)
{
m_log_fcodes = true;
//machine().debugger().debug_break();
@ -29,10 +29,10 @@ void mb86901_device::log_fcodes()
{
return;
}
else if (opcode == 0x0cb8)
{
m_log_fcodes = false;
}
//else if (opcode == 0x0cb8)
//{
// m_log_fcodes = false;
//}
UINT32 handler_base = opcode << 2;
handler_base += REG(2); // l1 = r2 + opcode << 2