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https://github.com/holub/mame
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sun2: MMU fixes, both VME and Multibus variants now POST and show something. [R. Belmont]
This commit is contained in:
arbee
parent
a9c3db7a98
commit
cb7209eb9d
@ -68,6 +68,7 @@
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25/08/2009 Skeleton driver.
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31/05/2016 Main screen turn on.
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How the architecture works:
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- There are 3 address sub-spaces: CPU layer, MMU layer, and device layer
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@ -100,18 +101,17 @@ How the architecture works:
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There are 8 hardware contexts. Supervisor and User FCs can have different contexts.
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Segment map is 4096 entries, from bits 23-15 of the virtual address + 3 context bits.
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Entries are 8 bits, which point to a page map entry group (PMEG).
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Entries are 8 bits, which point to a page map entry group (PMEG), which is 16 consecutive
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page table entries (32 KB of space).
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Page map is 4096 entries each mapping a 2K page. There are 256 groups of 16 entries;
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the PMEG points to these 256 groups. The page map contains a 20-bit page number,
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which combines with the 11 low bits of the original address to get a 31-bit physical address.
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The entry from 0-15 is picked with bits 15-11 of the original address.
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There is an "address hole" between virtual addresses 0x600000 and 0xDFFFFF. Page table
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number generation skips from 0x5FFFFF to 0xE00000. Thus the last two megs of the lower 8 MB
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are replaced by the last two megs of the upper 8 MB (ROM and I/O).
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ef0942 = time to set up the maps for the data (middle of function mapmem() in sunmon.c)
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Page map entries are written to the PMEG determined by their segment map entry; you must
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set the segment map validly in order to write to the page map. This is how they get away
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with having 16 MB of segment entries and only 8 MB of PMEGs.
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****************************************************************************/
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@ -129,10 +129,6 @@ How the architecture works:
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#define PM_ACCESSED (0x00200000) // accessed flag
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#define PM_MODIFIED (0x00100000) // modified flag
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#define HOLE_PAGE (4096) // fake page to redirect the address hole to, as TME does
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#define HOLE_START (0x800000>>1) // if set to real value of 600000, the page map address line test fails
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#define HOLE_END (0xDFFFFF>>1)
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class sun2_state : public driver_device
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{
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public:
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@ -140,15 +136,19 @@ public:
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_rom(*this, "bootprom"),
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m_idprom(*this, "idprom"),
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m_ram(*this, RAM_TAG),
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m_type0space(*this, "type0"),
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m_type1space(*this, "type1"),
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m_type2space(*this, "type2"),
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m_type3space(*this, "type3"),
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m_bw2_vram(*this, "bw2_vram")
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{ }
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required_device<m68010_device> m_maincpu;
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required_memory_region m_rom;
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required_memory_region m_rom, m_idprom;
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required_device<ram_device> m_ram;
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required_device<address_map_bank_device> m_type1space;
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required_device<address_map_bank_device> m_type0space, m_type1space, m_type2space, m_type3space;
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required_shared_ptr<UINT16> m_bw2_vram;
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virtual void machine_start() override;
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@ -156,31 +156,33 @@ public:
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DECLARE_READ16_MEMBER( tl_mmu_r );
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DECLARE_WRITE16_MEMBER( tl_mmu_w );
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DECLARE_READ16_MEMBER( video_ctrl_r );
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DECLARE_WRITE16_MEMBER( video_ctrl_w );
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DECLARE_READ16_MEMBER( test_r );
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DECLARE_WRITE16_MEMBER( test_w );
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DECLARE_READ16_MEMBER( ram_r );
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DECLARE_WRITE16_MEMBER( ram_w );
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UINT32 bw2_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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private:
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UINT16 *m_rom_ptr, *m_ram_ptr;
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UINT8 *m_idprom_ptr;
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UINT16 m_diagreg, m_sysenable, m_buserror;
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UINT16 m_context;
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UINT8 m_segmap[8][512];
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UINT32 m_pagemap[4097];
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UINT32 m_ram_size, m_ram_size_words;
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UINT16 m_bw2_ctrl;
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};
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READ16_MEMBER( sun2_state::test_r )
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READ16_MEMBER( sun2_state::ram_r )
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{
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printf("test_r @ %x\n", offset << 1);
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if (offset < m_ram_size_words) return m_ram_ptr[offset];
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return 0xffff;
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}
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WRITE16_MEMBER( sun2_state::test_w )
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WRITE16_MEMBER( sun2_state::ram_w )
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{
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printf("test_w %x @ %x\n", data, offset << 1);
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if (offset < m_ram_size_words) COMBINE_DATA(&m_ram_ptr[offset]);
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}
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READ16_MEMBER( sun2_state::tl_mmu_r )
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@ -191,22 +193,22 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
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{
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if (offset & 0x4) // set for CPU space
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{
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switch (offset)
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switch (offset & 7)
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{
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case 4:
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printf("sun2: Read IDPROM @ %x\n", offset<<1);
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return 0xffff;
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//printf("sun2: Read IDPROM @ %x (PC=%x)\n", offset<<1, m_maincpu->pc);
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return m_idprom_ptr[(offset>>10) & 0x1f]<<8;
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case 5:
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printf("sun2: Read diag reg\n");
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//printf("sun2: Read diag reg\n");
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return m_diagreg;
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case 6:
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printf("sun2: Read bus error\n");
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//printf("sun2: Read bus error @ PC %x\n", m_maincpu->pc);
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return m_buserror;
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case 7:
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printf("sun2: Read sysenable\n");
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//printf("sun2: Read sysenable\n");
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return m_sysenable;
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}
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}
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@ -218,20 +220,9 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
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{
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case 0: // page map
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case 1:
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page = (offset >> 10) & 0x1fff;
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if (offset >= HOLE_START)
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{
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if (offset <= HOLE_END)
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{
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page = HOLE_PAGE;
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}
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else
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{
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page &= 0xfff;
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}
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}
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page = m_segmap[m_context & 7][offset >> 14] << 4;
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page += ((offset >> 10) & 0xf);
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//printf("sun2: Read page map at %x (entry %d)\n", offset<<1, page);
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if (offset & 1) // low-order 16 bits
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{
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@ -262,21 +253,12 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
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return m_rom_ptr[offset & 0x3fff];
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}
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int super_verbose = 0;
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if ((offset >= (0xef6600>>1)) && (offset <= (0xef6900>>1)))
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{
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super_verbose = 1;
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}
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// it's translation time
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UINT8 context = (fc & 4) ? ((m_context >> 8) & 7) : (m_context & 7);
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UINT8 pmeg = m_segmap[context][offset >> 14];
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UINT32 entry = (pmeg << 4) + ((offset >> 10) & 0xf);
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if (super_verbose)
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{
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//printf("sun2: Context = %d, pmeg = %d, offset >> 14 = %x, entry = %d, page = %d\n", context, pmeg, offset >> 14, entry, (offset >> 10) & 0xf);
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}
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// printf("sun2: Context = %d, pmeg = %d, offset >> 14 = %x, entry = %d, page = %d\n", context, pmeg, offset >> 14, entry, (offset >> 10) & 0xf);
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m_pagemap[entry] |= PM_ACCESSED;
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if (m_pagemap[entry] & PM_VALID)
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@ -284,17 +266,15 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
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UINT32 tmp = (m_pagemap[entry] & 0xfffff) << 10;
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tmp |= (offset & 0x3ff);
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//if ((!space.debugger_access()) && (super_verbose))
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// printf("sun2: Translated addr: %08x, type %d (page %d page entry %08x, orig virt %08x, FC %d)\n", tmp << 1, (m_pagemap[entry] >> 22) & 7, entry, m_pagemap[entry], offset<<1, fc);
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// if (!space.debugger_access())
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// printf("sun2: Translated addr: %08x, type %d (page %d page entry %08x, orig virt %08x, FC %d)\n", tmp << 1, (m_pagemap[entry] >> 22) & 7, entry, m_pagemap[entry], offset<<1, fc);
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switch ((m_pagemap[entry] >> 22) & 7)
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{
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case 0: // main RAM space
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//printf("read main RAM @ %x\n", offset<<1);
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if (tmp < m_ram_size_words) return m_ram_ptr[tmp];
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return 0xffff;
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case 0: // type 0 space
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return m_type0space->read16(space, tmp, mem_mask);
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case 1: // device space
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case 1: // type 1 space
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// EPROM space is special: the MMU has a trap door
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// where the original bits of the virtual address are
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// restored so that the entire 32K EPROM can be
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@ -302,26 +282,29 @@ READ16_MEMBER( sun2_state::tl_mmu_r )
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// obvious in the sun2 manual, but the sun3 manual
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// (sun3 has the same mechanism) explains it well.
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// the 2/50 ROM tests this specifically at $EF0DF0.
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if ((tmp >= (0x7f0000>>1)) && (tmp <= (0x7f07ff>>1)))
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if (m_idprom_ptr[1] == 0x02) // 2/50 VMEbus has EPROM at 0x7F0000
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{
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if (super_verbose)
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if ((tmp >= (0x7f0000>>1)) && (tmp <= (0x7f07ff>>1)))
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{
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printf("sun2: extra-magic EPROM bypass @ %x\n", (offset & 0x3fff) << 1);
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return m_rom_ptr[offset & 0x3fff];
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}
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}
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else // Multibus has EPROM at 0x000000
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{
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if (tmp <= (0x7ff>>1))
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{
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return m_rom_ptr[offset & 0x3fff];
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}
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return m_rom_ptr[offset & 0x3fff];
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}
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//printf("read device space @ %x\n", tmp<<1);
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return m_type1space->read16(space, tmp, mem_mask);
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case 2: // VME space
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//printf("Read VME2 @ %x\n", tmp<<1);
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break;
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case 2: // type 2 space
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return m_type2space->read16(space, tmp, mem_mask);
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case 3: // more VME
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//printf("Read VME3 @ %x\n", tmp<<1);
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break;
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case 3: // type 3 space
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return m_type3space->read16(space, tmp, mem_mask);
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}
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}
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else
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@ -344,7 +327,7 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
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{
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if (offset & 0x4) // set for CPU space
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{
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switch (offset)
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switch (offset & 7)
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{
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case 4:
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//printf("sun2: Write? IDPROM @ %x\n", offset<<1);
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@ -373,7 +356,7 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
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return;
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case 7:
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printf("sun2: Write %04x to system enable\n", data);
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//printf("sun2: Write %04x to system enable\n", data);
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COMBINE_DATA(&m_sysenable);
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return;
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}
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@ -386,20 +369,10 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
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{
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case 0: // page map
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case 1:
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page = (offset >> 10) & 0xfff;
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if (offset >= HOLE_START)
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{
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if (offset <= HOLE_END)
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{
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page = HOLE_PAGE;
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}
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else
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{
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page &= 0xfff;
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}
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}
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page = m_segmap[m_context & 7][offset >> 14] << 4;
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page += ((offset >> 10) & 0xf);
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printf("sun2: Write %04x to page map at %x (entry %d), ", data, offset<<1, page);
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//printf("sun2: Write %04x to page map at %x (entry %d), ", data, offset<<1, page);
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if (offset & 1) // low-order 16 bits
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{
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m_pagemap[page] &= 0xffff0000;
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@ -410,11 +383,11 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
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m_pagemap[page] &= 0x0000ffff;
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m_pagemap[page] |= (data<<16);
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}
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printf("entry now %08x (adr %08x PC=%x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 11, m_maincpu->pc);
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//printf("entry now %08x (adr %08x PC=%x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 11, m_maincpu->pc);
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return;
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case 2: // segment map
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printf("sun2: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x)\n", data & 0xff, offset<<1, offset>>14, m_context & 7, m_maincpu->pc);
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//printf("sun2: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x)\n", data & 0xff, offset<<1, offset>>14, m_context & 7, m_maincpu->pc);
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m_segmap[m_context & 7][offset >> 14] = data & 0xff;
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return;
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@ -441,21 +414,21 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
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switch ((m_pagemap[entry] >> 22) & 7)
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{
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case 0: // main RAM space
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if (tmp < m_ram_size_words) COMBINE_DATA(&m_ram_ptr[tmp]);
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case 0: // type 0
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m_type0space->write16(space, tmp, data, mem_mask);
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return;
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case 1: // device space
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case 1: // type 1
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//printf("write device space @ %x\n", tmp<<1);
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m_type1space->write16(space, tmp, data, mem_mask);
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return;
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case 2: // VME space
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printf("Write VME space\n");
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case 2: // type 2
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m_type2space->write16(space, tmp, data, mem_mask);
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break;
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case 3: // more VME
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printf("Write 2nd VME space\n");
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case 3: // type 3
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m_type3space->write16(space, tmp, data, mem_mask);
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break;
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}
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}
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@ -468,25 +441,72 @@ WRITE16_MEMBER( sun2_state::tl_mmu_w )
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}
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// BW2 video control
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READ16_MEMBER( sun2_state::video_ctrl_r )
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{
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return m_bw2_ctrl;
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}
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WRITE16_MEMBER( sun2_state::video_ctrl_w )
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{
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printf("sun2: BW2: %x to video_ctrl\n", data);
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//printf("sun2: BW2: %x to video_ctrl\n", data);
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COMBINE_DATA(&m_bw2_ctrl);
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}
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static ADDRESS_MAP_START(sun2_mem, AS_PROGRAM, 16, sun2_state)
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AM_RANGE(0x000000, 0xffffff) AM_READWRITE( tl_mmu_r, tl_mmu_w )
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ADDRESS_MAP_END
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// VME memory spaces
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// type 0 device space
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static ADDRESS_MAP_START(vmetype0space_map, AS_PROGRAM, 16, sun2_state)
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AM_RANGE(0x000000, 0x7fffff) AM_READWRITE(ram_r, ram_w)
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ADDRESS_MAP_END
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// type 1 device space
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static ADDRESS_MAP_START(type1space_map, AS_PROGRAM, 16, sun2_state)
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static ADDRESS_MAP_START(vmetype1space_map, AS_PROGRAM, 16, sun2_state)
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AM_RANGE(0x000000, 0x01ffff) AM_RAM AM_SHARE("bw2_vram")
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AM_RANGE(0x020000, 0x020001) AM_READWRITE( video_ctrl_r, video_ctrl_w )
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AM_RANGE(0x7f0000, 0x7f07ff) AM_ROM AM_REGION("bootprom", 0) // uses MMU loophole to read 32k from a 2k window
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// 7f0800-7f0fff: Ethernet interface
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// 7f1000-7f17ff: AM9518 encryption processor
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// 7f1800-7f1fff: Keyboard/mouse SCC8530
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// 7f2000-7f27ff: RS232 ports SCC8530
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// 7f2800-7f2fff: AM9513 timer
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AM_RANGE(0xc20000, 0xc20001) AM_WRITE( video_ctrl_w )
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ADDRESS_MAP_END
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// type 2 device space
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static ADDRESS_MAP_START(vmetype2space_map, AS_PROGRAM, 16, sun2_state)
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ADDRESS_MAP_END
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// type 3 device space
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static ADDRESS_MAP_START(vmetype3space_map, AS_PROGRAM, 16, sun2_state)
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ADDRESS_MAP_END
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// Multibus memory spaces
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// type 0 device space
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static ADDRESS_MAP_START(mbustype0space_map, AS_PROGRAM, 16, sun2_state)
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AM_RANGE(0x000000, 0x3fffff) AM_READWRITE(ram_r, ram_w)
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// 7f80000-7f807ff: Keyboard/mouse SCC8530
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AM_RANGE(0x7f00000, 0x7f1ffff) AM_RAM AM_SHARE("bw2_vram")
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AM_RANGE(0x7f81800, 0x7f81801) AM_READWRITE( video_ctrl_r, video_ctrl_w )
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ADDRESS_MAP_END
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// type 1 device space
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static ADDRESS_MAP_START(mbustype1space_map, AS_PROGRAM, 16, sun2_state)
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AM_RANGE(0x000000, 0x0007ff) AM_ROM AM_REGION("bootprom", 0) // uses MMU loophole to read 32k from a 2k window
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// 001000-0017ff: AM9518 encryption processor
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// 001800-001fff: Keyboard/mouse parallel port
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// 002000-0027ff: RS232 ports SCC8530
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// 002800-002fff: AM9513 timer
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// 003800-003fff: MM58167 RTC
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ADDRESS_MAP_END
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// type 2 device space (Multibus memory space)
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static ADDRESS_MAP_START(mbustype2space_map, AS_PROGRAM, 16, sun2_state)
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ADDRESS_MAP_END
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// type 3 device space (Multibus I/O space)
|
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static ADDRESS_MAP_START(mbustype3space_map, AS_PROGRAM, 16, sun2_state)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
UINT32 sun2_state::bw2_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
@ -497,12 +517,14 @@ UINT32 sun2_state::bw2_update(screen_device &screen, bitmap_rgb32 &bitmap, const
|
||||
static const UINT32 palette[2] = { 0, 0xffffff };
|
||||
UINT8 *m_vram = (UINT8 *)m_bw2_vram.target();
|
||||
|
||||
if (!(m_bw2_ctrl & 0x8000)) return 0;
|
||||
|
||||
for (y = 0; y < 900; y++)
|
||||
{
|
||||
scanline = &bitmap.pix32(y);
|
||||
for (x = 0; x < 1152/8; x++)
|
||||
{
|
||||
pixels = m_vram[(y * (1152/8)) + (BYTE4_XOR_BE(x))];
|
||||
pixels = m_vram[(y * (1152/8)) + x ^ 1];
|
||||
|
||||
*scanline++ = palette[(pixels>>7)&1];
|
||||
*scanline++ = palette[(pixels>>6)&1];
|
||||
@ -525,6 +547,7 @@ INPUT_PORTS_END
|
||||
void sun2_state::machine_start()
|
||||
{
|
||||
m_rom_ptr = (UINT16 *)m_rom->base();
|
||||
m_idprom_ptr = (UINT8 *)m_idprom->base();
|
||||
m_ram_ptr = (UINT16 *)m_ram->pointer();
|
||||
m_ram_size = m_ram->size();
|
||||
m_ram_size_words = m_ram_size >> 1;
|
||||
@ -542,18 +565,85 @@ void sun2_state::machine_reset()
|
||||
m_maincpu->reset();
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( sun2, sun2_state )
|
||||
static MACHINE_CONFIG_START( sun2vme, sun2_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68010, 16670000)
|
||||
MCFG_CPU_PROGRAM_MAP(sun2_mem)
|
||||
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("2M")
|
||||
MCFG_RAM_EXTRA_OPTIONS("4M,6M,8M")
|
||||
MCFG_RAM_DEFAULT_VALUE(0x00)
|
||||
|
||||
// MMU Type 0 device space
|
||||
MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vmetype0space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
// MMU Type 1 device space
|
||||
MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(type1space_map)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vmetype1space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
// MMU Type 2 device space
|
||||
MCFG_DEVICE_ADD("type2", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vmetype2space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
// MMU Type 3 device space
|
||||
MCFG_DEVICE_ADD("type3", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(vmetype3space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
MCFG_SCREEN_ADD("bwtwo", RASTER)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(sun2_state, bw2_update)
|
||||
MCFG_SCREEN_SIZE(1152,900)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 1152-1, 0, 900-1)
|
||||
MCFG_SCREEN_REFRESH_RATE(72)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( sun2mbus, sun2_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68010, 16670000)
|
||||
MCFG_CPU_PROGRAM_MAP(sun2_mem)
|
||||
|
||||
MCFG_RAM_ADD(RAM_TAG)
|
||||
MCFG_RAM_DEFAULT_SIZE("2M")
|
||||
MCFG_RAM_EXTRA_OPTIONS("4M")
|
||||
MCFG_RAM_DEFAULT_VALUE(0x00)
|
||||
|
||||
// MMU Type 0 device space
|
||||
MCFG_DEVICE_ADD("type0", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mbustype0space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
// MMU Type 1 device space
|
||||
MCFG_DEVICE_ADD("type1", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mbustype1space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
// MMU Type 2 device space
|
||||
MCFG_DEVICE_ADD("type2", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mbustype2space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
|
||||
// MMU Type 3 device space
|
||||
MCFG_DEVICE_ADD("type3", ADDRESS_MAP_BANK, 0)
|
||||
MCFG_DEVICE_PROGRAM_MAP(mbustype3space_map)
|
||||
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
|
||||
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
|
||||
MCFG_ADDRESS_MAP_BANK_STRIDE(0x1000000)
|
||||
@ -569,16 +659,22 @@ MACHINE_CONFIG_END
|
||||
ROM_START( sun2_120 )
|
||||
ROM_REGION( 0x8000, "bootprom", ROMREGION_ERASEFF )
|
||||
ROM_LOAD16_WORD_SWAP( "sun2-multi-rev-r.bin", 0x0000, 0x8000, CRC(4df0df77) SHA1(4d6bcf09ddc9cc8f5823847b8ea88f98fe4a642e))
|
||||
|
||||
ROM_REGION( 0x20, "idprom", ROMREGION_ERASEFF)
|
||||
ROM_LOAD( "sun2120-idprom.bin", 0x000000, 0x000020, CRC(eec8cd1d) SHA1(6a78dc0ea6f9cc7687cffea754d65864fb751ebf) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( sun2_50)
|
||||
ROM_START( sun2_50 )
|
||||
ROM_REGION( 0x8000, "bootprom", ROMREGION_ERASEFF )
|
||||
ROM_LOAD16_BYTE( "250_q_8.rom", 0x0001, 0x4000, CRC(5bfacb5c) SHA1(ec7fb3fb0217b0138ba4748b7c79b8ff0cad896b))
|
||||
ROM_LOAD16_BYTE( "250_q_0.rom", 0x0000, 0x4000, CRC(2ee29abe) SHA1(82f52b9f25e92387329581f7c8ba50a171784968))
|
||||
|
||||
ROM_REGION( 0x20, "idprom", ROMREGION_ERASEFF)
|
||||
ROM_LOAD( "sun250-idprom.bin", 0x000000, 0x000020, CRC(927744ab) SHA1(d29302b69128165e69dd3a79b8c8d45f2163b88a) )
|
||||
ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1984, sun2_50, 0, 0, sun2, sun2, driver_device, 0, "Sun Microsystems", "Sun 2/50", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
COMP( 1984, sun2_120, 0, 0, sun2, sun2, driver_device, 0, "Sun Microsystems", "Sun 2/120", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1984, sun2_50, 0, 0, sun2vme, sun2, driver_device, 0, "Sun Microsystems", "Sun 2/50", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
COMP( 1984, sun2_120, 0, 0, sun2mbus, sun2, driver_device, 0, "Sun Microsystems", "Sun 2/120", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user