cpu/nec: Rename address expansion flag after internal name (nw)

This commit is contained in:
AJR 2018-08-12 02:41:55 -04:00
parent a459faa90f
commit cb72e3ccfc
4 changed files with 13 additions and 12 deletions

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@ -169,22 +169,23 @@ v33a_device::v33a_device(const machine_config &mconfig, const char *tag, device_
}
uint16_t nec_common_device::aex_r()
uint16_t nec_common_device::xam_r()
{
return m_aex ? 1 : 0;
// Only bit 0 is defined
return m_xa ? 1 : 0;
}
void nec_common_device::v33_internal_port_map(address_map &map)
{
map(0xff00, 0xff7f).ram().share("v33_transtable");
map(0xff80, 0xff81).r(FUNC(nec_common_device::aex_r)).unmapw();
map(0xff80, 0xff81).r(FUNC(nec_common_device::xam_r)).unmapw();
map(0xff82, 0xffff).unmaprw();
}
offs_t nec_common_device::v33_translate(offs_t addr)
{
if (m_aex)
if (m_xa)
return uint32_t(m_v33_transtable[(addr >> 14) & 63]) << 14 | (addr & 0x03fff);
else
return addr & 0xfffff;
@ -295,7 +296,7 @@ void nec_common_device::device_reset()
m_halted = 0;
if (m_chip_type == V33_TYPE)
m_aex = false;
m_xa = false;
Sreg(PS) = 0xffff;
Sreg(SS) = 0;
@ -464,7 +465,7 @@ void nec_common_device::device_start()
}
else if (m_chip_type == V33_TYPE)
{
save_item(NAME(m_aex));
save_item(NAME(m_xa));
auto cache = m_program->cache<1, 0, ENDIANNESS_LITTLE>();
m_dr8 = [cache, this](offs_t address) -> u8 { return cache->read_byte(v33_translate(address)); };
}
@ -493,7 +494,7 @@ void nec_common_device::device_start()
state_add( NEC_DS, "DS0", Sreg(DS0)).formatstr("%04X");
if (m_chip_type == V33_TYPE)
state_add(NEC_AEX, "AEX", m_aex);
state_add(NEC_XA, "XA", m_xa);
state_add( STATE_GENPC, "GENPC", m_debugger_temp).callexport().noshow();
state_add( STATE_GENPCBASE, "CURPC", m_debugger_temp).callexport().noshow();

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@ -14,7 +14,7 @@ enum
NEC_PC=0,
NEC_IP, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY,
NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS,
NEC_AEX,
NEC_XA,
NEC_PENDING
};
@ -100,7 +100,7 @@ private:
uint32_t m_prefix_base; /* base address of the latest prefix segment */
uint8_t m_seg_prefix; /* prefix segment indicator */
bool m_aex;
bool m_xa;
optional_shared_ptr<uint16_t> m_v33_transtable;
uint32_t m_EA;
@ -116,7 +116,7 @@ private:
protected:
void v33_internal_port_map(address_map &map);
uint16_t aex_r();
uint16_t xam_r();
offs_t v33_translate(offs_t addr);
private:

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@ -84,7 +84,7 @@ enum BREGS {
#define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); }
#define POP(var) { Wreg(SP) += 2; var = read_mem_word(((Sreg(SS)<<4) + ((Wreg(SP)-2) & 0xffff))); }
#define BRKXA(aex) { if (m_chip_type == V33_TYPE) { nec_brk(fetch()); m_aex = aex; } else logerror("%06x: %sXA instruction is V33 exclusive\n", PC(), aex ? "BRK" : "RET"); }
#define BRKXA(xa) { if (m_chip_type == V33_TYPE) { nec_brk(fetch()); m_xa = xa; } else logerror("%06x: %sXA instruction is V33 exclusive\n", PC(), xa ? "BRK" : "RET"); }
#define GetModRM uint32_t ModRM=fetch()

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@ -141,7 +141,7 @@ enum BREGS {
#define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); }
#define POP(var) { Wreg(SP) += 2; var = read_mem_word(((Sreg(SS)<<4) + ((Wreg(SP)-2) & 0xffff))); }
#define BRKXA(aex) { logerror("%06x: %sXA instruction is V33 exclusive\n", PC(), aex ? "BRK" : "RET"); }
#define BRKXA(xa) { logerror("%06x: %sXA instruction is V33 exclusive\n", PC(), xa ? "BRK" : "RET"); }
#define GetModRM uint32_t ModRM=fetch()