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interpro: headless configuration working (#3849)

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* interpro: headless boot working

These fixes enable booting and CLIX installation on headless InterServe systems (InterPro systems without graphics) using a VT100 or VT220 compatible terminal on serial port 2 (0 for ip6000). It's now possible to install and boot CLIX on the ip6000 system, as this works around the issues with the incomplete graphics hardware support in the driver.
* interpro: tidy serial configuration, add missing control lines
* ioga: fix serial dma
* z80scc: update /WREQ when transmitter is enabled/disabled, use 0 for assert state of active low output
* softlist: added 60x0 CLIX root floppies

* z80scc: tidy (nw)
This commit is contained in:
Patrick Mackinlay 2018-08-13 21:12:21 +07:00 committed by Vas Crabb
parent f4970648c7
commit cbbfc0eb83
6 changed files with 132 additions and 89 deletions
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23
hash/interpro.xml
View File

@ -172,6 +172,29 @@
</dataarea> </dataarea>
</part> </part>
<!-- rebuild root floppies for 6000 and 6040 systems -->
<part name="60x0_root2" interface="floppy_3_5">
<feature name="part_id" value="Rebuild Floppy #2/4" />
<feature name="compatibility" value="6000,6040"/>
<dataarea name="flop" size="1474560">
<rom name="60x0_root2.img" size="1474560" offset="0" crc="7ca8534b" sha1="bffb0eda4a8cdbe2e910b94ec64629cd9dc95095" />
</dataarea>
</part>
<part name="60x0_root3" interface="floppy_3_5">
<feature name="part_id" value="Rebuild Floppy #3/4" />
<feature name="compatibility" value="6000,6040"/>
<dataarea name="flop" size="1474560">
<rom name="60x0_root3.img" size="1474560" offset="0" crc="2723ee4d" sha1="80dd7c43e40fd3437cf897b4c15c0b9c644a0644" />
</dataarea>
</part>
<part name="60x0_root4" interface="floppy_3_5">
<feature name="part_id" value="Rebuild Floppy #4/4" />
<feature name="compatibility" value="6000,6040"/>
<dataarea name="flop" size="1474560">
<rom name="60x0_root4.img" size="1474560" offset="0" crc="27764477" sha1="be89a8ba99aebe99b0bddc914b62c0ac106b56cc" />
</dataarea>
</part>
<!-- TODO: root floppy images for all other systems --> <!-- TODO: root floppy images for all other systems -->
</software> </software>

16
src/devices/machine/z80scc.cpp
View File

@ -2125,6 +2125,8 @@ void z80scc_channel::do_sccreg_wr5(uint8_t data)
update_serial(); update_serial();
safe_transmit_register_reset(); safe_transmit_register_reset();
update_rts(); // Will also update DTR accordingly update_rts(); // Will also update DTR accordingly
check_waitrequest();
} }
} }
@ -2832,11 +2834,11 @@ WRITE_LINE_MEMBER( z80scc_channel::sync_w )
LOGSYNC("\"%s\": %c : SYNC %u\n", owner()->tag(), 'A' + m_index, state); LOGSYNC("\"%s\": %c : SYNC %u\n", owner()->tag(), 'A' + m_index, state);
/* /*
* The /SYNC pin is a general purpose input whose state is reported in the * The /SYNC pin is a general purpose input whose state is reported in the
* Sync/Hunt bit in RR0. If the crystal oscillator is enabled, this pin is * Sync/Hunt bit in RR0. If the crystal oscillator is enabled, this pin is
* not available and the Sync/Hunt bit is forced to 0. Otherwise, the /SYNC * not available and the Sync/Hunt bit is forced to 0. Otherwise, the /SYNC
* pin may be used to carry the Ring Indicator signal. * pin may be used to carry the Ring Indicator signal.
*/ */
if (!(m_wr11 & WR11_RCVCLK_TYPE)) if (!(m_wr11 & WR11_RCVCLK_TYPE))
{ {
// check for state change // check for state change
@ -3109,7 +3111,7 @@ void z80scc_channel::check_waitrequest()
// if dma request function is enabled // if dma request function is enabled
if (m_wr1 & WR1_WREQ_FUNCTION) if (m_wr1 & WR1_WREQ_FUNCTION)
{ {
// assert /W//REQ if transmit buffer is empty, clear if it's not // assert /W//REQ if transmit buffer is empty and transmitter is enabled
m_uart->m_out_wreq_cb[m_index]((m_rr0 & RR0_TX_BUFFER_EMPTY) ? ASSERT_LINE : CLEAR_LINE); m_uart->m_out_wreq_cb[m_index](((m_rr0 & RR0_TX_BUFFER_EMPTY) && (m_wr5 & WR5_TX_ENABLE)) ? 0 : 1);
} }
} }

140
src/mame/drivers/interpro.cpp
View File

@ -708,40 +708,48 @@ static void interpro_floppies(device_slot_interface &device)
device.option_add("35hd", FLOPPY_35_HD); device.option_add("35hd", FLOPPY_35_HD);
} }
MACHINE_CONFIG_START(interpro_state::interpro_scc1) void interpro_state::interpro_serial(machine_config &config)
MCFG_DEVICE_MODIFY(INTERPRO_SCC1_TAG) {
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(INTERPRO_SERIAL_PORT1_TAG, rs232_port_device, write_txd)) // scc1 channel A (serial port 1)
MCFG_Z80SCC_OUT_TXDB_CB(WRITELINE(INTERPRO_SERIAL_PORT2_TAG, rs232_port_device, write_txd)) rs232_port_device &port1(RS232_PORT(config, INTERPRO_SERIAL_PORT1_TAG, default_rs232_devices, nullptr));
MCFG_Z80SCC_OUT_INT_CB(WRITELINE(m_ioga, interpro_ioga_device, ir11_w)) port1.cts_handler().set(m_scc1, FUNC(z80scc_device::ctsa_w));
MCFG_Z80SCC_OUT_WREQA_CB(WRITELINE(m_ioga, interpro_ioga_device, drq_serial1)) port1.dcd_handler().set(m_scc1, FUNC(z80scc_device::dcda_w));
MCFG_Z80SCC_OUT_WREQB_CB(WRITELINE(m_ioga, interpro_ioga_device, drq_serial2)) port1.rxd_handler().set(m_scc1, FUNC(z80scc_device::rxa_w));
m_scc1->out_dtra_callback().set(port1, FUNC(rs232_port_device::write_dtr));
m_scc1->out_rtsa_callback().set(port1, FUNC(rs232_port_device::write_rts));
m_scc1->out_txda_callback().set(port1, FUNC(rs232_port_device::write_txd));
m_scc1->out_wreqa_callback().set(m_ioga, FUNC(interpro_ioga_device::drq_serial1)).invert();
MCFG_DEVICE_ADD(INTERPRO_SERIAL_PORT1_TAG, RS232_PORT, default_rs232_devices, nullptr) // scc1 channel B (serial port 2)
MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc1, z80scc_device, rxa_w)) rs232_port_device &port2(RS232_PORT(config, INTERPRO_SERIAL_PORT2_TAG, default_rs232_devices, nullptr));
MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc1, z80scc_device, dcda_w)) port2.cts_handler().set(m_scc1, FUNC(z80scc_device::ctsb_w));
MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc1, z80scc_device, ctsa_w)) port2.dcd_handler().set(m_scc1, FUNC(z80scc_device::dcdb_w));
port2.rxd_handler().set(m_scc1, FUNC(z80scc_device::rxb_w));
m_scc1->out_dtrb_callback().set(port2, FUNC(rs232_port_device::write_dtr));
m_scc1->out_rtsb_callback().set(port2, FUNC(rs232_port_device::write_rts));
m_scc1->out_txdb_callback().set(port2, FUNC(rs232_port_device::write_txd));
m_scc1->out_wreqb_callback().set(m_ioga, FUNC(interpro_ioga_device::drq_serial2)).invert();
MCFG_DEVICE_ADD(INTERPRO_SERIAL_PORT2_TAG, RS232_PORT, default_rs232_devices, nullptr) m_scc1->out_int_callback().set(m_ioga, FUNC(interpro_ioga_device::ir11_w));
MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc1, z80scc_device, rxb_w))
MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc1, z80scc_device, dcdb_w))
MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc1, z80scc_device, ctsb_w))
MACHINE_CONFIG_END
MACHINE_CONFIG_START(interpro_state::interpro_scc2) // scc2 channel A (keyboard)
MCFG_DEVICE_MODIFY(INTERPRO_SCC2_TAG) INTERPRO_KEYBOARD_PORT(config, m_keyboard, interpro_keyboard_devices, nullptr);
MCFG_Z80SCC_OUT_TXDA_CB(WRITELINE(m_keyboard, interpro_keyboard_port_device, write_txd))
MCFG_Z80SCC_OUT_TXDB_CB(WRITELINE(INTERPRO_SERIAL_PORT0_TAG, rs232_port_device, write_txd))
MCFG_Z80SCC_OUT_INT_CB(WRITELINE(m_ioga, interpro_ioga_device, ir11_w))
MCFG_Z80SCC_OUT_WREQB_CB(WRITELINE(m_ioga, interpro_ioga_device, drq_serial0))
INTERPRO_KEYBOARD_PORT(config, m_keyboard, interpro_keyboard_devices, "lle_en_us");
m_keyboard->rxd_handler_cb().set(m_scc2, FUNC(z80scc_device::rxa_w)); m_keyboard->rxd_handler_cb().set(m_scc2, FUNC(z80scc_device::rxa_w));
m_scc2->out_txda_callback().set(m_keyboard, FUNC(interpro_keyboard_port_device::write_txd));
MCFG_DEVICE_ADD(INTERPRO_SERIAL_PORT0_TAG, RS232_PORT, default_rs232_devices, nullptr) // scc2 channel B (serial port 0)
MCFG_RS232_RXD_HANDLER(WRITELINE(m_scc2, z80scc_device, rxb_w)) rs232_port_device &port0(RS232_PORT(config, INTERPRO_SERIAL_PORT0_TAG, default_rs232_devices, nullptr));
MCFG_RS232_DCD_HANDLER(WRITELINE(m_scc2, z80scc_device, dcdb_w)) port0.cts_handler().set(m_scc2, FUNC(z80scc_device::ctsb_w));
MCFG_RS232_CTS_HANDLER(WRITELINE(m_scc2, z80scc_device, ctsb_w)) port0.dcd_handler().set(m_scc2, FUNC(z80scc_device::dcdb_w));
MACHINE_CONFIG_END port0.ri_handler().set(m_scc2, FUNC(z80scc_device::syncb_w));
port0.rxd_handler().set(m_scc2, FUNC(z80scc_device::rxb_w));
m_scc2->out_dtrb_callback().set(port0, FUNC(rs232_port_device::write_dtr));
m_scc2->out_rtsb_callback().set(port0, FUNC(rs232_port_device::write_rts));
m_scc2->out_txdb_callback().set(port0, FUNC(rs232_port_device::write_txd));
m_scc2->out_wreqb_callback().set(m_ioga, FUNC(interpro_ioga_device::drq_serial0)).invert();
m_scc2->out_int_callback().set(m_ioga, FUNC(interpro_ioga_device::ir11_w));
}
static void interpro_scsi_devices(device_slot_interface &device) static void interpro_scsi_devices(device_slot_interface &device)
{ {
@ -885,9 +893,8 @@ MACHINE_CONFIG_START(emerald_state::emerald)
// serial controllers and ports // serial controllers and ports
SCC85C30(config, m_scc1, 4.9152_MHz_XTAL); SCC85C30(config, m_scc1, 4.9152_MHz_XTAL);
interpro_scc1(config);
SCC85C30(config, m_scc2, 4.9152_MHz_XTAL); SCC85C30(config, m_scc2, 4.9152_MHz_XTAL);
interpro_scc2(config); interpro_serial(config);
// scsi controller // scsi controller
MCFG_NSCSI_ADD(INTERPRO_SCSI_TAG ":7", emerald_scsi_devices, INTERPRO_SCSI_ADAPTER_TAG, true) MCFG_NSCSI_ADD(INTERPRO_SCSI_TAG ":7", emerald_scsi_devices, INTERPRO_SCSI_ADAPTER_TAG, true)
@ -937,9 +944,8 @@ MACHINE_CONFIG_START(turquoise_state::turquoise)
// serial controllers and ports // serial controllers and ports
SCC85C30(config, m_scc1, 4.9152_MHz_XTAL); SCC85C30(config, m_scc1, 4.9152_MHz_XTAL);
interpro_scc1(config);
SCC85C30(config, m_scc2, 4.9152_MHz_XTAL); SCC85C30(config, m_scc2, 4.9152_MHz_XTAL);
interpro_scc2(config); interpro_serial(config);
// scsi controller // scsi controller
MCFG_NSCSI_ADD(INTERPRO_SCSI_TAG ":7", turquoise_scsi_devices, INTERPRO_SCSI_ADAPTER_TAG, true) MCFG_NSCSI_ADD(INTERPRO_SCSI_TAG ":7", turquoise_scsi_devices, INTERPRO_SCSI_ADAPTER_TAG, true)
@ -985,9 +991,8 @@ MACHINE_CONFIG_START(sapphire_state::sapphire)
// serial controllers and ports // serial controllers and ports
SCC85230(config, m_scc1, 4.9152_MHz_XTAL); SCC85230(config, m_scc1, 4.9152_MHz_XTAL);
interpro_scc1(config);
SCC85C30(config, m_scc2, 4.9152_MHz_XTAL); SCC85C30(config, m_scc2, 4.9152_MHz_XTAL);
interpro_scc2(config); interpro_serial(config);
// scsi controller // scsi controller
MCFG_NSCSI_ADD(INTERPRO_SCSI_TAG ":7", sapphire_scsi_devices, INTERPRO_SCSI_ADAPTER_TAG, true) MCFG_NSCSI_ADD(INTERPRO_SCSI_TAG ":7", sapphire_scsi_devices, INTERPRO_SCSI_ADAPTER_TAG, true)
@ -1012,6 +1017,8 @@ MACHINE_CONFIG_START(turquoise_state::ip2000)
turquoise(config); turquoise(config);
//m_maincpu->set_clock(40_MHz_XTAL); //m_maincpu->set_clock(40_MHz_XTAL);
m_keyboard->set_default_option("lle_en_us");
// bus and slots (default to 2020 with GT graphics) // bus and slots (default to 2020 with GT graphics)
cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1032,6 +1039,8 @@ MACHINE_CONFIG_START(sapphire_state::ip2400)
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR0); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR0);
m_keyboard->set_default_option("lle_en_us");
// bus and slots (default to 2430 with GT+ graphics) // bus and slots (default to 2430 with GT+ graphics)
cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1053,6 +1062,8 @@ MACHINE_CONFIG_START(sapphire_state::ip2500)
// FIXME: don't know which cammu revision // FIXME: don't know which cammu revision
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR0); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR0);
m_keyboard->set_default_option("lle_en_us");
// bus and slots (default to 2530 with GT+ graphics) // bus and slots (default to 2530 with GT+ graphics)
cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1074,6 +1085,8 @@ MACHINE_CONFIG_START(sapphire_state::ip2700)
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2);
m_keyboard->set_default_option("lle_en_us");
// bus and slots (default to 2730 with GT+ graphics) // bus and slots (default to 2730 with GT+ graphics)
cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1096,6 +1109,8 @@ MACHINE_CONFIG_START(sapphire_state::ip2800)
// FIXME: don't know which cammu revision // FIXME: don't know which cammu revision
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2);
m_keyboard->set_default_option("lle_en_us");
// bus and slots (default to 2830 with GT+ graphics) // bus and slots (default to 2830 with GT+ graphics)
cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); cbus_bus_device &bus(CBUS_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1115,9 +1130,6 @@ MACHINE_CONFIG_START(emerald_state::ip6000)
emerald(config); emerald(config);
//m_maincpu->set_clock(80_MHz_XTAL / 2); //m_maincpu->set_clock(80_MHz_XTAL / 2);
// EDGE systems use graphics keyboard
m_keyboard->set_default_option(nullptr);
// bus and slots (default to 6040 with EDGE-1 graphics) // bus and slots (default to 6040 with EDGE-1 graphics)
srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1140,6 +1152,8 @@ MACHINE_CONFIG_START(sapphire_state::ip6400)
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR0); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR0);
m_keyboard->set_default_option("lle_en_us");
// bus and slots (default to 6450 with GT II graphics) // bus and slots (default to 6450 with GT II graphics)
srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1170,9 +1184,6 @@ MACHINE_CONFIG_START(sapphire_state::ip6700)
// FIXME: don't know which cammu revision // FIXME: don't know which cammu revision
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2);
// EDGE systems use graphics keyboard
m_keyboard->set_default_option(nullptr);
// bus and slots (default to 6780 with EDGE-2 Plus graphics) // bus and slots (default to 6780 with EDGE-2 Plus graphics)
srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1196,9 +1207,6 @@ MACHINE_CONFIG_START(sapphire_state::ip6800)
// FIXME: don't know which cammu revision // FIXME: don't know which cammu revision
m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2); m_mmu->set_cammu_id(cammu_c4i_device::CID_C4IR2);
// EDGE systems use graphics keyboard
m_keyboard->set_default_option(nullptr);
// bus and slots (default to 6880 with EDGE-2 Plus graphics) // bus and slots (default to 6880 with EDGE-2 Plus graphics)
srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu)); srx_bus_device &bus(SRX_BUS(config, INTERPRO_SLOT_TAG, 0, m_maincpu));
@ -1223,17 +1231,18 @@ ROM_START(ip2000)
ROM_LOAD32_BYTE("mpcb962a.bin", 0x0, 0x20, CRC(e391342c) SHA1(02e03aad760b6651b8599c3a41c7c457983ee97d)) ROM_LOAD32_BYTE("mpcb962a.bin", 0x0, 0x20, CRC(e391342c) SHA1(02e03aad760b6651b8599c3a41c7c457983ee97d))
ROM_REGION(0x40000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x40000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip2000", "InterPro 2000 EPROM") ROM_SYSTEM_BIOS(0, "ip2000", "InterPro/InterServe 20x0 EPROM")
ROMX_LOAD("mprgm530e__26_apr_91k.u171", 0x00001, 0x20000, CRC(e4c470cb) SHA1(ff1917bfa963988d739a9dbf0b8f034fe49f2f8c), ROM_SKIP(1) | ROM_BIOS(0)) ROMX_LOAD("mprgm530e__26_apr_91k.u171", 0x00001, 0x20000, CRC(e4c470cb) SHA1(ff1917bfa963988d739a9dbf0b8f034fe49f2f8c), ROM_SKIP(1) | ROM_BIOS(0))
ROMX_LOAD("mprgm540e__06_may_91k.u172", 0x00000, 0x20000, CRC(03225843) SHA1(03cfcd5b8ae0057240ef808a40108cb5d082eb63), ROM_SKIP(1) | ROM_BIOS(0)) ROMX_LOAD("mprgm540e__06_may_91k.u172", 0x00000, 0x20000, CRC(03225843) SHA1(03cfcd5b8ae0057240ef808a40108cb5d082eb63), ROM_SKIP(1) | ROM_BIOS(0))
ROM_END ROM_END
ROM_START(ip2400) ROM_START(ip2400)
// feature[0] & 0x02: C4I cammu if set
ROM_REGION(0x80, INTERPRO_IDPROM_TAG, 0) ROM_REGION(0x80, INTERPRO_IDPROM_TAG, 0)
ROM_LOAD32_BYTE("msmt0470.bin", 0x0, 0x20, CRC(498c80df) SHA1(18a49732ac9d04b20a77747c1b946c2e88abb087)) ROM_LOAD32_BYTE("msmt0470.bin", 0x0, 0x20, CRC(498c80df) SHA1(18a49732ac9d04b20a77747c1b946c2e88abb087))
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip2400", "InterPro 2400 EPROM") ROM_SYSTEM_BIOS(0, "ip2400", "InterPro/InterServe 24x0 EPROM")
ROMX_LOAD("mprgw510b__05_16_92.u35", 0x00000, 0x20000, CRC(3b2c4545) SHA1(4e4c98d1cd1035a04be8527223f44d0b687ec3ef), ROM_BIOS(0)) ROMX_LOAD("mprgw510b__05_16_92.u35", 0x00000, 0x20000, CRC(3b2c4545) SHA1(4e4c98d1cd1035a04be8527223f44d0b687ec3ef), ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1248,7 +1257,7 @@ ROM_START(ip2500)
ROM_LOAD32_BYTE("msmt1000.bin", 0x0, 0x20, CRC(548046c0) SHA1(ce7646e868f3aa35642d7f9348f6b9e91693918e)) ROM_LOAD32_BYTE("msmt1000.bin", 0x0, 0x20, CRC(548046c0) SHA1(ce7646e868f3aa35642d7f9348f6b9e91693918e))
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip2500", "InterPro 2500 EPROM") ROM_SYSTEM_BIOS(0, "ip2500", "InterPro/InterServe 25x0 EPROM")
ROMX_LOAD("ip2500_eprom.bin", 0x00000, 0x20000, NO_DUMP, ROM_BIOS(0)) ROMX_LOAD("ip2500_eprom.bin", 0x00000, 0x20000, NO_DUMP, ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1259,11 +1268,12 @@ ROM_START(ip2500)
ROM_END ROM_END
ROM_START(ip2700) ROM_START(ip2700)
// feature[0] & 0x04: supports RETRY if clear
ROM_REGION(0x80, INTERPRO_IDPROM_TAG, 0) ROM_REGION(0x80, INTERPRO_IDPROM_TAG, 0)
ROM_LOAD32_BYTE("msmt1280.bin", 0x0, 0x20, CRC(32d833af) SHA1(7225c5f5670fe49d86556a2cb453ae6fe09e3e19)) ROM_LOAD32_BYTE("msmt1280.bin", 0x0, 0x20, CRC(32d833af) SHA1(7225c5f5670fe49d86556a2cb453ae6fe09e3e19))
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip2700", "InterPro 2700 EPROM") ROM_SYSTEM_BIOS(0, "ip2700", "InterPro/InterServe 27x0 EPROM")
ROMX_LOAD("mprgz530a__9405181.u35", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0)) ROMX_LOAD("mprgz530a__9405181.u35", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1278,7 +1288,7 @@ ROM_START(ip2800)
ROM_LOAD32_BYTE("msmt1450.bin", 0x0, 0x20, CRC(61c7a305) SHA1(efcd045cbdfda8df44eaad761b0ba99367973cd7)) ROM_LOAD32_BYTE("msmt1450.bin", 0x0, 0x20, CRC(61c7a305) SHA1(efcd045cbdfda8df44eaad761b0ba99367973cd7))
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip2800", "InterPro 2800 EPROM") ROM_SYSTEM_BIOS(0, "ip2800", "InterPro/InterServe 28x0 EPROM")
ROMX_LOAD("ip2800_eprom.bin", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0)) ROMX_LOAD("ip2800_eprom.bin", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1292,11 +1302,13 @@ ROM_START(ip6000)
ROM_REGION(0x80, INTERPRO_NODEID_TAG, 0) ROM_REGION(0x80, INTERPRO_NODEID_TAG, 0)
ROM_LOAD32_BYTE("nodeid.bin", 0x0, 0x20, CRC(a38397a6) SHA1(9f45fb932bbe231c95b3d5470dcd1fa1c846486f)) ROM_LOAD32_BYTE("nodeid.bin", 0x0, 0x20, CRC(a38397a6) SHA1(9f45fb932bbe231c95b3d5470dcd1fa1c846486f))
// feature[0] & 0x01: 1/4 bus clock if clear
// feature[0] & 0x02: configurable console port if clear
ROM_REGION(0x80, INTERPRO_IDPROM_TAG, 0) ROM_REGION(0x80, INTERPRO_IDPROM_TAG, 0)
ROM_LOAD32_BYTE("mpcb765b.bin", 0x0, 0x20, CRC(100f4f94) SHA1(64242eadd40ce5b9d12625db8707a07ff9e4d05c)) ROM_LOAD32_BYTE("mpcb765b.bin", 0x0, 0x20, CRC(6da05794) SHA1(fef8a9c17491f3d3ceb35c56a628f47d49166b57))
ROM_REGION(0x40000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x40000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip6000", "InterPro 6000 EPROM") ROM_SYSTEM_BIOS(0, "ip6000", "InterPro/InterServe 60x0 EPROM")
ROMX_LOAD("mprgg360f__04_may_90v.u336", 0x00001, 0x20000, CRC(9e8b798b) SHA1(54412e26a468e038fb44ffa322ed3ddfae423c17), ROM_SKIP(1) | ROM_BIOS(0)) ROMX_LOAD("mprgg360f__04_may_90v.u336", 0x00001, 0x20000, CRC(9e8b798b) SHA1(54412e26a468e038fb44ffa322ed3ddfae423c17), ROM_SKIP(1) | ROM_BIOS(0))
ROMX_LOAD("mprgg350f__04_may_90v.u349", 0x00000, 0x20000, CRC(32ab99fd) SHA1(202a6082bade8a084b8cd25109daff8443f6a5c7), ROM_SKIP(1) | ROM_BIOS(0)) ROMX_LOAD("mprgg350f__04_may_90v.u349", 0x00000, 0x20000, CRC(32ab99fd) SHA1(202a6082bade8a084b8cd25109daff8443f6a5c7), ROM_SKIP(1) | ROM_BIOS(0))
ROM_END ROM_END
@ -1307,7 +1319,7 @@ ROM_START(ip6400)
// FIXME: use 2400 eprom until we have a 6400 dump // FIXME: use 2400 eprom until we have a 6400 dump
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip6400", "InterPro 6400 EPROM") ROM_SYSTEM_BIOS(0, "ip6400", "InterPro/InterServe 64x0 EPROM")
ROMX_LOAD("ip6400_eprom.bin", 0x00000, 0x20000, BAD_DUMP CRC(3b2c4545) SHA1(4e4c98d1cd1035a04be8527223f44d0b687ec3ef), ROM_BIOS(0)) ROMX_LOAD("ip6400_eprom.bin", 0x00000, 0x20000, BAD_DUMP CRC(3b2c4545) SHA1(4e4c98d1cd1035a04be8527223f44d0b687ec3ef), ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1322,7 +1334,7 @@ ROM_START(ip6700)
ROM_LOAD32_BYTE("msmt127b.bin", 0x0, 0x20, CRC(cc112f65) SHA1(8533a31b4733fd91bb87effcd276fc93f2858629)) ROM_LOAD32_BYTE("msmt127b.bin", 0x0, 0x20, CRC(cc112f65) SHA1(8533a31b4733fd91bb87effcd276fc93f2858629))
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip6700", "InterPro 6700 EPROM") ROM_SYSTEM_BIOS(0, "ip6700", "InterPro/InterServe 67x0 EPROM")
ROMX_LOAD("mprgz530a.u144", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0)) ROMX_LOAD("mprgz530a.u144", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1337,7 +1349,7 @@ ROM_START(ip6800)
ROM_LOAD32_BYTE("msmt127b.bin", 0x0, 0x20, CRC(cc112f65) SHA1(8533a31b4733fd91bb87effcd276fc93f2858629)) ROM_LOAD32_BYTE("msmt127b.bin", 0x0, 0x20, CRC(cc112f65) SHA1(8533a31b4733fd91bb87effcd276fc93f2858629))
ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0) ROM_REGION(0x20000, INTERPRO_EPROM_TAG, 0)
ROM_SYSTEM_BIOS(0, "ip6800", "InterPro 6800 EPROM") ROM_SYSTEM_BIOS(0, "ip6800", "InterPro/InterServe 68x0 EPROM")
ROMX_LOAD("mprgz530a__9406270.u144", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0)) ROMX_LOAD("mprgz530a__9406270.u144", 0x00000, 0x20000, CRC(467ce7bd) SHA1(53faee40d5df311f53b24c930e434cbf94a5c4aa), ROM_BIOS(0))
ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0) ROM_REGION(0x20000, INTERPRO_FLASH_TAG "_lsb", 0)
@ -1347,13 +1359,13 @@ ROM_START(ip6800)
ROM_LOAD_OPTIONAL("y226.u130", 0x00000, 0x20000, CRC(54d95730) SHA1(a4e114dee1567d8aa31eed770f7cc366588f395c)) ROM_LOAD_OPTIONAL("y226.u130", 0x00000, 0x20000, CRC(54d95730) SHA1(a4e114dee1567d8aa31eed770f7cc366588f395c))
ROM_END ROM_END
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
COMP( 1990, ip2000, 0, 0, ip2000, interpro, turquoise_state,init_common,"Intergraph", "InterPro 2000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1990, ip2000, 0, 0, ip2000, interpro, turquoise_state,init_common,"Intergraph", "InterPro/InterServe 20x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1992, ip2400, 0, 0, ip2400, interpro, sapphire_state, init_common,"Intergraph", "InterPro 2400", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1992, ip2400, 0, 0, ip2400, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 24x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1993, ip2500, 0, 0, ip2500, interpro, sapphire_state, init_common,"Intergraph", "InterPro 2500", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1993, ip2500, 0, 0, ip2500, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 25x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1993, ip2700, 0, 0, ip2700, interpro, sapphire_state, init_common,"Intergraph", "InterPro 2700", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1993, ip2700, 0, 0, ip2700, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 27x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1994, ip2800, 0, 0, ip2800, interpro, sapphire_state, init_common,"Intergraph", "InterPro 2800", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1994, ip2800, 0, 0, ip2800, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 28x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1990, ip6000, 0, 0, ip6000, interpro, emerald_state, init_common,"Intergraph", "InterPro 6000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1990, ip6000, 0, 0, ip6000, interpro, emerald_state, init_common,"Intergraph", "InterPro/InterServe 60x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1992, ip6400, 0, 0, ip6400, interpro, sapphire_state, init_common,"Intergraph", "InterPro 6400", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1992, ip6400, 0, 0, ip6400, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 64x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1993, ip6700, 0, 0, ip6700, interpro, sapphire_state, init_common,"Intergraph", "InterPro 6700", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1993, ip6700, 0, 0, ip6700, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 67x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)
COMP( 1993, ip6800, 0, 0, ip6800, interpro, sapphire_state, init_common,"Intergraph", "InterPro 6800", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW) COMP( 1993, ip6800, 0, 0, ip6800, interpro, sapphire_state, init_common,"Intergraph", "InterPro/InterServe 68x0", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW)

3
src/mame/includes/interpro.h
View File

@ -140,8 +140,7 @@ public:
DECLARE_FLOPPY_FORMATS(floppy_formats); DECLARE_FLOPPY_FORMATS(floppy_formats);
void ioga(machine_config &config); void ioga(machine_config &config);
void interpro_scc1(machine_config &config); void interpro_serial(machine_config &config);
void interpro_scc2(machine_config &config);
void interpro(machine_config &config); void interpro(machine_config &config);
static void interpro_scsi_adapter(device_t *device); static void interpro_scsi_adapter(device_t *device);
static void interpro_cdrom(device_t *device); static void interpro_cdrom(device_t *device);

25
src/mame/machine/interpro_ioga.cpp
View File

@ -374,7 +374,7 @@ TIMER_CALLBACK_MEMBER(interpro_ioga_device::interrupt_check)
if (m_softint & (1 << i)) if (m_softint & (1 << i))
{ {
// check priority // check priority
if (m_active_interrupt_type == INT_NONE || (0x8f + i * 0x10) < irq_vector) if ((m_active_interrupt_type == INT_NONE) || (0x8f + i * 0x10) < irq_vector)
{ {
m_active_interrupt_type = INT_SOFT; m_active_interrupt_type = INT_SOFT;
m_active_interrupt_number = i; m_active_interrupt_number = i;
@ -929,12 +929,11 @@ TIMER_CALLBACK_MEMBER(interpro_ioga_device::serial_dma)
// transfer from the memory to device or device to memory // transfer from the memory to device or device to memory
while ((dma_channel.control & SDMA_COUNT) && dma_channel.drq_state) while ((dma_channel.control & SDMA_COUNT) && dma_channel.drq_state)
{ {
// TODO: work out which control register bits indicate read from device if (dma_channel.control & SDMA_WRITE)
if (dma_channel.control & SDMA_SEND)
{ {
u8 data = m_memory->read_byte(dma_channel.address); u8 data = m_memory->read_byte(dma_channel.address++);
LOGMASKED(LOG_SERIALDMA, "dma: transmitting byte 0x%02x to serial channel %d\n", LOGMASKED(LOG_SERIALDMA, "dma: writing byte 0x%02x to serial channel %d\n",
data, dma_channel.channel); data, dma_channel.channel);
dma_channel.device_w(data); dma_channel.device_w(data);
@ -943,24 +942,26 @@ TIMER_CALLBACK_MEMBER(interpro_ioga_device::serial_dma)
{ {
u8 data = dma_channel.device_r(); u8 data = dma_channel.device_r();
LOGMASKED(LOG_SERIALDMA, "dma: receiving byte 0x%02x from serial channel %d\n", LOGMASKED(LOG_SERIALDMA, "dma: reading byte 0x%02x from serial channel %d\n",
data, dma_channel.channel); data, dma_channel.channel);
m_memory->write_byte(dma_channel.address, data); m_memory->write_byte(dma_channel.address++, data);
} }
// increment address and decrement count // decrement transfer count
dma_channel.address++; dma_channel.control = (dma_channel.control & ~SDMA_COUNT) | ((dma_channel.control & SDMA_COUNT) - 1);
dma_channel.control = (dma_channel.control & SDMA_CONTROL) | ((dma_channel.control & SDMA_COUNT) - 1);
} }
if ((dma_channel.control & SDMA_COUNT) == 0) if ((dma_channel.control & SDMA_COUNT) == 0)
{ {
// transfer count zero // transfer count zero
dma_channel.control |= SDMA_TCZERO; dma_channel.control |= SDMA_TCZERO;
dma_channel.control &= ~SDMA_ENABLE;
// raise an interrupt // raise an interrupt
// FIXME: assume edge-triggered?
set_int_line(IRQ_SERDMA, ASSERT_LINE); set_int_line(IRQ_SERDMA, ASSERT_LINE);
set_int_line(IRQ_SERDMA, CLEAR_LINE);
} }
} }
} }
@ -974,7 +975,7 @@ void interpro_ioga_device::serial_drq(int state, int channel)
LOGMASKED(LOG_SERIALDMA, "dma: drq for serial channel %d %s count 0x%04x\n", LOGMASKED(LOG_SERIALDMA, "dma: drq for serial channel %d %s count 0x%04x\n",
channel, state ? "asserted" : "deasserted", dma_channel.control & SDMA_COUNT); channel, state ? "asserted" : "deasserted", dma_channel.control & SDMA_COUNT);
if (state && (dma_channel.control & SDMA_COUNT)) if (state && (dma_channel.control & SDMA_ENABLE))
m_serial_dma_timer->adjust(attotime::zero); m_serial_dma_timer->adjust(attotime::zero);
} }
@ -995,7 +996,7 @@ void interpro_ioga_device::serial_dma_ctrl_w(address_space &space, offs_t offset
COMBINE_DATA(&dma_channel.control); COMBINE_DATA(&dma_channel.control);
if (dma_channel.control & SDMA_COUNT) if (dma_channel.control & SDMA_ENABLE)
m_serial_dma_timer->adjust(attotime::zero); m_serial_dma_timer->adjust(attotime::zero);
} }

14
src/mame/machine/interpro_ioga.h
View File

@ -296,12 +296,18 @@ private:
u32 dma_r(address_space &space, offs_t offset, u32 mem_mask, dma_channel channel) const; u32 dma_r(address_space &space, offs_t offset, u32 mem_mask, dma_channel channel) const;
void dma_w(address_space &space, offs_t offset, u32 data, u32 mem_mask, dma_channel channel); void dma_w(address_space &space, offs_t offset, u32 data, u32 mem_mask, dma_channel channel);
enum serial_dma_ctrl_mask enum serial_dma_ctrl_mask : u32
{ {
SDMA_COUNT = 0x0000ffff, SDMA_COUNT = 0x000000ff,
SDMA_TAG = 0x0000ff00, // bus tag?
SDMA_TCZERO = 0x00200000, SDMA_TCZERO = 0x00200000,
SDMA_SEND = 0x04000000, // transfer from memory to device
SDMA_CONTROL = 0xffff0000, SDMA_WRITE = 0x01000000, // transfer from memory to device
SDMA_ENABLE = 0x02000000,
SDMA_0400 = 0x04000000,
SDMA_1000 = 0x10000000, // set on Sapphire systems?
}; };
u32 serial_dma_addr_r(address_space &space, offs_t offset, u32 mem_mask, int channel) const { return m_serial_dma_channel[channel].address; } u32 serial_dma_addr_r(address_space &space, offs_t offset, u32 mem_mask, int channel) const { return m_serial_dma_channel[channel].address; }
void serial_dma_addr_w(address_space &space, offs_t offset, u32 data, u32 mem_mask, int channel); void serial_dma_addr_w(address_space &space, offs_t offset, u32 data, u32 mem_mask, int channel);