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https://github.com/holub/mame
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pgm.c:
Continued refactoring of the protections, including improved notes. Moved some code into the states and split states by protection type. [David Haywood]
This commit is contained in:
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68ebd4e057
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@ -517,7 +517,6 @@ MACHINE_START( pgm )
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state->m_maincpu = machine.device<cpu_device>("maincpu");
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state->m_soundcpu = machine.device<cpu_device>("soundcpu");
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state->m_prot = machine.device<cpu_device>("prot");
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state->m_ics = machine.device("ics");
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}
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@ -3624,12 +3623,12 @@ GAME( 1997, pgm, 0, pgm, pgm, pgm, ROT0, "IGS
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-----------------------------------------------------------------------------------------------------------------------*/
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// the version numbering on these is a mess... date srings from ROM (and in some cases even those are missing..)
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GAME( 1997, orlegend, pgm, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 126)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 01/14/98 18:16:38 - runs as World
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GAME( 1997, orlegende, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 07/14/97 11:19:45 - runs as World
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GAME( 1997, orlegendc, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 05/05/97 10:08:21 - runs as World, Korea, China
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GAME( 1997, orlegendca, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. ???, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 04/02/97 13:35:43 - runs as HongKong, China, China
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GAME( 1997, orlegend111c, orlegend, pgm, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 111, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 no date! - runs as HongKong, China, China
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GAME( 1997, orlegend105k, orlegend, pgm, orld105k, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 105, Korean Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0000 no date! - runs as Korea
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GAME( 1997, orlegend, pgm, pgm_asic3, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 126)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 01/14/98 18:16:38 - runs as World
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GAME( 1997, orlegende, orlegend, pgm_asic3, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 07/14/97 11:19:45 - runs as World
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GAME( 1997, orlegendc, orlegend, pgm_asic3, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 112, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 05/05/97 10:08:21 - runs as World, Korea, China
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GAME( 1997, orlegendca, orlegend, pgm_asic3, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. ???, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 04/02/97 13:35:43 - runs as HongKong, China, China
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GAME( 1997, orlegend111c, orlegend, pgm_asic3, orlegend, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 111, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0001 no date! - runs as HongKong, China, China
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GAME( 1997, orlegend105k, orlegend, pgm_asic3, orld105k, orlegend, ROT0, "IGS", "Oriental Legend / Xi You Shi E Zhuan (ver. 105, Korean Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // V0000 no date! - runs as Korea
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GAME( 1997, drgw2, pgm, pgm, pgm, drgw2, ROT0, "IGS", "Dragon World II (ver. 110X, Export)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // This set still has protection issues!
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GAME( 1997, dw2v100x, drgw2, pgm, pgm, dw2v100x, ROT0, "IGS", "Dragon World II (ver. 100X, Export)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // This set still has protection issues!
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@ -3637,59 +3636,59 @@ GAME( 1997, drgw2j, drgw2, pgm, pgm, drgw2j, ROT0, "IGS
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GAME( 1997, drgw2c, drgw2, pgm, pgm, drgw2c, ROT0, "IGS", "Zhong Guo Long II (ver. 100C, China)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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// region provided by internal ARM rom
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GAME( 1999, photoy2k, pgm, kov, photoy2k, photoy2k, ROT0, "IGS", "Photo Y2K (ver. 105)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
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GAME( 1999, photoy2k104, photoy2k, kov, photoy2k, photoy2k, ROT0, "IGS", "Photo Y2K (ver. 104)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
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GAME( 1999, photoy2k102, photoy2k, kov, photoy2k, photoy2k, ROT0, "IGS", "Photo Y2K (ver. 102, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
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GAME( 1999, photoy2k, pgm, pgm_arm_type1, photoy2k, photoy2k, ROT0, "IGS", "Photo Y2K (ver. 105)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
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GAME( 1999, photoy2k104, photoy2k, pgm_arm_type1, photoy2k, photoy2k, ROT0, "IGS", "Photo Y2K (ver. 104)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
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GAME( 1999, photoy2k102, photoy2k, pgm_arm_type1, photoy2k, photoy2k, ROT0, "IGS", "Photo Y2K (ver. 102, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) /* region provided by protection device */
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// region provided by internal ARM rom
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GAME( 1999, kovsh, pgm, kov, kovsh, kovsh, ROT0, "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 104, CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V104, China internal ROM
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GAME( 1999, kovsh103, kovsh, kov, kovsh, kovsh, ROT0, "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 103, CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V103, China internal ROM
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GAME( 1999, kovsh, pgm, pgm_arm_type1, kovsh, kovsh, ROT0, "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 104, CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V104, China internal ROM
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GAME( 1999, kovsh103, kovsh, pgm_arm_type1, kovsh, kovsh, ROT0, "IGS", "Knights of Valour Super Heroes / Sangoku Senki Super Heroes (ver. 103, CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V103, China internal ROM
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// nasty modern asian bootleg of Knights of Valour Super Heroes with characters ripped from SNK's The King of Fighters series!
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GAME( 1999, kovqhsgs, kovsh, kov, kovsh, kovqhsgs, ROT0, "bootleg", "Knights of Valour: Quan Huang San Guo Special / Sangoku Senki: Quan Huang San Guo Special (ver. 303CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 1999, kovqhsgs, kovsh, pgm_arm_type1, kovsh, kovqhsgs, ROT0, "bootleg", "Knights of Valour: Quan Huang San Guo Special / Sangoku Senki: Quan Huang San Guo Special (ver. 303CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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// region provided by internal ARM rom
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GAME( 2000, kov2, pgm, kov2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 107, 102, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 05/10/01 14:24:08 V107 (Ext. Arm V102, Int. Arm V100HK)
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GAME( 2000, kov2106, kov2, kov2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 106, 102, 100KH)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 02/27/01 13:26:46 V106 (Ext. Arm V102, Int. Arm V100HK)
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GAME( 2000, kov2103, kov2, kov2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 103, 101, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 12/28/00 15:09:31 V103 (Ext. Arm V101, Int. Arm V100HK)
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GAME( 2000, kov2102, kov2, kov2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 102, 101, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 12/14/00 10:33:36 V102 (Ext. Arm V101, Int. Arm V100HK)
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GAME( 2000, kov2101, kov2, kov2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 101, 101, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 11/29/00 11:03:08 V100 (Ext. Arm V100, Int. Arm V100HK)
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GAME( 2000, kov2100, kov2, kov2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 100, 100, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 11/29/00 11:03:08 V100 (Ext. Arm V100, Int. Arm V100HK)
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GAME( 2000, kov2, pgm, pgm_arm_type2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 107, 102, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 05/10/01 14:24:08 V107 (Ext. Arm V102, Int. Arm V100HK)
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GAME( 2000, kov2106, kov2, pgm_arm_type2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 106, 102, 100KH)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 02/27/01 13:26:46 V106 (Ext. Arm V102, Int. Arm V100HK)
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GAME( 2000, kov2103, kov2, pgm_arm_type2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 103, 101, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 12/28/00 15:09:31 V103 (Ext. Arm V101, Int. Arm V100HK)
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GAME( 2000, kov2102, kov2, pgm_arm_type2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 102, 101, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 12/14/00 10:33:36 V102 (Ext. Arm V101, Int. Arm V100HK)
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GAME( 2000, kov2101, kov2, pgm_arm_type2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 101, 101, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 11/29/00 11:03:08 V100 (Ext. Arm V100, Int. Arm V100HK)
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GAME( 2000, kov2100, kov2, pgm_arm_type2, kov2, kov2, ROT0, "IGS", "Knights of Valour 2 / Sangoku Senki 2 (ver. 100, 100, 100HK)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 11/29/00 11:03:08 V100 (Ext. Arm V100, Int. Arm V100HK)
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// region provided by internal ARM rom
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GAME( 2001, kov2p, pgm, kov2, kov2, kov2p, ROT0, "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M204XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
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GAME( 2001, kov2p205, kov2p, kov2, kov2, kov2p, ROT0, "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M205XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
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GAME( 2001, kov2p, pgm, pgm_arm_type2, kov2, kov2p, ROT0, "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M204XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
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GAME( 2001, kov2p205, kov2p, pgm_arm_type2, kov2, kov2p, ROT0, "IGS", "Knights of Valour 2 Plus - Nine Dragons / Sangoku Senki 2 Plus - Nine Dragons (ver. M205XX)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
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// region provided by internal ARM rom
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GAME( 2001, martmast, pgm, kov2, martmast, martmast, ROT0, "IGS", "Martial Masters (ver. 104, 102, 102US)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V104, Ext Arm 102, Int Arm 102US
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GAME( 2001, martmastc, martmast, kov2, martmast, martmast, ROT0, "IGS", "Martial Masters (ver. 104, 102, 101CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V104, Ext Arm 102, Int Arm 101CN
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GAME( 2001, martmastc102, martmast, kov2, martmast, martmast, ROT0, "IGS", "Martial Masters (ver. 102, 101, 101CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V102, Ext Arm 101, Int Arm 101CN
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GAME( 2001, martmast, pgm, pgm_arm_type2, martmast, martmast, ROT0, "IGS", "Martial Masters (ver. 104, 102, 102US)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V104, Ext Arm 102, Int Arm 102US
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GAME( 2001, martmastc, martmast, pgm_arm_type2, martmast, martmast, ROT0, "IGS", "Martial Masters (ver. 104, 102, 101CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V104, Ext Arm 102, Int Arm 101CN
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GAME( 2001, martmastc102, martmast, pgm_arm_type2, martmast, martmast, ROT0, "IGS", "Martial Masters (ver. 102, 101, 101CN)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k V102, Ext Arm 101, Int Arm 101CN
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// region provided by internal ARM rom
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GAME( 2001, ddp2, pgm, kov2, ddp2, ddp2, ROT270, "IGS", "DoDonPachi II - Bee Storm (Japan, ver. 102)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2001, ddp2101, ddp2, kov2, ddp2, ddp2, ROT270, "IGS", "DoDonPachi II - Bee Storm (Japan, ver. 101)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2001, ddp2100, ddp2, kov2, ddp2, ddp2, ROT270, "IGS", "DoDonPachi II - Bee Storm (Japan, ver. 100)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2001, ddp2, pgm, pgm_arm_type2, ddp2, ddp2, ROT270, "IGS", "DoDonPachi II - Bee Storm (Japan, ver. 102)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2001, ddp2101, ddp2, pgm_arm_type2, ddp2, ddp2, ROT270, "IGS", "DoDonPachi II - Bee Storm (Japan, ver. 101)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2001, ddp2100, ddp2, pgm_arm_type2, ddp2, ddp2, ROT270, "IGS", "DoDonPachi II - Bee Storm (Japan, ver. 100)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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// we bypass the internal ARM rom on these, ideally it should still be dumped tho!
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// ARM version strings don't match 100% with labels... for 68k ROMs I'm using the build time / date stamp from near the start of the rom, there are some slightly different time stamps later
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GAME( 2002, dmnfrnt, pgm, svg, pgm, dmnfrnt, ROT0, "IGS", "Demon Front (68k label V105, ROM M105XX 08/05/02) (ARM label V105, ROM 08/05/02 S105XX)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k time: 10:24:11 ARM time: 10:33:23
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GAME( 2002, dmnfrnta, dmnfrnt, svg, pgm, dmnfrnt, ROT0, "IGS", "Demon Front (68k label V102, ROM M102XX 06/19/02) (ARM label V102, ROM 05/24/02 S101XX)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k time: 13:44:08 ARM time: 13:04:31
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GAME( 2002, dmnfrntpcb, dmnfrnt, svg, pgm, dmnfrnt, ROT0, "IGS", "Demon Front (68k label V107KR, ROM M107KR 11/03/03) (ARM label V107KR, ROM 10/16/03 S106KR) (JAMMA PCB)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // works but reports version mismatch (wants internal rom version and region to match external?)
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GAME( 2002, dmnfrnt, pgm, pgm_arm_type3, pgm, dmnfrnt, ROT0, "IGS", "Demon Front (68k label V105, ROM M105XX 08/05/02) (ARM label V105, ROM 08/05/02 S105XX)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k time: 10:24:11 ARM time: 10:33:23
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GAME( 2002, dmnfrnta, dmnfrnt, pgm_arm_type3, pgm, dmnfrnt, ROT0, "IGS", "Demon Front (68k label V102, ROM M102XX 06/19/02) (ARM label V102, ROM 05/24/02 S101XX)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // 68k time: 13:44:08 ARM time: 13:04:31
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GAME( 2002, dmnfrntpcb, dmnfrnt, pgm_arm_type3, pgm, dmnfrnt, ROT0, "IGS", "Demon Front (68k label V107KR, ROM M107KR 11/03/03) (ARM label V107KR, ROM 10/16/03 S106KR) (JAMMA PCB)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // works but reports version mismatch (wants internal rom version and region to match external?)
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/* these don't use an External ARM rom, and don't have any weak internal functions which would allow the internal ROM to be read out */
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GAME( 2002, ddpdoj, 0, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou V101 (2002.04.05.Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // is there a v101 without the . after 05?
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GAME( 2002, ddpdoja, ddpdoj, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou V100 (2002.04.05.Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2002, ddpdojb, ddpdoj, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (2002.04.05 Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2002, ddpdojblk, ddpdoj, cavepgm, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (Black Label)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // Displays "2002.04.05.Master Ver" (old) or "2002.10.07 Black Ver" (new)
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GAME( 2002, ddpdoj, 0, pgm_arm_type1_cave, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou V101 (2002.04.05.Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // is there a v101 without the . after 05?
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GAME( 2002, ddpdoja, ddpdoj, pgm_arm_type1_cave, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou V100 (2002.04.05.Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2002, ddpdojb, ddpdoj, pgm_arm_type1_cave, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (2002.04.05 Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2002, ddpdojblk, ddpdoj, pgm_arm_type1_cave, pgm, ddp3, ROT270, "Cave", "DoDonPachi Dai-Ou-Jou (Black Label)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) // Displays "2002.04.05.Master Ver" (old) or "2002.10.07 Black Ver" (new)
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// the exact text of the 'version' shows which revision of the game it is; the newest has 2 '.' symbols in the string, the oldest, none.
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GAME( 2002, ket, 0, cavepgm, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (2003/01/01. Master Ver.)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
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GAME( 2002, keta, ket, cavepgm, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (2003/01/01 Master Ver.)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 2002, ketb, ket, cavepgm, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (2003/01/01 Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 2002, ket, 0, pgm_arm_type1_cave, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (2003/01/01. Master Ver.)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 2002, keta, ket, pgm_arm_type1_cave, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (2003/01/01 Master Ver.)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 2002, ketb, ket, pgm_arm_type1_cave, pgm, ket, ROT270, "Cave", "Ketsui: Kizuna Jigoku Tachi (2003/01/01 Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
|
||||
GAME( 2003, espgal, 0, cavepgm, pgm, espgal, ROT270, "Cave", "Espgaluda (2003/10/15 Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 2003, espgal, 0, pgm_arm_type1_cave, pgm, espgal, ROT270, "Cave", "Espgaluda (2003/10/15 Master Ver)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
|
||||
|
||||
|
||||
@ -3699,24 +3698,24 @@ GAME( 2003, espgal, 0, cavepgm, pgm, espgal, ROT270, "Ca
|
||||
-----------------------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
// it's playable, but the region check is still patched (different IGS025 chips return different sequences so that the game can determine the region)
|
||||
GAME( 1998, killbld, pgm, killbld, killbld, killbld, ROT0, "IGS", "The Killing Blade (ver. 109, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, killbld104, killbld, killbld, killbld, killbld, ROT0, "IGS", "The Killing Blade (ver. 104)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, killbld, pgm, pgm_022_025_kb, killbld, killbld, ROT0, "IGS", "The Killing Blade (ver. 109, Chinese Board)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, killbld104, killbld, pgm_022_025_kb, killbld, killbld, ROT0, "IGS", "The Killing Blade (ver. 104)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
|
||||
|
||||
GAME( 1998, olds, pgm, olds, olds, olds, ROT0, "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 101, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, olds100, olds, olds, olds, olds, ROT0, "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 100, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, olds100a, olds, olds, olds, olds, ROT0, "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 100, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // crashes on some bosses, high score table etc.
|
||||
GAME( 1998, olds, pgm, pgm_028_025_ol, olds, olds, ROT0, "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 101, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, olds100, olds, pgm_028_025_ol, olds, olds, ROT0, "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 100, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, olds100a, olds, pgm_028_025_ol, olds, olds, ROT0, "IGS", "Oriental Legend Special / Xi You Shi E Zhuan Super (ver. 100, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // crashes on some bosses, high score table etc.
|
||||
|
||||
GAME( 1999, kov, pgm, kov_simulated_arm, sango, kov, ROT0, "IGS", "Knights of Valour / Sangoku Senki (ver. 117)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // V0008 04/27/99 10:33:33
|
||||
GAME( 1999, kov115, kov, kov_simulated_arm, sango, kov, ROT0, "IGS", "Knights of Valour / Sangoku Senki (ver. 115)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // V0006 02/22/99 11:53:18
|
||||
GAME( 1999, kov100, kov, kov_simulated_arm, sango, kov, ROT0, "IGS", "Knights of Valour / Sangoku Senki (ver. 100, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // V0002 01/31/99 01:54:16
|
||||
GAME( 1999, kov, pgm, pgm_arm_type1_sim, sango, kov, ROT0, "IGS", "Knights of Valour / Sangoku Senki (ver. 117)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // V0008 04/27/99 10:33:33
|
||||
GAME( 1999, kov115, kov, pgm_arm_type1_sim, sango, kov, ROT0, "IGS", "Knights of Valour / Sangoku Senki (ver. 115)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // V0006 02/22/99 11:53:18
|
||||
GAME( 1999, kov100, kov, pgm_arm_type1_sim, sango, kov, ROT0, "IGS", "Knights of Valour / Sangoku Senki (ver. 100, Japanese Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // V0002 01/31/99 01:54:16
|
||||
|
||||
GAME( 1999, kovplus, pgm, kov_simulated_arm, sango, kov, ROT0, "IGS", "Knights of Valour Plus / Sangoku Senki Plus (ver. 119, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovplusa, kovplus, kov_simulated_arm, sango, kov, ROT0, "IGS", "Knights of Valour Plus / Sangoku Senki Plus (ver. 119, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovplus, pgm, pgm_arm_type1_sim, sango, kov, ROT0, "IGS", "Knights of Valour Plus / Sangoku Senki Plus (ver. 119, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovplusa, kovplus, pgm_arm_type1_sim, sango, kov, ROT0, "IGS", "Knights of Valour Plus / Sangoku Senki Plus (ver. 119, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
// modified title screen is only visible for china region, so use that by default. Character select portraits don't seem quite right (different protection?)
|
||||
GAME( 1999, kovsgqyz, kovplus, kov_simulated_arm, sango_ch, kovboot, ROT0, "bootleg", "Knights of Valour: SanGuo QunYingZhuan / Sangoku Senki: SanGuo QunYingZhuan (bootleg, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovsgqyza, kovplus, kov_simulated_arm, sango_ch, kovboot, ROT0, "bootleg", "Knights of Valour: SanGuo QunYingZhuan / Sangoku Senki: SanGuo QunYingZhuan (bootleg, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovsgqyzb, kovplus, kov_simulated_arm, sango_ch, kovboot, ROT0, "bootleg", "Knights of Valour: SanGuo QunYingZhuan / Sangoku Senki: SanGuo QunYingZhuan (bootleg, set 3)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovsgqyz, kovplus, pgm_arm_type1_sim, sango_ch, kovboot, ROT0, "bootleg", "Knights of Valour: SanGuo QunYingZhuan / Sangoku Senki: SanGuo QunYingZhuan (bootleg, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovsgqyza, kovplus, pgm_arm_type1_sim, sango_ch, kovboot, ROT0, "bootleg", "Knights of Valour: SanGuo QunYingZhuan / Sangoku Senki: SanGuo QunYingZhuan (bootleg, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, kovsgqyzb, kovplus, pgm_arm_type1_sim, sango_ch, kovboot, ROT0, "bootleg", "Knights of Valour: SanGuo QunYingZhuan / Sangoku Senki: SanGuo QunYingZhuan (bootleg, set 3)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
|
||||
|
||||
@ -3726,19 +3725,19 @@ GAME( 1999, kovsgqyzb, kovplus, kov_simulated_arm, sango_ch, kovboot
|
||||
-----------------------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
// should have DMA protection, like killbld, as well as the math / bitswap / memory manipulation stuff, but it never attempts to trigger the DMA? - we currently have a RAM dump to allow it to boot, but I think this stuff should be DMA copied into RAM, like killbld
|
||||
GAME( 1998, drgw3, pgm, dw3, dw3, drgw3, ROT0, "IGS", "Dragon World 3 (ver. 106, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, drgw3105, drgw3, dw3, dw3, drgw3, ROT0, "IGS", "Dragon World 3 (ver. 105)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, drgw3100, drgw3, dw3, dw3, drgw3, ROT0, "IGS", "Dragon World 3 (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // Japan Only?
|
||||
GAME( 1998, drgw3, pgm, pgm_022_025_dw, dw3, drgw3, ROT0, "IGS", "Dragon World 3 (ver. 106, Korean Board)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, drgw3105, drgw3, pgm_022_025_dw, dw3, drgw3, ROT0, "IGS", "Dragon World 3 (ver. 105)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, drgw3100, drgw3, pgm_022_025_dw, dw3, drgw3, ROT0, "IGS", "Dragon World 3 (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // Japan Only?
|
||||
|
||||
GAME( 1998, dwex, pgm, dw3, dw3, drgw3, ROT0, "IGS", "Dragon World 3 EX (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, dwex, pgm, pgm_022_025_dw, dw3, drgw3, ROT0, "IGS", "Dragon World 3 EX (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
|
||||
GAME( 2001, dw2001, pgm, kov2, dw2001, dw2001, ROT0, "IGS", "Dragon World 2001", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // V0000 02/21/01 16:05:16
|
||||
GAME( 2001, dw2001, pgm, pgm_arm_type2, dw2001, dw2001, ROT0, "IGS", "Dragon World 2001", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // V0000 02/21/01 16:05:16
|
||||
|
||||
GAME( 1999, puzlstar, pgm, kov_simulated_arm, pstar, pstar, ROT0, "IGS", "Puzzle Star (ver. 100MG)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 1999, puzlstar, pgm, pgm_arm_type1_sim, pstar, pstar, ROT0, "IGS", "Puzzle Star (ver. 100MG)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
GAME( 2001, py2k2, pgm, kov_simulated_arm, py2k2, py2k2, ROT0, "IGS", "Photo Y2K 2", GAME_NOT_WORKING ) /* need internal rom of IGS027A */
|
||||
GAME( 2001, py2k2, pgm, pgm_arm_type1_sim, py2k2, py2k2, ROT0, "IGS", "Photo Y2K 2", GAME_NOT_WORKING ) /* need internal rom of IGS027A */
|
||||
|
||||
GAME( 2001, puzzli2, pgm, kov_simulated_arm, puzzli2, puzzli2, ROT0, "IGS", "Puzzli 2 Super (ver. 200)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 2001, puzzli2, pgm, pgm_arm_type1_sim, puzzli2, puzzli2, ROT0, "IGS", "Puzzli 2 Super (ver. 200)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
|
||||
|
||||
|
||||
@ -3746,27 +3745,27 @@ GAME( 2001, puzzli2, pgm, kov_simulated_arm, puzzli2, puzzli2,
|
||||
|
||||
|
||||
// all 3 68k roms still have V100 strings, but are clearly different builds, there don't appear to be build string dates in them. Two of the external ARM roms are marked V100 but are different builds, it's possible the single PCB version 100 is based on a later main revision
|
||||
GAME( 2003, theglad, pgm, svg, pgm, theglad, ROT0, "IGS", "The Gladiator - Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 01/16/03 SHEN JIAN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 10:39:25
|
||||
GAME( 2003, theglada, theglad, svg, pgm, theglad, ROT0, "IGS", "The Gladiator - Road of the Sword / Shen Jian (M68k label V101) (ARM label V107, ROM 06/06/03 SHEN JIAN V107)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 16:17:27
|
||||
GAME( 2003, thegladpcb, theglad, svg, pgm, theglad, ROT0, "IGS", "The Gladiator - Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 02/25/03 SHEN JIAN) (JAMMA PCB)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 16:32:21
|
||||
GAME( 2003, theglad, pgm, pgm_arm_type3, pgm, theglad, ROT0, "IGS", "The Gladiator - Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 01/16/03 SHEN JIAN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 10:39:25
|
||||
GAME( 2003, theglada, theglad, pgm_arm_type3, pgm, theglad, ROT0, "IGS", "The Gladiator - Road of the Sword / Shen Jian (M68k label V101) (ARM label V107, ROM 06/06/03 SHEN JIAN V107)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 16:17:27
|
||||
GAME( 2003, thegladpcb, theglad, pgm_arm_type3, pgm, theglad, ROT0, "IGS", "The Gladiator - Road of the Sword / Shen Jian (M68k label V100) (ARM label V100, ROM 02/25/03 SHEN JIAN) (JAMMA PCB)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 16:32:21
|
||||
|
||||
|
||||
|
||||
GAME( 2004, oldsplus, pgm, kov_simulated_arm, oldsplus, oldsplus, ROT0, "IGS", "Oriental Legend Special Plus / Xi You Shi E Zhuan Super Plus", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, oldsplus, pgm, pgm_arm_type1_sim, oldsplus, oldsplus, ROT0, "IGS", "Oriental Legend Special Plus / Xi You Shi E Zhuan Super Plus", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
GAME( 2004, kovshp, pgm, kov, kovsh, kovshp, ROT0, "IGS", "Knights of Valour Super Heroes Plus / Sangoku Senki Super Heroes Plus (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovshp, pgm, pgm_arm_type1, kovsh, kovshp, ROT0, "IGS", "Knights of Valour Super Heroes Plus / Sangoku Senki Super Heroes Plus (ver. 100)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
// these bootlegs are clones of this instead
|
||||
GAME( 2004, kovlsqh, kovshp, kov, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Quan Huang / Sangoku Senki: Luan Shi Quan Huang (ver. 200CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsqh2, kovshp, kov, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Quan Huang 2 / Sangoku Senki: Luan Shi Quan Huang 2 (ver. 200CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsjb, kovshp, kov, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (ver. 200CN, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsjba, kovshp, kov, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (ver. 200CN, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsqh, kovshp, pgm_arm_type1, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Quan Huang / Sangoku Senki: Luan Shi Quan Huang (ver. 200CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsqh2, kovshp, pgm_arm_type1, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Quan Huang 2 / Sangoku Senki: Luan Shi Quan Huang 2 (ver. 200CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsjb, kovshp, pgm_arm_type1, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (ver. 200CN, set 1)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, kovlsjba, kovshp, pgm_arm_type1, kovsh, kovlsqh2, ROT0, "bootleg", "Knights of Valour: Luan Shi Jie Ba / Sangoku Senki: Luan Shi Jie Ba (ver. 200CN, set 2)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
GAME( 2005, killbldp, pgm, svg, pgm, killbldp, ROT0, "IGS", "The Killing Blade Plus (ver. 300)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2005, killbldp, pgm, pgm_arm_type3, pgm, killbldp, ROT0, "IGS", "The Killing Blade Plus (ver. 300)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
GAME( 2004, happy6, pgm, svg, pgm, happy6, ROT0, "IGS", "Happy 6-in-1 (ver. 101CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
GAME( 2004, happy6, pgm, pgm_arm_type3, pgm, happy6, ROT0, "IGS", "Happy 6-in-1 (ver. 101CN)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
|
||||
|
||||
GAME( 2005, svg, pgm, svg, pgm, svg, ROT0, "IGS / Idea Factory", "S.V.G. - Spectral vs Generation (M68k label V200) (ARM label V200, ROM 10/11/05 S.V.G V201)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // label was 200, but it's code rev 201? // ARM time: 10:07:20
|
||||
GAME( 2005, svgpcb, svg, svg, pgm, svgpcb, ROT0, "IGS / Idea Factory", "S.V.G. - Spectral vs Generation (M68k label V100JP) (ARM label V100JP ROM 05/12/05 S.V.G V100) (JAMMA PCB)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 15:31:35
|
||||
GAME( 2005, svg, pgm, pgm_arm_type3, pgm, svg, ROT0, "IGS / Idea Factory", "S.V.G. - Spectral vs Generation (M68k label V200) (ARM label V200, ROM 10/11/05 S.V.G V201)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // label was 200, but it's code rev 201? // ARM time: 10:07:20
|
||||
GAME( 2005, svgpcb, svg, pgm_arm_type3, pgm, svgpcb, ROT0, "IGS / Idea Factory", "S.V.G. - Spectral vs Generation (M68k label V100JP) (ARM label V100JP ROM 05/12/05 S.V.G V100) (JAMMA PCB)", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* need internal rom of IGS027A */ // ARM time: 15:31:35
|
||||
|
||||
|
||||
|
||||
|
@ -26,9 +26,6 @@ public:
|
||||
UINT16 * m_rowscrollram;
|
||||
UINT16 * m_videoram;
|
||||
UINT8 * m_z80_mainram;
|
||||
UINT32 * m_arm7_shareram;
|
||||
UINT32 * m_svg_shareram[2]; //for 5585G MACHINE
|
||||
UINT16 * m_sharedprotram; // killbld & olds
|
||||
UINT8 * m_sprite_a_region;
|
||||
size_t m_sprite_a_region_size;
|
||||
UINT16 * m_spritebufferram; // buffered spriteram
|
||||
@ -43,7 +40,6 @@ public:
|
||||
/* devices */
|
||||
cpu_device *m_maincpu;
|
||||
cpu_device *m_soundcpu;
|
||||
cpu_device *m_prot;
|
||||
device_t *m_ics;
|
||||
|
||||
/* used by rendering */
|
||||
@ -62,26 +58,19 @@ public:
|
||||
UINT8 m_cal_cnt;
|
||||
system_time m_systime;
|
||||
|
||||
/* protection handling */
|
||||
// kov2
|
||||
UINT32 m_kov2_latchdata_68k_w;
|
||||
UINT32 m_kov2_latchdata_arm_w;
|
||||
// kovsh
|
||||
UINT16 m_kovsh_highlatch_arm_w;
|
||||
UINT16 m_kovsh_lowlatch_arm_w;
|
||||
UINT16 m_kovsh_highlatch_68k_w;
|
||||
UINT16 m_kovsh_lowlatch_68k_w;
|
||||
UINT32 m_kovsh_counter;
|
||||
// svg
|
||||
int m_svg_ram_sel;
|
||||
// killbld & olds
|
||||
int m_kb_cmd;
|
||||
int m_kb_reg;
|
||||
int m_kb_ptr;
|
||||
int m_kb_region_sequence_position;
|
||||
UINT32 m_kb_regs[0x10];
|
||||
UINT16 m_olds_bs;
|
||||
UINT16 m_olds_cmd3;
|
||||
|
||||
};
|
||||
|
||||
|
||||
/* for machine/pgmprot.c type games */
|
||||
class pgm_asic3_state : public pgm_state
|
||||
{
|
||||
public:
|
||||
pgm_asic3_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
|
||||
}
|
||||
|
||||
// ASIC 3 (oriental legends protection)
|
||||
UINT8 m_asic3_reg;
|
||||
UINT8 m_asic3_latch[3];
|
||||
@ -91,40 +80,131 @@ public:
|
||||
UINT8 m_asic3_h1;
|
||||
UINT8 m_asic3_h2;
|
||||
UINT16 m_asic3_hold;
|
||||
|
||||
UINT32* m_arm_ram;
|
||||
|
||||
};
|
||||
|
||||
|
||||
/* for machine/pgmprot1.c type games */
|
||||
class pgm_kovarmsim_state : public pgm_state
|
||||
class pgm_arm_type1_state : public pgm_state
|
||||
{
|
||||
public:
|
||||
pgm_kovarmsim_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
pgm_arm_type1_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
|
||||
m_ddp3internal_slot = 0;
|
||||
m_curslots = 0;
|
||||
m_puzzli_54_trigger = 0;
|
||||
}
|
||||
|
||||
/////////////// simulations
|
||||
UINT16 m_value0;
|
||||
UINT16 m_value1;
|
||||
UINT16 m_valuekey;
|
||||
UINT16 m_ddp3lastcommand;
|
||||
UINT32 m_valueresponse;
|
||||
int m_ddp3internal_slot;
|
||||
UINT32 m_ddp3slots[0x100];
|
||||
int m_curslots;
|
||||
UINT32 m_slots[0x100];
|
||||
|
||||
// pstars / oldsplus
|
||||
UINT16 m_pstar_e7;
|
||||
UINT16 m_pstar_b1;
|
||||
UINT16 m_pstar_ce;
|
||||
UINT16 m_extra_ram[0x100];
|
||||
// pstars / oldsplus / kov
|
||||
UINT16 m_pstar_e7_value;
|
||||
UINT16 m_pstar_b1_value;
|
||||
UINT16 m_pstar_ce_value;
|
||||
UINT16 m_kov_c0_value;
|
||||
UINT16 m_kov_cb_value;
|
||||
UINT16 m_kov_fe_value;
|
||||
UINT16 m_extra_ram[0x100];
|
||||
// puzzli2
|
||||
INT32 m_puzzli_54_trigger;
|
||||
|
||||
typedef void (*pgm_arm_sim_command_handler)(pgm_kovarmsim_state *state, int pc);
|
||||
typedef void (*pgm_arm_sim_command_handler)(pgm_arm_type1_state *state, int pc);
|
||||
|
||||
pgm_arm_sim_command_handler arm_sim_handler;
|
||||
|
||||
/////////////// emulation
|
||||
UINT16 m_pgm_arm_type1_highlatch_arm_w;
|
||||
UINT16 m_pgm_arm_type1_lowlatch_arm_w;
|
||||
UINT16 m_pgm_arm_type1_highlatch_68k_w;
|
||||
UINT16 m_pgm_arm_type1_lowlatch_68k_w;
|
||||
UINT32 m_pgm_arm_type1_counter;
|
||||
UINT32 * m_arm7_shareram;
|
||||
|
||||
cpu_device *m_prot;
|
||||
};
|
||||
|
||||
/* for machine/pgmprot2.c type games */
|
||||
class pgm_arm_type2_state : public pgm_state
|
||||
{
|
||||
public:
|
||||
pgm_arm_type2_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
|
||||
}
|
||||
// kov2
|
||||
UINT32 m_kov2_latchdata_68k_w;
|
||||
UINT32 m_kov2_latchdata_arm_w;
|
||||
|
||||
UINT32* m_arm_ram;
|
||||
UINT32 * m_arm7_shareram;
|
||||
|
||||
cpu_device *m_prot;
|
||||
};
|
||||
|
||||
|
||||
|
||||
/* for machine/pgmprot3.c type games */
|
||||
class pgm_arm_type3_state : public pgm_state
|
||||
{
|
||||
public:
|
||||
pgm_arm_type3_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
|
||||
}
|
||||
// svg
|
||||
int m_svg_ram_sel;
|
||||
UINT32 * m_svg_shareram[2]; //for 5585G MACHINE
|
||||
|
||||
UINT32 m_svg_latchdata_68k_w;
|
||||
UINT32 m_svg_latchdata_arm_w;
|
||||
UINT32* m_arm_ram;
|
||||
|
||||
cpu_device *m_prot;
|
||||
};
|
||||
|
||||
|
||||
/* for machine/pgmprot4.c type games */
|
||||
class pgm_022_025_state : public pgm_state
|
||||
{
|
||||
public:
|
||||
pgm_022_025_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
|
||||
}
|
||||
int m_kb_cmd;
|
||||
int m_kb_reg;
|
||||
int m_kb_ptr;
|
||||
int m_kb_region_sequence_position;
|
||||
UINT32 m_kb_regs[0x10];
|
||||
UINT16 * m_sharedprotram;
|
||||
|
||||
};
|
||||
|
||||
/* for machine/pgmprot6.c type games */
|
||||
class pgm_028_025_state : public pgm_state
|
||||
{
|
||||
public:
|
||||
pgm_028_025_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pgm_state(mconfig, type, tag) {
|
||||
|
||||
}
|
||||
// olds
|
||||
int m_kb_cmd;
|
||||
int m_kb_reg;
|
||||
int m_kb_ptr;
|
||||
UINT16 m_olds_bs;
|
||||
UINT16 m_olds_cmd3;
|
||||
UINT16 * m_sharedprotram;
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
extern UINT16 *pgm_mainram; // used by nvram handler, we cannot move it to driver data struct
|
||||
@ -135,12 +215,12 @@ void pgm_basic_init( running_machine &machine, bool set_bank = true );
|
||||
|
||||
INPUT_PORTS_EXTERN( pgm );
|
||||
|
||||
/* we only need half of these because CavePGM has it's own MACHINE DRIVER in pgmprot1.c - refactor */
|
||||
TIMER_DEVICE_CALLBACK( pgm_interrupt );
|
||||
|
||||
GFXDECODE_EXTERN( pgm );
|
||||
|
||||
MACHINE_CONFIG_EXTERN( pgm );
|
||||
MACHINE_CONFIG_EXTERN( pgmbase );
|
||||
|
||||
ADDRESS_MAP_EXTERN( pgm_z80_mem, 8 );
|
||||
ADDRESS_MAP_EXTERN( pgm_z80_io, 8 );
|
||||
@ -186,6 +266,8 @@ DRIVER_INIT( orlegend );
|
||||
INPUT_PORTS_EXTERN( orlegend );
|
||||
INPUT_PORTS_EXTERN( orld105k );
|
||||
|
||||
MACHINE_CONFIG_EXTERN( pgm_asic3 );
|
||||
|
||||
/*----------- defined in machine/pgmprot1.c -----------*/
|
||||
|
||||
/* emulations */
|
||||
@ -195,7 +277,6 @@ DRIVER_INIT( kovshp );
|
||||
DRIVER_INIT( kovlsqh2 );
|
||||
DRIVER_INIT( kovqhsgs );
|
||||
|
||||
MACHINE_CONFIG_EXTERN( kov );
|
||||
|
||||
/* simulations */
|
||||
DRIVER_INIT( ddp3 );
|
||||
@ -208,8 +289,9 @@ DRIVER_INIT( kov );
|
||||
DRIVER_INIT( kovboot );
|
||||
DRIVER_INIT( oldsplus );
|
||||
|
||||
MACHINE_CONFIG_EXTERN( kov_simulated_arm );
|
||||
MACHINE_CONFIG_EXTERN( cavepgm );
|
||||
MACHINE_CONFIG_EXTERN( pgm_arm_type1 );
|
||||
MACHINE_CONFIG_EXTERN( pgm_arm_type1_sim );
|
||||
MACHINE_CONFIG_EXTERN( pgm_arm_type1_cave );
|
||||
|
||||
INPUT_PORTS_EXTERN( sango );
|
||||
INPUT_PORTS_EXTERN( sango_ch );
|
||||
@ -223,7 +305,7 @@ INPUT_PORTS_EXTERN( kovsh );
|
||||
/*----------- defined in machine/pgmprot2.c -----------*/
|
||||
|
||||
/* emulations */
|
||||
MACHINE_CONFIG_EXTERN( kov2 );
|
||||
MACHINE_CONFIG_EXTERN( pgm_arm_type2 );
|
||||
|
||||
DRIVER_INIT( kov2 );
|
||||
DRIVER_INIT( kov2p );
|
||||
@ -241,7 +323,7 @@ INPUT_PORTS_EXTERN( dw2001 );
|
||||
|
||||
/*----------- defined in machine/pgmprot3.c -----------*/
|
||||
|
||||
MACHINE_CONFIG_EXTERN( svg );
|
||||
MACHINE_CONFIG_EXTERN( pgm_arm_type3 );
|
||||
|
||||
DRIVER_INIT( theglad );
|
||||
DRIVER_INIT( svg );
|
||||
@ -252,8 +334,8 @@ DRIVER_INIT( happy6 );
|
||||
|
||||
/*----------- defined in machine/pgmprot4.c -----------*/
|
||||
|
||||
MACHINE_CONFIG_EXTERN( killbld );
|
||||
MACHINE_CONFIG_EXTERN( dw3 );
|
||||
MACHINE_CONFIG_EXTERN( pgm_022_025_kb );
|
||||
MACHINE_CONFIG_EXTERN( pgm_022_025_dw );
|
||||
|
||||
DRIVER_INIT( killbld );
|
||||
DRIVER_INIT( drgw3 );
|
||||
@ -270,7 +352,7 @@ DRIVER_INIT( drgw2j );
|
||||
|
||||
/*----------- defined in machine/pgmprot6.c -----------*/
|
||||
|
||||
MACHINE_CONFIG_EXTERN( olds );
|
||||
MACHINE_CONFIG_EXTERN( pgm_028_025_ol );
|
||||
|
||||
DRIVER_INIT( olds );
|
||||
|
||||
|
@ -1,8 +1,10 @@
|
||||
/***********************************************************************
|
||||
PGM ASIC3 PGM protection emulation
|
||||
|
||||
these are simulations of the IGS 012 and 025 protection combination
|
||||
used on the following PGM games
|
||||
this seems similar to the IGS025? Is the physical chip ASIC3, or is
|
||||
that just what the game calls it?
|
||||
|
||||
Used by:
|
||||
|
||||
Oriental Legend
|
||||
|
||||
@ -15,7 +17,7 @@
|
||||
|
||||
static void asic3_compute_hold(running_machine &machine)
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_asic3_state *state = machine.driver_data<pgm_asic3_state>();
|
||||
|
||||
// The mode is dependent on the region
|
||||
static const int modes[4] = { 1, 1, 3, 2 };
|
||||
@ -52,7 +54,7 @@ static void asic3_compute_hold(running_machine &machine)
|
||||
|
||||
READ16_HANDLER( pgm_asic3_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_asic3_state *state = space->machine().driver_data<pgm_asic3_state>();
|
||||
UINT8 res = 0;
|
||||
/* region is supplied by the protection device */
|
||||
|
||||
@ -96,7 +98,7 @@ READ16_HANDLER( pgm_asic3_r )
|
||||
|
||||
WRITE16_HANDLER( pgm_asic3_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_asic3_state *state = space->machine().driver_data<pgm_asic3_state>();
|
||||
|
||||
if(ACCESSING_BITS_0_7)
|
||||
{
|
||||
@ -132,7 +134,7 @@ WRITE16_HANDLER( pgm_asic3_w )
|
||||
|
||||
WRITE16_HANDLER( pgm_asic3_reg_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_asic3_state *state = space->machine().driver_data<pgm_asic3_state>();
|
||||
|
||||
if(ACCESSING_BITS_0_7)
|
||||
state->m_asic3_reg = data & 0xff;
|
||||
@ -146,7 +148,7 @@ WRITE16_HANDLER( pgm_asic3_reg_w )
|
||||
|
||||
DRIVER_INIT( orlegend )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_asic3_state *state = machine.driver_data<pgm_asic3_state>();
|
||||
pgm_basic_init(machine);
|
||||
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xC0400e, 0xC0400f, FUNC(pgm_asic3_r), FUNC(pgm_asic3_w));
|
||||
@ -194,3 +196,6 @@ INPUT_PORTS_START( orld105k )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) // "incorrect version" error
|
||||
INPUT_PORTS_END
|
||||
|
||||
MACHINE_CONFIG_START( pgm_asic3, pgm_asic3_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
MACHINE_CONFIG_END
|
||||
|
@ -1,5 +1,6 @@
|
||||
/***********************************************************************
|
||||
PGM IGA027A (55857E type) ARM protection simulations & emulation
|
||||
PGM IGA027A (55857E* type) ARM protection simulations & emulation
|
||||
*guess, the part number might not be directly tied to behavior, see note below
|
||||
|
||||
these are simulations of the 'kov' type ARM device
|
||||
used by
|
||||
@ -10,8 +11,9 @@
|
||||
Photo Y2k2 (py2k2)
|
||||
Puzzle Star (puzlstar)
|
||||
|
||||
the following appear to use this scheme but are post 2001 so
|
||||
might use a newer revision of the chip with EO area
|
||||
the following appear to have the same basic behavior as the
|
||||
early '55857E' type chips, but are actually using the '55857G'
|
||||
chips, which execute only area (confirmed on ddpdoj at least)
|
||||
|
||||
DoDonPachi Dai-ou-jou (ddpdoj)
|
||||
Espgaluda (espgal)
|
||||
@ -54,68 +56,68 @@
|
||||
/**************************** EMULATION *******************************/
|
||||
/* used by photoy2k, kovsh */
|
||||
|
||||
static READ32_HANDLER( kovsh_arm7_protlatch_r )
|
||||
static READ32_HANDLER( pgm_arm7_type1_protlatch_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
space->machine().scheduler().synchronize(); // force resync
|
||||
|
||||
return (state->m_kovsh_highlatch_68k_w << 16) | (state->m_kovsh_lowlatch_68k_w);
|
||||
return (state->m_pgm_arm_type1_highlatch_68k_w << 16) | (state->m_pgm_arm_type1_lowlatch_68k_w);
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER( kovsh_arm7_protlatch_w )
|
||||
static WRITE32_HANDLER( pgm_arm7_type1_protlatch_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
space->machine().scheduler().synchronize(); // force resync
|
||||
|
||||
if (ACCESSING_BITS_16_31)
|
||||
{
|
||||
state->m_kovsh_highlatch_arm_w = data >> 16;
|
||||
state->m_kovsh_highlatch_68k_w = 0;
|
||||
state->m_pgm_arm_type1_highlatch_arm_w = data >> 16;
|
||||
state->m_pgm_arm_type1_highlatch_68k_w = 0;
|
||||
}
|
||||
if (ACCESSING_BITS_0_15)
|
||||
{
|
||||
state->m_kovsh_lowlatch_arm_w = data;
|
||||
state->m_kovsh_lowlatch_68k_w = 0;
|
||||
state->m_pgm_arm_type1_lowlatch_arm_w = data;
|
||||
state->m_pgm_arm_type1_lowlatch_68k_w = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static READ16_HANDLER( kovsh_68k_protlatch_r )
|
||||
static READ16_HANDLER( pgm_arm7_type1_68k_protlatch_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
space->machine().scheduler().synchronize(); // force resync
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 1: return state->m_kovsh_highlatch_arm_w;
|
||||
case 0: return state->m_kovsh_lowlatch_arm_w;
|
||||
case 1: return state->m_pgm_arm_type1_highlatch_arm_w;
|
||||
case 0: return state->m_pgm_arm_type1_lowlatch_arm_w;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( kovsh_68k_protlatch_w )
|
||||
static WRITE16_HANDLER( pgm_arm7_type1_68k_protlatch_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
space->machine().scheduler().synchronize(); // force resync
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 1:
|
||||
state->m_kovsh_highlatch_68k_w = data;
|
||||
state->m_pgm_arm_type1_highlatch_68k_w = data;
|
||||
break;
|
||||
|
||||
case 0:
|
||||
state->m_kovsh_lowlatch_68k_w = data;
|
||||
state->m_pgm_arm_type1_lowlatch_68k_w = data;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static READ16_HANDLER( kovsh_arm7_ram_r )
|
||||
static READ16_HANDLER( pgm_arm7_type1_ram_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
UINT16 *share16 = (UINT16 *)state->m_arm7_shareram;
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
@ -123,9 +125,9 @@ static READ16_HANDLER( kovsh_arm7_ram_r )
|
||||
return share16[BYTE_XOR_LE(offset << 1)];
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( kovsh_arm7_ram_w )
|
||||
static WRITE16_HANDLER( pgm_arm7_type1_ram_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
UINT16 *share16 = (UINT16 *)state->m_arm7_shareram;
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
@ -136,29 +138,29 @@ static WRITE16_HANDLER( kovsh_arm7_ram_w )
|
||||
|
||||
|
||||
|
||||
static READ32_HANDLER( kovsh_arm7_unk_r )
|
||||
static READ32_HANDLER( pgm_arm7_type1_unk_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
return state->m_kovsh_counter++;
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
return state->m_pgm_arm_type1_counter++;
|
||||
}
|
||||
|
||||
static READ32_HANDLER( kovsh_exrom_r )
|
||||
static READ32_HANDLER( pgm_arm7_type1_exrom_r )
|
||||
{
|
||||
return 0x00000000;
|
||||
}
|
||||
|
||||
static READ32_HANDLER( arm7_shareram_r )
|
||||
static READ32_HANDLER( pgm_arm7_type1_shareram_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, cpu_get_pc(&space->device()));
|
||||
return state->m_arm7_shareram[offset];
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER( arm7_shareram_w )
|
||||
static WRITE32_HANDLER( pgm_arm7_type1_shareram_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, cpu_get_pc(&space->device()));
|
||||
@ -171,30 +173,23 @@ static WRITE32_HANDLER( arm7_shareram_w )
|
||||
static ADDRESS_MAP_START( kov_map, AS_PROGRAM, 16)
|
||||
AM_IMPORT_FROM(pgm_mem)
|
||||
AM_RANGE(0x100000, 0x4effff) AM_ROMBANK("bank1") /* Game ROM */
|
||||
AM_RANGE(0x4f0000, 0x4f003f) AM_READWRITE(kovsh_arm7_ram_r, kovsh_arm7_ram_w) /* ARM7 Shared RAM */
|
||||
AM_RANGE(0x500000, 0x500005) AM_READWRITE(kovsh_68k_protlatch_r, kovsh_68k_protlatch_w) /* ARM7 Latch */
|
||||
AM_RANGE(0x4f0000, 0x4f003f) AM_READWRITE(pgm_arm7_type1_ram_r, pgm_arm7_type1_ram_w) /* ARM7 Shared RAM */
|
||||
AM_RANGE(0x500000, 0x500005) AM_READWRITE(pgm_arm7_type1_68k_protlatch_r, pgm_arm7_type1_68k_protlatch_w) /* ARM7 Latch */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( 55857E_arm7_map, AS_PROGRAM, 32 )
|
||||
AM_RANGE(0x00000000, 0x00003fff) AM_ROM
|
||||
AM_RANGE(0x08100000, 0x083fffff) AM_READ(kovsh_exrom_r) // unpopulated, returns 0 to keep checksum happy
|
||||
AM_RANGE(0x08100000, 0x083fffff) AM_READ(pgm_arm7_type1_exrom_r) // unpopulated, returns 0 to keep checksum happy
|
||||
AM_RANGE(0x10000000, 0x100003ff) AM_RAM // internal ram for asic
|
||||
AM_RANGE(0x40000000, 0x40000003) AM_READWRITE(kovsh_arm7_protlatch_r, kovsh_arm7_protlatch_w)
|
||||
AM_RANGE(0x40000000, 0x40000003) AM_READWRITE(pgm_arm7_type1_protlatch_r, pgm_arm7_type1_protlatch_w)
|
||||
AM_RANGE(0x40000008, 0x4000000b) AM_WRITENOP // ?
|
||||
AM_RANGE(0x4000000c, 0x4000000f) AM_READ(kovsh_arm7_unk_r)
|
||||
AM_RANGE(0x50800000, 0x5080003f) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE_MEMBER(pgm_state, m_arm7_shareram)
|
||||
AM_RANGE(0x4000000c, 0x4000000f) AM_READ(pgm_arm7_type1_unk_r)
|
||||
AM_RANGE(0x50800000, 0x5080003f) AM_READWRITE(pgm_arm7_type1_shareram_r, pgm_arm7_type1_shareram_w) AM_BASE_MEMBER(pgm_arm_type1_state, m_arm7_shareram)
|
||||
AM_RANGE(0x50000000, 0x500003ff) AM_RAM // uploads xor table to decrypt 68k rom here
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_DERIVED( kov, pgm )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(kov_map)
|
||||
|
||||
/* protection CPU */
|
||||
MCFG_CPU_ADD("prot", ARM7, 20000000) // 55857E?
|
||||
MCFG_CPU_PROGRAM_MAP(55857E_arm7_map)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/**************************** SIMULATIONS *****************************/
|
||||
|
||||
@ -210,87 +205,74 @@ static ADDRESS_MAP_START( cavepgm_mem, AS_PROGRAM, 16)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static MACHINE_START( cavepgm )
|
||||
static MACHINE_START( pgm_arm_type1 )
|
||||
{
|
||||
MACHINE_START_CALL(pgm);
|
||||
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
|
||||
state->m_prot = machine.device<cpu_device>("prot");
|
||||
|
||||
state->save_item(NAME(state->m_value0));
|
||||
state->save_item(NAME(state->m_value1));
|
||||
state->save_item(NAME(state->m_valuekey));
|
||||
state->save_item(NAME(state->m_valueresponse));
|
||||
state->save_item(NAME(state->m_ddp3internal_slot));
|
||||
state->save_item(NAME(state->m_ddp3slots));
|
||||
state->save_item(NAME(state->m_curslots));
|
||||
state->save_item(NAME(state->m_slots));
|
||||
}
|
||||
|
||||
MACHINE_CONFIG_START( cavepgm, pgm_kovarmsim_state )
|
||||
MACHINE_CONFIG_START( pgm_arm_type1_cave, pgm_arm_type1_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, 20000000)
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(cavepgm_mem)
|
||||
MCFG_TIMER_ADD_SCANLINE("scantimer", pgm_interrupt, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("soundcpu", Z80, 33868800/4)
|
||||
MCFG_CPU_PROGRAM_MAP(pgm_z80_mem)
|
||||
MCFG_CPU_IO_MAP(pgm_z80_io)
|
||||
|
||||
MCFG_MACHINE_START( cavepgm )
|
||||
MCFG_MACHINE_RESET( pgm )
|
||||
MCFG_NVRAM_ADD_0FILL("sram")
|
||||
|
||||
MCFG_V3021_ADD("rtc")
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_MACHINE_START( pgm_arm_type1 )
|
||||
|
||||
MCFG_SCREEN_MODIFY("screen")
|
||||
MCFG_SCREEN_REFRESH_RATE(59.17) // verified on pcb
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MCFG_SCREEN_SIZE(64*8, 64*8)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0*8, 56*8-1, 0*8, 28*8-1)
|
||||
MCFG_SCREEN_UPDATE_STATIC(pgm)
|
||||
MCFG_SCREEN_VBLANK_STATIC(pgm)
|
||||
|
||||
MCFG_GFXDECODE(pgm)
|
||||
MCFG_PALETTE_LENGTH(0x1200/2)
|
||||
|
||||
MCFG_VIDEO_START(pgm)
|
||||
|
||||
/*sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
MCFG_ICS2115_ADD("ics", 0, pgm_sound_irq)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 5.0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
MACHINE_CONFIG_DERIVED( kov_simulated_arm, cavepgm )
|
||||
MACHINE_CONFIG_DERIVED( pgm_arm_type1_sim, pgm_arm_type1_cave )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(kov_sim_map)
|
||||
|
||||
/* protection CPU */
|
||||
MCFG_CPU_ADD("prot", ARM7, 20000000) // 55857E?
|
||||
MCFG_CPU_ADD("prot", ARM7, 20000000 ) // 55857E?
|
||||
MCFG_CPU_PROGRAM_MAP(55857E_arm7_map)
|
||||
MCFG_DEVICE_DISABLE()
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
void kovsh_latch_init( running_machine &machine )
|
||||
MACHINE_CONFIG_DERIVED( pgm_arm_type1, pgm_arm_type1_cave )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(kov_map)
|
||||
|
||||
/* protection CPU */
|
||||
MCFG_CPU_ADD("prot", ARM7, 20000000) // 55857E?
|
||||
MCFG_CPU_PROGRAM_MAP(55857E_arm7_map)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
void pgm_arm7_type1_latch_init( running_machine &machine )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
|
||||
state->m_kovsh_highlatch_arm_w = 0;
|
||||
state->m_kovsh_lowlatch_arm_w = 0;
|
||||
state->m_kovsh_highlatch_68k_w = 0;
|
||||
state->m_kovsh_lowlatch_68k_w = 0;
|
||||
state->m_kovsh_counter = 1;
|
||||
state->m_pgm_arm_type1_highlatch_arm_w = 0;
|
||||
state->m_pgm_arm_type1_lowlatch_arm_w = 0;
|
||||
state->m_pgm_arm_type1_highlatch_68k_w = 0;
|
||||
state->m_pgm_arm_type1_lowlatch_68k_w = 0;
|
||||
state->m_pgm_arm_type1_counter = 1;
|
||||
|
||||
state->save_item(NAME(state->m_kovsh_highlatch_arm_w));
|
||||
state->save_item(NAME(state->m_kovsh_lowlatch_arm_w));
|
||||
state->save_item(NAME(state->m_kovsh_highlatch_68k_w));
|
||||
state->save_item(NAME(state->m_kovsh_lowlatch_68k_w));
|
||||
state->save_item(NAME(state->m_kovsh_counter));
|
||||
state->save_item(NAME(state->m_pgm_arm_type1_highlatch_arm_w));
|
||||
state->save_item(NAME(state->m_pgm_arm_type1_lowlatch_arm_w));
|
||||
state->save_item(NAME(state->m_pgm_arm_type1_highlatch_68k_w));
|
||||
state->save_item(NAME(state->m_pgm_arm_type1_lowlatch_68k_w));
|
||||
state->save_item(NAME(state->m_pgm_arm_type1_counter));
|
||||
}
|
||||
|
||||
static READ16_HANDLER( kovsh_fake_region_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
int regionhack = input_port_read(space->machine(), "RegionHack");
|
||||
if (regionhack != 0xff) return regionhack;
|
||||
|
||||
@ -303,7 +285,7 @@ DRIVER_INIT( photoy2k )
|
||||
{
|
||||
pgm_basic_init(machine);
|
||||
pgm_photoy2k_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
|
||||
}
|
||||
@ -312,7 +294,7 @@ DRIVER_INIT( kovsh )
|
||||
{
|
||||
pgm_basic_init(machine);
|
||||
pgm_kovsh_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
|
||||
}
|
||||
@ -321,7 +303,7 @@ DRIVER_INIT( kovshp )
|
||||
{
|
||||
pgm_basic_init(machine);
|
||||
pgm_kovshp_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
|
||||
}
|
||||
@ -428,7 +410,7 @@ DRIVER_INIT( kovlsqh2 )
|
||||
|
||||
pgm_decode_kovlsqh2_samples(machine);
|
||||
pgm_basic_init(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
|
||||
}
|
||||
@ -449,7 +431,7 @@ DRIVER_INIT( kovqhsgs )
|
||||
|
||||
pgm_decode_kovlsqh2_samples(machine);
|
||||
pgm_basic_init(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
/* we only have a china internal ROM dumped for now.. allow region to be changed for debugging (to ensure all alt titles / regions can be seen) */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0008, 0x4f0009, FUNC(kovsh_fake_region_r));
|
||||
}
|
||||
@ -463,9 +445,9 @@ DRIVER_INIT( kovqhsgs )
|
||||
bp A71A0,1,{d0=0x12;g}
|
||||
*/
|
||||
|
||||
static READ16_HANDLER( ddp3_asic_r )
|
||||
static READ16_HANDLER( pgm_arm7_type1_sim_r )
|
||||
{
|
||||
pgm_kovarmsim_state *state = space->machine().driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
if (offset == 0)
|
||||
{
|
||||
@ -490,7 +472,7 @@ static READ16_HANDLER( ddp3_asic_r )
|
||||
}
|
||||
|
||||
/* working */
|
||||
void command_handler_ddp3(pgm_kovarmsim_state *state, int pc)
|
||||
void command_handler_ddp3(pgm_arm_type1_state *state, int pc)
|
||||
{
|
||||
switch (state->m_ddp3lastcommand)
|
||||
{
|
||||
@ -501,28 +483,28 @@ void command_handler_ddp3(pgm_kovarmsim_state *state, int pc)
|
||||
|
||||
case 0x40:
|
||||
state->m_valueresponse = 0x880000;
|
||||
state->m_ddp3slots[(state->m_value0>>10)&0x1F]=
|
||||
(state->m_ddp3slots[(state->m_value0>>5)&0x1F]+
|
||||
state->m_ddp3slots[(state->m_value0>>0)&0x1F])&0xffffff;
|
||||
state->m_slots[(state->m_value0>>10)&0x1F]=
|
||||
(state->m_slots[(state->m_value0>>5)&0x1F]+
|
||||
state->m_slots[(state->m_value0>>0)&0x1F])&0xffffff;
|
||||
break;
|
||||
|
||||
case 0x67: // set high bits
|
||||
// printf("%06x command %02x | %04x\n", cpu_get_pc(&space->device()), state->m_ddp3lastcommand, state->m_value0);
|
||||
state->m_valueresponse = 0x880000;
|
||||
state->m_ddp3internal_slot = (state->m_value0 & 0xff00)>>8;
|
||||
state->m_ddp3slots[state->m_ddp3internal_slot] = (state->m_value0 & 0x00ff) << 16;
|
||||
state->m_curslots = (state->m_value0 & 0xff00)>>8;
|
||||
state->m_slots[state->m_curslots] = (state->m_value0 & 0x00ff) << 16;
|
||||
break;
|
||||
|
||||
case 0xe5: // set low bits for operation?
|
||||
// printf("%06x command %02x | %04x\n", cpu_get_pc(&space->device()), state->m_ddp3lastcommand, state->m_value0);
|
||||
state->m_valueresponse = 0x880000;
|
||||
state->m_ddp3slots[state->m_ddp3internal_slot] |= (state->m_value0 & 0xffff);
|
||||
state->m_slots[state->m_curslots] |= (state->m_value0 & 0xffff);
|
||||
break;
|
||||
|
||||
|
||||
case 0x8e: // read back result of operations
|
||||
// printf("%06x command %02x | %04x\n", cpu_get_pc(&space->device()), state->m_ddp3lastcommand, state->m_value0);
|
||||
state->m_valueresponse = state->m_ddp3slots[state->m_value0&0xff];
|
||||
state->m_valueresponse = state->m_slots[state->m_value0&0xff];
|
||||
break;
|
||||
|
||||
|
||||
@ -535,8 +517,8 @@ void command_handler_ddp3(pgm_kovarmsim_state *state, int pc)
|
||||
}
|
||||
|
||||
/* preliminary */
|
||||
static INT32 puzzli_54_trigger = 0;
|
||||
void command_handler_puzzli2(pgm_kovarmsim_state *state, int pc)
|
||||
|
||||
void command_handler_puzzli2(pgm_arm_type1_state *state, int pc)
|
||||
{
|
||||
printf("%08x: %02x %04x\n",pc, state->m_ddp3lastcommand, state->m_value0);
|
||||
|
||||
@ -551,7 +533,7 @@ void command_handler_puzzli2(pgm_kovarmsim_state *state, int pc)
|
||||
// how is this selected? command 54?
|
||||
|
||||
// just a wild guess
|
||||
if (puzzli_54_trigger) {
|
||||
if (state->m_puzzli_54_trigger) {
|
||||
// pc == 1387de
|
||||
state->m_valueresponse = 0x63<<16; // ?
|
||||
} else {
|
||||
@ -559,14 +541,14 @@ void command_handler_puzzli2(pgm_kovarmsim_state *state, int pc)
|
||||
state->m_valueresponse = 0xd2<<16;
|
||||
}
|
||||
|
||||
puzzli_54_trigger = 0;
|
||||
state->m_puzzli_54_trigger = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x38: // Reset
|
||||
state->m_valueresponse = 0x78<<16;
|
||||
state->m_valuekey = 0x100;
|
||||
puzzli_54_trigger = 0;
|
||||
state->m_puzzli_54_trigger = 0;
|
||||
break;
|
||||
|
||||
case 0x41: // ASIC status?
|
||||
@ -590,7 +572,7 @@ void command_handler_puzzli2(pgm_kovarmsim_state *state, int pc)
|
||||
break;
|
||||
|
||||
case 0x54: // ??
|
||||
puzzli_54_trigger = 1;
|
||||
state->m_puzzli_54_trigger = 1;
|
||||
state->m_valueresponse = 0x36<<16;
|
||||
break;
|
||||
|
||||
@ -613,7 +595,7 @@ void command_handler_puzzli2(pgm_kovarmsim_state *state, int pc)
|
||||
}
|
||||
|
||||
/* preliminary */
|
||||
void command_handler_py2k2(pgm_kovarmsim_state *state, int pc)
|
||||
void command_handler_py2k2(pgm_arm_type1_state *state, int pc)
|
||||
{
|
||||
switch (state->m_ddp3lastcommand)
|
||||
{
|
||||
@ -732,7 +714,7 @@ static const int pstar_80[0x1a3]={
|
||||
0x00,0x00,0x00
|
||||
};
|
||||
|
||||
void command_handler_pstars(pgm_kovarmsim_state *state, int pc)
|
||||
void command_handler_pstars(pgm_arm_type1_state *state, int pc)
|
||||
{
|
||||
switch (state->m_ddp3lastcommand)
|
||||
{
|
||||
@ -754,12 +736,12 @@ void command_handler_pstars(pgm_kovarmsim_state *state, int pc)
|
||||
break;
|
||||
|
||||
case 0xb1:
|
||||
state->m_pstar_b1 = state->m_value0;
|
||||
state->m_pstar_b1_value = state->m_value0;
|
||||
state->m_valueresponse = 0x890000;
|
||||
break;
|
||||
|
||||
case 0xbf:
|
||||
state->m_valueresponse = state->m_pstar_b1 * state->m_value0;
|
||||
state->m_valueresponse = state->m_pstar_b1_value * state->m_value0;
|
||||
break;
|
||||
|
||||
case 0xc1: //TODO:TIMER 0,1,2,FIX TO 0 should be OK?
|
||||
@ -767,30 +749,30 @@ void command_handler_pstars(pgm_kovarmsim_state *state, int pc)
|
||||
break;
|
||||
|
||||
case 0xce: //TODO:TIMER 0,1,2
|
||||
state->m_pstar_ce = state->m_value0;
|
||||
state->m_pstar_ce_value = state->m_value0;
|
||||
state->m_valueresponse=0x890000;
|
||||
break;
|
||||
|
||||
case 0xcf: //TODO:TIMER 0,1,2
|
||||
state->m_extra_ram[state->m_pstar_ce] = state->m_value0;
|
||||
state->m_extra_ram[state->m_pstar_ce_value] = state->m_value0;
|
||||
state->m_valueresponse = 0x890000;
|
||||
break;
|
||||
|
||||
case 0xe7:
|
||||
state->m_pstar_e7 = (state->m_value0 >> 12) & 0xf;
|
||||
state->m_ddp3slots[state->m_pstar_e7] &= 0xffff;
|
||||
state->m_ddp3slots[state->m_pstar_e7] |= (state->m_value0 & 0xff) << 16;
|
||||
state->m_pstar_e7_value = (state->m_value0 >> 12) & 0xf;
|
||||
state->m_slots[state->m_pstar_e7_value] &= 0xffff;
|
||||
state->m_slots[state->m_pstar_e7_value] |= (state->m_value0 & 0xff) << 16;
|
||||
state->m_valueresponse = 0x890000;
|
||||
break;
|
||||
|
||||
case 0xe5:
|
||||
state->m_ddp3slots[state->m_pstar_e7] &= 0xff0000;
|
||||
state->m_ddp3slots[state->m_pstar_e7] |= state->m_value0;
|
||||
state->m_slots[state->m_pstar_e7_value] &= 0xff0000;
|
||||
state->m_slots[state->m_pstar_e7_value] |= state->m_value0;
|
||||
state->m_valueresponse = 0x890000;
|
||||
break;
|
||||
|
||||
case 0xf8: //@73C
|
||||
state->m_valueresponse = state->m_ddp3slots[state->m_value0 & 0xf] & 0xffffff;
|
||||
state->m_valueresponse = state->m_slots[state->m_value0 & 0xf] & 0xffffff;
|
||||
break;
|
||||
|
||||
case 0xba:
|
||||
@ -841,13 +823,8 @@ static const UINT8 kov_BATABLE[0x40] = {
|
||||
|
||||
static const UINT8 kov_B0TABLE[16] = { 2, 0, 1, 4, 3 }; // Maps char portraits to tables
|
||||
|
||||
static UINT32 kov_slots[16];
|
||||
static UINT16 kov_internal_slot;
|
||||
static UINT16 kov_c0_value;
|
||||
static UINT16 kov_cb_value;
|
||||
static UINT16 kov_fe_value;
|
||||
|
||||
void command_handler_kov(pgm_kovarmsim_state *state, int pc)
|
||||
void command_handler_kov(pgm_arm_type1_state *state, int pc)
|
||||
{
|
||||
switch (state->m_ddp3lastcommand)
|
||||
{
|
||||
@ -880,7 +857,7 @@ void command_handler_kov(pgm_kovarmsim_state *state, int pc)
|
||||
|
||||
if (state->m_value0 == 0x0102) state->m_value0 = 0x0100; // why?
|
||||
|
||||
kov_slots[(state->m_value0 >> 8) & 0x0f] = kov_slots[(state->m_value0 >> 0) & 0x0f];
|
||||
state->m_slots[(state->m_value0 >> 8) & 0x0f] = state->m_slots[(state->m_value0 >> 0) & 0x0f];
|
||||
}
|
||||
break;
|
||||
|
||||
@ -890,21 +867,21 @@ void command_handler_kov(pgm_kovarmsim_state *state, int pc)
|
||||
|
||||
case 0xc0: // Text layer 'x' select
|
||||
state->m_valueresponse = 0x880000;
|
||||
kov_c0_value = state->m_value0;
|
||||
state->m_kov_c0_value = state->m_value0;
|
||||
break;
|
||||
|
||||
case 0xc3: // Text layer offset
|
||||
state->m_valueresponse = 0x904000 + ((kov_c0_value + (state->m_value0 * 0x40)) * 4);
|
||||
state->m_valueresponse = 0x904000 + ((state->m_kov_c0_value + (state->m_value0 * 0x40)) * 4);
|
||||
break;
|
||||
|
||||
case 0xcb: // Background layer 'x' select
|
||||
state->m_valueresponse = 0x880000;
|
||||
kov_cb_value = state->m_value0;
|
||||
state->m_kov_cb_value = state->m_value0;
|
||||
break;
|
||||
|
||||
case 0xcc: // Background layer offset
|
||||
if (state->m_value0 & 0x400) state->m_value0 = -(0x400 - (state->m_value0 & 0x3ff));
|
||||
state->m_valueresponse = 0x900000 + ((kov_cb_value + (state->m_value0 * 0x40)) * 4);
|
||||
state->m_valueresponse = 0x900000 + ((state->m_kov_cb_value + (state->m_value0 * 0x40)) * 4);
|
||||
break;
|
||||
|
||||
case 0xd0: // Text palette offset
|
||||
@ -914,7 +891,7 @@ void command_handler_kov(pgm_kovarmsim_state *state, int pc)
|
||||
|
||||
case 0xd6: // Copy slot to slot 0
|
||||
state->m_valueresponse = 0x880000;
|
||||
kov_slots[0] = kov_slots[state->m_value0 & 0x0f];
|
||||
state->m_slots[0] = state->m_slots[state->m_value0 & 0x0f];
|
||||
break;
|
||||
|
||||
case 0xdc: // Background palette offset
|
||||
@ -931,18 +908,18 @@ void command_handler_kov(pgm_kovarmsim_state *state, int pc)
|
||||
{
|
||||
state->m_valueresponse = 0x880000;
|
||||
|
||||
INT32 sel = (kov_internal_slot >> 12) & 0x0f;
|
||||
kov_slots[sel] = (kov_slots[sel] & 0x00ff0000) | ((state->m_value0 & 0xffff) << 0);
|
||||
INT32 sel = (state->m_curslots >> 12) & 0x0f;
|
||||
state->m_slots[sel] = (state->m_slots[sel] & 0x00ff0000) | ((state->m_value0 & 0xffff) << 0);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0xe7: // Write slot (and slot select) (high)
|
||||
{
|
||||
state->m_valueresponse = 0x880000;
|
||||
kov_internal_slot = state->m_value0;
|
||||
state->m_curslots = state->m_value0;
|
||||
|
||||
INT32 sel = (kov_internal_slot >> 12) & 0x0f;
|
||||
kov_slots[sel] = (kov_slots[sel] & 0x0000ffff) | ((state->m_value0 & 0x00ff) << 16);
|
||||
INT32 sel = (state->m_curslots >> 12) & 0x0f;
|
||||
state->m_slots[sel] = (state->m_slots[sel] & 0x0000ffff) | ((state->m_value0 & 0x00ff) << 16);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -952,16 +929,16 @@ void command_handler_kov(pgm_kovarmsim_state *state, int pc)
|
||||
|
||||
case 0xf8: // Read slot
|
||||
case 0xab: // kovsgqyz (f8)
|
||||
state->m_valueresponse = kov_slots[state->m_value0 & 0x0f] & 0x00ffffff;
|
||||
state->m_valueresponse = state->m_slots[state->m_value0 & 0x0f] & 0x00ffffff;
|
||||
break;
|
||||
|
||||
case 0xfc: // Adjust damage level to char experience level
|
||||
state->m_valueresponse = (state->m_value0 * kov_fe_value) >> 6;
|
||||
state->m_valueresponse = (state->m_value0 * state->m_kov_fe_value) >> 6;
|
||||
break;
|
||||
|
||||
case 0xfe: // Damage level adjust
|
||||
state->m_valueresponse = 0x880000;
|
||||
kov_fe_value = state->m_value0;
|
||||
state->m_kov_fe_value = state->m_value0;
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -1127,7 +1104,7 @@ static const int oldsplus_8c[0x20]={
|
||||
};
|
||||
|
||||
|
||||
void command_handler_oldsplus(pgm_kovarmsim_state *state, int pc)
|
||||
void command_handler_oldsplus(pgm_arm_type1_state *state, int pc)
|
||||
{
|
||||
switch (state->m_ddp3lastcommand)
|
||||
{
|
||||
@ -1189,27 +1166,27 @@ void command_handler_oldsplus(pgm_kovarmsim_state *state, int pc)
|
||||
switch (state->m_extra_ram[0xe7])
|
||||
{
|
||||
case 0xb000:
|
||||
state->m_ddp3slots[0xb] = state->m_value0;
|
||||
state->m_ddp3slots[0xc] = 0;
|
||||
state->m_slots[0xb] = state->m_value0;
|
||||
state->m_slots[0xc] = 0;
|
||||
break;
|
||||
|
||||
case 0xc000:
|
||||
state->m_ddp3slots[0xc] = state->m_value0;
|
||||
state->m_slots[0xc] = state->m_value0;
|
||||
break;
|
||||
|
||||
case 0xd000:
|
||||
state->m_ddp3slots[0xd] = state->m_value0;
|
||||
state->m_slots[0xd] = state->m_value0;
|
||||
break;
|
||||
|
||||
case 0xf000:
|
||||
state->m_ddp3slots[0xf] = state->m_value0;
|
||||
state->m_slots[0xf] = state->m_value0;
|
||||
break;
|
||||
}
|
||||
state->m_valueresponse = 0x990000;
|
||||
break;
|
||||
|
||||
case 0xf8:
|
||||
state->m_valueresponse = state->m_ddp3slots[state->m_value0];
|
||||
state->m_valueresponse = state->m_slots[state->m_value0];
|
||||
break;
|
||||
|
||||
case 0xfc:
|
||||
@ -1217,17 +1194,17 @@ void command_handler_oldsplus(pgm_kovarmsim_state *state, int pc)
|
||||
break;
|
||||
|
||||
case 0xc5:
|
||||
state->m_ddp3slots[0xd] --;
|
||||
state->m_slots[0xd] --;
|
||||
state->m_valueresponse = 0x990000;
|
||||
break;
|
||||
|
||||
case 0xd6:
|
||||
state->m_ddp3slots[0xb] ++;
|
||||
state->m_slots[0xb] ++;
|
||||
state->m_valueresponse = 0x990000;
|
||||
break;
|
||||
|
||||
case 0x3a:
|
||||
state->m_ddp3slots[0xf] = 0;
|
||||
state->m_slots[0xf] = 0;
|
||||
state->m_valueresponse = 0x990000;
|
||||
break;
|
||||
|
||||
@ -1298,9 +1275,9 @@ void command_handler_oldsplus(pgm_kovarmsim_state *state, int pc)
|
||||
}
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( ddp3_asic_w )
|
||||
static WRITE16_HANDLER( pgm_arm7_type1_sim_w )
|
||||
{
|
||||
pgm_kovarmsim_state *state = space->machine().driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
int pc = cpu_get_pc(&space->device());
|
||||
|
||||
if (offset == 0)
|
||||
@ -1335,31 +1312,17 @@ static WRITE16_HANDLER( ddp3_asic_w )
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER( sango_protram_r )
|
||||
static READ16_HANDLER( pgm_arm7_type1_sim_protram_r )
|
||||
{
|
||||
// at offset == 4 is region (supplied by device)
|
||||
// 0 = china
|
||||
// 1 = taiwan
|
||||
// 2 = japan
|
||||
// 3 = korea
|
||||
// 4 = hong kong
|
||||
// 5 = world
|
||||
|
||||
if (offset == 4)
|
||||
return input_port_read(space->machine(), "Region");
|
||||
|
||||
// otherwise it doesn't seem to use the ram for anything important, we return 0 to avoid test mode corruption
|
||||
// kovplus reads from offset 000e a lot ... why?
|
||||
#ifdef MAME_DEBUG
|
||||
popmessage ("protection ram r %04x",offset);
|
||||
#endif
|
||||
return 0x0000;
|
||||
}
|
||||
|
||||
static READ16_HANDLER( pstars_protram_r )
|
||||
static READ16_HANDLER( pstars_arm7_type1_sim_protram_r )
|
||||
{
|
||||
pgm_kovarmsim_state *state = space->machine().driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
|
||||
|
||||
if (offset == 4) //region
|
||||
return input_port_read(space->machine(), "Region");
|
||||
@ -1372,142 +1335,124 @@ static READ16_HANDLER( pstars_protram_r )
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER( puzzli2_protram_r )
|
||||
{
|
||||
if (offset == 4)
|
||||
return input_port_read(space->machine(), "Region");
|
||||
|
||||
printf("%06x puzzli2_protram_r %02x\n", cpu_get_pc(&space->device()), offset);
|
||||
|
||||
return 0x0000;
|
||||
}
|
||||
|
||||
static READ16_HANDLER( oldsplus_protram_r )
|
||||
{
|
||||
if (offset == 4)
|
||||
return input_port_read(space->machine(), "Region");
|
||||
|
||||
return 0x0000;
|
||||
}
|
||||
|
||||
DRIVER_INIT( ddp3 )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine, false);
|
||||
pgm_py2k2_decrypt(machine); // yes, it's the same as photo y2k2
|
||||
state->arm_sim_handler = command_handler_ddp3;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
}
|
||||
|
||||
DRIVER_INIT( ket )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine, false);
|
||||
pgm_ket_decrypt(machine);
|
||||
state->arm_sim_handler = command_handler_ddp3;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x400000, 0x400005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x400000, 0x400005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
}
|
||||
|
||||
DRIVER_INIT( espgal )
|
||||
{
|
||||
pgm_basic_init(machine, false);
|
||||
pgm_espgal_decrypt(machine);
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
state->arm_sim_handler = command_handler_ddp3;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x400000, 0x400005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x400000, 0x400005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
}
|
||||
|
||||
DRIVER_INIT( puzzli2 )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine);
|
||||
pgm_puzzli2_decrypt(machine);
|
||||
state->arm_sim_handler = command_handler_puzzli2;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(puzzli2_protram_r));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
|
||||
state->m_irq4_disabled = 1; // // doesn't like this irq??
|
||||
}
|
||||
|
||||
DRIVER_INIT( py2k2 )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine);
|
||||
pgm_py2k2_decrypt(machine);
|
||||
state->arm_sim_handler = command_handler_py2k2;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(puzzli2_protram_r));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
|
||||
}
|
||||
|
||||
DRIVER_INIT( pstar )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
|
||||
pgm_basic_init(machine);
|
||||
pgm_pstar_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
|
||||
state->m_pstar_e7 = 0;
|
||||
state->m_pstar_b1 = 0;
|
||||
state->m_pstar_ce = 0;
|
||||
state->m_pstar_e7_value = 0;
|
||||
state->m_pstar_b1_value = 0;
|
||||
state->m_pstar_ce_value = 0;
|
||||
state->m_extra_ram[0] = 0;
|
||||
state->m_extra_ram[1] = 0;
|
||||
state->m_extra_ram[2] = 0;
|
||||
memset(state->m_ddp3slots, 0, 16);
|
||||
memset(state->m_slots, 0, 16);
|
||||
|
||||
state->arm_sim_handler = command_handler_pstars;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pstars_protram_r));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pstars_arm7_type1_sim_protram_r));
|
||||
|
||||
state->save_item(NAME(state->m_pstar_e7));
|
||||
state->save_item(NAME(state->m_pstar_b1));
|
||||
state->save_item(NAME(state->m_pstar_ce));
|
||||
state->save_item(NAME(state->m_pstar_e7_value));
|
||||
state->save_item(NAME(state->m_pstar_b1_value));
|
||||
state->save_item(NAME(state->m_pstar_ce_value));
|
||||
state->save_item(NAME(state->m_extra_ram));
|
||||
}
|
||||
|
||||
DRIVER_INIT( kov )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine);
|
||||
pgm_kov_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
kov_internal_slot = 0;
|
||||
kov_c0_value = 0;
|
||||
kov_cb_value = 0;
|
||||
kov_fe_value = 0;
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
state->m_curslots = 0;
|
||||
state->m_kov_c0_value = 0;
|
||||
state->m_kov_cb_value = 0;
|
||||
state->m_kov_fe_value = 0;
|
||||
state->arm_sim_handler = command_handler_kov;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(sango_protram_r));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
|
||||
}
|
||||
|
||||
DRIVER_INIT( kovboot )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine);
|
||||
// pgm_kov_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
kov_internal_slot = 0;
|
||||
kov_c0_value = 0;
|
||||
kov_cb_value = 0;
|
||||
kov_fe_value = 0;
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
state->m_curslots = 0;
|
||||
state->m_kov_c0_value = 0;
|
||||
state->m_kov_cb_value = 0;
|
||||
state->m_kov_fe_value = 0;
|
||||
state->arm_sim_handler = command_handler_kov;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(sango_protram_r));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
|
||||
|
||||
}
|
||||
|
||||
DRIVER_INIT( oldsplus )
|
||||
{
|
||||
pgm_kovarmsim_state *state = machine.driver_data<pgm_kovarmsim_state>();
|
||||
pgm_arm_type1_state *state = machine.driver_data<pgm_arm_type1_state>();
|
||||
pgm_basic_init(machine);
|
||||
pgm_oldsplus_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
pgm_arm7_type1_latch_init(machine);
|
||||
memset(state->m_extra_ram, 0, 0x100);
|
||||
memset(state->m_ddp3slots, 0, 0x100);
|
||||
memset(state->m_slots, 0, 0x100);
|
||||
state->arm_sim_handler = command_handler_oldsplus;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(ddp3_asic_r), FUNC(ddp3_asic_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(oldsplus_protram_r));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x500000, 0x500005, FUNC(pgm_arm7_type1_sim_r), FUNC(pgm_arm7_type1_sim_w));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x4f0000, 0x4f003f, FUNC(pgm_arm7_type1_sim_protram_r));
|
||||
state_save_register_global_array(machine, state->m_extra_ram);
|
||||
state_save_register_global_array(machine, state->m_ddp3slots);
|
||||
state_save_register_global_array(machine, state->m_slots);
|
||||
}
|
||||
|
||||
INPUT_PORTS_START( photoy2k )
|
||||
|
@ -1,5 +1,6 @@
|
||||
/***********************************************************************
|
||||
PGM IGA027A (55857F type) ARM protection emulation
|
||||
PGM IGA027A (55857F* type) ARM protection emulation
|
||||
*guess, the part number might not be directly tied to behavior, see note below
|
||||
|
||||
these are emulation of the 'kov2' type ARM device
|
||||
used by
|
||||
@ -38,7 +39,7 @@
|
||||
|
||||
static READ32_HANDLER( arm7_latch_arm_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
|
||||
device_set_input_line(state->m_prot, ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
|
||||
|
||||
@ -49,7 +50,7 @@ static READ32_HANDLER( arm7_latch_arm_r )
|
||||
|
||||
static WRITE32_HANDLER( arm7_latch_arm_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, cpu_get_pc(&space->device()));
|
||||
@ -59,7 +60,7 @@ static WRITE32_HANDLER( arm7_latch_arm_w )
|
||||
|
||||
static READ32_HANDLER( arm7_shareram_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, cpu_get_pc(&space->device()));
|
||||
@ -68,7 +69,7 @@ static READ32_HANDLER( arm7_shareram_r )
|
||||
|
||||
static WRITE32_HANDLER( arm7_shareram_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, cpu_get_pc(&space->device()));
|
||||
@ -77,7 +78,7 @@ static WRITE32_HANDLER( arm7_shareram_w )
|
||||
|
||||
static READ16_HANDLER( arm7_latch_68k_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
|
||||
@ -86,7 +87,7 @@ static READ16_HANDLER( arm7_latch_68k_r )
|
||||
|
||||
static WRITE16_HANDLER( arm7_latch_68k_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
|
||||
@ -97,7 +98,7 @@ static WRITE16_HANDLER( arm7_latch_68k_w )
|
||||
|
||||
static READ16_HANDLER( arm7_ram_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
UINT16 *share16 = (UINT16 *)state->m_arm7_shareram;
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
@ -107,7 +108,7 @@ static READ16_HANDLER( arm7_ram_r )
|
||||
|
||||
static WRITE16_HANDLER( arm7_ram_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
UINT16 *share16 = (UINT16 *)state->m_arm7_shareram;
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
@ -130,16 +131,30 @@ static ADDRESS_MAP_START( 55857F_arm7_map, AS_PROGRAM, 32 )
|
||||
AM_RANGE(0x00000000, 0x00003fff) AM_ROM
|
||||
AM_RANGE(0x08000000, 0x083fffff) AM_ROM AM_REGION("user1", 0)
|
||||
AM_RANGE(0x10000000, 0x100003ff) AM_RAM
|
||||
AM_RANGE(0x18000000, 0x1800ffff) AM_RAM AM_BASE_MEMBER(pgm_state, m_arm_ram)
|
||||
AM_RANGE(0x18000000, 0x1800ffff) AM_RAM AM_BASE_MEMBER(pgm_arm_type2_state, m_arm_ram)
|
||||
AM_RANGE(0x38000000, 0x38000003) AM_READWRITE(arm7_latch_arm_r, arm7_latch_arm_w) /* 68k Latch */
|
||||
AM_RANGE(0x48000000, 0x4800ffff) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE_MEMBER(pgm_state, m_arm7_shareram)
|
||||
AM_RANGE(0x48000000, 0x4800ffff) AM_READWRITE(arm7_shareram_r, arm7_shareram_w) AM_BASE_MEMBER(pgm_arm_type2_state, m_arm7_shareram)
|
||||
AM_RANGE(0x50000000, 0x500003ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
MACHINE_START( pgm_arm_type2 )
|
||||
{
|
||||
MACHINE_START_CALL(pgm);
|
||||
pgm_arm_type2_state *state = machine.driver_data<pgm_arm_type2_state>();
|
||||
|
||||
state->m_prot = machine.device<cpu_device>("prot");
|
||||
|
||||
/* register type specific Save State stuff here */
|
||||
|
||||
}
|
||||
|
||||
/******* ARM 55857F *******/
|
||||
|
||||
MACHINE_CONFIG_DERIVED( kov2, pgm )
|
||||
MACHINE_CONFIG_START( pgm_arm_type2, pgm_arm_type2_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
|
||||
MCFG_MACHINE_START( pgm_arm_type2 )
|
||||
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(kov2_mem)
|
||||
|
||||
@ -153,7 +168,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
static void kov2_latch_init( running_machine &machine )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = machine.driver_data<pgm_arm_type2_state>();
|
||||
|
||||
state->m_kov2_latchdata_68k_w = 0;
|
||||
state->m_kov2_latchdata_arm_w = 0;
|
||||
@ -164,7 +179,7 @@ static void kov2_latch_init( running_machine &machine )
|
||||
|
||||
static WRITE32_HANDLER( kov2_arm_region_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
int pc = cpu_get_pc(&space->device());
|
||||
int regionhack = input_port_read(space->machine(), "RegionHack");
|
||||
if (pc==0x190 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
|
||||
@ -217,7 +232,7 @@ DRIVER_INIT( kov2p )
|
||||
|
||||
static WRITE32_HANDLER( martmast_arm_region_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
int pc = cpu_get_pc(&space->device());
|
||||
int regionhack = input_port_read(space->machine(), "RegionHack");
|
||||
if (pc==0x170 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
|
||||
@ -238,7 +253,7 @@ DRIVER_INIT( martmast )
|
||||
|
||||
static WRITE32_HANDLER( ddp2_arm_region_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
int pc = cpu_get_pc(&space->device());
|
||||
int regionhack = input_port_read(space->machine(), "RegionHack");
|
||||
if (pc==0x0174 && regionhack != 0xff) data = (data & 0x0000ffff) | (regionhack << 16);
|
||||
@ -247,7 +262,7 @@ static WRITE32_HANDLER( ddp2_arm_region_w )
|
||||
|
||||
static READ32_HANDLER( ddp2_speedup_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
|
||||
int pc = cpu_get_pc(&space->device());
|
||||
UINT32 data = state->m_arm_ram[0x300c/4];
|
||||
|
||||
@ -296,7 +311,7 @@ DRIVER_INIT( ddp2 )
|
||||
|
||||
DRIVER_INIT( dw2001 )
|
||||
{
|
||||
//pgm_state *state = machine.driver_data<pgm_state>();
|
||||
//pgm_arm_type2_state *state = machine.driver_data<pgm_arm_type2_state>();
|
||||
UINT16 *mem16 = (UINT16 *)machine.region("maincpu")->base();
|
||||
|
||||
pgm_basic_init(machine);
|
||||
|
@ -1,5 +1,6 @@
|
||||
/***********************************************************************
|
||||
PGM IGA027A (55857G type) ARM protection emulation
|
||||
PGM IGA027A (55857G* type) ARM protection emulation
|
||||
*guess, the part number might not be directly tied to behavior, see note below
|
||||
|
||||
these are emulation of the 'dmnfrnt' type ARM device
|
||||
used by
|
||||
@ -28,6 +29,11 @@
|
||||
|
||||
IGS027A type 55857G has also been seen on various IGS gambling boards
|
||||
as the main CPU (eg. Haunted House, see igs_m027a)
|
||||
|
||||
55857G is also used on the Cave single board PGM systems, but in those
|
||||
cases it behaves like the 55857E (pgmprot1.c)
|
||||
|
||||
|
||||
|
||||
***********************************************************************/
|
||||
|
||||
@ -39,25 +45,25 @@ static WRITE32_HANDLER( svg_arm7_ram_sel_w )
|
||||
// printf("svg_arm7_ram_sel_w %08x\n", data);
|
||||
space->machine().scheduler().synchronize(); // force resync
|
||||
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
state->m_svg_ram_sel = data & 1;
|
||||
}
|
||||
|
||||
static READ32_HANDLER( svg_arm7_shareram_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
return state->m_svg_shareram[state->m_svg_ram_sel & 1][offset];
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER( svg_arm7_shareram_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
COMBINE_DATA(&state->m_svg_shareram[state->m_svg_ram_sel & 1][offset]);
|
||||
}
|
||||
|
||||
static READ16_HANDLER( svg_m68k_ram_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
int ram_sel = (state->m_svg_ram_sel & 1) ^ 1;
|
||||
UINT16 *share16 = (UINT16 *)(state->m_svg_shareram[ram_sel & 1]);
|
||||
|
||||
@ -66,7 +72,7 @@ static READ16_HANDLER( svg_m68k_ram_r )
|
||||
|
||||
static WRITE16_HANDLER( svg_m68k_ram_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
int ram_sel = (state->m_svg_ram_sel & 1) ^ 1;
|
||||
UINT16 *share16 = (UINT16 *)(state->m_svg_shareram[ram_sel & 1]);
|
||||
|
||||
@ -80,47 +86,47 @@ static READ16_HANDLER( svg_68k_nmi_r )
|
||||
|
||||
static WRITE16_HANDLER( svg_68k_nmi_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
generic_pulse_irq_line(state->m_prot, ARM7_FIRQ_LINE, 1);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( svg_latch_68k_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
|
||||
COMBINE_DATA(&state->m_kov2_latchdata_68k_w);
|
||||
COMBINE_DATA(&state->m_svg_latchdata_68k_w);
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER( svg_latch_68k_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
|
||||
return state->m_kov2_latchdata_arm_w;
|
||||
logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
|
||||
return state->m_svg_latchdata_arm_w;
|
||||
}
|
||||
|
||||
|
||||
|
||||
static READ32_HANDLER( svg_latch_arm_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_kov2_latchdata_68k_w, mem_mask, cpu_get_pc(&space->device()));
|
||||
return state->m_kov2_latchdata_68k_w;
|
||||
logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_svg_latchdata_68k_w, mem_mask, cpu_get_pc(&space->device()));
|
||||
return state->m_svg_latchdata_68k_w;
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER( svg_latch_arm_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
|
||||
if (PGMARM7LOGERROR)
|
||||
logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, cpu_get_pc(&space->device()));
|
||||
|
||||
COMBINE_DATA(&state->m_kov2_latchdata_arm_w);
|
||||
COMBINE_DATA(&state->m_svg_latchdata_arm_w);
|
||||
}
|
||||
|
||||
/* 55857G? */
|
||||
@ -140,7 +146,7 @@ static ADDRESS_MAP_START( 55857G_arm7_map, AS_PROGRAM, 32 )
|
||||
AM_RANGE(0x00000000, 0x00003fff) AM_ROM
|
||||
AM_RANGE(0x08000000, 0x087fffff) AM_ROM AM_REGION("user1", 0)
|
||||
AM_RANGE(0x10000000, 0x100003ff) AM_RAM
|
||||
AM_RANGE(0x18000000, 0x1803ffff) AM_RAM AM_BASE_MEMBER(pgm_state, m_arm_ram)
|
||||
AM_RANGE(0x18000000, 0x1803ffff) AM_RAM AM_BASE_MEMBER(pgm_arm_type3_state, m_arm_ram)
|
||||
AM_RANGE(0x38000000, 0x3801ffff) AM_READWRITE(svg_arm7_shareram_r, svg_arm7_shareram_w)
|
||||
AM_RANGE(0x48000000, 0x48000003) AM_READWRITE(svg_latch_arm_r, svg_latch_arm_w) /* 68k Latch */
|
||||
AM_RANGE(0x40000018, 0x4000001b) AM_WRITE(svg_arm7_ram_sel_w) /* RAM SEL */
|
||||
@ -148,9 +154,24 @@ static ADDRESS_MAP_START( 55857G_arm7_map, AS_PROGRAM, 32 )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
MACHINE_START( pgm_arm_type3 )
|
||||
{
|
||||
MACHINE_START_CALL(pgm);
|
||||
pgm_arm_type3_state *state = machine.driver_data<pgm_arm_type3_state>();
|
||||
|
||||
state->m_prot = machine.device<cpu_device>("prot");
|
||||
|
||||
/* register type specific Save State stuff here */
|
||||
}
|
||||
|
||||
|
||||
/******* ARM 55857G *******/
|
||||
|
||||
MACHINE_CONFIG_DERIVED( svg, pgm )
|
||||
MACHINE_CONFIG_START( pgm_arm_type3, pgm_arm_type3_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
|
||||
MCFG_MACHINE_START( pgm_arm_type3 )
|
||||
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(svg_68k_mem)
|
||||
|
||||
@ -164,7 +185,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
static void svg_basic_init(running_machine &machine)
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = machine.driver_data<pgm_arm_type3_state>();
|
||||
|
||||
pgm_basic_init(machine);
|
||||
state->m_svg_shareram[0] = auto_alloc_array(machine, UINT32, 0x10000 / 4);
|
||||
@ -202,15 +223,15 @@ static void pgm_create_dummy_internal_arm_region(running_machine &machine)
|
||||
|
||||
|
||||
|
||||
static void kov2_latch_init( running_machine &machine )
|
||||
static void svg_latch_init( running_machine &machine )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = machine.driver_data<pgm_arm_type3_state>();
|
||||
|
||||
state->m_kov2_latchdata_68k_w = 0;
|
||||
state->m_kov2_latchdata_arm_w = 0;
|
||||
state->m_svg_latchdata_68k_w = 0;
|
||||
state->m_svg_latchdata_arm_w = 0;
|
||||
|
||||
state->save_item(NAME(state->m_kov2_latchdata_68k_w));
|
||||
state->save_item(NAME(state->m_kov2_latchdata_arm_w));
|
||||
state->save_item(NAME(state->m_svg_latchdata_68k_w));
|
||||
state->save_item(NAME(state->m_svg_latchdata_arm_w));
|
||||
}
|
||||
|
||||
|
||||
@ -218,7 +239,7 @@ DRIVER_INIT( theglad )
|
||||
{
|
||||
svg_basic_init(machine);
|
||||
pgm_theglad_decrypt(machine);
|
||||
kov2_latch_init(machine);
|
||||
svg_latch_init(machine);
|
||||
pgm_create_dummy_internal_arm_region(machine);
|
||||
}
|
||||
|
||||
@ -226,7 +247,7 @@ DRIVER_INIT( svg )
|
||||
{
|
||||
svg_basic_init(machine);
|
||||
pgm_svg_decrypt(machine);
|
||||
kov2_latch_init(machine);
|
||||
svg_latch_init(machine);
|
||||
pgm_create_dummy_internal_arm_region(machine);
|
||||
}
|
||||
|
||||
@ -234,7 +255,7 @@ DRIVER_INIT( svgpcb )
|
||||
{
|
||||
svg_basic_init(machine);
|
||||
pgm_svgpcb_decrypt(machine);
|
||||
kov2_latch_init(machine);
|
||||
svg_latch_init(machine);
|
||||
pgm_create_dummy_internal_arm_region(machine);
|
||||
}
|
||||
|
||||
@ -242,12 +263,12 @@ DRIVER_INIT( killbldp )
|
||||
{
|
||||
svg_basic_init(machine);
|
||||
pgm_killbldp_decrypt(machine);
|
||||
kov2_latch_init(machine);
|
||||
svg_latch_init(machine);
|
||||
}
|
||||
|
||||
static READ32_HANDLER( dmnfrnt_speedup_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
|
||||
int pc = cpu_get_pc(&space->device());
|
||||
if (pc == 0x8000fea) device_eat_cycles(&space->device(), 500);
|
||||
// else printf("dmn_speedup_r %08x\n", pc);
|
||||
@ -265,11 +286,11 @@ static READ16_HANDLER( dmnfrnt_main_speedup_r )
|
||||
|
||||
DRIVER_INIT( dmnfrnt )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_arm_type3_state *state = machine.driver_data<pgm_arm_type3_state>();
|
||||
|
||||
svg_basic_init(machine);
|
||||
pgm_dfront_decrypt(machine);
|
||||
kov2_latch_init(machine);
|
||||
svg_latch_init(machine);
|
||||
|
||||
/* put some fake code for the ARM here ... */
|
||||
pgm_create_dummy_internal_arm_region(machine);
|
||||
@ -293,6 +314,8 @@ DRIVER_INIT( happy6 )
|
||||
{
|
||||
svg_basic_init(machine);
|
||||
pgm_happy6_decrypt(machine);
|
||||
kov2_latch_init(machine);
|
||||
svg_latch_init(machine);
|
||||
pgm_create_dummy_internal_arm_region(machine);
|
||||
}
|
||||
|
||||
|
||||
|
@ -35,7 +35,7 @@
|
||||
|
||||
static void IGS022_do_dma(running_machine& machine, UINT16 src, UINT16 dst, UINT16 size, UINT16 mode)
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
UINT16 param;
|
||||
/*
|
||||
P_SRC =0x300290 (offset from prot rom base)
|
||||
@ -195,7 +195,7 @@ static void IGS022_reset(running_machine& machine)
|
||||
{
|
||||
int i;
|
||||
UINT16 *PROTROM = (UINT16*)machine.region("igs022data")->base();
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
UINT16 tmp;
|
||||
|
||||
// fill ram with A5 patern
|
||||
@ -228,7 +228,7 @@ static void IGS022_reset(running_machine& machine)
|
||||
|
||||
static void IGS022_handle_command(running_machine& machine)
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
UINT16 cmd = state->m_sharedprotram[0x200/2];
|
||||
//mame_printf_debug("command %04x\n", cmd);
|
||||
if (cmd == 0x6d) //Store values to asic ram
|
||||
@ -279,7 +279,7 @@ static WRITE16_HANDLER( killbld_igs025_prot_w )
|
||||
{
|
||||
// mame_printf_debug("killbrd prot r\n");
|
||||
// return 0;
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
|
||||
offset &= 0xf;
|
||||
|
||||
if (offset == 0)
|
||||
@ -307,7 +307,7 @@ static WRITE16_HANDLER( killbld_igs025_prot_w )
|
||||
static READ16_HANDLER( killbld_igs025_prot_r )
|
||||
{
|
||||
// mame_printf_debug("killbld prot w\n");
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
|
||||
UINT16 res ;
|
||||
|
||||
offset &= 0xf;
|
||||
@ -351,7 +351,7 @@ static READ16_HANDLER( killbld_igs025_prot_r )
|
||||
|
||||
static MACHINE_RESET( killbld )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
|
||||
MACHINE_RESET_CALL(pgm);
|
||||
/* fill the protection ram with a5 + auto dma */
|
||||
@ -371,7 +371,7 @@ static MACHINE_RESET( killbld )
|
||||
|
||||
DRIVER_INIT( killbld )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
|
||||
pgm_basic_init(machine);
|
||||
pgm_killbld_decrypt(machine);
|
||||
@ -393,7 +393,7 @@ DRIVER_INIT( killbld )
|
||||
|
||||
static MACHINE_RESET( dw3 )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
|
||||
|
||||
MACHINE_RESET_CALL(pgm);
|
||||
@ -455,7 +455,7 @@ static int ptr=0;
|
||||
static UINT8 dw3_swap;
|
||||
static WRITE16_HANDLER( drgw3_igs025_prot_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
|
||||
|
||||
offset&=0xf;
|
||||
|
||||
@ -482,7 +482,7 @@ static WRITE16_HANDLER( drgw3_igs025_prot_w )
|
||||
static READ16_HANDLER( drgw3_igs025_prot_r )
|
||||
{
|
||||
// mame_printf_debug("killbld prot w\n");
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = space->machine().driver_data<pgm_022_025_state>();
|
||||
|
||||
UINT16 res ;
|
||||
|
||||
@ -530,7 +530,7 @@ DRIVER_INIT( drgw3 )
|
||||
pgm_basic_init(machine);
|
||||
|
||||
/*
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_022_025_state *state = machine.driver_data<pgm_022_025_state>();
|
||||
|
||||
{
|
||||
int x;
|
||||
@ -551,12 +551,14 @@ DRIVER_INIT( drgw3 )
|
||||
static ADDRESS_MAP_START( killbld_mem, AS_PROGRAM, 16)
|
||||
AM_IMPORT_FROM(pgm_mem)
|
||||
AM_RANGE(0x100000, 0x2fffff) AM_ROMBANK("bank1") /* Game ROM */
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE_MEMBER(pgm_state, m_sharedprotram) // Shared with protection device
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE_MEMBER(pgm_022_025_state, m_sharedprotram) // Shared with protection device
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
||||
MACHINE_CONFIG_DERIVED( killbld, pgm )
|
||||
MACHINE_CONFIG_START( pgm_022_025_kb, pgm_022_025_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(killbld_mem)
|
||||
|
||||
@ -564,7 +566,9 @@ MACHINE_CONFIG_DERIVED( killbld, pgm )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_DERIVED( dw3, pgm )
|
||||
MACHINE_CONFIG_START( pgm_022_025_dw, pgm_022_025_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(killbld_mem)
|
||||
|
||||
|
@ -71,21 +71,21 @@ static UINT32 olds_prot_addr( UINT16 addr )
|
||||
|
||||
static UINT32 olds_read_reg( running_machine &machine, UINT16 addr )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
|
||||
UINT32 protaddr = (olds_prot_addr(addr) - 0x400000) / 2;
|
||||
return state->m_sharedprotram[protaddr] << 16 | state->m_sharedprotram[protaddr + 1];
|
||||
}
|
||||
|
||||
static void olds_write_reg( running_machine &machine, UINT16 addr, UINT32 val )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
|
||||
state->m_sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2] = val >> 16;
|
||||
state->m_sharedprotram[(olds_prot_addr(addr) - 0x400000) / 2 + 1] = val & 0xffff;
|
||||
}
|
||||
|
||||
static MACHINE_RESET( olds )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
|
||||
UINT16 *mem16 = (UINT16 *)machine.region("user2")->base();
|
||||
int i;
|
||||
|
||||
@ -107,7 +107,7 @@ static MACHINE_RESET( olds )
|
||||
|
||||
static READ16_HANDLER( olds_r )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_028_025_state *state = space->machine().driver_data<pgm_028_025_state>();
|
||||
UINT16 res = 0;
|
||||
|
||||
if (offset == 1)
|
||||
@ -131,7 +131,7 @@ static READ16_HANDLER( olds_r )
|
||||
|
||||
static WRITE16_HANDLER( olds_w )
|
||||
{
|
||||
pgm_state *state = space->machine().driver_data<pgm_state>();
|
||||
pgm_028_025_state *state = space->machine().driver_data<pgm_028_025_state>();
|
||||
if (offset == 0)
|
||||
state->m_kb_cmd = data;
|
||||
else //offset==2
|
||||
@ -194,7 +194,7 @@ static READ16_HANDLER( olds_prot_swap_r )
|
||||
|
||||
DRIVER_INIT( olds )
|
||||
{
|
||||
pgm_state *state = machine.driver_data<pgm_state>();
|
||||
pgm_028_025_state *state = machine.driver_data<pgm_028_025_state>();
|
||||
pgm_basic_init(machine);
|
||||
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xdcb400, 0xdcb403, FUNC(olds_r), FUNC(olds_w));
|
||||
@ -216,11 +216,13 @@ DRIVER_INIT( olds )
|
||||
static ADDRESS_MAP_START( olds_mem, AS_PROGRAM, 16)
|
||||
AM_IMPORT_FROM(pgm_mem)
|
||||
AM_RANGE(0x100000, 0x3fffff) AM_ROMBANK("bank1") /* Game ROM */
|
||||
AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE_MEMBER(pgm_state, m_sharedprotram) // Shared with protection device
|
||||
AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE_MEMBER(pgm_028_025_state, m_sharedprotram) // Shared with protection device
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
MACHINE_CONFIG_DERIVED( olds, pgm )
|
||||
MACHINE_CONFIG_START( pgm_028_025_ol, pgm_028_025_state )
|
||||
MCFG_FRAGMENT_ADD(pgmbase)
|
||||
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_PROGRAM_MAP(olds_mem)
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user