mirror of
https://github.com/holub/mame
synced 2025-05-08 07:11:42 +03:00
MAME going modern part 8 (no whatsnew)
This commit is contained in:
parent
3541b5c351
commit
cc78fc2684
@ -54,24 +54,29 @@ public:
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/* devices */
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device_t *m_maincpu;
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DECLARE_READ16_MEMBER(drill_io_r);
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DECLARE_WRITE16_MEMBER(drill_io_w);
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DECLARE_WRITE16_MEMBER(sensors_w);
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DECLARE_READ16_MEMBER(drill_irq_r);
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DECLARE_WRITE16_MEMBER(drill_irq_w);
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};
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static READ16_HANDLER( drill_io_r )
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READ16_MEMBER(_2mindril_state::drill_io_r)
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{
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_2mindril_state *state = space->machine().driver_data<_2mindril_state>();
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// if (offset * 2 == 0x4)
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/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", cpu_get_pc(&space->device()), state->m_iodata[0/2], state->m_iodata[2/2], state->m_iodata[4/2], state->m_iodata[6/2],
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state->m_iodata[8/2], state->m_iodata[0xa/2], state->m_iodata[0xc/2], state->m_iodata[0xe/2]);*/
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/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", cpu_get_pc(&space.device()), m_iodata[0/2], m_iodata[2/2], m_iodata[4/2], m_iodata[6/2],
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m_iodata[8/2], m_iodata[0xa/2], m_iodata[0xc/2], m_iodata[0xe/2]);*/
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switch(offset)
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{
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case 0x0/2: return input_port_read(space->machine(), "DSW");
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case 0x0/2: return input_port_read(machine(), "DSW");
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case 0x2/2:
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{
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int arm_pwr = input_port_read(space->machine(), "IN0");//throw
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//popmessage("PC=%08x %02x",cpu_get_pc(&space->device()),arm_pwr);
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int arm_pwr = input_port_read(machine(), "IN0");//throw
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//popmessage("PC=%08x %02x",cpu_get_pc(&space.device()),arm_pwr);
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if(arm_pwr > 0xe0) return ~0x1800;
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if(arm_pwr > 0xc0) return ~0x1400;
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@ -79,31 +84,31 @@ static READ16_HANDLER( drill_io_r )
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if(arm_pwr > 0x40) return ~0x1000;
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else return ~0x0000;
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}
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case 0x4/2: return (state->m_defender_sensor) | (state->m_shutter_sensor);
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case 0xe/2: return input_port_read(space->machine(), "IN2");//coins
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// default: printf("PC=%08x [%04x] -> %04x R\n", cpu_get_pc(&space->device()), offset * 2, state->m_iodata[offset]);
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case 0x4/2: return (m_defender_sensor) | (m_shutter_sensor);
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case 0xe/2: return input_port_read(machine(), "IN2");//coins
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// default: printf("PC=%08x [%04x] -> %04x R\n", cpu_get_pc(&space.device()), offset * 2, m_iodata[offset]);
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}
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return 0xffff;
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}
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static WRITE16_HANDLER( drill_io_w )
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WRITE16_MEMBER(_2mindril_state::drill_io_w)
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{
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_2mindril_state *state = space->machine().driver_data<_2mindril_state>();
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COMBINE_DATA(&state->m_iodata[offset]);
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COMBINE_DATA(&m_iodata[offset]);
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switch(offset)
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{
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case 0x8/2:
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coin_counter_w(space->machine(), 0, state->m_iodata[offset] & 0x0400);
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coin_counter_w(space->machine(), 1, state->m_iodata[offset] & 0x0800);
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coin_lockout_w(space->machine(), 0, ~state->m_iodata[offset] & 0x0100);
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coin_lockout_w(space->machine(), 1, ~state->m_iodata[offset] & 0x0200);
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coin_counter_w(machine(), 0, m_iodata[offset] & 0x0400);
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coin_counter_w(machine(), 1, m_iodata[offset] & 0x0800);
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coin_lockout_w(machine(), 0, ~m_iodata[offset] & 0x0100);
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coin_lockout_w(machine(), 1, ~m_iodata[offset] & 0x0200);
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break;
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}
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// if(data != 0 && offset != 8)
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// printf("PC=%08x [%04x] <- %04x W\n", cpu_get_pc(&space->device()), offset * 2, data);
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// printf("PC=%08x [%04x] <- %04x W\n", cpu_get_pc(&space.device()), offset * 2, data);
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}
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/*
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@ -134,60 +139,60 @@ static TIMER_CALLBACK( defender_req )
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}
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#endif
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static WRITE16_HANDLER( sensors_w )
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WRITE16_MEMBER(_2mindril_state::sensors_w)
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{
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_2mindril_state *state = space->machine().driver_data<_2mindril_state>();
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/*---- xxxx ---- ---- select "lamps" (guess)*/
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/*---- ---- ---- -x-- lamp*/
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if (data & 1)
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{
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//space->machine().scheduler().timer_set(attotime::from_seconds(2), FUNC(shutter_req ), 0x100);
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state->m_shutter_sensor = 0x100;
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//machine().scheduler().timer_set(attotime::from_seconds(2), FUNC(shutter_req ), 0x100);
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m_shutter_sensor = 0x100;
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}
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else if (data & 2)
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{
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//space->machine().scheduler().timer_set( attotime::from_seconds(2), FUNC(shutter_req ), 0x200);
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state->m_shutter_sensor = 0x200;
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//machine().scheduler().timer_set( attotime::from_seconds(2), FUNC(shutter_req ), 0x200);
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m_shutter_sensor = 0x200;
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}
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if (data & 0x1000 || data & 0x4000)
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{
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//space->machine().scheduler().timer_set( attotime::from_seconds(2), FUNC(defender_req ), 0x800);
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state->m_defender_sensor = 0x800;
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//machine().scheduler().timer_set( attotime::from_seconds(2), FUNC(defender_req ), 0x800);
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m_defender_sensor = 0x800;
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}
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else if (data & 0x2000 || data & 0x8000)
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{
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//space->machine().scheduler().timer_set( attotime::from_seconds(2), FUNC(defender_req ), 0x400);
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state->m_defender_sensor = 0x400;
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//machine().scheduler().timer_set( attotime::from_seconds(2), FUNC(defender_req ), 0x400);
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m_defender_sensor = 0x400;
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}
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}
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static READ16_HANDLER( drill_irq_r )
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READ16_MEMBER(_2mindril_state::drill_irq_r)
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{
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_2mindril_state *state = space->machine().driver_data<_2mindril_state>();
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return state->irq_reg;
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return irq_reg;
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}
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static WRITE16_HANDLER( drill_irq_w )
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WRITE16_MEMBER(_2mindril_state::drill_irq_w)
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{
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_2mindril_state *state = space->machine().driver_data<_2mindril_state>();
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/*
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(note: could rather be irq mask)
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---- ---- ---x ---- irq lv 5 ack, 0->1 latch
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---- ---- ---- x--- irq lv 4 ack, 0->1 latch
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---- ---- -??- -??? connected to the other levels?
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*/
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if(((state->irq_reg & 8) == 0) && data & 8)
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cputag_set_input_line(space->machine(), "maincpu", 4, CLEAR_LINE);
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if(((irq_reg & 8) == 0) && data & 8)
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cputag_set_input_line(machine(), "maincpu", 4, CLEAR_LINE);
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if(((state->irq_reg & 0x10) == 0) && data & 0x10)
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cputag_set_input_line(space->machine(), "maincpu", 5, CLEAR_LINE);
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if(((irq_reg & 0x10) == 0) && data & 0x10)
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cputag_set_input_line(machine(), "maincpu", 5, CLEAR_LINE);
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if(data & 0xffe7)
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printf("%04x\n",data);
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COMBINE_DATA(&state->irq_reg);
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COMBINE_DATA(&irq_reg);
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}
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static ADDRESS_MAP_START( drill_map, AS_PROGRAM, 16, _2mindril_state )
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@ -205,10 +210,10 @@ static ADDRESS_MAP_START( drill_map, AS_PROGRAM, 16, _2mindril_state )
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AM_RANGE(0x500000, 0x501fff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_SHARE("paletteram")
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AM_RANGE(0x502022, 0x502023) AM_WRITENOP //countinously switches between 0 and 2
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AM_RANGE(0x600000, 0x600007) AM_DEVREADWRITE8_LEGACY("ymsnd", ym2610_r, ym2610_w, 0x00ff)
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AM_RANGE(0x60000c, 0x60000d) AM_READWRITE_LEGACY(drill_irq_r,drill_irq_w)
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AM_RANGE(0x60000c, 0x60000d) AM_READWRITE(drill_irq_r,drill_irq_w)
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AM_RANGE(0x60000e, 0x60000f) AM_RAM // unknown purpose, zeroed at start-up and nothing else
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AM_RANGE(0x700000, 0x70000f) AM_READWRITE_LEGACY(drill_io_r,drill_io_w) AM_BASE(m_iodata) // i/o
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AM_RANGE(0x800000, 0x800001) AM_WRITE_LEGACY(sensors_w)
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AM_RANGE(0x700000, 0x70000f) AM_READWRITE(drill_io_r,drill_io_w) AM_BASE(m_iodata) // i/o
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AM_RANGE(0x800000, 0x800001) AM_WRITE(sensors_w)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( drill )
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@ -63,6 +63,7 @@ public:
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: amiga_state(mconfig, type, tag) { }
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UINT8 coin_counter[2];
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DECLARE_WRITE16_MEMBER(arcadia_multibios_change_game);
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};
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@ -73,12 +74,12 @@ public:
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*
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*************************************/
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static WRITE16_HANDLER( arcadia_multibios_change_game )
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WRITE16_MEMBER(arcadia_amiga_state::arcadia_multibios_change_game)
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{
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if (data == 0)
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space->install_read_bank(0x800000, 0x97ffff, "bank2");
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space.install_read_bank(0x800000, 0x97ffff, "bank2");
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else
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space->nop_read(0x800000, 0x97ffff);
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space.nop_read(0x800000, 0x97ffff);
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}
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@ -203,7 +204,7 @@ static ADDRESS_MAP_START( amiga_map, AS_PROGRAM, 16, arcadia_amiga_state )
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AM_RANGE(0x800000, 0x97ffff) AM_ROMBANK("bank2") AM_REGION("user3", 0)
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AM_RANGE(0x980000, 0x9fbfff) AM_ROM AM_REGION("user2", 0)
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AM_RANGE(0x9fc000, 0x9ffffd) AM_RAM AM_SHARE("nvram")
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AM_RANGE(0x9ffffe, 0x9fffff) AM_WRITE_LEGACY(arcadia_multibios_change_game)
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AM_RANGE(0x9ffffe, 0x9fffff) AM_WRITE(arcadia_multibios_change_game)
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AM_RANGE(0xf00000, 0xf7ffff) AM_ROM AM_REGION("user2", 0)
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ADDRESS_MAP_END
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@ -68,6 +68,9 @@ public:
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DECLARE_READ32_MEMBER(backfire_spriteram2_r);
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DECLARE_WRITE32_MEMBER(backfire_spriteram2_w);
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DECLARE_READ32_MEMBER(backfire_speedup_r);
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DECLARE_READ32_MEMBER(backfire_unknown_wheel_r);
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DECLARE_READ32_MEMBER(backfire_wheel1_r);
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DECLARE_READ32_MEMBER(backfire_wheel2_r);
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};
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//UINT32 *backfire_180010, *backfire_188010;
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@ -225,19 +228,19 @@ WRITE32_MEMBER(backfire_state::backfire_pf4_rowscroll_w){ data &= 0x0000ffff; me
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#ifdef UNUSED_FUNCTION
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READ32_HANDLER( backfire_unknown_wheel_r )
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READ32_MEMBER(backfire_state::backfire_unknown_wheel_r)
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{
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return input_port_read(space->machine(), "PADDLE0");
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return input_port_read(machine(), "PADDLE0");
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}
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READ32_HANDLER( backfire_wheel1_r )
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READ32_MEMBER(backfire_state::backfire_wheel1_r)
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{
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return space->machine().rand();
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return machine().rand();
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}
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READ32_HANDLER( backfire_wheel2_r )
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READ32_MEMBER(backfire_state::backfire_wheel2_r)
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{
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return space->machine().rand();
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return machine().rand();
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}
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#endif
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@ -299,9 +302,9 @@ static ADDRESS_MAP_START( backfire_map, AS_PROGRAM, 32, backfire_state )
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// AM_RANGE(0x1b0000, 0x1b0003) AM_WRITENOP // always 1b0000
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/* when set to pentometer in test mode */
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// AM_RANGE(0x1e4000, 0x1e4003) AM_READ_LEGACY(backfire_unknown_wheel_r)
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// AM_RANGE(0x1e8000, 0x1e8003) AM_READ_LEGACY(backfire_wheel1_r)
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// AM_RANGE(0x1e8004, 0x1e8007) AM_READ_LEGACY(backfire_wheel2_r)
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// AM_RANGE(0x1e4000, 0x1e4003) AM_READ(backfire_unknown_wheel_r)
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// AM_RANGE(0x1e8000, 0x1e8003) AM_READ(backfire_wheel1_r)
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// AM_RANGE(0x1e8004, 0x1e8007) AM_READ(backfire_wheel2_r)
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AM_RANGE(0x1c0000, 0x1c0007) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x000000ff)
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ADDRESS_MAP_END
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@ -284,6 +284,8 @@ public:
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DECLARE_WRITE8_MEMBER(meter_w);
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DECLARE_READ8_MEMBER(latch_r);
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DECLARE_WRITE8_MEMBER(latch_w);
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DECLARE_WRITE8_MEMBER(fd_op_w);
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DECLARE_WRITE8_MEMBER(fd_ctrl_w);
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};
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@ -1298,11 +1300,11 @@ UINT8 results_phase(void)
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return 0;
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}
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WRITE8_HANDLER( fd_op_w )
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WRITE8_MEMBER(bfcobra_state::fd_op_w)
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{
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}
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WRITE8_HANDLER( fd_ctrl_w )
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WRITE8_MEMBER(bfcobra_state::fd_ctrl_w)
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{
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}
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#endif
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@ -46,31 +46,34 @@ public:
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UINT8 m_hop_io;
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UINT8 m_bell_io;
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DECLARE_WRITE8_MEMBER(output_0_w);
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DECLARE_READ8_MEMBER(input_1_r);
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DECLARE_WRITE8_MEMBER(output_1_w);
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};
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static WRITE8_HANDLER( output_0_w )
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WRITE8_MEMBER(cchance_state::output_0_w)
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{
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//---- --x- divider?
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coin_lockout_w(space->machine(), 0, ~data & 1);
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coin_lockout_w(machine(), 0, ~data & 1);
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// coin_counter_w(space->machine(), 0, ~data & 1);
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// coin_counter_w(machine(), 0, ~data & 1);
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}
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static READ8_HANDLER( input_1_r )
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READ8_MEMBER(cchance_state::input_1_r)
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{
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cchance_state *state = space->machine().driver_data<cchance_state>();
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return (state->m_hop_io) | (state->m_bell_io) | (input_port_read(space->machine(), "SP") & 0xff);
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return (m_hop_io) | (m_bell_io) | (input_port_read(machine(), "SP") & 0xff);
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}
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static WRITE8_HANDLER( output_1_w )
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WRITE8_MEMBER(cchance_state::output_1_w)
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{
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cchance_state *state = space->machine().driver_data<cchance_state>();
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state->m_hop_io = (data & 0x40)>>4;
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state->m_bell_io = (data & 0x80)>>4;
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m_hop_io = (data & 0x40)>>4;
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m_bell_io = (data & 0x80)>>4;
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}
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static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, cchance_state )
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@ -86,8 +89,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, cchance_state )
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AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
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AM_RANGE(0xf000, 0xf000) AM_READNOP AM_WRITENOP //???
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AM_RANGE(0xf001, 0xf001) AM_READ_LEGACY(input_1_r) AM_WRITE_LEGACY(output_0_w)
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AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN0") AM_WRITE_LEGACY(output_1_w)
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AM_RANGE(0xf001, 0xf001) AM_READ(input_1_r) AM_WRITE(output_0_w)
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AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN0") AM_WRITE(output_1_w)
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AM_RANGE(0xf800, 0xf801) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_data_w)
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AM_RANGE(0xf801, 0xf801) AM_DEVREAD_LEGACY("aysnd", ay8910_r)
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ADDRESS_MAP_END
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@ -55,6 +55,31 @@ public:
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UINT8 port16_value;
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UINT8 port17_value;
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DECLARE_WRITE8_MEMBER(ec_port00_out_w);
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DECLARE_WRITE8_MEMBER(ec_port01_out_w);
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DECLARE_WRITE8_MEMBER(ec_port02_out_w);
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DECLARE_WRITE8_MEMBER(ec_port03_out_w);
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DECLARE_WRITE8_MEMBER(ec_port04_out_w);
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DECLARE_WRITE8_MEMBER(ec_port05_out_w);
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DECLARE_WRITE8_MEMBER(ec_port06_out_w);
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DECLARE_WRITE8_MEMBER(ec_port07_out_w);
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DECLARE_WRITE8_MEMBER(ec_port08_out_w);
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DECLARE_WRITE8_MEMBER(ec_port09_out_w);
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DECLARE_WRITE8_MEMBER(ec_port0a_out_w);
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DECLARE_WRITE8_MEMBER(ec_port0b_out_w);
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DECLARE_WRITE8_MEMBER(ec_port0c_out_w);
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DECLARE_WRITE8_MEMBER(ec_port0d_out_w);
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DECLARE_WRITE8_MEMBER(ec_port0e_out_w);
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DECLARE_WRITE8_MEMBER(ec_port0f_out_w);
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||||
DECLARE_WRITE8_MEMBER(ec_port10_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port11_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port12_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port13_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port14_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port15_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port16_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port17_out_w);
|
||||
DECLARE_WRITE8_MEMBER(ec_port18_out_w);
|
||||
};
|
||||
|
||||
|
||||
@ -89,47 +114,47 @@ TIMER_DEVICE_CALLBACK( ecoinfr_irq_timer )
|
||||
}
|
||||
|
||||
|
||||
WRITE8_HANDLER( ec_port00_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port00_out_w)
|
||||
{
|
||||
// Reel 1 Control
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port01_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port01_out_w)
|
||||
{
|
||||
// Reel 2 Control
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port02_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port02_out_w)
|
||||
{
|
||||
// Reel 3 Control
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port03_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port03_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port04_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port04_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port05_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port05_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port06_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port06_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port07_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port07_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port08_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port08_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
@ -137,188 +162,188 @@ WRITE8_HANDLER( ec_port08_out_w )
|
||||
// we could do the same thing here with input ports configured to outputs, however
|
||||
// I've done it with handlers for now as it allows greater flexibility while the driver
|
||||
// is developed
|
||||
WRITE8_HANDLER( ec_port09_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port09_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port09_value = state->port09_value;
|
||||
state->port09_value = data;
|
||||
|
||||
if ((state->port09_value&0x01) != (old_port09_value&0x01)) printf("port09 0x01 changed %02x\n", state->port09_value&0x01);
|
||||
if ((state->port09_value&0x02) != (old_port09_value&0x02)) printf("port09 0x02 changed %02x\n", state->port09_value&0x02);
|
||||
if ((state->port09_value&0x04) != (old_port09_value&0x04)) printf("port09 0x04 changed %02x (REEL3 ENABLE)\n", state->port09_value&0x04);
|
||||
if ((state->port09_value&0x08) != (old_port09_value&0x08)) printf("port09 0x08 changed %02x (REEL2 ENABLE)\n", state->port09_value&0x08);
|
||||
if ((state->port09_value&0x10) != (old_port09_value&0x10)) printf("port09 0x10 changed %02x (REEL1 ENABLE)\n", state->port09_value&0x10);
|
||||
if ((state->port09_value&0x20) != (old_port09_value&0x20)) printf("port09 0x20 changed %02x\n", state->port09_value&0x20);
|
||||
if ((state->port09_value&0x40) != (old_port09_value&0x40)) printf("port09 0x40 changed %02x\n", state->port09_value&0x40);
|
||||
if ((state->port09_value&0x80) != (old_port09_value&0x80)) printf("port09 0x80 changed %02x\n", state->port09_value&0x80);
|
||||
int old_port09_value = port09_value;
|
||||
port09_value = data;
|
||||
|
||||
if ((port09_value&0x01) != (old_port09_value&0x01)) printf("port09 0x01 changed %02x\n", port09_value&0x01);
|
||||
if ((port09_value&0x02) != (old_port09_value&0x02)) printf("port09 0x02 changed %02x\n", port09_value&0x02);
|
||||
if ((port09_value&0x04) != (old_port09_value&0x04)) printf("port09 0x04 changed %02x (REEL3 ENABLE)\n", port09_value&0x04);
|
||||
if ((port09_value&0x08) != (old_port09_value&0x08)) printf("port09 0x08 changed %02x (REEL2 ENABLE)\n", port09_value&0x08);
|
||||
if ((port09_value&0x10) != (old_port09_value&0x10)) printf("port09 0x10 changed %02x (REEL1 ENABLE)\n", port09_value&0x10);
|
||||
if ((port09_value&0x20) != (old_port09_value&0x20)) printf("port09 0x20 changed %02x\n", port09_value&0x20);
|
||||
if ((port09_value&0x40) != (old_port09_value&0x40)) printf("port09 0x40 changed %02x\n", port09_value&0x40);
|
||||
if ((port09_value&0x80) != (old_port09_value&0x80)) printf("port09 0x80 changed %02x\n", port09_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port0a_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port0a_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
WRITE8_HANDLER( ec_port0b_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port0b_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port0c_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port0c_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port0d_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port0d_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port0e_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port0e_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port0f_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port0f_out_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port10_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port10_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port10_value = state->port10_value;
|
||||
state->port10_value = data;
|
||||
|
||||
if ((state->port10_value&0x01) != (old_port10_value&0x01)) printf("port10 0x01 changed %02x\n", state->port10_value&0x01);
|
||||
if ((state->port10_value&0x02) != (old_port10_value&0x02)) printf("port10 0x02 changed %02x\n", state->port10_value&0x02);
|
||||
if ((state->port10_value&0x04) != (old_port10_value&0x04)) printf("port10 0x04 changed %02x\n", state->port10_value&0x04);
|
||||
if ((state->port10_value&0x08) != (old_port10_value&0x08)) printf("port10 0x08 changed %02x\n", state->port10_value&0x08);
|
||||
if ((state->port10_value&0x10) != (old_port10_value&0x10)) printf("port10 0x10 changed %02x\n", state->port10_value&0x10);
|
||||
if ((state->port10_value&0x20) != (old_port10_value&0x20)) printf("port10 0x20 changed %02x\n", state->port10_value&0x20);
|
||||
if ((state->port10_value&0x40) != (old_port10_value&0x40)) printf("port10 0x40 changed %02x\n", state->port10_value&0x40);
|
||||
if ((state->port10_value&0x80) != (old_port10_value&0x80)) printf("port10 0x80 changed %02x\n", state->port10_value&0x80);
|
||||
int old_port10_value = port10_value;
|
||||
port10_value = data;
|
||||
|
||||
if ((port10_value&0x01) != (old_port10_value&0x01)) printf("port10 0x01 changed %02x\n", port10_value&0x01);
|
||||
if ((port10_value&0x02) != (old_port10_value&0x02)) printf("port10 0x02 changed %02x\n", port10_value&0x02);
|
||||
if ((port10_value&0x04) != (old_port10_value&0x04)) printf("port10 0x04 changed %02x\n", port10_value&0x04);
|
||||
if ((port10_value&0x08) != (old_port10_value&0x08)) printf("port10 0x08 changed %02x\n", port10_value&0x08);
|
||||
if ((port10_value&0x10) != (old_port10_value&0x10)) printf("port10 0x10 changed %02x\n", port10_value&0x10);
|
||||
if ((port10_value&0x20) != (old_port10_value&0x20)) printf("port10 0x20 changed %02x\n", port10_value&0x20);
|
||||
if ((port10_value&0x40) != (old_port10_value&0x40)) printf("port10 0x40 changed %02x\n", port10_value&0x40);
|
||||
if ((port10_value&0x80) != (old_port10_value&0x80)) printf("port10 0x80 changed %02x\n", port10_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port11_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port11_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port11_value = state->port11_value;
|
||||
state->port11_value = data;
|
||||
|
||||
if ((state->port11_value&0x01) != (old_port11_value&0x01)) printf("port11 0x01 changed %02x\n", state->port11_value&0x01);
|
||||
if ((state->port11_value&0x02) != (old_port11_value&0x02)) printf("port11 0x02 changed %02x\n", state->port11_value&0x02);
|
||||
if ((state->port11_value&0x04) != (old_port11_value&0x04)) printf("port11 0x04 changed %02x\n", state->port11_value&0x04);
|
||||
if ((state->port11_value&0x08) != (old_port11_value&0x08)) printf("port11 0x08 changed %02x\n", state->port11_value&0x08);
|
||||
if ((state->port11_value&0x10) != (old_port11_value&0x10)) printf("port11 0x10 changed %02x\n", state->port11_value&0x10);
|
||||
if ((state->port11_value&0x20) != (old_port11_value&0x20)) printf("port11 0x20 changed %02x\n", state->port11_value&0x20);
|
||||
if ((state->port11_value&0x40) != (old_port11_value&0x40)) printf("port11 0x40 changed %02x\n", state->port11_value&0x40);
|
||||
if ((state->port11_value&0x80) != (old_port11_value&0x80)) printf("port11 0x80 changed %02x\n", state->port11_value&0x80);
|
||||
int old_port11_value = port11_value;
|
||||
port11_value = data;
|
||||
|
||||
if ((port11_value&0x01) != (old_port11_value&0x01)) printf("port11 0x01 changed %02x\n", port11_value&0x01);
|
||||
if ((port11_value&0x02) != (old_port11_value&0x02)) printf("port11 0x02 changed %02x\n", port11_value&0x02);
|
||||
if ((port11_value&0x04) != (old_port11_value&0x04)) printf("port11 0x04 changed %02x\n", port11_value&0x04);
|
||||
if ((port11_value&0x08) != (old_port11_value&0x08)) printf("port11 0x08 changed %02x\n", port11_value&0x08);
|
||||
if ((port11_value&0x10) != (old_port11_value&0x10)) printf("port11 0x10 changed %02x\n", port11_value&0x10);
|
||||
if ((port11_value&0x20) != (old_port11_value&0x20)) printf("port11 0x20 changed %02x\n", port11_value&0x20);
|
||||
if ((port11_value&0x40) != (old_port11_value&0x40)) printf("port11 0x40 changed %02x\n", port11_value&0x40);
|
||||
if ((port11_value&0x80) != (old_port11_value&0x80)) printf("port11 0x80 changed %02x\n", port11_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port12_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port12_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port12_value = state->port12_value;
|
||||
state->port12_value = data;
|
||||
|
||||
if ((state->port12_value&0x01) != (old_port12_value&0x01)) printf("port12 0x01 changed %02x\n", state->port12_value&0x01);
|
||||
if ((state->port12_value&0x02) != (old_port12_value&0x02)) printf("port12 0x02 changed %02x\n", state->port12_value&0x02);
|
||||
if ((state->port12_value&0x04) != (old_port12_value&0x04)) printf("port12 0x04 changed %02x\n", state->port12_value&0x04);
|
||||
if ((state->port12_value&0x08) != (old_port12_value&0x08)) printf("port12 0x08 changed %02x\n", state->port12_value&0x08);
|
||||
if ((state->port12_value&0x10) != (old_port12_value&0x10)) printf("port12 0x10 changed %02x\n", state->port12_value&0x10);
|
||||
if ((state->port12_value&0x20) != (old_port12_value&0x20)) printf("port12 0x20 changed %02x\n", state->port12_value&0x20);
|
||||
if ((state->port12_value&0x40) != (old_port12_value&0x40)) printf("port12 0x40 changed %02x\n", state->port12_value&0x40);
|
||||
if ((state->port12_value&0x80) != (old_port12_value&0x80)) printf("port12 0x80 changed %02x\n", state->port12_value&0x80);
|
||||
int old_port12_value = port12_value;
|
||||
port12_value = data;
|
||||
|
||||
if ((port12_value&0x01) != (old_port12_value&0x01)) printf("port12 0x01 changed %02x\n", port12_value&0x01);
|
||||
if ((port12_value&0x02) != (old_port12_value&0x02)) printf("port12 0x02 changed %02x\n", port12_value&0x02);
|
||||
if ((port12_value&0x04) != (old_port12_value&0x04)) printf("port12 0x04 changed %02x\n", port12_value&0x04);
|
||||
if ((port12_value&0x08) != (old_port12_value&0x08)) printf("port12 0x08 changed %02x\n", port12_value&0x08);
|
||||
if ((port12_value&0x10) != (old_port12_value&0x10)) printf("port12 0x10 changed %02x\n", port12_value&0x10);
|
||||
if ((port12_value&0x20) != (old_port12_value&0x20)) printf("port12 0x20 changed %02x\n", port12_value&0x20);
|
||||
if ((port12_value&0x40) != (old_port12_value&0x40)) printf("port12 0x40 changed %02x\n", port12_value&0x40);
|
||||
if ((port12_value&0x80) != (old_port12_value&0x80)) printf("port12 0x80 changed %02x\n", port12_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port13_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port13_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port13_value = state->port13_value;
|
||||
state->port13_value = data;
|
||||
|
||||
if ((state->port13_value&0x01) != (old_port13_value&0x01)) printf("port13 0x01 changed %02x\n", state->port13_value&0x01);
|
||||
if ((state->port13_value&0x02) != (old_port13_value&0x02)) printf("port13 0x02 changed %02x\n", state->port13_value&0x02);
|
||||
if ((state->port13_value&0x04) != (old_port13_value&0x04)) printf("port13 0x04 changed %02x\n", state->port13_value&0x04);
|
||||
if ((state->port13_value&0x08) != (old_port13_value&0x08)) printf("port13 0x08 changed %02x\n", state->port13_value&0x08);
|
||||
if ((state->port13_value&0x10) != (old_port13_value&0x10)) printf("port13 0x10 changed %02x\n", state->port13_value&0x10);
|
||||
if ((state->port13_value&0x20) != (old_port13_value&0x20)) printf("port13 0x20 changed %02x\n", state->port13_value&0x20);
|
||||
if ((state->port13_value&0x40) != (old_port13_value&0x40)) printf("port13 0x40 changed %02x\n", state->port13_value&0x40);
|
||||
if ((state->port13_value&0x80) != (old_port13_value&0x80)) printf("port13 0x80 changed %02x\n", state->port13_value&0x80);
|
||||
int old_port13_value = port13_value;
|
||||
port13_value = data;
|
||||
|
||||
if ((port13_value&0x01) != (old_port13_value&0x01)) printf("port13 0x01 changed %02x\n", port13_value&0x01);
|
||||
if ((port13_value&0x02) != (old_port13_value&0x02)) printf("port13 0x02 changed %02x\n", port13_value&0x02);
|
||||
if ((port13_value&0x04) != (old_port13_value&0x04)) printf("port13 0x04 changed %02x\n", port13_value&0x04);
|
||||
if ((port13_value&0x08) != (old_port13_value&0x08)) printf("port13 0x08 changed %02x\n", port13_value&0x08);
|
||||
if ((port13_value&0x10) != (old_port13_value&0x10)) printf("port13 0x10 changed %02x\n", port13_value&0x10);
|
||||
if ((port13_value&0x20) != (old_port13_value&0x20)) printf("port13 0x20 changed %02x\n", port13_value&0x20);
|
||||
if ((port13_value&0x40) != (old_port13_value&0x40)) printf("port13 0x40 changed %02x\n", port13_value&0x40);
|
||||
if ((port13_value&0x80) != (old_port13_value&0x80)) printf("port13 0x80 changed %02x\n", port13_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port14_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port14_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port14_value = state->port14_value;
|
||||
state->port14_value = data;
|
||||
|
||||
if ((state->port14_value&0x01) != (old_port14_value&0x01)) printf("port14 0x01 changed %02x\n", state->port14_value&0x01);
|
||||
if ((state->port14_value&0x02) != (old_port14_value&0x02)) printf("port14 0x02 changed %02x\n", state->port14_value&0x02);
|
||||
if ((state->port14_value&0x04) != (old_port14_value&0x04)) printf("port14 0x04 changed %02x\n", state->port14_value&0x04);
|
||||
if ((state->port14_value&0x08) != (old_port14_value&0x08)) printf("port14 0x08 changed %02x\n", state->port14_value&0x08);
|
||||
if ((state->port14_value&0x10) != (old_port14_value&0x10)) printf("port14 0x10 changed %02x\n", state->port14_value&0x10);
|
||||
if ((state->port14_value&0x20) != (old_port14_value&0x20)) printf("port14 0x20 changed %02x\n", state->port14_value&0x20);
|
||||
if ((state->port14_value&0x40) != (old_port14_value&0x40)) printf("port14 0x40 changed %02x\n", state->port14_value&0x40);
|
||||
if ((state->port14_value&0x80) != (old_port14_value&0x80)) printf("port14 0x80 changed %02x\n", state->port14_value&0x80);
|
||||
int old_port14_value = port14_value;
|
||||
port14_value = data;
|
||||
|
||||
if ((port14_value&0x01) != (old_port14_value&0x01)) printf("port14 0x01 changed %02x\n", port14_value&0x01);
|
||||
if ((port14_value&0x02) != (old_port14_value&0x02)) printf("port14 0x02 changed %02x\n", port14_value&0x02);
|
||||
if ((port14_value&0x04) != (old_port14_value&0x04)) printf("port14 0x04 changed %02x\n", port14_value&0x04);
|
||||
if ((port14_value&0x08) != (old_port14_value&0x08)) printf("port14 0x08 changed %02x\n", port14_value&0x08);
|
||||
if ((port14_value&0x10) != (old_port14_value&0x10)) printf("port14 0x10 changed %02x\n", port14_value&0x10);
|
||||
if ((port14_value&0x20) != (old_port14_value&0x20)) printf("port14 0x20 changed %02x\n", port14_value&0x20);
|
||||
if ((port14_value&0x40) != (old_port14_value&0x40)) printf("port14 0x40 changed %02x\n", port14_value&0x40);
|
||||
if ((port14_value&0x80) != (old_port14_value&0x80)) printf("port14 0x80 changed %02x\n", port14_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port15_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port15_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port15_value = state->port15_value;
|
||||
state->port15_value = data;
|
||||
|
||||
if ((state->port15_value&0x01) != (old_port15_value&0x01)) printf("port15 0x01 changed %02x\n", state->port15_value&0x01);
|
||||
if ((state->port15_value&0x02) != (old_port15_value&0x02)) printf("port15 0x02 changed %02x\n", state->port15_value&0x02);
|
||||
if ((state->port15_value&0x04) != (old_port15_value&0x04)) printf("port15 0x04 changed %02x\n", state->port15_value&0x04);
|
||||
if ((state->port15_value&0x08) != (old_port15_value&0x08)) printf("port15 0x08 changed %02x\n", state->port15_value&0x08);
|
||||
if ((state->port15_value&0x10) != (old_port15_value&0x10)) printf("port15 0x10 changed %02x\n", state->port15_value&0x10);
|
||||
if ((state->port15_value&0x20) != (old_port15_value&0x20)) printf("port15 0x20 changed %02x\n", state->port15_value&0x20);
|
||||
if ((state->port15_value&0x40) != (old_port15_value&0x40)) printf("port15 0x40 changed %02x\n", state->port15_value&0x40);
|
||||
if ((state->port15_value&0x80) != (old_port15_value&0x80)) printf("port15 0x80 changed %02x\n", state->port15_value&0x80);
|
||||
int old_port15_value = port15_value;
|
||||
port15_value = data;
|
||||
|
||||
if ((port15_value&0x01) != (old_port15_value&0x01)) printf("port15 0x01 changed %02x\n", port15_value&0x01);
|
||||
if ((port15_value&0x02) != (old_port15_value&0x02)) printf("port15 0x02 changed %02x\n", port15_value&0x02);
|
||||
if ((port15_value&0x04) != (old_port15_value&0x04)) printf("port15 0x04 changed %02x\n", port15_value&0x04);
|
||||
if ((port15_value&0x08) != (old_port15_value&0x08)) printf("port15 0x08 changed %02x\n", port15_value&0x08);
|
||||
if ((port15_value&0x10) != (old_port15_value&0x10)) printf("port15 0x10 changed %02x\n", port15_value&0x10);
|
||||
if ((port15_value&0x20) != (old_port15_value&0x20)) printf("port15 0x20 changed %02x\n", port15_value&0x20);
|
||||
if ((port15_value&0x40) != (old_port15_value&0x40)) printf("port15 0x40 changed %02x\n", port15_value&0x40);
|
||||
if ((port15_value&0x80) != (old_port15_value&0x80)) printf("port15 0x80 changed %02x\n", port15_value&0x80);
|
||||
|
||||
// some 3rd party stuff has VDF
|
||||
// printf("ec_port15_out_w data %02x - VDF reset %02x clock %02x\n", data, data & 0x80, data & 0x40);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port16_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port16_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port16_value = state->port16_value;
|
||||
state->port16_value = data;
|
||||
|
||||
if ((state->port16_value&0x01) != (old_port16_value&0x01)) printf("port16 0x01 changed %02x\n", state->port16_value&0x01);
|
||||
if ((state->port16_value&0x02) != (old_port16_value&0x02)) printf("port16 0x02 changed %02x\n", state->port16_value&0x02);
|
||||
if ((state->port16_value&0x04) != (old_port16_value&0x04)) printf("port16 0x04 changed %02x\n", state->port16_value&0x04);
|
||||
if ((state->port16_value&0x08) != (old_port16_value&0x08)) printf("port16 0x08 changed %02x\n", state->port16_value&0x08);
|
||||
if ((state->port16_value&0x10) != (old_port16_value&0x10)) printf("port16 0x10 changed %02x\n", state->port16_value&0x10);
|
||||
if ((state->port16_value&0x20) != (old_port16_value&0x20)) printf("port16 0x20 changed %02x\n", state->port16_value&0x20);
|
||||
if ((state->port16_value&0x40) != (old_port16_value&0x40)) printf("port16 0x40 changed %02x\n", state->port16_value&0x40);
|
||||
if ((state->port16_value&0x80) != (old_port16_value&0x80)) printf("port16 0x80 changed %02x\n", state->port16_value&0x80);
|
||||
int old_port16_value = port16_value;
|
||||
port16_value = data;
|
||||
|
||||
if ((port16_value&0x01) != (old_port16_value&0x01)) printf("port16 0x01 changed %02x\n", port16_value&0x01);
|
||||
if ((port16_value&0x02) != (old_port16_value&0x02)) printf("port16 0x02 changed %02x\n", port16_value&0x02);
|
||||
if ((port16_value&0x04) != (old_port16_value&0x04)) printf("port16 0x04 changed %02x\n", port16_value&0x04);
|
||||
if ((port16_value&0x08) != (old_port16_value&0x08)) printf("port16 0x08 changed %02x\n", port16_value&0x08);
|
||||
if ((port16_value&0x10) != (old_port16_value&0x10)) printf("port16 0x10 changed %02x\n", port16_value&0x10);
|
||||
if ((port16_value&0x20) != (old_port16_value&0x20)) printf("port16 0x20 changed %02x\n", port16_value&0x20);
|
||||
if ((port16_value&0x40) != (old_port16_value&0x40)) printf("port16 0x40 changed %02x\n", port16_value&0x40);
|
||||
if ((port16_value&0x80) != (old_port16_value&0x80)) printf("port16 0x80 changed %02x\n", port16_value&0x80);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port17_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port17_out_w)
|
||||
{
|
||||
ecoinfr_state *state = space->machine().driver_data<ecoinfr_state>();
|
||||
int old_port17_value = state->port17_value;
|
||||
state->port17_value = data;
|
||||
|
||||
if ((state->port17_value&0x01) != (old_port17_value&0x01)) printf("port17 0x01 changed %02x\n", state->port17_value&0x01);
|
||||
if ((state->port17_value&0x02) != (old_port17_value&0x02)) printf("port17 0x02 changed %02x\n", state->port17_value&0x02);
|
||||
if ((state->port17_value&0x04) != (old_port17_value&0x04)) printf("port17 0x04 changed %02x\n", state->port17_value&0x04);
|
||||
if ((state->port17_value&0x08) != (old_port17_value&0x08)) printf("port17 0x08 changed %02x\n", state->port17_value&0x08);
|
||||
if ((state->port17_value&0x10) != (old_port17_value&0x10)) printf("port17 0x10 changed %02x\n", state->port17_value&0x10);
|
||||
if ((state->port17_value&0x20) != (old_port17_value&0x20)) printf("port17 0x20 changed %02x\n", state->port17_value&0x20);
|
||||
if ((state->port17_value&0x40) != (old_port17_value&0x40)) printf("port17 0x40 changed %02x\n", state->port17_value&0x40);
|
||||
if ((state->port17_value&0x80) != (old_port17_value&0x80)) printf("port17 0x80 changed %02x\n", state->port17_value&0x80);
|
||||
int old_port17_value = port17_value;
|
||||
port17_value = data;
|
||||
|
||||
if ((port17_value&0x01) != (old_port17_value&0x01)) printf("port17 0x01 changed %02x\n", port17_value&0x01);
|
||||
if ((port17_value&0x02) != (old_port17_value&0x02)) printf("port17 0x02 changed %02x\n", port17_value&0x02);
|
||||
if ((port17_value&0x04) != (old_port17_value&0x04)) printf("port17 0x04 changed %02x\n", port17_value&0x04);
|
||||
if ((port17_value&0x08) != (old_port17_value&0x08)) printf("port17 0x08 changed %02x\n", port17_value&0x08);
|
||||
if ((port17_value&0x10) != (old_port17_value&0x10)) printf("port17 0x10 changed %02x\n", port17_value&0x10);
|
||||
if ((port17_value&0x20) != (old_port17_value&0x20)) printf("port17 0x20 changed %02x\n", port17_value&0x20);
|
||||
if ((port17_value&0x40) != (old_port17_value&0x40)) printf("port17 0x40 changed %02x\n", port17_value&0x40);
|
||||
if ((port17_value&0x80) != (old_port17_value&0x80)) printf("port17 0x80 changed %02x\n", port17_value&0x80);
|
||||
|
||||
// some 3rd party stuff has VDF
|
||||
// printf("ec_port17_out_w data %02x - VDF data %02x\n", data, data & 0x40);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( ec_port18_out_w )
|
||||
WRITE8_MEMBER(ecoinfr_state::ec_port18_out_w)
|
||||
{
|
||||
// Kick Me (Watchdog)
|
||||
}
|
||||
@ -337,31 +362,31 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( portmap, AS_IO, 8, ecoinfr_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_WRITE_LEGACY(ec_port00_out_w) AM_READ_PORT("IN0") // Reel 1 Write
|
||||
AM_RANGE(0x01, 0x01) AM_WRITE_LEGACY(ec_port01_out_w) AM_READ_PORT("IN1") // Reel 2 Write + Reels Opto Read
|
||||
AM_RANGE(0x02, 0x02) AM_WRITE_LEGACY(ec_port02_out_w) AM_READ_PORT("IN2") // Reel 3 Write
|
||||
AM_RANGE(0x03, 0x03) AM_WRITE_LEGACY(ec_port03_out_w) AM_READ_PORT("IN3")
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE_LEGACY(ec_port04_out_w) AM_READ_PORT("IN4")
|
||||
AM_RANGE(0x05, 0x05) AM_WRITE_LEGACY(ec_port05_out_w) AM_READ_PORT("IN5")
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE_LEGACY(ec_port06_out_w) AM_READ_PORT("IN6")
|
||||
AM_RANGE(0x07, 0x07) AM_WRITE_LEGACY(ec_port07_out_w) AM_READ_PORT("IN7")
|
||||
AM_RANGE(0x08, 0x08) AM_WRITE_LEGACY(ec_port08_out_w)
|
||||
AM_RANGE(0x09, 0x09) AM_WRITE_LEGACY(ec_port09_out_w) // 09 Reel Enables
|
||||
AM_RANGE(0x0a, 0x0a) AM_WRITE_LEGACY(ec_port0a_out_w) // 10 (Sound 1)
|
||||
AM_RANGE(0x0b, 0x0b) AM_WRITE_LEGACY(ec_port0b_out_w) // 11 (Sound 2)
|
||||
AM_RANGE(0x0c, 0x0c) AM_WRITE_LEGACY(ec_port0c_out_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_WRITE_LEGACY(ec_port0d_out_w)
|
||||
AM_RANGE(0x0e, 0x0e) AM_WRITE_LEGACY(ec_port0e_out_w)
|
||||
AM_RANGE(0x0f, 0x0f) AM_WRITE_LEGACY(ec_port0f_out_w)
|
||||
AM_RANGE(0x10, 0x10) AM_WRITE_LEGACY(ec_port10_out_w) // 16 (Meter)
|
||||
AM_RANGE(0x11, 0x11) AM_WRITE_LEGACY(ec_port11_out_w) // SEC
|
||||
AM_RANGE(0x12, 0x12) AM_WRITE_LEGACY(ec_port12_out_w) // SEC
|
||||
AM_RANGE(0x13, 0x13) AM_WRITE_LEGACY(ec_port13_out_w)
|
||||
AM_RANGE(0x14, 0x14) AM_WRITE_LEGACY(ec_port14_out_w)
|
||||
AM_RANGE(0x15, 0x15) AM_WRITE_LEGACY(ec_port15_out_w) // SEC + VDF (3rd party)
|
||||
AM_RANGE(0x16, 0x16) AM_WRITE_LEGACY(ec_port16_out_w)
|
||||
AM_RANGE(0x17, 0x17) AM_WRITE_LEGACY(ec_port17_out_w) // Hopper + VDF (3rd party)
|
||||
AM_RANGE(0x18, 0x18) AM_WRITE_LEGACY(ec_port18_out_w) // 24 (Watchdog)
|
||||
AM_RANGE(0x00, 0x00) AM_WRITE(ec_port00_out_w) AM_READ_PORT("IN0") // Reel 1 Write
|
||||
AM_RANGE(0x01, 0x01) AM_WRITE(ec_port01_out_w) AM_READ_PORT("IN1") // Reel 2 Write + Reels Opto Read
|
||||
AM_RANGE(0x02, 0x02) AM_WRITE(ec_port02_out_w) AM_READ_PORT("IN2") // Reel 3 Write
|
||||
AM_RANGE(0x03, 0x03) AM_WRITE(ec_port03_out_w) AM_READ_PORT("IN3")
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE(ec_port04_out_w) AM_READ_PORT("IN4")
|
||||
AM_RANGE(0x05, 0x05) AM_WRITE(ec_port05_out_w) AM_READ_PORT("IN5")
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE(ec_port06_out_w) AM_READ_PORT("IN6")
|
||||
AM_RANGE(0x07, 0x07) AM_WRITE(ec_port07_out_w) AM_READ_PORT("IN7")
|
||||
AM_RANGE(0x08, 0x08) AM_WRITE(ec_port08_out_w)
|
||||
AM_RANGE(0x09, 0x09) AM_WRITE(ec_port09_out_w) // 09 Reel Enables
|
||||
AM_RANGE(0x0a, 0x0a) AM_WRITE(ec_port0a_out_w) // 10 (Sound 1)
|
||||
AM_RANGE(0x0b, 0x0b) AM_WRITE(ec_port0b_out_w) // 11 (Sound 2)
|
||||
AM_RANGE(0x0c, 0x0c) AM_WRITE(ec_port0c_out_w)
|
||||
AM_RANGE(0x0d, 0x0d) AM_WRITE(ec_port0d_out_w)
|
||||
AM_RANGE(0x0e, 0x0e) AM_WRITE(ec_port0e_out_w)
|
||||
AM_RANGE(0x0f, 0x0f) AM_WRITE(ec_port0f_out_w)
|
||||
AM_RANGE(0x10, 0x10) AM_WRITE(ec_port10_out_w) // 16 (Meter)
|
||||
AM_RANGE(0x11, 0x11) AM_WRITE(ec_port11_out_w) // SEC
|
||||
AM_RANGE(0x12, 0x12) AM_WRITE(ec_port12_out_w) // SEC
|
||||
AM_RANGE(0x13, 0x13) AM_WRITE(ec_port13_out_w)
|
||||
AM_RANGE(0x14, 0x14) AM_WRITE(ec_port14_out_w)
|
||||
AM_RANGE(0x15, 0x15) AM_WRITE(ec_port15_out_w) // SEC + VDF (3rd party)
|
||||
AM_RANGE(0x16, 0x16) AM_WRITE(ec_port16_out_w)
|
||||
AM_RANGE(0x17, 0x17) AM_WRITE(ec_port17_out_w) // Hopper + VDF (3rd party)
|
||||
AM_RANGE(0x18, 0x18) AM_WRITE(ec_port18_out_w) // 24 (Watchdog)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static CUSTOM_INPUT( ecoinfr_reel1_opto_r )
|
||||
|
@ -161,6 +161,10 @@ public:
|
||||
|
||||
UINT16 m_vram_0_bank_num;
|
||||
UINT16 m_vram_1_bank_num;
|
||||
DECLARE_WRITE16_MEMBER(galsnew_6295_bankswitch_w);
|
||||
DECLARE_WRITE16_MEMBER(galsnew_paletteram_w);
|
||||
DECLARE_WRITE16_MEMBER(galsnew_vram_0_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(galsnew_vram_1_bank_w);
|
||||
};
|
||||
|
||||
|
||||
@ -306,11 +310,11 @@ INPUT_PORTS_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static WRITE16_HANDLER( galsnew_6295_bankswitch_w )
|
||||
WRITE16_MEMBER(expro02_state::galsnew_6295_bankswitch_w)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
UINT8 *rom = space->machine().region("oki")->base();
|
||||
UINT8 *rom = machine().region("oki")->base();
|
||||
memcpy(&rom[0x30000],&rom[0x40000 + ((data >> 8) & 0x0f) * 0x10000],0x10000);
|
||||
}
|
||||
}
|
||||
@ -321,45 +325,45 @@ static WRITE16_HANDLER( galsnew_6295_bankswitch_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static WRITE16_HANDLER( galsnew_paletteram_w )
|
||||
WRITE16_MEMBER(expro02_state::galsnew_paletteram_w)
|
||||
{
|
||||
expro02_state *state = space->machine().driver_data<expro02_state>();
|
||||
data = COMBINE_DATA(&state->m_generic_paletteram_16[offset]);
|
||||
palette_set_color_rgb(space->machine(),offset,pal5bit(data >> 6),pal5bit(data >> 11),pal5bit(data >> 1));
|
||||
|
||||
data = COMBINE_DATA(&m_generic_paletteram_16[offset]);
|
||||
palette_set_color_rgb(machine(),offset,pal5bit(data >> 6),pal5bit(data >> 11),pal5bit(data >> 1));
|
||||
}
|
||||
|
||||
|
||||
static WRITE16_HANDLER(galsnew_vram_0_bank_w)
|
||||
WRITE16_MEMBER(expro02_state::galsnew_vram_0_bank_w)
|
||||
{
|
||||
expro02_state *state = space->machine().driver_data<expro02_state>();
|
||||
|
||||
int i;
|
||||
if(state->m_vram_0_bank_num != data)
|
||||
if(m_vram_0_bank_num != data)
|
||||
{
|
||||
for(i = 0; i < 0x1000 / 2; i += 2)
|
||||
{
|
||||
if(state->m_vram[0][i])
|
||||
if(m_vram[0][i])
|
||||
{
|
||||
state->kaneko16_vram_0_w(*space, i+1, data << 8, 0xFF00);
|
||||
kaneko16_vram_0_w(*&space, i+1, data << 8, 0xFF00);
|
||||
}
|
||||
}
|
||||
state->m_vram_0_bank_num = data;
|
||||
m_vram_0_bank_num = data;
|
||||
}
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER(galsnew_vram_1_bank_w)
|
||||
WRITE16_MEMBER(expro02_state::galsnew_vram_1_bank_w)
|
||||
{
|
||||
expro02_state *state = space->machine().driver_data<expro02_state>();
|
||||
|
||||
int i;
|
||||
if(state->m_vram_1_bank_num != data)
|
||||
if(m_vram_1_bank_num != data)
|
||||
{
|
||||
for(i = 0; i < 0x1000 / 2; i += 2)
|
||||
{
|
||||
if(state->m_vram[1][i])
|
||||
if(m_vram[1][i])
|
||||
{
|
||||
state->kaneko16_vram_1_w(*space, i+1, data << 8, 0xFF00);
|
||||
kaneko16_vram_1_w(*&space, i+1, data << 8, 0xFF00);
|
||||
}
|
||||
}
|
||||
state->m_vram_1_bank_num = data;
|
||||
m_vram_1_bank_num = data;
|
||||
}
|
||||
}
|
||||
|
||||
@ -384,7 +388,7 @@ static ADDRESS_MAP_START( galsnew_map, AS_PROGRAM, 16, expro02_state )
|
||||
AM_RANGE(0x582000, 0x582fff) AM_RAM AM_BASE(m_vscroll[1]) //
|
||||
AM_RANGE(0x583000, 0x583fff) AM_RAM AM_BASE(m_vscroll[0]) //
|
||||
|
||||
AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE_LEGACY(galsnew_paletteram_w) AM_SHARE("paletteram") // palette?
|
||||
AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE(galsnew_paletteram_w) AM_SHARE("paletteram") // palette?
|
||||
|
||||
AM_RANGE(0x680000, 0x68001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE(m_layers_0_regs) // sprite regs? tileregs?
|
||||
|
||||
@ -396,17 +400,17 @@ static ADDRESS_MAP_START( galsnew_map, AS_PROGRAM, 16, expro02_state )
|
||||
AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2")
|
||||
AM_RANGE(0x800004, 0x800005) AM_READ_PORT("DSW3")
|
||||
|
||||
AM_RANGE(0x900000, 0x900001) AM_WRITE_LEGACY(galsnew_6295_bankswitch_w)
|
||||
AM_RANGE(0x900000, 0x900001) AM_WRITE(galsnew_6295_bankswitch_w)
|
||||
|
||||
AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP /* ??? */
|
||||
|
||||
AM_RANGE(0xc80000, 0xc8ffff) AM_RAM
|
||||
|
||||
AM_RANGE(0xd80000, 0xd80001) AM_WRITE_LEGACY(galsnew_vram_1_bank_w) /* ??? */
|
||||
AM_RANGE(0xd80000, 0xd80001) AM_WRITE(galsnew_vram_1_bank_w) /* ??? */
|
||||
|
||||
AM_RANGE(0xe00000, 0xe00015) AM_READWRITE(galpanib_calc_r,galpanib_calc_w) /* CALC1 MCU interaction (simulated) */
|
||||
|
||||
AM_RANGE(0xe80000, 0xe80001) AM_WRITE_LEGACY(galsnew_vram_0_bank_w) /* ??? */
|
||||
AM_RANGE(0xe80000, 0xe80001) AM_WRITE(galsnew_vram_0_bank_w) /* ??? */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -420,7 +424,7 @@ static ADDRESS_MAP_START( fantasia_map, AS_PROGRAM, 16, expro02_state )
|
||||
AM_RANGE(0x581000, 0x581fff) AM_RAM_WRITE(kaneko16_vram_0_w) AM_BASE(m_vram[0]) //
|
||||
AM_RANGE(0x582000, 0x582fff) AM_RAM AM_BASE(m_vscroll[1]) //
|
||||
AM_RANGE(0x583000, 0x583fff) AM_RAM AM_BASE(m_vscroll[0]) //
|
||||
AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE_LEGACY(galsnew_paletteram_w) AM_SHARE("paletteram") // palette?
|
||||
AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE(galsnew_paletteram_w) AM_SHARE("paletteram") // palette?
|
||||
AM_RANGE(0x680000, 0x68001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE(m_layers_0_regs) // sprite regs? tileregs?
|
||||
AM_RANGE(0x700000, 0x700fff) AM_RAM AM_SHARE("spriteram") // sprites? 0x72f words tested
|
||||
AM_RANGE(0x780000, 0x78001f) AM_RAM_WRITE(kaneko16_sprites_regs_w) AM_BASE(m_sprites_regs) // sprite regs? tileregs?
|
||||
@ -428,12 +432,12 @@ static ADDRESS_MAP_START( fantasia_map, AS_PROGRAM, 16, expro02_state )
|
||||
AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2")
|
||||
AM_RANGE(0x800004, 0x800005) AM_READ_PORT("DSW3")
|
||||
AM_RANGE(0x800006, 0x800007) AM_NOP // ? used ?
|
||||
AM_RANGE(0x900000, 0x900001) AM_WRITE_LEGACY(galsnew_6295_bankswitch_w)
|
||||
AM_RANGE(0x900000, 0x900001) AM_WRITE(galsnew_6295_bankswitch_w)
|
||||
AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP /* ??? */
|
||||
AM_RANGE(0xc80000, 0xc8ffff) AM_RAM
|
||||
AM_RANGE(0xd80000, 0xd80001) AM_WRITE_LEGACY(galsnew_vram_1_bank_w) /* ??? */
|
||||
AM_RANGE(0xd80000, 0xd80001) AM_WRITE(galsnew_vram_1_bank_w) /* ??? */
|
||||
//AM_RANGE(0xe00000, 0xe00015) AM_READWRITE_LEGACY(galpanib_calc_r,galpanib_calc_w) /* CALC1 MCU interaction (simulated) */
|
||||
AM_RANGE(0xe80000, 0xe80001) AM_WRITE_LEGACY(galsnew_vram_0_bank_w) /* ??? */
|
||||
AM_RANGE(0xe80000, 0xe80001) AM_WRITE(galsnew_vram_0_bank_w) /* ??? */
|
||||
AM_RANGE(0xf00000, 0xf00001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0xff00)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
@ -118,6 +118,39 @@ public:
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
sknsspr_device* m_spritegen;
|
||||
DECLARE_WRITE16_MEMBER(galpani3_suprnova_sprite32_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_suprnova_sprite32regs_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_mcu_com0_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_mcu_com1_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_mcu_com2_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_mcu_com3_w);
|
||||
DECLARE_READ16_MEMBER(galpani3_mcu_status_r);
|
||||
DECLARE_READ16_MEMBER(galpani3_regs1_r);
|
||||
DECLARE_READ16_MEMBER(galpani3_regs2_r);
|
||||
DECLARE_READ16_MEMBER(galpani3_regs3_r);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_regs1_address_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_regs1_go_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_regs2_address_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_regs2_go_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_regs3_address_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_regs3_go_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer1_palette_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer2_palette_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer3_palette_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer3_scrolly_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer3_scrollx_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer2_scrolly_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer2_scrollx_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer1_scrolly_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer1_scrollx_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_priority_buffer_scrollx_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_priority_buffer_scrolly_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer1_enable_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer2_enable_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer3_enable_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer1_bgcol_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer2_bgcol_w);
|
||||
DECLARE_WRITE16_MEMBER(galpani3_framebuffer3_bgcol_w);
|
||||
};
|
||||
|
||||
|
||||
@ -434,20 +467,20 @@ static INPUT_PORTS_START( galpani3 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static WRITE16_HANDLER( galpani3_suprnova_sprite32_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_suprnova_sprite32_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_spriteram[offset]);
|
||||
|
||||
COMBINE_DATA(&m_spriteram[offset]);
|
||||
offset>>=1;
|
||||
state->m_spriteram32[offset]=(state->m_spriteram[offset*2+1]<<16) | (state->m_spriteram[offset*2]);
|
||||
m_spriteram32[offset]=(m_spriteram[offset*2+1]<<16) | (m_spriteram[offset*2]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_suprnova_sprite32regs_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_suprnova_sprite32regs_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_sprregs[offset]);
|
||||
|
||||
COMBINE_DATA(&m_sprregs[offset]);
|
||||
offset>>=1;
|
||||
state->m_spc_regs[offset]=(state->m_sprregs[offset*2+1]<<16) | (state->m_sprregs[offset*2]);
|
||||
m_spc_regs[offset]=(m_sprregs[offset*2+1]<<16) | (m_sprregs[offset*2]);
|
||||
}
|
||||
|
||||
|
||||
@ -547,36 +580,36 @@ INLINE void galpani3_mcu_com_w(address_space *space, offs_t offset, UINT16 data,
|
||||
galpani3_mcu_run(space->machine());
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_mcu_com0_w ) { galpani3_mcu_com_w(space, offset, data, mem_mask, 0); }
|
||||
static WRITE16_HANDLER( galpani3_mcu_com1_w ) { galpani3_mcu_com_w(space, offset, data, mem_mask, 1); }
|
||||
static WRITE16_HANDLER( galpani3_mcu_com2_w ) { galpani3_mcu_com_w(space, offset, data, mem_mask, 2); }
|
||||
static WRITE16_HANDLER( galpani3_mcu_com3_w ) { galpani3_mcu_com_w(space, offset, data, mem_mask, 3); }
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_mcu_com0_w){ galpani3_mcu_com_w(&space, offset, data, mem_mask, 0); }
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_mcu_com1_w){ galpani3_mcu_com_w(&space, offset, data, mem_mask, 1); }
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_mcu_com2_w){ galpani3_mcu_com_w(&space, offset, data, mem_mask, 2); }
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_mcu_com3_w){ galpani3_mcu_com_w(&space, offset, data, mem_mask, 3); }
|
||||
|
||||
static READ16_HANDLER( galpani3_mcu_status_r )
|
||||
READ16_MEMBER(galpani3_state::galpani3_mcu_status_r)
|
||||
{
|
||||
logerror("cpu '%s' (PC=%06X): read mcu status\n", space->device().tag(), cpu_get_previouspc(&space->device()));
|
||||
logerror("cpu '%s' (PC=%06X): read mcu status\n", space.device().tag(), cpu_get_previouspc(&space.device()));
|
||||
return 0;
|
||||
}
|
||||
|
||||
// might be blitter regs? - there are 3, probably GRAP2 chips
|
||||
|
||||
static READ16_HANDLER( galpani3_regs1_r )
|
||||
READ16_MEMBER(galpani3_state::galpani3_regs1_r)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0x2:
|
||||
return state->m_framebuffer1_enable;
|
||||
return m_framebuffer1_enable;
|
||||
|
||||
case 0xb:
|
||||
{
|
||||
state->m_regs1_i^=1;
|
||||
if (state->m_regs1_i) return 0xfffe;
|
||||
m_regs1_i^=1;
|
||||
if (m_regs1_i) return 0xfffe;
|
||||
else return 0xffff;
|
||||
}
|
||||
|
||||
default:
|
||||
logerror("cpu '%s' (PC=%06X): galpani3_regs1_r %02x %04x\n", space->device().tag(), cpu_get_previouspc(&space->device()), offset, mem_mask);
|
||||
logerror("cpu '%s' (PC=%06X): galpani3_regs1_r %02x %04x\n", space.device().tag(), cpu_get_previouspc(&space.device()), offset, mem_mask);
|
||||
break;
|
||||
|
||||
}
|
||||
@ -585,23 +618,23 @@ static READ16_HANDLER( galpani3_regs1_r )
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER( galpani3_regs2_r )
|
||||
READ16_MEMBER(galpani3_state::galpani3_regs2_r)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0x2:
|
||||
return state->m_framebuffer2_enable;
|
||||
return m_framebuffer2_enable;
|
||||
|
||||
case 0xb:
|
||||
{
|
||||
state->m_regs2_i^=1;
|
||||
if (state->m_regs2_i) return 0xfffe;
|
||||
m_regs2_i^=1;
|
||||
if (m_regs2_i) return 0xfffe;
|
||||
else return 0xffff;
|
||||
}
|
||||
|
||||
default:
|
||||
logerror("cpu '%s' (PC=%06X): galpani3_regs2_r %02x %04x\n", space->device().tag(), cpu_get_previouspc(&space->device()), offset, mem_mask);
|
||||
logerror("cpu '%s' (PC=%06X): galpani3_regs2_r %02x %04x\n", space.device().tag(), cpu_get_previouspc(&space.device()), offset, mem_mask);
|
||||
break;
|
||||
|
||||
}
|
||||
@ -610,23 +643,23 @@ static READ16_HANDLER( galpani3_regs2_r )
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER( galpani3_regs3_r )
|
||||
READ16_MEMBER(galpani3_state::galpani3_regs3_r)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0x2:
|
||||
return state->m_framebuffer3_enable;
|
||||
return m_framebuffer3_enable;
|
||||
|
||||
case 0xb:
|
||||
{
|
||||
state->m_regs3_i^=1;
|
||||
if (state->m_regs3_i) return 0xfffe;
|
||||
m_regs3_i^=1;
|
||||
if (m_regs3_i) return 0xfffe;
|
||||
else return 0xffff;
|
||||
}
|
||||
|
||||
default:
|
||||
logerror("cpu '%s' (PC=%06X): galpani3_regs3_r %02x %04x\n", space->device().tag(), cpu_get_previouspc(&space->device()), offset, mem_mask);
|
||||
logerror("cpu '%s' (PC=%06X): galpani3_regs3_r %02x %04x\n", space.device().tag(), cpu_get_previouspc(&space.device()), offset, mem_mask);
|
||||
break;
|
||||
|
||||
}
|
||||
@ -686,62 +719,62 @@ static void gp3_do_rle(UINT32 address, UINT16*framebuffer, UINT8* rledata)
|
||||
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_regs1_address_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_regs1_address_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
|
||||
logerror("galpani3_regs1_address_w %04x\n",data);
|
||||
COMBINE_DATA(&state->m_regs1_address_regs[offset]);
|
||||
COMBINE_DATA(&m_regs1_address_regs[offset]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_regs1_go_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_regs1_go_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
UINT32 address = state->m_regs1_address_regs[1]| (state->m_regs1_address_regs[0]<<16);
|
||||
UINT8* rledata = space->machine().region("gfx2")->base();
|
||||
|
||||
UINT32 address = m_regs1_address_regs[1]| (m_regs1_address_regs[0]<<16);
|
||||
UINT8* rledata = machine().region("gfx2")->base();
|
||||
|
||||
printf("galpani3_regs1_go_w? %08x\n",address );
|
||||
if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, state->m_framebuffer1, rledata);
|
||||
if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, m_framebuffer1, rledata);
|
||||
}
|
||||
|
||||
|
||||
static WRITE16_HANDLER( galpani3_regs2_address_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_regs2_address_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
|
||||
logerror("galpani3_regs2_address_w %04x\n",data);
|
||||
COMBINE_DATA(&state->m_regs2_address_regs[offset]);
|
||||
COMBINE_DATA(&m_regs2_address_regs[offset]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_regs2_go_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_regs2_go_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
UINT32 address = state->m_regs2_address_regs[1]| (state->m_regs2_address_regs[0]<<16);
|
||||
UINT8* rledata = space->machine().region("gfx2")->base();
|
||||
|
||||
UINT32 address = m_regs2_address_regs[1]| (m_regs2_address_regs[0]<<16);
|
||||
UINT8* rledata = machine().region("gfx2")->base();
|
||||
|
||||
printf("galpani3_regs2_go_w? %08x\n", address );
|
||||
|
||||
// hack to prevent title screen being corrupt - these might actually be size registers
|
||||
// for the RLE request
|
||||
if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, state->m_framebuffer2, rledata);
|
||||
if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, m_framebuffer2, rledata);
|
||||
}
|
||||
|
||||
|
||||
|
||||
static WRITE16_HANDLER( galpani3_regs3_address_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_regs3_address_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
|
||||
logerror("galpani3_regs3_address_w %04x\n",data);
|
||||
COMBINE_DATA(&state->m_regs3_address_regs[offset]);
|
||||
COMBINE_DATA(&m_regs3_address_regs[offset]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_regs3_go_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_regs3_go_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
UINT32 address = state->m_regs3_address_regs[1]| (state->m_regs3_address_regs[0]<<16);
|
||||
UINT8* rledata = space->machine().region("gfx2")->base();
|
||||
|
||||
UINT32 address = m_regs3_address_regs[1]| (m_regs3_address_regs[0]<<16);
|
||||
UINT8* rledata = machine().region("gfx2")->base();
|
||||
|
||||
printf("galpani3_regs3_go_w? %08x\n",address );
|
||||
|
||||
if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, state->m_framebuffer3, rledata);
|
||||
if ((data==0x2000) || (data==0x3000)) gp3_do_rle(address, m_framebuffer3, rledata);
|
||||
}
|
||||
|
||||
static void set_color_555_gp3(running_machine &machine, pen_t color, int rshift, int gshift, int bshift, UINT16 data)
|
||||
@ -749,116 +782,116 @@ static void set_color_555_gp3(running_machine &machine, pen_t color, int rshift,
|
||||
palette_set_color_rgb(machine, color, pal5bit(data >> rshift), pal5bit(data >> gshift), pal5bit(data >> bshift));
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer1_palette_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer1_palette_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_framebuffer1_palette[offset]);
|
||||
set_color_555_gp3(space->machine(), offset+0x4000, 5, 10, 0, state->m_framebuffer1_palette[offset]);
|
||||
|
||||
COMBINE_DATA(&m_framebuffer1_palette[offset]);
|
||||
set_color_555_gp3(machine(), offset+0x4000, 5, 10, 0, m_framebuffer1_palette[offset]);
|
||||
}
|
||||
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer2_palette_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer2_palette_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_framebuffer2_palette[offset]);
|
||||
set_color_555_gp3(space->machine(), offset+0x4100, 5, 10, 0, state->m_framebuffer2_palette[offset]);
|
||||
|
||||
COMBINE_DATA(&m_framebuffer2_palette[offset]);
|
||||
set_color_555_gp3(machine(), offset+0x4100, 5, 10, 0, m_framebuffer2_palette[offset]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer3_palette_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer3_palette_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_framebuffer3_palette[offset]);
|
||||
set_color_555_gp3(space->machine(), offset+0x4200, 5, 10, 0, state->m_framebuffer3_palette[offset]);
|
||||
|
||||
COMBINE_DATA(&m_framebuffer3_palette[offset]);
|
||||
set_color_555_gp3(machine(), offset+0x4200, 5, 10, 0, m_framebuffer3_palette[offset]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer3_scrolly_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer3_scrolly_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer3_scrolly = data;
|
||||
|
||||
m_framebuffer3_scrolly = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer3_scrollx_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer3_scrollx_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer3_scrollx = data;
|
||||
|
||||
m_framebuffer3_scrollx = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer2_scrolly_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer2_scrolly_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer2_scrolly = data;
|
||||
|
||||
m_framebuffer2_scrolly = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer2_scrollx_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer2_scrollx_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer2_scrollx = data;
|
||||
|
||||
m_framebuffer2_scrollx = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer1_scrolly_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer1_scrolly_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer1_scrolly = data;
|
||||
|
||||
m_framebuffer1_scrolly = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer1_scrollx_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer1_scrollx_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer1_scrollx = data;
|
||||
|
||||
m_framebuffer1_scrollx = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_priority_buffer_scrollx_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_priority_buffer_scrollx_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_priority_buffer_scrollx = data;
|
||||
|
||||
m_priority_buffer_scrollx = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_priority_buffer_scrolly_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_priority_buffer_scrolly_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_priority_buffer_scrolly = data;
|
||||
|
||||
m_priority_buffer_scrolly = data;
|
||||
}
|
||||
|
||||
/* I'm not convinced these are enables */
|
||||
static WRITE16_HANDLER( galpani3_framebuffer1_enable_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer1_enable_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer1_enable = data;
|
||||
|
||||
m_framebuffer1_enable = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer2_enable_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer2_enable_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer2_enable = data;
|
||||
|
||||
m_framebuffer2_enable = data;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer3_enable_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer3_enable_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
state->m_framebuffer3_enable = data;
|
||||
|
||||
m_framebuffer3_enable = data;
|
||||
}
|
||||
|
||||
/* definitely looks like a cycling bg colour used for the girls */
|
||||
static WRITE16_HANDLER( galpani3_framebuffer1_bgcol_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer1_bgcol_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_framebuffer1_bgcol[offset]);
|
||||
set_color_555_gp3(space->machine(), offset+0x4300, 5, 10, 0, state->m_framebuffer1_bgcol[offset]);
|
||||
|
||||
COMBINE_DATA(&m_framebuffer1_bgcol[offset]);
|
||||
set_color_555_gp3(machine(), offset+0x4300, 5, 10, 0, m_framebuffer1_bgcol[offset]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer2_bgcol_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer2_bgcol_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_framebuffer2_bgcol[offset]);
|
||||
set_color_555_gp3(space->machine(), offset+0x4301, 5, 10, 0, state->m_framebuffer2_bgcol[offset]);
|
||||
|
||||
COMBINE_DATA(&m_framebuffer2_bgcol[offset]);
|
||||
set_color_555_gp3(machine(), offset+0x4301, 5, 10, 0, m_framebuffer2_bgcol[offset]);
|
||||
}
|
||||
|
||||
|
||||
static WRITE16_HANDLER( galpani3_framebuffer3_bgcol_w )
|
||||
WRITE16_MEMBER(galpani3_state::galpani3_framebuffer3_bgcol_w)
|
||||
{
|
||||
galpani3_state *state = space->machine().driver_data<galpani3_state>();
|
||||
COMBINE_DATA(&state->m_framebuffer3_bgcol[offset]);
|
||||
set_color_555_gp3(space->machine(), offset+0x4302, 5, 10, 0, state->m_framebuffer3_bgcol[offset]);
|
||||
|
||||
COMBINE_DATA(&m_framebuffer3_bgcol[offset]);
|
||||
set_color_555_gp3(machine(), offset+0x4302, 5, 10, 0, m_framebuffer3_bgcol[offset]);
|
||||
}
|
||||
|
||||
|
||||
@ -869,66 +902,66 @@ static ADDRESS_MAP_START( galpani3_map, AS_PROGRAM, 16, galpani3_state )
|
||||
AM_RANGE(0x200000, 0x20ffff) AM_RAM // area [B] - Work RAM
|
||||
AM_RANGE(0x280000, 0x287fff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_SHARE("paletteram") // area [A] - palette for sprites
|
||||
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM_WRITE_LEGACY(galpani3_suprnova_sprite32_w) AM_SHARE("spriteram")
|
||||
AM_RANGE(0x380000, 0x38003f) AM_RAM_WRITE_LEGACY(galpani3_suprnova_sprite32regs_w) AM_BASE(m_sprregs)
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM_WRITE(galpani3_suprnova_sprite32_w) AM_SHARE("spriteram")
|
||||
AM_RANGE(0x380000, 0x38003f) AM_RAM_WRITE(galpani3_suprnova_sprite32regs_w) AM_BASE(m_sprregs)
|
||||
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_BASE(m_mcu_ram) // area [C]
|
||||
|
||||
AM_RANGE(0x580000, 0x580001) AM_WRITE_LEGACY(galpani3_mcu_com0_w) // ] see $387e8: these 2 locations are written (w.#$ffff)
|
||||
AM_RANGE(0x600000, 0x600001) AM_WRITE_LEGACY(galpani3_mcu_com1_w) // ] then bit #0 of $780000.l is tested: 0 = OK!
|
||||
AM_RANGE(0x680000, 0x680001) AM_WRITE_LEGACY(galpani3_mcu_com2_w) // ] see $387e8: these 2 locations are written (w.#$ffff)
|
||||
AM_RANGE(0x700000, 0x700001) AM_WRITE_LEGACY(galpani3_mcu_com3_w) // ] then bit #0 of $780000.l is tested: 0 = OK!
|
||||
AM_RANGE(0x780000, 0x780001) AM_READ_LEGACY(galpani3_mcu_status_r)
|
||||
AM_RANGE(0x580000, 0x580001) AM_WRITE(galpani3_mcu_com0_w) // ] see $387e8: these 2 locations are written (w.#$ffff)
|
||||
AM_RANGE(0x600000, 0x600001) AM_WRITE(galpani3_mcu_com1_w) // ] then bit #0 of $780000.l is tested: 0 = OK!
|
||||
AM_RANGE(0x680000, 0x680001) AM_WRITE(galpani3_mcu_com2_w) // ] see $387e8: these 2 locations are written (w.#$ffff)
|
||||
AM_RANGE(0x700000, 0x700001) AM_WRITE(galpani3_mcu_com3_w) // ] then bit #0 of $780000.l is tested: 0 = OK!
|
||||
AM_RANGE(0x780000, 0x780001) AM_READ(galpani3_mcu_status_r)
|
||||
|
||||
// GRAP2 1?
|
||||
AM_RANGE(0x800000, 0x8003ff) AM_RAM // ??? see subroutine $39f42 (R?)
|
||||
AM_RANGE(0x800400, 0x800401) AM_WRITE_LEGACY(galpani3_framebuffer1_scrollx_w) // scroll?
|
||||
AM_RANGE(0x800400, 0x800401) AM_WRITE(galpani3_framebuffer1_scrollx_w) // scroll?
|
||||
AM_RANGE(0x800800, 0x800bff) AM_RAM // ??? see subroutine $39f42 (R?)
|
||||
AM_RANGE(0x800c00, 0x800c01) AM_WRITE_LEGACY(galpani3_framebuffer1_scrolly_w) // scroll?
|
||||
AM_RANGE(0x800c02, 0x800c03) AM_WRITE_LEGACY(galpani3_framebuffer1_enable_w) // enable?
|
||||
AM_RANGE(0x800c06, 0x800c07) AM_WRITE_LEGACY(galpani3_framebuffer1_bgcol_w) AM_BASE(m_framebuffer1_bgcol) // bg colour? cycles ingame, for girls?
|
||||
AM_RANGE(0x800c00, 0x800c01) AM_WRITE(galpani3_framebuffer1_scrolly_w) // scroll?
|
||||
AM_RANGE(0x800c02, 0x800c03) AM_WRITE(galpani3_framebuffer1_enable_w) // enable?
|
||||
AM_RANGE(0x800c06, 0x800c07) AM_WRITE(galpani3_framebuffer1_bgcol_w) AM_BASE(m_framebuffer1_bgcol) // bg colour? cycles ingame, for girls?
|
||||
AM_RANGE(0x800c10, 0x800c11) AM_RAM AM_BASE(m_framebuffer1_bright1) // brightness / blend amount?
|
||||
AM_RANGE(0x800c12, 0x800c13) AM_RAM AM_BASE(m_framebuffer1_bright2) // similar.
|
||||
AM_RANGE(0x800c18, 0x800c1b) AM_WRITE_LEGACY(galpani3_regs1_address_w) // ROM address of RLE data, in bytes
|
||||
AM_RANGE(0x800c1e, 0x800c1f) AM_WRITE_LEGACY(galpani3_regs1_go_w) // ?
|
||||
AM_RANGE(0x800c00, 0x800c1f) AM_READ_LEGACY(galpani3_regs1_r)// ? R layer regs ? see subroutine $3a03e
|
||||
AM_RANGE(0x880000, 0x8801ff) AM_RAM_WRITE_LEGACY(galpani3_framebuffer1_palette_w) AM_BASE(m_framebuffer1_palette) // palette
|
||||
AM_RANGE(0x800c18, 0x800c1b) AM_WRITE(galpani3_regs1_address_w) // ROM address of RLE data, in bytes
|
||||
AM_RANGE(0x800c1e, 0x800c1f) AM_WRITE(galpani3_regs1_go_w) // ?
|
||||
AM_RANGE(0x800c00, 0x800c1f) AM_READ(galpani3_regs1_r)// ? R layer regs ? see subroutine $3a03e
|
||||
AM_RANGE(0x880000, 0x8801ff) AM_RAM_WRITE(galpani3_framebuffer1_palette_w) AM_BASE(m_framebuffer1_palette) // palette
|
||||
AM_RANGE(0x900000, 0x97ffff) AM_RAM AM_BASE(m_framebuffer1)// area [D] - R area ? odd bytes only, initialized 00..ff,00..ff,...
|
||||
|
||||
// GRAP2 2?
|
||||
AM_RANGE(0xa00000, 0xa003ff) AM_RAM // ??? see subroutine $39f42 (G?)
|
||||
AM_RANGE(0xa00400, 0xa00401) AM_WRITE_LEGACY(galpani3_framebuffer2_scrollx_w)
|
||||
AM_RANGE(0xa00400, 0xa00401) AM_WRITE(galpani3_framebuffer2_scrollx_w)
|
||||
AM_RANGE(0xa00800, 0xa00bff) AM_RAM // ??? see subroutine $39f42 (G?)
|
||||
AM_RANGE(0xa00c00, 0xa00c01) AM_WRITE_LEGACY(galpani3_framebuffer2_scrolly_w)
|
||||
AM_RANGE(0xa00c02, 0xa00c03) AM_WRITE_LEGACY(galpani3_framebuffer2_enable_w) // enable?
|
||||
AM_RANGE(0xa00c06, 0xa00c07) AM_WRITE_LEGACY(galpani3_framebuffer2_bgcol_w) AM_BASE(m_framebuffer2_bgcol) // bg colour? same values as previous layer
|
||||
AM_RANGE(0xa00c00, 0xa00c01) AM_WRITE(galpani3_framebuffer2_scrolly_w)
|
||||
AM_RANGE(0xa00c02, 0xa00c03) AM_WRITE(galpani3_framebuffer2_enable_w) // enable?
|
||||
AM_RANGE(0xa00c06, 0xa00c07) AM_WRITE(galpani3_framebuffer2_bgcol_w) AM_BASE(m_framebuffer2_bgcol) // bg colour? same values as previous layer
|
||||
AM_RANGE(0xa00c10, 0xa00c11) AM_RAM AM_BASE(m_framebuffer2_bright1) // similar..
|
||||
AM_RANGE(0xa00c12, 0xa00c13) AM_RAM AM_BASE(m_framebuffer2_bright2) // brightness / blend amount?
|
||||
AM_RANGE(0xa00c00, 0xa00c1f) AM_READ_LEGACY(galpani3_regs2_r) // ? G layer regs ? see subroutine $3a03e
|
||||
AM_RANGE(0xa00c18, 0xa00c1b) AM_WRITE_LEGACY(galpani3_regs2_address_w) // ROM address of RLE data, in bytes
|
||||
AM_RANGE(0xa00c1e, 0xa00c1f) AM_WRITE_LEGACY(galpani3_regs2_go_w) // ?
|
||||
AM_RANGE(0xa80000, 0xa801ff) AM_RAM_WRITE_LEGACY(galpani3_framebuffer2_palette_w) AM_BASE(m_framebuffer2_palette) // palette
|
||||
AM_RANGE(0xa00c00, 0xa00c1f) AM_READ(galpani3_regs2_r) // ? G layer regs ? see subroutine $3a03e
|
||||
AM_RANGE(0xa00c18, 0xa00c1b) AM_WRITE(galpani3_regs2_address_w) // ROM address of RLE data, in bytes
|
||||
AM_RANGE(0xa00c1e, 0xa00c1f) AM_WRITE(galpani3_regs2_go_w) // ?
|
||||
AM_RANGE(0xa80000, 0xa801ff) AM_RAM_WRITE(galpani3_framebuffer2_palette_w) AM_BASE(m_framebuffer2_palette) // palette
|
||||
AM_RANGE(0xb00000, 0xb7ffff) AM_RAM AM_BASE(m_framebuffer2) // area [E] - G area ? odd bytes only, initialized 00..ff,00..ff,...
|
||||
|
||||
// GRAP2 3?
|
||||
AM_RANGE(0xc00000, 0xc003ff) AM_RAM // row scroll??
|
||||
AM_RANGE(0xc00400, 0xc00401) AM_WRITE_LEGACY(galpani3_framebuffer3_scrollx_w) // scroll?
|
||||
AM_RANGE(0xc00400, 0xc00401) AM_WRITE(galpani3_framebuffer3_scrollx_w) // scroll?
|
||||
AM_RANGE(0xc00800, 0xc00bff) AM_RAM // column scroll??
|
||||
AM_RANGE(0xc00c00, 0xc00c01) AM_WRITE_LEGACY(galpani3_framebuffer3_scrolly_w) // scroll?
|
||||
AM_RANGE(0xc00c02, 0xc00c03) AM_WRITE_LEGACY(galpani3_framebuffer3_enable_w) // enable?
|
||||
AM_RANGE(0xc00c06, 0xc00c07) AM_WRITE_LEGACY(galpani3_framebuffer3_bgcol_w) AM_BASE(m_framebuffer3_bgcol) // bg colour? not used?
|
||||
AM_RANGE(0xc00c00, 0xc00c01) AM_WRITE(galpani3_framebuffer3_scrolly_w) // scroll?
|
||||
AM_RANGE(0xc00c02, 0xc00c03) AM_WRITE(galpani3_framebuffer3_enable_w) // enable?
|
||||
AM_RANGE(0xc00c06, 0xc00c07) AM_WRITE(galpani3_framebuffer3_bgcol_w) AM_BASE(m_framebuffer3_bgcol) // bg colour? not used?
|
||||
AM_RANGE(0xc00c10, 0xc00c11) AM_RAM AM_BASE(m_framebuffer3_bright1) // brightness / blend amount?
|
||||
AM_RANGE(0xc00c12, 0xc00c13) AM_RAM AM_BASE(m_framebuffer3_bright2) // similar..
|
||||
AM_RANGE(0xc00c18, 0xc00c1b) AM_WRITE_LEGACY(galpani3_regs3_address_w) // ROM address of RLE data, in bytes
|
||||
AM_RANGE(0xc00c1e, 0xc00c1f) AM_WRITE_LEGACY(galpani3_regs3_go_w) // ?
|
||||
AM_RANGE(0xc00c00, 0xc00c1f) AM_READ_LEGACY(galpani3_regs3_r) // ? B layer regs ? see subroutine $3a03e
|
||||
AM_RANGE(0xc80000, 0xc801ff) AM_RAM_WRITE_LEGACY(galpani3_framebuffer3_palette_w) AM_BASE(m_framebuffer3_palette) // palette
|
||||
AM_RANGE(0xc00c18, 0xc00c1b) AM_WRITE(galpani3_regs3_address_w) // ROM address of RLE data, in bytes
|
||||
AM_RANGE(0xc00c1e, 0xc00c1f) AM_WRITE(galpani3_regs3_go_w) // ?
|
||||
AM_RANGE(0xc00c00, 0xc00c1f) AM_READ(galpani3_regs3_r) // ? B layer regs ? see subroutine $3a03e
|
||||
AM_RANGE(0xc80000, 0xc801ff) AM_RAM_WRITE(galpani3_framebuffer3_palette_w) AM_BASE(m_framebuffer3_palette) // palette
|
||||
AM_RANGE(0xd00000, 0xd7ffff) AM_RAM AM_BASE(m_framebuffer3) // area [F] - B area ? odd bytes only, initialized 00..ff,00..ff,...
|
||||
|
||||
// ?? priority / alpha buffer?
|
||||
AM_RANGE(0xe00000, 0xe7ffff) AM_RAM AM_BASE(m_priority_buffer) // area [J] - A area ? odd bytes only, initialized 00..ff,00..ff,..., then cleared
|
||||
AM_RANGE(0xe80000, 0xe80001) AM_WRITE_LEGACY(galpani3_priority_buffer_scrollx_w) // scroll?
|
||||
AM_RANGE(0xe80002, 0xe80003) AM_WRITE_LEGACY(galpani3_priority_buffer_scrolly_w) // scroll?
|
||||
AM_RANGE(0xe80000, 0xe80001) AM_WRITE(galpani3_priority_buffer_scrollx_w) // scroll?
|
||||
AM_RANGE(0xe80002, 0xe80003) AM_WRITE(galpani3_priority_buffer_scrolly_w) // scroll?
|
||||
|
||||
|
||||
AM_RANGE(0xf00000, 0xf00001) AM_NOP // ? written once (2nd opcode, $1.b)
|
||||
|
@ -204,6 +204,19 @@ public:
|
||||
required_device<cpu_device> m_subcpu;
|
||||
sknsspr_device* m_spritegen1;
|
||||
sknsspr_device* m_spritegen2;
|
||||
DECLARE_WRITE16_MEMBER(jchan_mcu_com0_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_mcu_com1_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_mcu_com2_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_mcu_com3_w);
|
||||
DECLARE_READ16_MEMBER(jchan_mcu_status_r);
|
||||
DECLARE_WRITE16_MEMBER(jchan_ctrl_w);
|
||||
DECLARE_READ16_MEMBER(jchan_ctrl_r);
|
||||
DECLARE_WRITE16_MEMBER(main2sub_cmd_w);
|
||||
DECLARE_WRITE16_MEMBER(sub2main_cmd_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32_1_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32regs_1_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32_2_w);
|
||||
DECLARE_WRITE16_MEMBER(jchan_suprnova_sprite32regs_2_w);
|
||||
};
|
||||
|
||||
|
||||
@ -277,14 +290,14 @@ INLINE void jchan_mcu_com_w(address_space *space, offs_t offset, UINT16 data, UI
|
||||
jchan_mcu_run(space->machine());
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( jchan_mcu_com0_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 0); }
|
||||
static WRITE16_HANDLER( jchan_mcu_com1_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 1); }
|
||||
static WRITE16_HANDLER( jchan_mcu_com2_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 2); }
|
||||
static WRITE16_HANDLER( jchan_mcu_com3_w ) { jchan_mcu_com_w(space, offset, data, mem_mask, 3); }
|
||||
WRITE16_MEMBER(jchan_state::jchan_mcu_com0_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 0); }
|
||||
WRITE16_MEMBER(jchan_state::jchan_mcu_com1_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 1); }
|
||||
WRITE16_MEMBER(jchan_state::jchan_mcu_com2_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 2); }
|
||||
WRITE16_MEMBER(jchan_state::jchan_mcu_com3_w){ jchan_mcu_com_w(&space, offset, data, mem_mask, 3); }
|
||||
|
||||
static READ16_HANDLER( jchan_mcu_status_r )
|
||||
READ16_MEMBER(jchan_state::jchan_mcu_status_r)
|
||||
{
|
||||
logerror("cpu '%s' (PC=%06X): read mcu status\n", space->device().tag(), cpu_get_previouspc(&space->device()));
|
||||
logerror("cpu '%s' (PC=%06X): read mcu status\n", space.device().tag(), cpu_get_previouspc(&space.device()));
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -416,24 +429,24 @@ static SCREEN_UPDATE_IND16(jchan)
|
||||
$f00000 is the only location also written
|
||||
*/
|
||||
|
||||
static WRITE16_HANDLER( jchan_ctrl_w )
|
||||
WRITE16_MEMBER(jchan_state::jchan_ctrl_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
state->m_irq_sub_enable = data & 0x8000; // hack / guess!
|
||||
|
||||
m_irq_sub_enable = data & 0x8000; // hack / guess!
|
||||
}
|
||||
|
||||
static READ16_HANDLER ( jchan_ctrl_r )
|
||||
READ16_MEMBER(jchan_state::jchan_ctrl_r)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
|
||||
switch(offset)
|
||||
{
|
||||
case 0/2: return input_port_read(space->machine(), "P1");
|
||||
case 2/2: return input_port_read(space->machine(), "P2");
|
||||
case 4/2: return input_port_read(space->machine(), "SYSTEM");
|
||||
case 6/2: return input_port_read(space->machine(), "EXTRA");
|
||||
case 0/2: return input_port_read(machine(), "P1");
|
||||
case 2/2: return input_port_read(machine(), "P2");
|
||||
case 4/2: return input_port_read(machine(), "SYSTEM");
|
||||
case 6/2: return input_port_read(machine(), "EXTRA");
|
||||
default: logerror("jchan_ctrl_r unknown!"); break;
|
||||
}
|
||||
return state->m_ctrl[offset];
|
||||
return m_ctrl[offset];
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
@ -443,52 +456,52 @@ static READ16_HANDLER ( jchan_ctrl_r )
|
||||
***************************************************************************/
|
||||
|
||||
/* communications - hacky! */
|
||||
static WRITE16_HANDLER( main2sub_cmd_w )
|
||||
WRITE16_MEMBER(jchan_state::main2sub_cmd_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
COMBINE_DATA(&state->m_mainsub_shared_ram[0x03ffe/2]);
|
||||
cputag_set_input_line(space->machine(), "sub", 4, HOLD_LINE);
|
||||
|
||||
COMBINE_DATA(&m_mainsub_shared_ram[0x03ffe/2]);
|
||||
cputag_set_input_line(machine(), "sub", 4, HOLD_LINE);
|
||||
}
|
||||
|
||||
// is this called?
|
||||
static WRITE16_HANDLER( sub2main_cmd_w )
|
||||
WRITE16_MEMBER(jchan_state::sub2main_cmd_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
COMBINE_DATA(&state->m_mainsub_shared_ram[0x0000/2]);
|
||||
cputag_set_input_line(space->machine(), "maincpu", 3, HOLD_LINE);
|
||||
|
||||
COMBINE_DATA(&m_mainsub_shared_ram[0x0000/2]);
|
||||
cputag_set_input_line(machine(), "maincpu", 3, HOLD_LINE);
|
||||
}
|
||||
|
||||
/* ram convert for suprnova (requires 32-bit stuff) */
|
||||
static WRITE16_HANDLER( jchan_suprnova_sprite32_1_w )
|
||||
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32_1_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
COMBINE_DATA(&state->m_spriteram_1[offset]);
|
||||
|
||||
COMBINE_DATA(&m_spriteram_1[offset]);
|
||||
offset>>=1;
|
||||
state->m_sprite_ram32_1[offset]=(state->m_spriteram_1[offset*2+1]<<16) | (state->m_spriteram_1[offset*2]);
|
||||
m_sprite_ram32_1[offset]=(m_spriteram_1[offset*2+1]<<16) | (m_spriteram_1[offset*2]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( jchan_suprnova_sprite32regs_1_w )
|
||||
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32regs_1_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
COMBINE_DATA(&state->m_sprregs_1[offset]);
|
||||
|
||||
COMBINE_DATA(&m_sprregs_1[offset]);
|
||||
offset>>=1;
|
||||
state->m_sprite_regs32_1[offset]=(state->m_sprregs_1[offset*2+1]<<16) | (state->m_sprregs_1[offset*2]);
|
||||
m_sprite_regs32_1[offset]=(m_sprregs_1[offset*2+1]<<16) | (m_sprregs_1[offset*2]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( jchan_suprnova_sprite32_2_w )
|
||||
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32_2_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
COMBINE_DATA(&state->m_spriteram_2[offset]);
|
||||
|
||||
COMBINE_DATA(&m_spriteram_2[offset]);
|
||||
offset>>=1;
|
||||
state->m_sprite_ram32_2[offset]=(state->m_spriteram_2[offset*2+1]<<16) | (state->m_spriteram_2[offset*2]);
|
||||
m_sprite_ram32_2[offset]=(m_spriteram_2[offset*2+1]<<16) | (m_spriteram_2[offset*2]);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( jchan_suprnova_sprite32regs_2_w )
|
||||
WRITE16_MEMBER(jchan_state::jchan_suprnova_sprite32regs_2_w)
|
||||
{
|
||||
jchan_state *state = space->machine().driver_data<jchan_state>();
|
||||
COMBINE_DATA(&state->m_sprregs_2[offset]);
|
||||
|
||||
COMBINE_DATA(&m_sprregs_2[offset]);
|
||||
offset>>=1;
|
||||
state->m_sprite_regs32_2[offset]=(state->m_sprregs_2[offset*2+1]<<16) | (state->m_sprregs_2[offset*2]);
|
||||
m_sprite_regs32_2[offset]=(m_sprregs_2[offset*2+1]<<16) | (m_sprregs_2[offset*2]);
|
||||
}
|
||||
|
||||
|
||||
@ -497,21 +510,21 @@ static ADDRESS_MAP_START( jchan_main, AS_PROGRAM, 16, jchan_state )
|
||||
AM_RANGE(0x200000, 0x20ffff) AM_RAM // Work RAM - [A] grid tested, cleared ($9d6-$a54)
|
||||
|
||||
AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_BASE(m_mcu_ram) // MCU [G] grid tested, cleared ($a5a-$ad8)
|
||||
AM_RANGE(0x330000, 0x330001) AM_WRITE_LEGACY(jchan_mcu_com0_w) // _[ these 2 are set to 0xFFFF
|
||||
AM_RANGE(0x340000, 0x340001) AM_WRITE_LEGACY(jchan_mcu_com1_w) // [ to trigger mcu to run cmd ?
|
||||
AM_RANGE(0x350000, 0x350001) AM_WRITE_LEGACY(jchan_mcu_com2_w) // _[ these 2 are set to 0xFFFF
|
||||
AM_RANGE(0x360000, 0x360001) AM_WRITE_LEGACY(jchan_mcu_com3_w) // [ for mcu to return its status ?
|
||||
AM_RANGE(0x370000, 0x370001) AM_READ_LEGACY(jchan_mcu_status_r)
|
||||
AM_RANGE(0x330000, 0x330001) AM_WRITE(jchan_mcu_com0_w) // _[ these 2 are set to 0xFFFF
|
||||
AM_RANGE(0x340000, 0x340001) AM_WRITE(jchan_mcu_com1_w) // [ to trigger mcu to run cmd ?
|
||||
AM_RANGE(0x350000, 0x350001) AM_WRITE(jchan_mcu_com2_w) // _[ these 2 are set to 0xFFFF
|
||||
AM_RANGE(0x360000, 0x360001) AM_WRITE(jchan_mcu_com3_w) // [ for mcu to return its status ?
|
||||
AM_RANGE(0x370000, 0x370001) AM_READ(jchan_mcu_status_r)
|
||||
|
||||
AM_RANGE(0x400000, 0x403fff) AM_RAM AM_BASE(m_mainsub_shared_ram) AM_SHARE("share1")
|
||||
|
||||
/* 1st sprite layer */
|
||||
AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE_LEGACY(jchan_suprnova_sprite32_1_w) AM_BASE(m_spriteram_1)
|
||||
AM_RANGE(0x600000, 0x60003f) AM_RAM_WRITE_LEGACY(jchan_suprnova_sprite32regs_1_w) AM_BASE(m_sprregs_1)
|
||||
AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(jchan_suprnova_sprite32_1_w) AM_BASE(m_spriteram_1)
|
||||
AM_RANGE(0x600000, 0x60003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_1_w) AM_BASE(m_sprregs_1)
|
||||
|
||||
AM_RANGE(0x700000, 0x70ffff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_SHARE("paletteram") // palette for sprites?
|
||||
|
||||
AM_RANGE(0xf00000, 0xf00007) AM_READWRITE_LEGACY(jchan_ctrl_r, jchan_ctrl_w) AM_BASE(m_ctrl)
|
||||
AM_RANGE(0xf00000, 0xf00007) AM_READWRITE(jchan_ctrl_r, jchan_ctrl_w) AM_BASE(m_ctrl)
|
||||
|
||||
AM_RANGE(0xf80000, 0xf80001) AM_READWRITE(watchdog_reset16_r, watchdog_reset16_w) // watchdog
|
||||
ADDRESS_MAP_END
|
||||
@ -531,8 +544,8 @@ static ADDRESS_MAP_START( jchan_sub, AS_PROGRAM, 16, jchan_state )
|
||||
AM_RANGE(0x600000, 0x60001f) AM_RAM_WRITE(kaneko16_layers_0_regs_w) AM_BASE(m_layers_0_regs) // Layers 0 Regs
|
||||
|
||||
/* background prites */
|
||||
AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE_LEGACY(jchan_suprnova_sprite32_2_w) AM_BASE(m_spriteram_2)
|
||||
AM_RANGE(0x780000, 0x78003f) AM_RAM_WRITE_LEGACY(jchan_suprnova_sprite32regs_2_w) AM_BASE(m_sprregs_2)
|
||||
AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE(jchan_suprnova_sprite32_2_w) AM_BASE(m_spriteram_2)
|
||||
AM_RANGE(0x780000, 0x78003f) AM_RAM_WRITE(jchan_suprnova_sprite32regs_2_w) AM_BASE(m_sprregs_2)
|
||||
|
||||
AM_RANGE(0x800000, 0x800003) AM_DEVWRITE8_LEGACY("ymz", ymz280b_w, 0x00ff) // sound
|
||||
|
||||
@ -776,8 +789,8 @@ static DRIVER_INIT( jchan )
|
||||
jchan_state *state = machine.driver_data<jchan_state>();
|
||||
DRIVER_INIT_CALL( decrypt_toybox_rom );
|
||||
// install these here, putting them in the memory map causes issues
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x403ffe, 0x403fff, FUNC(main2sub_cmd_w) );
|
||||
machine.device("sub")->memory().space(AS_PROGRAM)->install_legacy_write_handler(0x400000, 0x400001, FUNC(sub2main_cmd_w) );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM)->install_write_handler(0x403ffe, 0x403fff, write16_delegate(FUNC(jchan_state::main2sub_cmd_w),state));
|
||||
machine.device("sub")->memory().space(AS_PROGRAM)->install_write_handler(0x400000, 0x400001, write16_delegate(FUNC(jchan_state::sub2main_cmd_w),state));
|
||||
|
||||
|
||||
memset(state->m_mcu_com, 0, 4 * sizeof( UINT16 ) );
|
||||
|
@ -109,21 +109,23 @@ class jrpacman_state : public pacman_state
|
||||
public:
|
||||
jrpacman_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pacman_state(mconfig, type, tag) { }
|
||||
DECLARE_WRITE8_MEMBER(jrpacman_interrupt_vector_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_mask_w);
|
||||
};
|
||||
|
||||
|
||||
|
||||
static WRITE8_HANDLER( jrpacman_interrupt_vector_w )
|
||||
WRITE8_MEMBER(jrpacman_state::jrpacman_interrupt_vector_w)
|
||||
{
|
||||
device_set_input_line_vector(space->machine().device("maincpu"), 0, data);
|
||||
cputag_set_input_line(space->machine(), "maincpu", 0, CLEAR_LINE);
|
||||
device_set_input_line_vector(machine().device("maincpu"), 0, data);
|
||||
cputag_set_input_line(machine(), "maincpu", 0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( irq_mask_w )
|
||||
WRITE8_MEMBER(jrpacman_state::irq_mask_w)
|
||||
{
|
||||
jrpacman_state *state = space->machine().driver_data<jrpacman_state>();
|
||||
|
||||
state->m_irq_mask = data & 1;
|
||||
|
||||
m_irq_mask = data & 1;
|
||||
}
|
||||
|
||||
/*************************************
|
||||
@ -138,7 +140,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, jrpacman_state )
|
||||
AM_RANGE(0x4800, 0x4fef) AM_RAM
|
||||
AM_RANGE(0x4ff0, 0x4fff) AM_RAM AM_SHARE("spriteram")
|
||||
AM_RANGE(0x5000, 0x503f) AM_READ_PORT("P1")
|
||||
AM_RANGE(0x5000, 0x5000) AM_WRITE_LEGACY(irq_mask_w)
|
||||
AM_RANGE(0x5000, 0x5000) AM_WRITE(irq_mask_w)
|
||||
AM_RANGE(0x5001, 0x5001) AM_DEVWRITE_LEGACY("namco", pacman_sound_enable_w)
|
||||
AM_RANGE(0x5003, 0x5003) AM_WRITE(pacman_flipscreen_w)
|
||||
AM_RANGE(0x5040, 0x507f) AM_READ_PORT("P2")
|
||||
@ -158,7 +160,7 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( port_map, AS_IO, 8, jrpacman_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0, 0) AM_WRITE_LEGACY(jrpacman_interrupt_vector_w)
|
||||
AM_RANGE(0, 0) AM_WRITE(jrpacman_interrupt_vector_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
@ -105,6 +105,14 @@ public:
|
||||
device_t *m_filter_0_0;
|
||||
device_t *m_filter_0_1;
|
||||
device_t *m_filter_0_2;
|
||||
DECLARE_WRITE8_MEMBER(junofrst_blitter_w);
|
||||
DECLARE_WRITE8_MEMBER(junofrst_bankselect_w);
|
||||
DECLARE_WRITE8_MEMBER(junofrst_sh_irqtrigger_w);
|
||||
DECLARE_WRITE8_MEMBER(junofrst_i8039_irq_w);
|
||||
DECLARE_WRITE8_MEMBER(i8039_irqen_and_status_w);
|
||||
DECLARE_WRITE8_MEMBER(flip_screen_w);
|
||||
DECLARE_WRITE8_MEMBER(junofrst_coin_counter_w);
|
||||
DECLARE_WRITE8_MEMBER(junofrst_irq_enable_w);
|
||||
};
|
||||
|
||||
|
||||
@ -126,21 +134,21 @@ public:
|
||||
We have to mask it off otherwise the "Juno First" logo on the title screen is wrong.
|
||||
*/
|
||||
|
||||
static WRITE8_HANDLER( junofrst_blitter_w )
|
||||
WRITE8_MEMBER(junofrst_state::junofrst_blitter_w)
|
||||
{
|
||||
junofrst_state *state = space->machine().driver_data<junofrst_state>();
|
||||
state->m_blitterdata[offset] = data;
|
||||
|
||||
m_blitterdata[offset] = data;
|
||||
|
||||
/* blitter is triggered by $8073 */
|
||||
if (offset == 3)
|
||||
{
|
||||
int i;
|
||||
UINT8 *gfx_rom = space->machine().region("gfx1")->base();
|
||||
UINT8 *gfx_rom = machine().region("gfx1")->base();
|
||||
|
||||
offs_t src = ((state->m_blitterdata[2] << 8) | state->m_blitterdata[3]) & 0xfffc;
|
||||
offs_t dest = (state->m_blitterdata[0] << 8) | state->m_blitterdata[1];
|
||||
offs_t src = ((m_blitterdata[2] << 8) | m_blitterdata[3]) & 0xfffc;
|
||||
offs_t dest = (m_blitterdata[0] << 8) | m_blitterdata[1];
|
||||
|
||||
int copy = state->m_blitterdata[3] & 0x01;
|
||||
int copy = m_blitterdata[3] & 0x01;
|
||||
|
||||
/* 16x16 graphics */
|
||||
for (i = 0; i < 16; i++)
|
||||
@ -166,9 +174,9 @@ static WRITE8_HANDLER( junofrst_blitter_w )
|
||||
data = 0;
|
||||
|
||||
if (dest & 1)
|
||||
state->m_videoram[dest >> 1] = (state->m_videoram[dest >> 1] & 0x0f) | (data << 4);
|
||||
m_videoram[dest >> 1] = (m_videoram[dest >> 1] & 0x0f) | (data << 4);
|
||||
else
|
||||
state->m_videoram[dest >> 1] = (state->m_videoram[dest >> 1] & 0xf0) | data;
|
||||
m_videoram[dest >> 1] = (m_videoram[dest >> 1] & 0xf0) | data;
|
||||
}
|
||||
|
||||
dest += 1;
|
||||
@ -180,9 +188,9 @@ static WRITE8_HANDLER( junofrst_blitter_w )
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( junofrst_bankselect_w )
|
||||
WRITE8_MEMBER(junofrst_state::junofrst_bankselect_w)
|
||||
{
|
||||
memory_set_bank(space->machine(), "bank1", data & 0x0f);
|
||||
memory_set_bank(machine(), "bank1", data & 0x0f);
|
||||
}
|
||||
|
||||
|
||||
@ -224,57 +232,57 @@ static WRITE8_DEVICE_HANDLER( junofrst_portB_w )
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( junofrst_sh_irqtrigger_w )
|
||||
WRITE8_MEMBER(junofrst_state::junofrst_sh_irqtrigger_w)
|
||||
{
|
||||
junofrst_state *state = space->machine().driver_data<junofrst_state>();
|
||||
|
||||
if (state->m_last_irq == 0 && data == 1)
|
||||
|
||||
if (m_last_irq == 0 && data == 1)
|
||||
{
|
||||
/* setting bit 0 low then high triggers IRQ on the sound CPU */
|
||||
device_set_input_line_and_vector(state->m_soundcpu, 0, HOLD_LINE, 0xff);
|
||||
device_set_input_line_and_vector(m_soundcpu, 0, HOLD_LINE, 0xff);
|
||||
}
|
||||
|
||||
state->m_last_irq = data;
|
||||
m_last_irq = data;
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( junofrst_i8039_irq_w )
|
||||
WRITE8_MEMBER(junofrst_state::junofrst_i8039_irq_w)
|
||||
{
|
||||
junofrst_state *state = space->machine().driver_data<junofrst_state>();
|
||||
device_set_input_line(state->m_i8039, 0, ASSERT_LINE);
|
||||
|
||||
device_set_input_line(m_i8039, 0, ASSERT_LINE);
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( i8039_irqen_and_status_w )
|
||||
WRITE8_MEMBER(junofrst_state::i8039_irqen_and_status_w)
|
||||
{
|
||||
junofrst_state *state = space->machine().driver_data<junofrst_state>();
|
||||
|
||||
|
||||
if ((data & 0x80) == 0)
|
||||
device_set_input_line(state->m_i8039, 0, CLEAR_LINE);
|
||||
state->m_i8039_status = (data & 0x70) >> 4;
|
||||
device_set_input_line(m_i8039, 0, CLEAR_LINE);
|
||||
m_i8039_status = (data & 0x70) >> 4;
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( flip_screen_w )
|
||||
WRITE8_MEMBER(junofrst_state::flip_screen_w)
|
||||
{
|
||||
junofrst_state *state = space->machine().driver_data<junofrst_state>();
|
||||
state->tutankhm_flip_screen_x_w(*space, 0, data);
|
||||
state->tutankhm_flip_screen_y_w(*space, 0, data);
|
||||
|
||||
tutankhm_flip_screen_x_w(*&space, 0, data);
|
||||
tutankhm_flip_screen_y_w(*&space, 0, data);
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( junofrst_coin_counter_w )
|
||||
WRITE8_MEMBER(junofrst_state::junofrst_coin_counter_w)
|
||||
{
|
||||
coin_counter_w(space->machine(), offset, data);
|
||||
coin_counter_w(machine(), offset, data);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( junofrst_irq_enable_w )
|
||||
WRITE8_MEMBER(junofrst_state::junofrst_irq_enable_w)
|
||||
{
|
||||
junofrst_state *state = space->machine().driver_data<junofrst_state>();
|
||||
|
||||
state->m_irq_enable = data & 1;
|
||||
if (!state->m_irq_enable)
|
||||
device_set_input_line(state->m_maincpu, 0, CLEAR_LINE);
|
||||
|
||||
m_irq_enable = data & 1;
|
||||
if (!m_irq_enable)
|
||||
device_set_input_line(m_maincpu, 0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, junofrst_state )
|
||||
@ -286,14 +294,14 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, junofrst_state )
|
||||
AM_RANGE(0x8024, 0x8024) AM_READ_PORT("P1")
|
||||
AM_RANGE(0x8028, 0x8028) AM_READ_PORT("P2")
|
||||
AM_RANGE(0x802c, 0x802c) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x8030, 0x8030) AM_WRITE_LEGACY(junofrst_irq_enable_w)
|
||||
AM_RANGE(0x8031, 0x8032) AM_WRITE_LEGACY(junofrst_coin_counter_w)
|
||||
AM_RANGE(0x8030, 0x8030) AM_WRITE(junofrst_irq_enable_w)
|
||||
AM_RANGE(0x8031, 0x8032) AM_WRITE(junofrst_coin_counter_w)
|
||||
AM_RANGE(0x8033, 0x8033) AM_WRITEONLY AM_BASE(m_scroll) /* not used in Juno */
|
||||
AM_RANGE(0x8034, 0x8035) AM_WRITE_LEGACY(flip_screen_w)
|
||||
AM_RANGE(0x8040, 0x8040) AM_WRITE_LEGACY(junofrst_sh_irqtrigger_w)
|
||||
AM_RANGE(0x8034, 0x8035) AM_WRITE(flip_screen_w)
|
||||
AM_RANGE(0x8040, 0x8040) AM_WRITE(junofrst_sh_irqtrigger_w)
|
||||
AM_RANGE(0x8050, 0x8050) AM_WRITE(soundlatch_w)
|
||||
AM_RANGE(0x8060, 0x8060) AM_WRITE_LEGACY(junofrst_bankselect_w)
|
||||
AM_RANGE(0x8070, 0x8073) AM_WRITE_LEGACY(junofrst_blitter_w)
|
||||
AM_RANGE(0x8060, 0x8060) AM_WRITE(junofrst_bankselect_w)
|
||||
AM_RANGE(0x8070, 0x8073) AM_WRITE(junofrst_blitter_w)
|
||||
AM_RANGE(0x8100, 0x8fff) AM_RAM
|
||||
AM_RANGE(0x9000, 0x9fff) AM_ROMBANK("bank1")
|
||||
AM_RANGE(0xa000, 0xffff) AM_ROM
|
||||
@ -308,7 +316,7 @@ static ADDRESS_MAP_START( audio_map, AS_PROGRAM, 8, junofrst_state )
|
||||
AM_RANGE(0x4001, 0x4001) AM_DEVREAD_LEGACY("aysnd", ay8910_r)
|
||||
AM_RANGE(0x4002, 0x4002) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w)
|
||||
AM_RANGE(0x5000, 0x5000) AM_WRITE(soundlatch2_w)
|
||||
AM_RANGE(0x6000, 0x6000) AM_WRITE_LEGACY(junofrst_i8039_irq_w)
|
||||
AM_RANGE(0x6000, 0x6000) AM_WRITE(junofrst_i8039_irq_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -320,7 +328,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( mcu_io_map, AS_IO, 8, junofrst_state )
|
||||
AM_RANGE(0x00, 0xff) AM_READ(soundlatch2_r)
|
||||
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE_LEGACY("dac", dac_w)
|
||||
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE_LEGACY(i8039_irqen_and_status_w)
|
||||
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
@ -66,34 +66,47 @@ public:
|
||||
UINT8 m_sndtor3k[ 16 ];
|
||||
UINT8 *m_p_n_pcmram;
|
||||
UINT8 m_sector_buffer[ 512 ];
|
||||
DECLARE_WRITE32_MEMBER(soundr3k_w);
|
||||
DECLARE_READ32_MEMBER(soundr3k_r);
|
||||
DECLARE_WRITE32_MEMBER(mb89371_w);
|
||||
DECLARE_READ32_MEMBER(mb89371_r);
|
||||
DECLARE_WRITE32_MEMBER(eeprom_w);
|
||||
DECLARE_WRITE32_MEMBER(pcmram_w);
|
||||
DECLARE_READ32_MEMBER(pcmram_r);
|
||||
DECLARE_READ16_MEMBER(sndcomm68k_r);
|
||||
DECLARE_WRITE16_MEMBER(sndcomm68k_w);
|
||||
DECLARE_READ16_MEMBER(tms57002_data_word_r);
|
||||
DECLARE_WRITE16_MEMBER(tms57002_data_word_w);
|
||||
DECLARE_READ16_MEMBER(tms57002_status_word_r);
|
||||
DECLARE_WRITE16_MEMBER(tms57002_control_word_w);
|
||||
};
|
||||
|
||||
/* Sound */
|
||||
|
||||
static WRITE32_HANDLER( soundr3k_w )
|
||||
WRITE32_MEMBER(konamigq_state::soundr3k_w)
|
||||
{
|
||||
konamigq_state *state = space->machine().driver_data<konamigq_state>();
|
||||
|
||||
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
state->m_sndto000[ ( offset << 1 ) + 1 ] = data >> 16;
|
||||
m_sndto000[ ( offset << 1 ) + 1 ] = data >> 16;
|
||||
if( offset == 3 )
|
||||
{
|
||||
cputag_set_input_line(space->machine(), "soundcpu", 1, HOLD_LINE );
|
||||
cputag_set_input_line(machine(), "soundcpu", 1, HOLD_LINE );
|
||||
}
|
||||
}
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
state->m_sndto000[ offset << 1 ] = data;
|
||||
m_sndto000[ offset << 1 ] = data;
|
||||
}
|
||||
}
|
||||
|
||||
static READ32_HANDLER( soundr3k_r )
|
||||
READ32_MEMBER(konamigq_state::soundr3k_r)
|
||||
{
|
||||
konamigq_state *state = space->machine().driver_data<konamigq_state>();
|
||||
|
||||
UINT32 data;
|
||||
|
||||
data = ( state->m_sndtor3k[ ( offset << 1 ) + 1 ] << 16 ) | state->m_sndtor3k[ offset << 1 ];
|
||||
data = ( m_sndtor3k[ ( offset << 1 ) + 1 ] << 16 ) | m_sndtor3k[ offset << 1 ];
|
||||
|
||||
/* hack to help the main program start up */
|
||||
if( offset == 1 )
|
||||
@ -106,11 +119,11 @@ static READ32_HANDLER( soundr3k_r )
|
||||
|
||||
/* UART */
|
||||
|
||||
static WRITE32_HANDLER( mb89371_w )
|
||||
WRITE32_MEMBER(konamigq_state::mb89371_w)
|
||||
{
|
||||
}
|
||||
|
||||
static READ32_HANDLER( mb89371_r )
|
||||
READ32_MEMBER(konamigq_state::mb89371_r)
|
||||
{
|
||||
return 0xffffffff;
|
||||
}
|
||||
@ -129,34 +142,34 @@ static const UINT16 konamigq_def_eeprom[64] =
|
||||
0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
|
||||
};
|
||||
|
||||
static WRITE32_HANDLER( eeprom_w )
|
||||
WRITE32_MEMBER(konamigq_state::eeprom_w)
|
||||
{
|
||||
input_port_write(space->machine(), "EEPROMOUT", data & 0x07, 0xff);
|
||||
cputag_set_input_line(space->machine(), "soundcpu", INPUT_LINE_RESET, ( data & 0x40 ) ? CLEAR_LINE : ASSERT_LINE );
|
||||
input_port_write(machine(), "EEPROMOUT", data & 0x07, 0xff);
|
||||
cputag_set_input_line(machine(), "soundcpu", INPUT_LINE_RESET, ( data & 0x40 ) ? CLEAR_LINE : ASSERT_LINE );
|
||||
}
|
||||
|
||||
|
||||
/* PCM RAM */
|
||||
|
||||
static WRITE32_HANDLER( pcmram_w )
|
||||
WRITE32_MEMBER(konamigq_state::pcmram_w)
|
||||
{
|
||||
konamigq_state *state = space->machine().driver_data<konamigq_state>();
|
||||
|
||||
|
||||
if( ACCESSING_BITS_0_7 )
|
||||
{
|
||||
state->m_p_n_pcmram[ offset << 1 ] = data;
|
||||
m_p_n_pcmram[ offset << 1 ] = data;
|
||||
}
|
||||
if( ACCESSING_BITS_16_23 )
|
||||
{
|
||||
state->m_p_n_pcmram[ ( offset << 1 ) + 1 ] = data >> 16;
|
||||
m_p_n_pcmram[ ( offset << 1 ) + 1 ] = data >> 16;
|
||||
}
|
||||
}
|
||||
|
||||
static READ32_HANDLER( pcmram_r )
|
||||
READ32_MEMBER(konamigq_state::pcmram_r)
|
||||
{
|
||||
konamigq_state *state = space->machine().driver_data<konamigq_state>();
|
||||
|
||||
return ( state->m_p_n_pcmram[ ( offset << 1 ) + 1 ] << 16 ) | state->m_p_n_pcmram[ offset << 1 ];
|
||||
|
||||
return ( m_p_n_pcmram[ ( offset << 1 ) + 1 ] << 16 ) | m_p_n_pcmram[ offset << 1 ];
|
||||
}
|
||||
|
||||
/* Video */
|
||||
@ -164,9 +177,9 @@ static READ32_HANDLER( pcmram_r )
|
||||
static ADDRESS_MAP_START( konamigq_map, AS_PROGRAM, 32, konamigq_state )
|
||||
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
|
||||
AM_RANGE(0x1f000000, 0x1f00001f) AM_READWRITE_LEGACY(am53cf96_r, am53cf96_w)
|
||||
AM_RANGE(0x1f100000, 0x1f10000f) AM_WRITE_LEGACY(soundr3k_w)
|
||||
AM_RANGE(0x1f100010, 0x1f10001f) AM_READ_LEGACY(soundr3k_r)
|
||||
AM_RANGE(0x1f180000, 0x1f180003) AM_WRITE_LEGACY(eeprom_w)
|
||||
AM_RANGE(0x1f100000, 0x1f10000f) AM_WRITE(soundr3k_w)
|
||||
AM_RANGE(0x1f100010, 0x1f10001f) AM_READ(soundr3k_r)
|
||||
AM_RANGE(0x1f180000, 0x1f180003) AM_WRITE(eeprom_w)
|
||||
AM_RANGE(0x1f198000, 0x1f198003) AM_WRITENOP /* cabinet lamps? */
|
||||
AM_RANGE(0x1f1a0000, 0x1f1a0003) AM_WRITENOP /* indicates gun trigger */
|
||||
AM_RANGE(0x1f200000, 0x1f200003) AM_READ_PORT("GUNX1")
|
||||
@ -178,8 +191,8 @@ static ADDRESS_MAP_START( konamigq_map, AS_PROGRAM, 32, konamigq_state )
|
||||
AM_RANGE(0x1f230000, 0x1f230003) AM_READ_PORT("P1_P2")
|
||||
AM_RANGE(0x1f230004, 0x1f230007) AM_READ_PORT("P3_SERVICE")
|
||||
AM_RANGE(0x1f238000, 0x1f238003) AM_READ_PORT("DSW")
|
||||
AM_RANGE(0x1f300000, 0x1f5fffff) AM_READWRITE_LEGACY(pcmram_r, pcmram_w)
|
||||
AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE_LEGACY(mb89371_r, mb89371_w)
|
||||
AM_RANGE(0x1f300000, 0x1f5fffff) AM_READWRITE(pcmram_r, pcmram_w)
|
||||
AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE(mb89371_r, mb89371_w)
|
||||
AM_RANGE(0x1f780000, 0x1f780003) AM_WRITENOP /* watchdog? */
|
||||
AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */
|
||||
AM_RANGE(0x80000000, 0x803fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
|
||||
@ -191,35 +204,35 @@ ADDRESS_MAP_END
|
||||
|
||||
/* SOUND CPU */
|
||||
|
||||
static READ16_HANDLER( sndcomm68k_r )
|
||||
READ16_MEMBER(konamigq_state::sndcomm68k_r)
|
||||
{
|
||||
konamigq_state *state = space->machine().driver_data<konamigq_state>();
|
||||
|
||||
return state->m_sndto000[ offset ];
|
||||
|
||||
return m_sndto000[ offset ];
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( sndcomm68k_w )
|
||||
WRITE16_MEMBER(konamigq_state::sndcomm68k_w)
|
||||
{
|
||||
konamigq_state *state = space->machine().driver_data<konamigq_state>();
|
||||
|
||||
state->m_sndtor3k[ offset ] = data;
|
||||
|
||||
m_sndtor3k[ offset ] = data;
|
||||
}
|
||||
|
||||
static READ16_HANDLER(tms57002_data_word_r)
|
||||
READ16_MEMBER(konamigq_state::tms57002_data_word_r)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER(tms57002_data_word_w)
|
||||
WRITE16_MEMBER(konamigq_state::tms57002_data_word_w)
|
||||
{
|
||||
}
|
||||
|
||||
static READ16_HANDLER(tms57002_status_word_r)
|
||||
READ16_MEMBER(konamigq_state::tms57002_status_word_r)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER(tms57002_control_word_w)
|
||||
WRITE16_MEMBER(konamigq_state::tms57002_control_word_w)
|
||||
{
|
||||
}
|
||||
|
||||
@ -229,10 +242,10 @@ static ADDRESS_MAP_START( konamigq_sound_map, AS_PROGRAM, 16, konamigq_state )
|
||||
AM_RANGE(0x100000, 0x10ffff) AM_RAM
|
||||
AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("konami1", k054539_device, read, write, 0xff00)
|
||||
AM_RANGE(0x200000, 0x2004ff) AM_DEVREADWRITE8("konami2", k054539_device, read, write, 0x00ff)
|
||||
AM_RANGE(0x300000, 0x300001) AM_READWRITE_LEGACY(tms57002_data_word_r,tms57002_data_word_w)
|
||||
AM_RANGE(0x400000, 0x40000f) AM_WRITE_LEGACY(sndcomm68k_w)
|
||||
AM_RANGE(0x400010, 0x40001f) AM_READ_LEGACY(sndcomm68k_r)
|
||||
AM_RANGE(0x500000, 0x500001) AM_READWRITE_LEGACY(tms57002_status_word_r,tms57002_control_word_w)
|
||||
AM_RANGE(0x300000, 0x300001) AM_READWRITE(tms57002_data_word_r,tms57002_data_word_w)
|
||||
AM_RANGE(0x400000, 0x40000f) AM_WRITE(sndcomm68k_w)
|
||||
AM_RANGE(0x400010, 0x40001f) AM_READ(sndcomm68k_r)
|
||||
AM_RANGE(0x500000, 0x500001) AM_READWRITE(tms57002_status_word_r,tms57002_control_word_w)
|
||||
AM_RANGE(0x580000, 0x580001) AM_WRITENOP /* ?? */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
@ -30,6 +30,8 @@ public:
|
||||
|
||||
UINT8 * m_bgvram;
|
||||
UINT8 * m_bg_paletteram;
|
||||
DECLARE_WRITE8_MEMBER(bg_paletteram_RRRRGGGGBBBBxxxx_be_w);
|
||||
DECLARE_WRITE8_MEMBER(missb2_bg_bank_w);
|
||||
};
|
||||
|
||||
|
||||
@ -136,22 +138,22 @@ INLINE void bg_changecolor_RRRRGGGGBBBBxxxx( running_machine &machine, pen_t col
|
||||
palette_set_color_rgb(machine, color + 256, pal4bit(data >> 12), pal4bit(data >> 8), pal4bit(data >> 4));
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( bg_paletteram_RRRRGGGGBBBBxxxx_be_w )
|
||||
WRITE8_MEMBER(missb2_state::bg_paletteram_RRRRGGGGBBBBxxxx_be_w)
|
||||
{
|
||||
missb2_state *state = space->machine().driver_data<missb2_state>();
|
||||
state->m_bg_paletteram[offset] = data;
|
||||
bg_changecolor_RRRRGGGGBBBBxxxx(space->machine(), offset / 2, state->m_bg_paletteram[offset | 1] | (state->m_bg_paletteram[offset & ~1] << 8));
|
||||
|
||||
m_bg_paletteram[offset] = data;
|
||||
bg_changecolor_RRRRGGGGBBBBxxxx(machine(), offset / 2, m_bg_paletteram[offset | 1] | (m_bg_paletteram[offset & ~1] << 8));
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( missb2_bg_bank_w )
|
||||
WRITE8_MEMBER(missb2_state::missb2_bg_bank_w)
|
||||
{
|
||||
int bank;
|
||||
|
||||
// I don't know how this is really connected, bit 1 is always high afaik...
|
||||
bank = ((data & 2) ? 1 : 0) | ((data & 1) ? 4 : 0);
|
||||
|
||||
memory_set_bank(space->machine(), "bank2", bank);
|
||||
memory_set_bank(space->machine(), "bank3", bank);
|
||||
memory_set_bank(machine(), "bank2", bank);
|
||||
memory_set_bank(machine(), "bank3", bank);
|
||||
}
|
||||
|
||||
/* Memory Maps */
|
||||
@ -184,9 +186,9 @@ static ADDRESS_MAP_START( slave_map, AS_PROGRAM, 8, missb2_state )
|
||||
AM_RANGE(0x9000, 0x9fff) AM_ROMBANK("bank2") // ROM data for the background palette ram
|
||||
AM_RANGE(0xa000, 0xafff) AM_ROMBANK("bank3") // ROM data for the background palette ram
|
||||
AM_RANGE(0xb000, 0xb1ff) AM_ROM // banked ???
|
||||
AM_RANGE(0xc000, 0xc1ff) AM_RAM_WRITE_LEGACY(bg_paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE(m_bg_paletteram)
|
||||
AM_RANGE(0xc000, 0xc1ff) AM_RAM_WRITE(bg_paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE(m_bg_paletteram)
|
||||
AM_RANGE(0xc800, 0xcfff) AM_RAM // main ???
|
||||
AM_RANGE(0xd000, 0xd000) AM_WRITE_LEGACY(missb2_bg_bank_w)
|
||||
AM_RANGE(0xd000, 0xd000) AM_WRITE(missb2_bg_bank_w)
|
||||
AM_RANGE(0xd002, 0xd002) AM_WRITENOP
|
||||
AM_RANGE(0xd003, 0xd003) AM_RAM AM_BASE(m_bgvram)
|
||||
AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE("share1")
|
||||
|
@ -306,6 +306,16 @@ public:
|
||||
|
||||
UINT8 m_m50458_rom_bank;
|
||||
UINT8 m_vblank_bit;
|
||||
DECLARE_READ8_MEMBER(nss_eeprom_r);
|
||||
DECLARE_WRITE8_MEMBER(nss_eeprom_w);
|
||||
DECLARE_READ8_MEMBER(m50458_r);
|
||||
DECLARE_WRITE8_MEMBER(m50458_w);
|
||||
DECLARE_READ8_MEMBER(port00_r);
|
||||
DECLARE_READ8_MEMBER(port01_r);
|
||||
DECLARE_READ8_MEMBER(port02_r);
|
||||
DECLARE_READ8_MEMBER(port03_r);
|
||||
DECLARE_WRITE8_MEMBER(port80_w);
|
||||
DECLARE_WRITE8_MEMBER(port82_w);
|
||||
};
|
||||
|
||||
|
||||
@ -361,12 +371,12 @@ M50458 charset is checked at 1382, a word checksum is provided at offsets 0xffe-
|
||||
|
||||
*/
|
||||
|
||||
static READ8_HANDLER( nss_eeprom_r )
|
||||
READ8_MEMBER(nss_state::nss_eeprom_r)
|
||||
{
|
||||
return 0x40; // eeprom read bit
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( nss_eeprom_w )
|
||||
WRITE8_MEMBER(nss_state::nss_eeprom_w)
|
||||
{
|
||||
/*
|
||||
x--- ---- EEPROM CS bit?
|
||||
@ -379,18 +389,18 @@ static WRITE8_HANDLER( nss_eeprom_w )
|
||||
}
|
||||
|
||||
|
||||
static READ8_HANDLER( m50458_r )
|
||||
READ8_MEMBER(nss_state::m50458_r)
|
||||
{
|
||||
nss_state *state = space->machine().driver_data<nss_state>();
|
||||
if(state->m_m50458_rom_bank)
|
||||
|
||||
if(m_m50458_rom_bank)
|
||||
{
|
||||
UINT8 *gfx_rom = space->machine().region("m50458_gfx")->base();
|
||||
UINT8 *gfx_rom = machine().region("m50458_gfx")->base();
|
||||
|
||||
return gfx_rom[offset & 0xfff];
|
||||
}
|
||||
else
|
||||
{
|
||||
UINT8 *gfx_ram = space->machine().region("m50458_vram")->base();
|
||||
UINT8 *gfx_ram = machine().region("m50458_vram")->base();
|
||||
|
||||
return gfx_ram[offset & 0xfff];
|
||||
}
|
||||
@ -398,14 +408,14 @@ static READ8_HANDLER( m50458_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( m50458_w )
|
||||
WRITE8_MEMBER(nss_state::m50458_w)
|
||||
{
|
||||
nss_state *state = space->machine().driver_data<nss_state>();
|
||||
if(state->m_m50458_rom_bank)
|
||||
|
||||
if(m_m50458_rom_bank)
|
||||
logerror("Warning: write to M50458 GFX ROM!\n");
|
||||
else
|
||||
{
|
||||
UINT8 *gfx_ram = space->machine().region("m50458_vram")->base();
|
||||
UINT8 *gfx_ram = machine().region("m50458_vram")->base();
|
||||
|
||||
gfx_ram[offset & 0xfff] = data;
|
||||
}
|
||||
@ -416,32 +426,32 @@ static ADDRESS_MAP_START( bios_map, AS_PROGRAM, 8, nss_state )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROMBANK("bank1")
|
||||
AM_RANGE(0x8000, 0x87ff) AM_RAM
|
||||
AM_RANGE(0x8800, 0x8fff) AM_RAM // vram perhaps?
|
||||
AM_RANGE(0x9000, 0x9fff) AM_READWRITE_LEGACY(m50458_r,m50458_w) // M50458 vram & GFX rom routes here
|
||||
AM_RANGE(0xa000, 0xa000) AM_READ_LEGACY(nss_eeprom_r)
|
||||
AM_RANGE(0xe000, 0xe000) AM_WRITE_LEGACY(nss_eeprom_w)
|
||||
AM_RANGE(0x9000, 0x9fff) AM_READWRITE(m50458_r,m50458_w) // M50458 vram & GFX rom routes here
|
||||
AM_RANGE(0xa000, 0xa000) AM_READ(nss_eeprom_r)
|
||||
AM_RANGE(0xe000, 0xe000) AM_WRITE(nss_eeprom_w)
|
||||
AM_RANGE(0xc000, 0xdfff) AM_MIRROR(0x2000) AM_RAM AM_REGION("ibios_rom", 0x6000)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static READ8_HANDLER( port00_r )
|
||||
READ8_MEMBER(nss_state::port00_r)
|
||||
{
|
||||
nss_state *state = space->machine().driver_data<nss_state>();
|
||||
|
||||
/*
|
||||
-x-- ---- almost certainly tied to the vblank signal
|
||||
*/
|
||||
|
||||
|
||||
state->m_vblank_bit^=0x40;
|
||||
m_vblank_bit^=0x40;
|
||||
|
||||
return state->m_vblank_bit | 0xbf;
|
||||
return m_vblank_bit | 0xbf;
|
||||
}
|
||||
|
||||
|
||||
static READ8_HANDLER( port01_r )
|
||||
READ8_MEMBER(nss_state::port01_r)
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( port02_r )
|
||||
READ8_MEMBER(nss_state::port02_r)
|
||||
{
|
||||
/*
|
||||
---- -x-- (makes the BIOS to jump at 0x4258, sets 0x80 bit 1 and then jumps to unmapped area of the BIOS (bankswitch?))
|
||||
@ -451,7 +461,7 @@ static READ8_HANDLER( port02_r )
|
||||
return 0xfb;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( port03_r )
|
||||
READ8_MEMBER(nss_state::port03_r)
|
||||
{
|
||||
/*
|
||||
x--- ---- EEPROM2 read bit
|
||||
@ -462,20 +472,20 @@ static READ8_HANDLER( port03_r )
|
||||
return 0xfe;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( port80_w )
|
||||
WRITE8_MEMBER(nss_state::port80_w)
|
||||
{
|
||||
nss_state *state = space->machine().driver_data<nss_state>();
|
||||
|
||||
/*
|
||||
---- -x-- written when 0x9000-0x9fff is read, probably a bankswitch
|
||||
---- --x- see port 0x02 note
|
||||
---- ---x BIOS bankswitch
|
||||
*/
|
||||
|
||||
memory_set_bank(space->machine(), "bank1", data & 1);
|
||||
state->m_m50458_rom_bank = data & 4;
|
||||
memory_set_bank(machine(), "bank1", data & 1);
|
||||
m_m50458_rom_bank = data & 4;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( port82_w ) // EEPROM2?
|
||||
WRITE8_MEMBER(nss_state::port82_w)// EEPROM2?
|
||||
{
|
||||
/*
|
||||
---- x--- EEPROM2 clock bit?
|
||||
@ -486,13 +496,13 @@ static WRITE8_HANDLER( port82_w ) // EEPROM2?
|
||||
|
||||
static ADDRESS_MAP_START( bios_io_map, AS_IO, 8, nss_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_READ_LEGACY(port00_r)
|
||||
AM_RANGE(0x01, 0x01) AM_READ_LEGACY(port01_r)
|
||||
AM_RANGE(0x02, 0x02) AM_READ_LEGACY(port02_r)
|
||||
AM_RANGE(0x03, 0x03) AM_READ_LEGACY(port03_r)
|
||||
AM_RANGE(0x00, 0x00) AM_READ(port00_r)
|
||||
AM_RANGE(0x01, 0x01) AM_READ(port01_r)
|
||||
AM_RANGE(0x02, 0x02) AM_READ(port02_r)
|
||||
AM_RANGE(0x03, 0x03) AM_READ(port03_r)
|
||||
AM_RANGE(0x72, 0x72) AM_WRITENOP //?
|
||||
AM_RANGE(0x80, 0x80) AM_WRITE_LEGACY(port80_w)
|
||||
AM_RANGE(0x82, 0x82) AM_WRITE_LEGACY(port82_w)
|
||||
AM_RANGE(0x80, 0x80) AM_WRITE(port80_w)
|
||||
AM_RANGE(0x82, 0x82) AM_WRITE(port82_w)
|
||||
AM_RANGE(0xea, 0xea) AM_WRITENOP //?
|
||||
|
||||
ADDRESS_MAP_END
|
||||
|
@ -73,6 +73,8 @@ class pengo_state : public pacman_state
|
||||
public:
|
||||
pengo_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: pacman_state(mconfig, type, tag) { }
|
||||
DECLARE_WRITE8_MEMBER(pengo_coin_counter_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_mask_w);
|
||||
};
|
||||
|
||||
|
||||
@ -105,16 +107,16 @@ public:
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static WRITE8_HANDLER( pengo_coin_counter_w )
|
||||
WRITE8_MEMBER(pengo_state::pengo_coin_counter_w)
|
||||
{
|
||||
coin_counter_w(space->machine(), offset, data & 1);
|
||||
coin_counter_w(machine(), offset, data & 1);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( irq_mask_w )
|
||||
WRITE8_MEMBER(pengo_state::irq_mask_w)
|
||||
{
|
||||
pengo_state *state = space->machine().driver_data<pengo_state>();
|
||||
|
||||
state->m_irq_mask = data & 1;
|
||||
|
||||
m_irq_mask = data & 1;
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( pengo_map, AS_PROGRAM, 8, pengo_state )
|
||||
@ -127,11 +129,11 @@ static ADDRESS_MAP_START( pengo_map, AS_PROGRAM, 8, pengo_state )
|
||||
AM_RANGE(0x9020, 0x902f) AM_WRITEONLY AM_SHARE("spriteram2")
|
||||
AM_RANGE(0x9000, 0x903f) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x9040, 0x907f) AM_READ_PORT("DSW0")
|
||||
AM_RANGE(0x9040, 0x9040) AM_WRITE_LEGACY(irq_mask_w)
|
||||
AM_RANGE(0x9040, 0x9040) AM_WRITE(irq_mask_w)
|
||||
AM_RANGE(0x9041, 0x9041) AM_DEVWRITE_LEGACY("namco", pacman_sound_enable_w)
|
||||
AM_RANGE(0x9042, 0x9042) AM_WRITE(pengo_palettebank_w)
|
||||
AM_RANGE(0x9043, 0x9043) AM_WRITE(pacman_flipscreen_w)
|
||||
AM_RANGE(0x9044, 0x9045) AM_WRITE_LEGACY(pengo_coin_counter_w)
|
||||
AM_RANGE(0x9044, 0x9045) AM_WRITE(pengo_coin_counter_w)
|
||||
AM_RANGE(0x9046, 0x9046) AM_WRITE(pengo_colortablebank_w)
|
||||
AM_RANGE(0x9047, 0x9047) AM_WRITE(pengo_gfxbank_w)
|
||||
AM_RANGE(0x9070, 0x9070) AM_WRITENOP
|
||||
@ -149,7 +151,7 @@ static ADDRESS_MAP_START( jrpacmbl_map, AS_PROGRAM, 8, pengo_state )
|
||||
AM_RANGE(0x9020, 0x902f) AM_WRITEONLY AM_SHARE("spriteram2")
|
||||
AM_RANGE(0x9030, 0x9030) AM_WRITE(jrpacman_scroll_w)
|
||||
AM_RANGE(0x9040, 0x904f) AM_READ_PORT("DSW")
|
||||
AM_RANGE(0x9040, 0x9040) AM_WRITE_LEGACY(irq_mask_w)
|
||||
AM_RANGE(0x9040, 0x9040) AM_WRITE(irq_mask_w)
|
||||
AM_RANGE(0x9041, 0x9041) AM_DEVWRITE_LEGACY("namco", pacman_sound_enable_w)
|
||||
AM_RANGE(0x9042, 0x9042) AM_WRITE(pengo_palettebank_w)
|
||||
AM_RANGE(0x9043, 0x9043) AM_WRITE(pacman_flipscreen_w)
|
||||
|
@ -109,6 +109,8 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(bgbank_w);
|
||||
DECLARE_WRITE8_MEMBER(flip_w);
|
||||
DECLARE_READ8_MEMBER(pturn_custom_r);
|
||||
DECLARE_READ8_MEMBER(pturn_protection_r);
|
||||
DECLARE_READ8_MEMBER(pturn_protection2_r);
|
||||
};
|
||||
|
||||
|
||||
@ -203,12 +205,12 @@ static SCREEN_UPDATE_IND16(pturn)
|
||||
}
|
||||
|
||||
#ifdef UNUSED_FUNCTION
|
||||
READ8_HANDLER (pturn_protection_r)
|
||||
READ8_MEMBER(pturn_state::pturn_protection_r)
|
||||
{
|
||||
return 0x66;
|
||||
}
|
||||
|
||||
READ8_HANDLER (pturn_protection2_r)
|
||||
READ8_MEMBER(pturn_state::pturn_protection2_r)
|
||||
{
|
||||
return 0xfe;
|
||||
}
|
||||
|
@ -43,6 +43,9 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(mcu_table2_w);
|
||||
DECLARE_READ16_MEMBER(nzerotea_sound_comms_r);
|
||||
DECLARE_WRITE16_MEMBER(nzerotea_sound_comms_w);
|
||||
DECLARE_WRITE16_MEMBER(mcu_prog_w);
|
||||
DECLARE_WRITE16_MEMBER(mcu_prog_w2);
|
||||
DECLARE_WRITE16_MEMBER(mcu_prog_offs_w);
|
||||
};
|
||||
|
||||
|
||||
@ -265,12 +268,12 @@ WRITE16_DEVICE_HANDLER( rdx_v33_eeprom_w )
|
||||
static UINT16 mcu_prog[0x800];
|
||||
static int mcu_prog_offs = 0;
|
||||
|
||||
WRITE16_HANDLER( mcu_prog_w )
|
||||
WRITE16_MEMBER(r2dx_v33_state::mcu_prog_w)
|
||||
{
|
||||
mcu_prog[mcu_prog_offs*2] = data;
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( mcu_prog_w2 )
|
||||
WRITE16_MEMBER(r2dx_v33_state::mcu_prog_w2)
|
||||
{
|
||||
mcu_prog[mcu_prog_offs*2+1] = data;
|
||||
|
||||
@ -279,7 +282,7 @@ WRITE16_HANDLER( mcu_prog_w2 )
|
||||
{
|
||||
char tmp[64];
|
||||
FILE *fp;
|
||||
sprintf(tmp,"cop3_%s.data", space->machine().system().name);
|
||||
sprintf(tmp,"cop3_%s.data", machine().system().name);
|
||||
|
||||
fp=fopen(tmp, "w+b");
|
||||
if (fp)
|
||||
@ -291,7 +294,7 @@ WRITE16_HANDLER( mcu_prog_w2 )
|
||||
#endif
|
||||
}
|
||||
|
||||
WRITE16_HANDLER( mcu_prog_offs_w )
|
||||
WRITE16_MEMBER(r2dx_v33_state::mcu_prog_offs_w)
|
||||
{
|
||||
mcu_prog_offs = data;
|
||||
}
|
||||
@ -375,11 +378,11 @@ static ADDRESS_MAP_START( rdx_v33_map, AS_PROGRAM, 16, r2dx_v33_state )
|
||||
AM_RANGE(0x00650, 0x0068f) AM_RAM //???
|
||||
|
||||
AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
|
||||
AM_RANGE(0x006b0, 0x006b1) AM_WRITE_LEGACY(mcu_prog_w)
|
||||
AM_RANGE(0x006b2, 0x006b3) AM_WRITE_LEGACY(mcu_prog_w2)
|
||||
AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
|
||||
AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
|
||||
// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
|
||||
// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
|
||||
AM_RANGE(0x006bc, 0x006bd) AM_WRITE_LEGACY(mcu_prog_offs_w)
|
||||
AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
|
||||
AM_RANGE(0x006be, 0x006bf) AM_WRITENOP // MCU program related
|
||||
AM_RANGE(0x006d8, 0x006d9) AM_WRITE(mcu_xval_w)
|
||||
AM_RANGE(0x006da, 0x006db) AM_WRITE(mcu_yval_w)
|
||||
@ -451,11 +454,11 @@ static ADDRESS_MAP_START( nzerotea_map, AS_PROGRAM, 16, r2dx_v33_state )
|
||||
AM_RANGE(0x00600, 0x0064f) AM_RAM AM_BASE_LEGACY(&seibu_crtc_regs)
|
||||
|
||||
AM_RANGE(0x0068e, 0x0068f) AM_WRITENOP // synch for the MCU?
|
||||
AM_RANGE(0x006b0, 0x006b1) AM_WRITE_LEGACY(mcu_prog_w)
|
||||
AM_RANGE(0x006b2, 0x006b3) AM_WRITE_LEGACY(mcu_prog_w2)
|
||||
AM_RANGE(0x006b0, 0x006b1) AM_WRITE(mcu_prog_w)
|
||||
AM_RANGE(0x006b2, 0x006b3) AM_WRITE(mcu_prog_w2)
|
||||
// AM_RANGE(0x006b4, 0x006b5) AM_WRITENOP
|
||||
// AM_RANGE(0x006b6, 0x006b7) AM_WRITENOP
|
||||
AM_RANGE(0x006bc, 0x006bd) AM_WRITE_LEGACY(mcu_prog_offs_w)
|
||||
AM_RANGE(0x006bc, 0x006bd) AM_WRITE(mcu_prog_offs_w)
|
||||
// AM_RANGE(0x006d8, 0x006d9) AM_WRITE_LEGACY(bbbbll_w) // scroll?
|
||||
// AM_RANGE(0x006dc, 0x006dd) AM_READ_LEGACY(nzerotea_unknown_r)
|
||||
// AM_RANGE(0x006de, 0x006df) AM_WRITE_LEGACY(mcu_unkaa_w) // mcu command related?
|
||||
|
@ -91,6 +91,17 @@ public:
|
||||
UINT8 m_vblank_irq;
|
||||
UINT8 m_latch1_full;
|
||||
UINT8 m_latch2_full;
|
||||
DECLARE_READ16_MEMBER(sandscrp_irq_cause_r);
|
||||
DECLARE_WRITE16_MEMBER(sandscrp_irq_cause_w);
|
||||
DECLARE_WRITE16_MEMBER(sandscrp_coin_counter_w);
|
||||
DECLARE_READ16_MEMBER(sandscrp_latchstatus_word_r);
|
||||
DECLARE_WRITE16_MEMBER(sandscrp_latchstatus_word_w);
|
||||
DECLARE_READ16_MEMBER(sandscrp_soundlatch_word_r);
|
||||
DECLARE_WRITE16_MEMBER(sandscrp_soundlatch_word_w);
|
||||
DECLARE_WRITE8_MEMBER(sandscrp_bankswitch_w);
|
||||
DECLARE_READ8_MEMBER(sandscrp_latchstatus_r);
|
||||
DECLARE_READ8_MEMBER(sandscrp_soundlatch_r);
|
||||
DECLARE_WRITE8_MEMBER(sandscrp_soundlatch_w);
|
||||
};
|
||||
|
||||
|
||||
@ -148,30 +159,30 @@ static SCREEN_VBLANK( sandscrp )
|
||||
}
|
||||
|
||||
/* Reads the cause of the interrupt */
|
||||
static READ16_HANDLER( sandscrp_irq_cause_r )
|
||||
READ16_MEMBER(sandscrp_state::sandscrp_irq_cause_r)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
return ( state->m_sprite_irq ? 0x08 : 0 ) |
|
||||
( state->m_unknown_irq ? 0x10 : 0 ) |
|
||||
( state->m_vblank_irq ? 0x20 : 0 ) ;
|
||||
|
||||
return ( m_sprite_irq ? 0x08 : 0 ) |
|
||||
( m_unknown_irq ? 0x10 : 0 ) |
|
||||
( m_vblank_irq ? 0x20 : 0 ) ;
|
||||
}
|
||||
|
||||
|
||||
/* Clear the cause of the interrupt */
|
||||
static WRITE16_HANDLER( sandscrp_irq_cause_w )
|
||||
WRITE16_MEMBER(sandscrp_state::sandscrp_irq_cause_w)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
state->m_sprite_flipx = data & 1;
|
||||
state->m_sprite_flipy = data & 1;
|
||||
m_sprite_flipx = data & 1;
|
||||
m_sprite_flipy = data & 1;
|
||||
|
||||
if (data & 0x08) state->m_sprite_irq = 0;
|
||||
if (data & 0x10) state->m_unknown_irq = 0;
|
||||
if (data & 0x20) state->m_vblank_irq = 0;
|
||||
if (data & 0x08) m_sprite_irq = 0;
|
||||
if (data & 0x10) m_unknown_irq = 0;
|
||||
if (data & 0x20) m_vblank_irq = 0;
|
||||
}
|
||||
|
||||
update_irq_state(space->machine());
|
||||
update_irq_state(machine());
|
||||
}
|
||||
|
||||
|
||||
@ -180,55 +191,55 @@ static WRITE16_HANDLER( sandscrp_irq_cause_w )
|
||||
Sand Scorpion
|
||||
***************************************************************************/
|
||||
|
||||
static WRITE16_HANDLER( sandscrp_coin_counter_w )
|
||||
WRITE16_MEMBER(sandscrp_state::sandscrp_coin_counter_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
coin_counter_w(space->machine(), 0, data & 0x0001);
|
||||
coin_counter_w(space->machine(), 1, data & 0x0002);
|
||||
coin_counter_w(machine(), 0, data & 0x0001);
|
||||
coin_counter_w(machine(), 1, data & 0x0002);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER( sandscrp_latchstatus_word_r )
|
||||
READ16_MEMBER(sandscrp_state::sandscrp_latchstatus_word_r)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
return (state->m_latch1_full ? 0x80 : 0) |
|
||||
(state->m_latch2_full ? 0x40 : 0) ;
|
||||
|
||||
return (m_latch1_full ? 0x80 : 0) |
|
||||
(m_latch2_full ? 0x40 : 0) ;
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( sandscrp_latchstatus_word_w )
|
||||
WRITE16_MEMBER(sandscrp_state::sandscrp_latchstatus_word_w)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
state->m_latch1_full = data & 0x80;
|
||||
state->m_latch2_full = data & 0x40;
|
||||
m_latch1_full = data & 0x80;
|
||||
m_latch2_full = data & 0x40;
|
||||
}
|
||||
}
|
||||
|
||||
static READ16_HANDLER( sandscrp_soundlatch_word_r )
|
||||
READ16_MEMBER(sandscrp_state::sandscrp_soundlatch_word_r)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
state->m_latch2_full = 0;
|
||||
return state->soundlatch2_r(*space,0);
|
||||
|
||||
m_latch2_full = 0;
|
||||
return soundlatch2_r(*&space,0);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( sandscrp_soundlatch_word_w )
|
||||
WRITE16_MEMBER(sandscrp_state::sandscrp_soundlatch_word_w)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
state->m_latch1_full = 1;
|
||||
state->soundlatch_w(*space, 0, data & 0xff);
|
||||
cputag_set_input_line(space->machine(), "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
|
||||
device_spin_until_time(&space->device(), attotime::from_usec(100)); // Allow the other cpu to reply
|
||||
m_latch1_full = 1;
|
||||
soundlatch_w(*&space, 0, data & 0xff);
|
||||
cputag_set_input_line(machine(), "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
|
||||
device_spin_until_time(&space.device(), attotime::from_usec(100)); // Allow the other cpu to reply
|
||||
}
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( sandscrp, AS_PROGRAM, 16, sandscrp_state )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
|
||||
AM_RANGE(0x100000, 0x100001) AM_WRITE_LEGACY(sandscrp_irq_cause_w) // IRQ Ack
|
||||
AM_RANGE(0x100000, 0x100001) AM_WRITE(sandscrp_irq_cause_w) // IRQ Ack
|
||||
|
||||
AM_RANGE(0x700000, 0x70ffff) AM_RAM // RAM
|
||||
AM_RANGE(0x200000, 0x20001f) AM_READWRITE(galpanib_calc_r,galpanib_calc_w) // Protection
|
||||
@ -239,15 +250,15 @@ static ADDRESS_MAP_START( sandscrp, AS_PROGRAM, 16, sandscrp_state )
|
||||
AM_RANGE(0x403000, 0x403fff) AM_RAM AM_BASE(m_vscroll[0]) //
|
||||
AM_RANGE(0x500000, 0x501fff) AM_DEVREADWRITE_LEGACY("pandora", pandora_spriteram_LSB_r, pandora_spriteram_LSB_w ) // sprites
|
||||
AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_SHARE("paletteram") // Palette
|
||||
AM_RANGE(0xa00000, 0xa00001) AM_WRITE_LEGACY(sandscrp_coin_counter_w) // Coin Counters (Lockout unused)
|
||||
AM_RANGE(0xa00000, 0xa00001) AM_WRITE(sandscrp_coin_counter_w) // Coin Counters (Lockout unused)
|
||||
AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("P1")
|
||||
AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("P2")
|
||||
AM_RANGE(0xb00004, 0xb00005) AM_READ_PORT("SYSTEM")
|
||||
AM_RANGE(0xb00006, 0xb00007) AM_READ_PORT("UNK")
|
||||
AM_RANGE(0xec0000, 0xec0001) AM_READ(watchdog_reset16_r) //
|
||||
AM_RANGE(0x800000, 0x800001) AM_READ_LEGACY(sandscrp_irq_cause_r) // IRQ Cause
|
||||
AM_RANGE(0xe00000, 0xe00001) AM_READWRITE_LEGACY(sandscrp_soundlatch_word_r, sandscrp_soundlatch_word_w) // From/To Sound CPU
|
||||
AM_RANGE(0xe40000, 0xe40001) AM_READWRITE_LEGACY(sandscrp_latchstatus_word_r, sandscrp_latchstatus_word_w) //
|
||||
AM_RANGE(0x800000, 0x800001) AM_READ(sandscrp_irq_cause_r) // IRQ Cause
|
||||
AM_RANGE(0xe00000, 0xe00001) AM_READWRITE(sandscrp_soundlatch_word_r, sandscrp_soundlatch_word_w) // From/To Sound CPU
|
||||
AM_RANGE(0xe40000, 0xe40001) AM_READWRITE(sandscrp_latchstatus_word_r, sandscrp_latchstatus_word_w) //
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -256,38 +267,38 @@ ADDRESS_MAP_END
|
||||
Sand Scorpion
|
||||
***************************************************************************/
|
||||
|
||||
static WRITE8_HANDLER( sandscrp_bankswitch_w )
|
||||
WRITE8_MEMBER(sandscrp_state::sandscrp_bankswitch_w)
|
||||
{
|
||||
UINT8 *RAM = space->machine().region("maincpu")->base();
|
||||
UINT8 *RAM = machine().region("maincpu")->base();
|
||||
int bank = data & 0x07;
|
||||
|
||||
if ( bank != data ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(&space->device()),data);
|
||||
if ( bank != data ) logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(&space.device()),data);
|
||||
|
||||
if (bank < 3) RAM = &RAM[0x4000 * bank];
|
||||
else RAM = &RAM[0x4000 * (bank-3) + 0x10000];
|
||||
|
||||
memory_set_bankptr(space->machine(), "bank1", RAM);
|
||||
memory_set_bankptr(machine(), "bank1", RAM);
|
||||
}
|
||||
|
||||
static READ8_HANDLER( sandscrp_latchstatus_r )
|
||||
READ8_MEMBER(sandscrp_state::sandscrp_latchstatus_r)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
return (state->m_latch2_full ? 0x80 : 0) | // swapped!?
|
||||
(state->m_latch1_full ? 0x40 : 0) ;
|
||||
|
||||
return (m_latch2_full ? 0x80 : 0) | // swapped!?
|
||||
(m_latch1_full ? 0x40 : 0) ;
|
||||
}
|
||||
|
||||
static READ8_HANDLER( sandscrp_soundlatch_r )
|
||||
READ8_MEMBER(sandscrp_state::sandscrp_soundlatch_r)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
state->m_latch1_full = 0;
|
||||
return state->soundlatch_r(*space,0);
|
||||
|
||||
m_latch1_full = 0;
|
||||
return soundlatch_r(*&space,0);
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( sandscrp_soundlatch_w )
|
||||
WRITE8_MEMBER(sandscrp_state::sandscrp_soundlatch_w)
|
||||
{
|
||||
sandscrp_state *state = space->machine().driver_data<sandscrp_state>();
|
||||
state->m_latch2_full = 1;
|
||||
state->soundlatch2_w(*space,0,data);
|
||||
|
||||
m_latch2_full = 1;
|
||||
soundlatch2_w(*&space,0,data);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( sandscrp_soundmem, AS_PROGRAM, 8, sandscrp_state )
|
||||
@ -298,12 +309,12 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sandscrp_soundport, AS_IO, 8, sandscrp_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_WRITE_LEGACY(sandscrp_bankswitch_w) // ROM Bank
|
||||
AM_RANGE(0x00, 0x00) AM_WRITE(sandscrp_bankswitch_w) // ROM Bank
|
||||
AM_RANGE(0x02, 0x03) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) // PORTA/B read
|
||||
AM_RANGE(0x04, 0x04) AM_DEVWRITE("oki", okim6295_device, write) // OKIM6295
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE_LEGACY(sandscrp_soundlatch_w) //
|
||||
AM_RANGE(0x07, 0x07) AM_READ_LEGACY(sandscrp_soundlatch_r) //
|
||||
AM_RANGE(0x08, 0x08) AM_READ_LEGACY(sandscrp_latchstatus_r) //
|
||||
AM_RANGE(0x06, 0x06) AM_WRITE(sandscrp_soundlatch_w) //
|
||||
AM_RANGE(0x07, 0x07) AM_READ(sandscrp_soundlatch_r) //
|
||||
AM_RANGE(0x08, 0x08) AM_READ(sandscrp_latchstatus_r) //
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
@ -47,6 +47,8 @@ public:
|
||||
: scramble_state(mconfig, type, tag) { }
|
||||
|
||||
UINT8 *m_soundram;
|
||||
DECLARE_READ8_MEMBER(scobra_soundram_r);
|
||||
DECLARE_WRITE8_MEMBER(scobra_soundram_w);
|
||||
};
|
||||
|
||||
|
||||
@ -206,21 +208,21 @@ static ADDRESS_MAP_START( mimonkey_map, AS_PROGRAM, 8, scobra_state )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static READ8_HANDLER(scobra_soundram_r)
|
||||
READ8_MEMBER(scobra_state::scobra_soundram_r)
|
||||
{
|
||||
scobra_state *state = space->machine().driver_data<scobra_state>();
|
||||
return state->m_soundram[offset & 0x03ff];
|
||||
|
||||
return m_soundram[offset & 0x03ff];
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER(scobra_soundram_w)
|
||||
WRITE8_MEMBER(scobra_state::scobra_soundram_w)
|
||||
{
|
||||
scobra_state *state = space->machine().driver_data<scobra_state>();
|
||||
state->m_soundram[offset & 0x03ff] = data;
|
||||
|
||||
m_soundram[offset & 0x03ff] = data;
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( scobra_sound_map, AS_PROGRAM, 8, scobra_state )
|
||||
AM_RANGE(0x0000, 0x2fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x8fff) AM_READWRITE_LEGACY(scobra_soundram_r, scobra_soundram_w)
|
||||
AM_RANGE(0x8000, 0x8fff) AM_READWRITE(scobra_soundram_r, scobra_soundram_w)
|
||||
AM_RANGE(0x8000, 0x83ff) AM_WRITENOP AM_BASE(m_soundram) /* only here to initialize pointer */
|
||||
AM_RANGE(0x9000, 0x9fff) AM_WRITE_LEGACY(scramble_filter_w)
|
||||
ADDRESS_MAP_END
|
||||
@ -229,7 +231,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( hustlerb_sound_map, AS_PROGRAM, 8, scobra_state )
|
||||
AM_RANGE(0x0000, 0x2fff) AM_ROM
|
||||
AM_RANGE(0x6000, 0x6fff) AM_WRITE_LEGACY(frogger_filter_w)
|
||||
AM_RANGE(0x8000, 0x8fff) AM_RAM_READ_LEGACY(scobra_soundram_r) AM_BASE(m_soundram) /* only here to initialize pointer */
|
||||
AM_RANGE(0x8000, 0x8fff) AM_RAM_READ(scobra_soundram_r) AM_BASE(m_soundram) /* only here to initialize pointer */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
@ -33,28 +33,32 @@ public:
|
||||
stepstag_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: tetrisp2_state(mconfig, type, tag) { }
|
||||
|
||||
DECLARE_READ16_MEMBER(stepstag_ip_1_word_r);
|
||||
DECLARE_READ16_MEMBER(unknown_read_0xc00000);
|
||||
DECLARE_READ16_MEMBER(unknown_read_0xd00000);
|
||||
DECLARE_READ16_MEMBER(unknown_read_0xffff00);
|
||||
};
|
||||
|
||||
static READ16_HANDLER( stepstag_ip_1_word_r )
|
||||
READ16_MEMBER(stepstag_state::stepstag_ip_1_word_r)
|
||||
{
|
||||
return ( input_port_read(space->machine(), "SYSTEM") & 0xfcff ) |
|
||||
( space->machine().rand() & ~0xfcff ) |
|
||||
( 1 << (8 + (space->machine().rand()&1)) );
|
||||
return ( input_port_read(machine(), "SYSTEM") & 0xfcff ) |
|
||||
( machine().rand() & ~0xfcff ) |
|
||||
( 1 << (8 + (machine().rand()&1)) );
|
||||
}
|
||||
|
||||
static READ16_HANDLER( unknown_read_0xc00000 )
|
||||
READ16_MEMBER(stepstag_state::unknown_read_0xc00000)
|
||||
{
|
||||
return space->machine().rand();
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
static READ16_HANDLER( unknown_read_0xd00000 )
|
||||
READ16_MEMBER(stepstag_state::unknown_read_0xd00000)
|
||||
{
|
||||
return space->machine().rand();
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
static READ16_HANDLER( unknown_read_0xffff00 )
|
||||
READ16_MEMBER(stepstag_state::unknown_read_0xffff00)
|
||||
{
|
||||
return space->machine().rand();
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( stepstag_map, AS_PROGRAM, 16, stepstag_state )
|
||||
@ -71,7 +75,7 @@ static ADDRESS_MAP_START( stepstag_map, AS_PROGRAM, 16, stepstag_state )
|
||||
AM_RANGE(0x600000, 0x60ffff) AM_RAM_WRITE(tetrisp2_vram_rot_w) AM_BASE(m_vram_rot) // Rotation
|
||||
AM_RANGE(0x900000, 0x903fff) AM_READWRITE(tetrisp2_nvram_r, tetrisp2_nvram_w) AM_BASE(m_nvram) AM_SHARE("nvram") // NVRAM
|
||||
AM_RANGE(0x904000, 0x907fff) AM_READWRITE(tetrisp2_nvram_r, tetrisp2_nvram_w) // NVRAM (mirror)
|
||||
// AM_RANGE(0xa00000, 0xa7ffff) AM_READ_LEGACY(unknown_read_0xc00000 ) // presumably comms with slave CPU
|
||||
// AM_RANGE(0xa00000, 0xa7ffff) AM_READ(unknown_read_0xc00000 ) // presumably comms with slave CPU
|
||||
AM_RANGE(0xb00000, 0xb00001) AM_WRITENOP // Coin Counter plus other things
|
||||
AM_RANGE(0xb20000, 0xb20001) AM_WRITENOP // protection related?
|
||||
AM_RANGE(0xb40000, 0xb4000b) AM_WRITEONLY AM_BASE(m_scroll_fg) // Foreground Scrolling
|
||||
@ -81,7 +85,7 @@ static ADDRESS_MAP_START( stepstag_map, AS_PROGRAM, 16, stepstag_state )
|
||||
AM_RANGE(0xba0000, 0xba001f) AM_WRITE(tetrisp2_systemregs_w) // system param
|
||||
AM_RANGE(0xba001e, 0xba001f) AM_WRITENOP // Lev 2 irq ack
|
||||
AM_RANGE(0xbe0002, 0xbe0003) AM_READ_PORT("PLAYERS") // Inputs
|
||||
AM_RANGE(0xbe0004, 0xbe0005) AM_READ_LEGACY(stepstag_ip_1_word_r) // Inputs & protection
|
||||
AM_RANGE(0xbe0004, 0xbe0005) AM_READ(stepstag_ip_1_word_r) // Inputs & protection
|
||||
AM_RANGE(0xbe0008, 0xbe0009) AM_READ_PORT("DSW") // Inputs
|
||||
AM_RANGE(0xbe000a, 0xbe000b) AM_READNOP //watchdog
|
||||
ADDRESS_MAP_END
|
||||
@ -110,10 +114,10 @@ static ADDRESS_MAP_START( stepstag_sub_map, AS_PROGRAM, 16, stepstag_state )
|
||||
AM_RANGE(0x980000, 0x980001) AM_WRITENOP //??
|
||||
AM_RANGE(0xa00000, 0xa7ffff) AM_RAM
|
||||
AM_RANGE(0xa80000, 0xa80001) AM_WRITENOP //??
|
||||
AM_RANGE(0xc00000, 0xc00001) AM_READ_LEGACY(unknown_read_0xc00000) AM_WRITENOP //??
|
||||
AM_RANGE(0xd00000, 0xd00001) AM_READ_LEGACY(unknown_read_0xd00000)
|
||||
AM_RANGE(0xc00000, 0xc00001) AM_READ(unknown_read_0xc00000) AM_WRITENOP //??
|
||||
AM_RANGE(0xd00000, 0xd00001) AM_READ(unknown_read_0xd00000)
|
||||
AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP //??
|
||||
AM_RANGE(0xffff00, 0xffff01) AM_READ_LEGACY(unknown_read_0xffff00)
|
||||
AM_RANGE(0xffff00, 0xffff01) AM_READ(unknown_read_0xffff00)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/* TODO: inputs are copied from Tetris Plus 2, they needs to be changed accordingly */
|
||||
|
@ -61,6 +61,8 @@ public:
|
||||
DECLARE_WRITE8_MEMBER(superwng_flip_screen_w);
|
||||
DECLARE_WRITE8_MEMBER(superwng_cointcnt1_w);
|
||||
DECLARE_WRITE8_MEMBER(superwng_cointcnt2_w);
|
||||
DECLARE_WRITE8_MEMBER(superwng_flip_screen_x_w);
|
||||
DECLARE_WRITE8_MEMBER(superwng_flip_screen_y_w);
|
||||
};
|
||||
|
||||
static TILE_GET_INFO( get_bg_tile_info )
|
||||
@ -94,14 +96,14 @@ static TILE_GET_INFO( get_fg_tile_info )
|
||||
SET_TILE_INFO( 0, code, attr & 0xf, flipx|flipy);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( superwng_flip_screen_x_w )
|
||||
WRITE8_MEMBER(superwng_state::superwng_flip_screen_x_w)
|
||||
{
|
||||
flip_screen_x_set(space->machine(), ~data & 1);
|
||||
flip_screen_x_set(machine(), ~data & 1);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( superwng_flip_screen_y_w )
|
||||
WRITE8_MEMBER(superwng_state::superwng_flip_screen_y_w)
|
||||
{
|
||||
flip_screen_y_set(space->machine(), ~data & 1);
|
||||
flip_screen_y_set(machine(), ~data & 1);
|
||||
}
|
||||
|
||||
static VIDEO_START( superwng )
|
||||
|
@ -253,6 +253,17 @@ public:
|
||||
int m_output_last[ 0x100 ];
|
||||
int m_last_io_offset;
|
||||
UINT8 m_sector_buffer[ 4096 ];
|
||||
DECLARE_WRITE32_MEMBER(twinkle_io_w);
|
||||
DECLARE_READ32_MEMBER(twinkle_io_r);
|
||||
DECLARE_WRITE32_MEMBER(twinkle_output_w);
|
||||
DECLARE_WRITE32_MEMBER(serial_w);
|
||||
DECLARE_WRITE32_MEMBER(shared_psx_w);
|
||||
DECLARE_READ32_MEMBER(shared_psx_r);
|
||||
DECLARE_WRITE16_MEMBER(twinkle_spu_ctrl_w);
|
||||
DECLARE_READ16_MEMBER(twinkle_waveram_r);
|
||||
DECLARE_WRITE16_MEMBER(twinkle_waveram_w);
|
||||
DECLARE_READ16_MEMBER(shared_68k_r);
|
||||
DECLARE_WRITE16_MEMBER(shared_68k_w);
|
||||
};
|
||||
|
||||
/* RTC */
|
||||
@ -417,21 +428,21 @@ static const UINT16 asciicharset[]=
|
||||
0, //
|
||||
};
|
||||
|
||||
static WRITE32_HANDLER( twinkle_io_w )
|
||||
WRITE32_MEMBER(twinkle_state::twinkle_io_w)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
|
||||
if( ACCESSING_BITS_16_23 )
|
||||
{
|
||||
state->m_io_offset = ( data >> 16 ) & 0xff;
|
||||
m_io_offset = ( data >> 16 ) & 0xff;
|
||||
}
|
||||
if( ACCESSING_BITS_0_7 )
|
||||
{
|
||||
if( state->m_output_last[ state->m_io_offset ] != ( data & 0xff ) )
|
||||
if( m_output_last[ m_io_offset ] != ( data & 0xff ) )
|
||||
{
|
||||
state->m_output_last[ state->m_io_offset ] = ( data & 0xff );
|
||||
m_output_last[ m_io_offset ] = ( data & 0xff );
|
||||
|
||||
switch( state->m_io_offset )
|
||||
switch( m_io_offset )
|
||||
{
|
||||
/* ? */
|
||||
case 0x07:
|
||||
@ -452,7 +463,7 @@ static WRITE32_HANDLER( twinkle_io_w )
|
||||
case 0x6f:
|
||||
case 0x77:
|
||||
case 0x7f:
|
||||
output_set_indexed_value( "led", ( state->m_io_offset - 7 ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] );
|
||||
output_set_indexed_value( "led", ( m_io_offset - 7 ) / 8, asciicharset[ ( data ^ 0xff ) & 0x7f ] );
|
||||
break;
|
||||
|
||||
case 0x87:
|
||||
@ -471,55 +482,55 @@ static WRITE32_HANDLER( twinkle_io_w )
|
||||
|
||||
if( ( data & 0xfe ) != 0xfe )
|
||||
{
|
||||
printf("%02x = %02x\n", state->m_io_offset, data & 0xff );
|
||||
printf("%02x = %02x\n", m_io_offset, data & 0xff );
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
printf( "unknown io %02x = %02x\n", state->m_io_offset, data & 0xff );
|
||||
printf( "unknown io %02x = %02x\n", m_io_offset, data & 0xff );
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static READ32_HANDLER(twinkle_io_r)
|
||||
READ32_MEMBER(twinkle_state::twinkle_io_r)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
UINT32 data = 0;
|
||||
|
||||
if( ACCESSING_BITS_0_7 )
|
||||
{
|
||||
switch( state->m_io_offset )
|
||||
switch( m_io_offset )
|
||||
{
|
||||
case 0x07:
|
||||
data |= input_port_read( space->machine(), "IN0" );
|
||||
data |= input_port_read( machine(), "IN0" );
|
||||
break;
|
||||
|
||||
case 0x0f:
|
||||
data |= input_port_read( space->machine(), "IN1" );
|
||||
data |= input_port_read( machine(), "IN1" );
|
||||
break;
|
||||
|
||||
case 0x17:
|
||||
data |= input_port_read( space->machine(), "IN2" );
|
||||
data |= input_port_read( machine(), "IN2" );
|
||||
break;
|
||||
|
||||
case 0x1f:
|
||||
data |= input_port_read( space->machine(), "IN3" );
|
||||
data |= input_port_read( machine(), "IN3" );
|
||||
break;
|
||||
|
||||
case 0x27:
|
||||
data |= input_port_read( space->machine(), "IN4" );
|
||||
data |= input_port_read( machine(), "IN4" );
|
||||
break;
|
||||
|
||||
case 0x2f:
|
||||
data |= input_port_read( space->machine(), "IN5" );
|
||||
data |= input_port_read( machine(), "IN5" );
|
||||
break;
|
||||
|
||||
default:
|
||||
if( state->m_last_io_offset != state->m_io_offset )
|
||||
if( m_last_io_offset != m_io_offset )
|
||||
{
|
||||
state->m_last_io_offset = state->m_io_offset;
|
||||
m_last_io_offset = m_io_offset;
|
||||
}
|
||||
|
||||
break;
|
||||
@ -534,7 +545,7 @@ static READ32_HANDLER(twinkle_io_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER(twinkle_output_w)
|
||||
WRITE32_MEMBER(twinkle_state::twinkle_output_w)
|
||||
{
|
||||
switch( offset )
|
||||
{
|
||||
@ -564,7 +575,7 @@ static WRITE32_HANDLER(twinkle_output_w)
|
||||
}
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER(serial_w)
|
||||
WRITE32_MEMBER(twinkle_state::serial_w)
|
||||
{
|
||||
/*
|
||||
int _do = ( data >> 4 ) & 1;
|
||||
@ -575,19 +586,19 @@ static WRITE32_HANDLER(serial_w)
|
||||
*/
|
||||
}
|
||||
|
||||
static WRITE32_HANDLER(shared_psx_w)
|
||||
WRITE32_MEMBER(twinkle_state::shared_psx_w)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
|
||||
if (mem_mask == 0xff)
|
||||
{
|
||||
state->m_spu_shared[offset*2] = data;
|
||||
// printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, offset*2, mem_mask, cpu_get_pc(&space->device()));
|
||||
m_spu_shared[offset*2] = data;
|
||||
// printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, offset*2, mem_mask, cpu_get_pc(&space.device()));
|
||||
}
|
||||
else if (mem_mask == 0xff0000)
|
||||
{
|
||||
state->m_spu_shared[(offset*2)+1] = data;
|
||||
// printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, (offset*2)+1, mem_mask, cpu_get_pc(&space->device()));
|
||||
m_spu_shared[(offset*2)+1] = data;
|
||||
// printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, (offset*2)+1, mem_mask, cpu_get_pc(&space.device()));
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -595,14 +606,14 @@ static WRITE32_HANDLER(shared_psx_w)
|
||||
}
|
||||
}
|
||||
|
||||
static READ32_HANDLER(shared_psx_r)
|
||||
READ32_MEMBER(twinkle_state::shared_psx_r)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
UINT32 result;
|
||||
|
||||
result = state->m_spu_shared[offset*2] | state->m_spu_shared[(offset*2)+1]<<16;
|
||||
result = m_spu_shared[offset*2] | m_spu_shared[(offset*2)+1]<<16;
|
||||
|
||||
// printf("shared_psx_r: @ %x (%x %x), mask %x = %x (PC=%x)\n", offset, offset*2, (offset*2)+1, mem_mask, result, cpu_get_pc(&space->device()));
|
||||
// printf("shared_psx_r: @ %x (%x %x), mask %x = %x (PC=%x)\n", offset, offset*2, (offset*2)+1, mem_mask, result, cpu_get_pc(&space.device()));
|
||||
|
||||
result = 0; // HACK to prevent the games from freezing while we sort out the rest of the 68k's boot sequence
|
||||
|
||||
@ -611,22 +622,22 @@ static READ32_HANDLER(shared_psx_r)
|
||||
|
||||
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, twinkle_state )
|
||||
AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("share1") /* ram */
|
||||
AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE_LEGACY(shared_psx_r, shared_psx_w)
|
||||
AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE(shared_psx_r, shared_psx_w)
|
||||
AM_RANGE(0x1f200000, 0x1f20001f) AM_READWRITE_LEGACY(am53cf96_r, am53cf96_w)
|
||||
AM_RANGE(0x1f20a01c, 0x1f20a01f) AM_WRITENOP /* scsi? */
|
||||
AM_RANGE(0x1f210400, 0x1f2107ff) AM_READNOP
|
||||
AM_RANGE(0x1f218000, 0x1f218003) AM_WRITE(watchdog_reset32_w) /* LTC1232 */
|
||||
AM_RANGE(0x1f220000, 0x1f220003) AM_WRITE_LEGACY(twinkle_io_w)
|
||||
AM_RANGE(0x1f220004, 0x1f220007) AM_READ_LEGACY(twinkle_io_r)
|
||||
AM_RANGE(0x1f220000, 0x1f220003) AM_WRITE(twinkle_io_w)
|
||||
AM_RANGE(0x1f220004, 0x1f220007) AM_READ(twinkle_io_r)
|
||||
AM_RANGE(0x1f230000, 0x1f230003) AM_WRITENOP
|
||||
AM_RANGE(0x1f240000, 0x1f240003) AM_READ_PORT("IN6")
|
||||
AM_RANGE(0x1f250000, 0x1f250003) AM_WRITENOP
|
||||
AM_RANGE(0x1f260000, 0x1f260003) AM_WRITE_LEGACY(serial_w)
|
||||
AM_RANGE(0x1f260000, 0x1f260003) AM_WRITE(serial_w)
|
||||
AM_RANGE(0x1f270000, 0x1f270003) AM_WRITE_PORT("OUTSEC")
|
||||
AM_RANGE(0x1f280000, 0x1f280003) AM_READ_PORT("INSEC")
|
||||
AM_RANGE(0x1f290000, 0x1f29007f) AM_DEVREADWRITE8("rtc", rtc65271_device, rtc_r, rtc_w, 0x00ff00ff)
|
||||
AM_RANGE(0x1f2a0000, 0x1f2a007f) AM_DEVREADWRITE8("rtc", rtc65271_device, xram_r, xram_w, 0x00ff00ff)
|
||||
AM_RANGE(0x1f2b0000, 0x1f2b00ff) AM_WRITE_LEGACY(twinkle_output_w)
|
||||
AM_RANGE(0x1f2b0000, 0x1f2b00ff) AM_WRITE(twinkle_output_w)
|
||||
AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_SHARE("share2") AM_REGION("user1", 0) /* bios */
|
||||
AM_RANGE(0x80000000, 0x803fffff) AM_RAM AM_SHARE("share1") /* ram mirror */
|
||||
AM_RANGE(0x9fc00000, 0x9fc7ffff) AM_ROM AM_SHARE("share2") /* bios mirror */
|
||||
@ -675,75 +686,75 @@ static WRITE16_DEVICE_HANDLER( twinkle_ide_w )
|
||||
|
||||
Other bits unknown.
|
||||
*/
|
||||
static WRITE16_HANDLER( twinkle_spu_ctrl_w )
|
||||
WRITE16_MEMBER(twinkle_state::twinkle_spu_ctrl_w)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
if ((!(data & 0x0080)) && (state->m_spu_ctrl & 0x0080))
|
||||
|
||||
if ((!(data & 0x0080)) && (m_spu_ctrl & 0x0080))
|
||||
{
|
||||
device_set_input_line(&space->device(), M68K_IRQ_1, CLEAR_LINE);
|
||||
device_set_input_line(&space.device(), M68K_IRQ_1, CLEAR_LINE);
|
||||
}
|
||||
else if ((!(data & 0x0100)) && (state->m_spu_ctrl & 0x0100))
|
||||
else if ((!(data & 0x0100)) && (m_spu_ctrl & 0x0100))
|
||||
{
|
||||
device_set_input_line(&space->device(), M68K_IRQ_2, CLEAR_LINE);
|
||||
device_set_input_line(&space.device(), M68K_IRQ_2, CLEAR_LINE);
|
||||
}
|
||||
else if ((!(data & 0x0200)) && (state->m_spu_ctrl & 0x0200))
|
||||
else if ((!(data & 0x0200)) && (m_spu_ctrl & 0x0200))
|
||||
{
|
||||
device_set_input_line(&space->device(), M68K_IRQ_4, CLEAR_LINE);
|
||||
device_set_input_line(&space.device(), M68K_IRQ_4, CLEAR_LINE);
|
||||
}
|
||||
else if ((!(data & 0x0400)) && (state->m_spu_ctrl & 0x0400))
|
||||
else if ((!(data & 0x0400)) && (m_spu_ctrl & 0x0400))
|
||||
{
|
||||
device_set_input_line(&space->device(), M68K_IRQ_6, CLEAR_LINE);
|
||||
device_set_input_line(&space.device(), M68K_IRQ_6, CLEAR_LINE);
|
||||
}
|
||||
|
||||
state->m_spu_ctrl = data;
|
||||
m_spu_ctrl = data;
|
||||
}
|
||||
|
||||
static READ16_HANDLER( twinkle_waveram_r )
|
||||
READ16_MEMBER(twinkle_state::twinkle_waveram_r)
|
||||
{
|
||||
UINT16 *waveram = (UINT16 *)space->machine().region("rfsnd")->base();
|
||||
UINT16 *waveram = (UINT16 *)machine().region("rfsnd")->base();
|
||||
|
||||
return waveram[offset];
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( twinkle_waveram_w )
|
||||
WRITE16_MEMBER(twinkle_state::twinkle_waveram_w)
|
||||
{
|
||||
UINT16 *waveram = (UINT16 *)space->machine().region("rfsnd")->base();
|
||||
UINT16 *waveram = (UINT16 *)machine().region("rfsnd")->base();
|
||||
|
||||
COMBINE_DATA(&waveram[offset]);
|
||||
}
|
||||
|
||||
static READ16_HANDLER( shared_68k_r )
|
||||
READ16_MEMBER(twinkle_state::shared_68k_r)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
|
||||
// printf("shared_68k_r: @ %x, mask %x\n", offset, mem_mask);
|
||||
|
||||
return state->m_spu_shared[offset];
|
||||
return m_spu_shared[offset];
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( shared_68k_w )
|
||||
WRITE16_MEMBER(twinkle_state::shared_68k_w)
|
||||
{
|
||||
twinkle_state *state = space->machine().driver_data<twinkle_state>();
|
||||
|
||||
|
||||
// printf("shared_68k_w: %x to %x, mask %x\n", data, offset, mem_mask);
|
||||
|
||||
state->m_spu_shared[offset] = data & 0xff;
|
||||
m_spu_shared[offset] = data & 0xff;
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x13ffff) AM_RAM
|
||||
// 220000 = LEDs?
|
||||
AM_RANGE(0x230000, 0x230003) AM_WRITE_LEGACY(twinkle_spu_ctrl_w)
|
||||
AM_RANGE(0x230000, 0x230003) AM_WRITE(twinkle_spu_ctrl_w)
|
||||
// 240000 = top 16 bits of DMA address?
|
||||
// 250000 = write to initiate DMA?
|
||||
// 260000 = ???
|
||||
AM_RANGE(0x280000, 0x280fff) AM_READWRITE_LEGACY(shared_68k_r, shared_68k_w )
|
||||
AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w )
|
||||
AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE_LEGACY("ide", twinkle_ide_r, twinkle_ide_w)
|
||||
// 34000E = ???
|
||||
AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE_LEGACY("rfsnd", rf5c400_r, rf5c400_w)
|
||||
AM_RANGE(0x800000, 0xffffff) AM_READWRITE_LEGACY(twinkle_waveram_r, twinkle_waveram_w ) // 8 MB window wave RAM
|
||||
AM_RANGE(0x800000, 0xffffff) AM_READWRITE(twinkle_waveram_r, twinkle_waveram_w ) // 8 MB window wave RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/* SCSI */
|
||||
|
@ -94,19 +94,31 @@ public:
|
||||
tilemap_t *m_texttilemap;
|
||||
tilemap_t *m_mid1tilemap;
|
||||
tilemap_t *m_mid2tilemap;
|
||||
DECLARE_READ16_MEMBER(varia_crom_read);
|
||||
DECLARE_WRITE16_MEMBER(vmetal_texttileram_w);
|
||||
DECLARE_WRITE16_MEMBER(vmetal_mid1tileram_w);
|
||||
DECLARE_WRITE16_MEMBER(vmetal_mid2tileram_w);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit8_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit7_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit6_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit5_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit4_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit3_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit2_r);
|
||||
DECLARE_READ16_MEMBER(varia_dips_bit1_r);
|
||||
};
|
||||
|
||||
|
||||
static READ16_HANDLER ( varia_crom_read )
|
||||
READ16_MEMBER(vmetal_state::varia_crom_read)
|
||||
{
|
||||
/* game reads the cgrom, result is 7772, verified to be correct on the real board */
|
||||
|
||||
vmetal_state *state = space->machine().driver_data<vmetal_state>();
|
||||
UINT8 *cgrom = space->machine().region("gfx1")->base();
|
||||
|
||||
UINT8 *cgrom = machine().region("gfx1")->base();
|
||||
UINT16 retdat;
|
||||
|
||||
offset = offset << 1;
|
||||
offset |= (state->m_vmetal_videoregs[0x0ab / 2] & 0x7f) << 16;
|
||||
offset |= (m_vmetal_videoregs[0x0ab / 2] & 0x7f) << 16;
|
||||
retdat = ((cgrom[offset] << 8) | (cgrom[offset + 1]));
|
||||
// popmessage("varia romread offset %06x data %04x", offset, retdat);
|
||||
|
||||
@ -125,36 +137,36 @@ static void get_vmetal_tlookup(running_machine &machine, UINT16 data, UINT16 *ti
|
||||
}
|
||||
|
||||
|
||||
static WRITE16_HANDLER( vmetal_texttileram_w )
|
||||
WRITE16_MEMBER(vmetal_state::vmetal_texttileram_w)
|
||||
{
|
||||
vmetal_state *state = space->machine().driver_data<vmetal_state>();
|
||||
COMBINE_DATA(&state->m_texttileram[offset]);
|
||||
state->m_texttilemap->mark_tile_dirty(offset);
|
||||
|
||||
COMBINE_DATA(&m_texttileram[offset]);
|
||||
m_texttilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( vmetal_mid1tileram_w )
|
||||
WRITE16_MEMBER(vmetal_state::vmetal_mid1tileram_w)
|
||||
{
|
||||
vmetal_state *state = space->machine().driver_data<vmetal_state>();
|
||||
COMBINE_DATA(&state->m_mid1tileram[offset]);
|
||||
state->m_mid1tilemap->mark_tile_dirty(offset);
|
||||
|
||||
COMBINE_DATA(&m_mid1tileram[offset]);
|
||||
m_mid1tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
static WRITE16_HANDLER( vmetal_mid2tileram_w )
|
||||
WRITE16_MEMBER(vmetal_state::vmetal_mid2tileram_w)
|
||||
{
|
||||
vmetal_state *state = space->machine().driver_data<vmetal_state>();
|
||||
COMBINE_DATA(&state->m_mid2tileram[offset]);
|
||||
state->m_mid2tilemap->mark_tile_dirty(offset);
|
||||
|
||||
COMBINE_DATA(&m_mid2tileram[offset]);
|
||||
m_mid2tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
|
||||
static READ16_HANDLER ( varia_dips_bit8_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x80) << 0) | ((input_port_read(space->machine(), "DSW1") & 0x80) >> 1); }
|
||||
static READ16_HANDLER ( varia_dips_bit7_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x40) << 1) | ((input_port_read(space->machine(), "DSW1") & 0x40) >> 0); }
|
||||
static READ16_HANDLER ( varia_dips_bit6_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x20) << 2) | ((input_port_read(space->machine(), "DSW1") & 0x20) << 1); }
|
||||
static READ16_HANDLER ( varia_dips_bit5_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x10) << 3) | ((input_port_read(space->machine(), "DSW1") & 0x10) << 2); }
|
||||
static READ16_HANDLER ( varia_dips_bit4_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x08) << 4) | ((input_port_read(space->machine(), "DSW1") & 0x08) << 3); }
|
||||
static READ16_HANDLER ( varia_dips_bit3_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x04) << 5) | ((input_port_read(space->machine(), "DSW1") & 0x04) << 4); }
|
||||
static READ16_HANDLER ( varia_dips_bit2_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x02) << 6) | ((input_port_read(space->machine(), "DSW1") & 0x02) << 5); }
|
||||
static READ16_HANDLER ( varia_dips_bit1_r ) { return ((input_port_read(space->machine(), "DSW2") & 0x01) << 7) | ((input_port_read(space->machine(), "DSW1") & 0x01) << 6); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit8_r){ return ((input_port_read(machine(), "DSW2") & 0x80) << 0) | ((input_port_read(machine(), "DSW1") & 0x80) >> 1); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit7_r){ return ((input_port_read(machine(), "DSW2") & 0x40) << 1) | ((input_port_read(machine(), "DSW1") & 0x40) >> 0); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit6_r){ return ((input_port_read(machine(), "DSW2") & 0x20) << 2) | ((input_port_read(machine(), "DSW1") & 0x20) << 1); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit5_r){ return ((input_port_read(machine(), "DSW2") & 0x10) << 3) | ((input_port_read(machine(), "DSW1") & 0x10) << 2); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit4_r){ return ((input_port_read(machine(), "DSW2") & 0x08) << 4) | ((input_port_read(machine(), "DSW1") & 0x08) << 3); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit3_r){ return ((input_port_read(machine(), "DSW2") & 0x04) << 5) | ((input_port_read(machine(), "DSW1") & 0x04) << 4); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit2_r){ return ((input_port_read(machine(), "DSW2") & 0x02) << 6) | ((input_port_read(machine(), "DSW1") & 0x02) << 5); }
|
||||
READ16_MEMBER(vmetal_state::varia_dips_bit1_r){ return ((input_port_read(machine(), "DSW2") & 0x01) << 7) | ((input_port_read(machine(), "DSW1") & 0x01) << 6); }
|
||||
|
||||
static WRITE8_DEVICE_HANDLER( vmetal_control_w )
|
||||
{
|
||||
@ -218,11 +230,11 @@ static WRITE8_DEVICE_HANDLER( vmetal_es8712_w )
|
||||
|
||||
static ADDRESS_MAP_START( varia_program_map, AS_PROGRAM, 16, vmetal_state )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x11ffff) AM_RAM_WRITE_LEGACY(vmetal_texttileram_w) AM_BASE(m_texttileram)
|
||||
AM_RANGE(0x120000, 0x13ffff) AM_RAM_WRITE_LEGACY(vmetal_mid1tileram_w) AM_BASE(m_mid1tileram)
|
||||
AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE_LEGACY(vmetal_mid2tileram_w) AM_BASE(m_mid2tileram)
|
||||
AM_RANGE(0x100000, 0x11ffff) AM_RAM_WRITE(vmetal_texttileram_w) AM_BASE(m_texttileram)
|
||||
AM_RANGE(0x120000, 0x13ffff) AM_RAM_WRITE(vmetal_mid1tileram_w) AM_BASE(m_mid1tileram)
|
||||
AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE(vmetal_mid2tileram_w) AM_BASE(m_mid2tileram)
|
||||
|
||||
AM_RANGE(0x160000, 0x16ffff) AM_READ_LEGACY(varia_crom_read) // cgrom read window ..
|
||||
AM_RANGE(0x160000, 0x16ffff) AM_READ(varia_crom_read) // cgrom read window ..
|
||||
|
||||
AM_RANGE(0x170000, 0x173fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_SHARE("paletteram") // Palette
|
||||
AM_RANGE(0x174000, 0x174fff) AM_RAM AM_BASE_SIZE(m_spriteram, m_spriteram_size)
|
||||
@ -243,14 +255,14 @@ static ADDRESS_MAP_START( varia_program_map, AS_PROGRAM, 16, vmetal_state )
|
||||
AM_RANGE(0x31f7fe, 0x31f7ff) AM_READNOP // 0x40 = dip1-11 -> 0xff0086 (doesn't exist in this game : address is NEVER read back)
|
||||
AM_RANGE(0x31fbfe, 0x31fbff) AM_READNOP // 0x40 = dip1-10 -> 0xff0086 (doesn't exist in this game : address is NEVER read back)
|
||||
AM_RANGE(0x31fdfe, 0x31fdff) AM_READNOP // 0x40 = dip1-9 -> 0xff0086 (doesn't exist in this game : address is NEVER read back)
|
||||
AM_RANGE(0x31fefe, 0x31feff) AM_READ_LEGACY(varia_dips_bit8_r) // 0x40 = dip1-8 -> 0xff0085 , 0x80 = dip2-8 -> 0xff0084
|
||||
AM_RANGE(0x31ff7e, 0x31ff7f) AM_READ_LEGACY(varia_dips_bit7_r) // 0x40 = dip1-7 -> 0xff0085 , 0x80 = dip2-7 -> 0xff0084
|
||||
AM_RANGE(0x31ffbe, 0x31ffbf) AM_READ_LEGACY(varia_dips_bit6_r) // 0x40 = dip1-6 -> 0xff0085 , 0x80 = dip2-6 -> 0xff0084
|
||||
AM_RANGE(0x31ffde, 0x31ffdf) AM_READ_LEGACY(varia_dips_bit5_r) // 0x40 = dip1-5 -> 0xff0085 , 0x80 = dip2-5 -> 0xff0084
|
||||
AM_RANGE(0x31ffee, 0x31ffef) AM_READ_LEGACY(varia_dips_bit4_r) // 0x40 = dip1-4 -> 0xff0085 , 0x80 = dip2-4 -> 0xff0084
|
||||
AM_RANGE(0x31fff6, 0x31fff7) AM_READ_LEGACY(varia_dips_bit3_r) // 0x40 = dip1-3 -> 0xff0085 , 0x80 = dip2-3 -> 0xff0084
|
||||
AM_RANGE(0x31fffa, 0x31fffb) AM_READ_LEGACY(varia_dips_bit2_r) // 0x40 = dip1-2 -> 0xff0085 , 0x80 = dip2-2 -> 0xff0084
|
||||
AM_RANGE(0x31fffc, 0x31fffd) AM_READ_LEGACY(varia_dips_bit1_r) // 0x40 = dip1-1 -> 0xff0085 , 0x80 = dip2-1 -> 0xff0084
|
||||
AM_RANGE(0x31fefe, 0x31feff) AM_READ(varia_dips_bit8_r) // 0x40 = dip1-8 -> 0xff0085 , 0x80 = dip2-8 -> 0xff0084
|
||||
AM_RANGE(0x31ff7e, 0x31ff7f) AM_READ(varia_dips_bit7_r) // 0x40 = dip1-7 -> 0xff0085 , 0x80 = dip2-7 -> 0xff0084
|
||||
AM_RANGE(0x31ffbe, 0x31ffbf) AM_READ(varia_dips_bit6_r) // 0x40 = dip1-6 -> 0xff0085 , 0x80 = dip2-6 -> 0xff0084
|
||||
AM_RANGE(0x31ffde, 0x31ffdf) AM_READ(varia_dips_bit5_r) // 0x40 = dip1-5 -> 0xff0085 , 0x80 = dip2-5 -> 0xff0084
|
||||
AM_RANGE(0x31ffee, 0x31ffef) AM_READ(varia_dips_bit4_r) // 0x40 = dip1-4 -> 0xff0085 , 0x80 = dip2-4 -> 0xff0084
|
||||
AM_RANGE(0x31fff6, 0x31fff7) AM_READ(varia_dips_bit3_r) // 0x40 = dip1-3 -> 0xff0085 , 0x80 = dip2-3 -> 0xff0084
|
||||
AM_RANGE(0x31fffa, 0x31fffb) AM_READ(varia_dips_bit2_r) // 0x40 = dip1-2 -> 0xff0085 , 0x80 = dip2-2 -> 0xff0084
|
||||
AM_RANGE(0x31fffc, 0x31fffd) AM_READ(varia_dips_bit1_r) // 0x40 = dip1-1 -> 0xff0085 , 0x80 = dip2-1 -> 0xff0084
|
||||
|
||||
AM_RANGE(0x400000, 0x400001) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff )
|
||||
AM_RANGE(0x400002, 0x400003) AM_DEVWRITE8("oki", okim6295_device, write, 0x00ff) // Volume/channel info
|
||||
|
Loading…
Reference in New Issue
Block a user