From ccde063a1fff2c7dfc3947bf9a4993ceccc7b95b Mon Sep 17 00:00:00 2001
From: Angelo Salese <angelosa@users.noreply.github.com>
Date: Tue, 24 Mar 2009 18:41:23 +0000
Subject: [PATCH] Very preliminary Wave DMA support for Naomi. This fixes the
 booting at least in Choco Marker and Street Fighter Zero 3 Upper [Angelo
 Salese]

===============================================================================

To boot sfz3u:
1) use bios 7 (default bios gives an error 2: "region error");
2) enter into service mode first (probably a JVS issue);
---
 src/mame/includes/dc.h |  6 +++++
 src/mame/machine/dc.c  | 52 +++++++++++++++++++++++++++++++++++++-----
 2 files changed, 52 insertions(+), 6 deletions(-)

diff --git a/src/mame/includes/dc.h b/src/mame/includes/dc.h
index 9884ea9aee2..43662bde833 100644
--- a/src/mame/includes/dc.h
+++ b/src/mame/includes/dc.h
@@ -89,10 +89,16 @@ extern UINT32 dc_coin_counts[2];
 #define SB_G1CRDYC	((0x005F74B4-0x005F7400)/4)
 #define SB_GDAPRO	((0x005F74B8-0x005F7400)/4)
 
+#define SB_ADSTAG       ((0x005F7800-0x005F7800)/4)
+#define SB_ADSTAR       ((0x005F7804-0x005F7800)/4)
+#define SB_ADLEN        ((0x005F7808-0x005F7800)/4)
+#define SB_ADDIR        ((0x005F780c-0x005F7800)/4)
 #define SB_ADTSEL	((0x005F7810-0x005F7800)/4)
 #define SB_ADTRG	SB_ADTSEL
 #define SB_ADEN		((0x005F7814-0x005F7800)/4)
 #define SB_ADST		((0x005F7818-0x005F7800)/4)
+#define SB_ADSUSP	((0x005F781c-0x005F7800)/4)
+
 
 #define SB_PDST		((0x005F7c18-0x005F7c00)/4)
 
diff --git a/src/mame/machine/dc.c b/src/mame/machine/dc.c
index 852ba146ffb..c53cab1b417 100644
--- a/src/mame/machine/dc.c
+++ b/src/mame/machine/dc.c
@@ -796,17 +796,57 @@ WRITE64_HANDLER( dc_g2_ctrl_w )
 	int reg;
 	UINT64 shift;
 	UINT32 dat;
+	static UINT32 wave_dma_aica_addr,wave_dma_root_addr,wave_dma_size,wave_dma_dir,wave_dma_flag;
 
 	reg = decode_reg32_64(space->machine, offset, mem_mask, &shift);
 	dat = (UINT32)(data >> shift);
 	switch (reg)
 	{
-	case SB_ADTSEL:
-		mame_printf_verbose("G2CTRL: initiation mode %d\n",dat);
-		break;
-	case SB_ADST:
-		mame_printf_verbose("G2CTRL: AICA:G2-DMA start\n");
-		break;
+		/*AICA Address register*/
+		case SB_ADSTAG:
+			//printf("SB_ADSTAG data %08x\n",dat);
+			wave_dma_aica_addr = dat;
+			break;
+		/*Root address (work ram)*/
+		case SB_ADSTAR:
+			//printf("SB_ADSTAR data %08x\n",dat);
+			wave_dma_root_addr = dat;
+			break;
+		/*DMA size (in dword units, bit 31 is "set dma initiation enable setting to 0"*/
+		case SB_ADLEN:
+			//printf("SB_ADLEN data %08x\n",dat);
+			wave_dma_size = dat & 0x7fffffff;
+			break;
+		/*0 = root memory to aica / 1 = aica to root memory*/
+		case SB_ADDIR:
+			//printf("SB_ADDIR data %08x\n",dat);
+			wave_dma_dir = 1 ^ (dat & 1);
+			break;
+		/*dma flag (active HIGH, bug in docs)*/
+		case SB_ADEN:
+			//printf("SB_ADEN data %08x\n",dat);
+			wave_dma_flag = (dat & 1);
+			break;
+		case SB_ADTSEL:
+			mame_printf_verbose("G2CTRL: initiation mode %d\n",dat);
+			//printf("SB_ADTSEL data %08x\n",dat);
+			break;
+		/*ready for dma'ing*/
+		case SB_ADST:
+			mame_printf_verbose("G2CTRL: AICA:G2-DMA start\n");
+			//printf("SB_ADST data %08x\n",dat);
+			if(wave_dma_flag)
+			{
+				UINT32 src,dst,size;
+				src = wave_dma_aica_addr;
+				dst = wave_dma_root_addr;
+				//size = wave_dma_size;
+				size = 0;
+				/* TODO: use the ddt function. */
+				for(size=0;size<wave_dma_size;size++)
+					memory_write_dword_64le(space,wave_dma_aica_addr+size*4,memory_read_dword(space,wave_dma_root_addr+size*4));
+			}
+			break;
 	}
 	mame_printf_verbose("G2CTRL: [%08x=%x] write %llx to %x, mask %llx\n", 0x5f7800+reg*4, dat, data, offset, mem_mask);
 }