diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 70a8ab89c32..f27b41c32a2 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -2784,8 +2784,16 @@ files { MAME_DIR .. "src/mame/video/namcos2_roz.cpp", MAME_DIR .. "src/mame/video/namcos2_roz.h", MAME_DIR .. "src/mame/drivers/namcos21.cpp", - MAME_DIR .. "src/mame/includes/namcos21.h", - MAME_DIR .. "src/mame/video/namcos21.cpp", + MAME_DIR .. "src/mame/drivers/namcos21_de.cpp", + MAME_DIR .. "src/mame/drivers/namcos21_c67.cpp", + MAME_DIR .. "src/mame/video/namcos21_3d.cpp", + MAME_DIR .. "src/mame/video/namcos21_3d.h", + MAME_DIR .. "src/mame/machine/namcos21_dsp.cpp", + MAME_DIR .. "src/mame/machine/namcos21_dsp.h", + MAME_DIR .. "src/mame/machine/namcos21_dsp_c67.cpp", + MAME_DIR .. "src/mame/machine/namcos21_dsp_c67.h", + MAME_DIR .. "src/mame/machine/namco_c67.cpp", + MAME_DIR .. "src/mame/machine/namco_c67.h", MAME_DIR .. "src/mame/drivers/namcos22.cpp", MAME_DIR .. "src/mame/includes/namcos22.h", MAME_DIR .. "src/mame/video/namcos22.cpp", diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp index 6d4b463cb22..0c494c14c2c 100644 --- a/src/devices/cpu/tms32025/tms32025.cpp +++ b/src/devices/cpu/tms32025/tms32025.cpp @@ -184,6 +184,14 @@ Table 3-2. TMS32025/26 Memory Blocks #define IND m_AR[ARP] /* address used in indirect memory access operations */ +/* + Processor can be operated in one of two modes based on Pin 1 (MP/MC) + MP/MC = 1 (Microprocessor Mode) + MP/MC = 0 (Microcomputer Mode) + in 'Microcomputer' mode the 4K Word internal ROM is used (TMS320C25) + + use set_mp_mc in the device configuration to set the pin for internal ROM mode +*/ DEFINE_DEVICE_TYPE(TMS32025, tms32025_device, "tms32025", "Texas Instruments TMS32025") DEFINE_DEVICE_TYPE(TMS32026, tms32026_device, "tms32026", "Texas Instruments TMS32026") @@ -214,18 +222,29 @@ void tms32025_device::tms32026_data(address_map &map) map(0x0600, 0x07ff).ram().share("b3"); } - -tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tms32025_device(mconfig, TMS32025, tag, owner, clock, address_map_constructor(FUNC(tms32025_device::tms32025_data), this)) +#if 0 +// Instead of using the map here we install the ROM depending on the MP/MC pin set in the config +void tms32025_device::tms32025_program(address_map &map) { - m_fixed_STR1 = 0x0180; + map(0x0000, 0x0fff).rom().region("internal", 0); // 4K Words Internal ROM / EPROM +} +#endif + +ROM_START( tms32025 ) + ROM_REGION16_BE( 0x2000, "internal", ROMREGION_ERASE00 ) + // use blank data if internal ROM is not programmed +ROM_END + +const tiny_rom_entry *tms32025_device::device_rom_region() const +{ + return ROM_NAME(tms32025); } -tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map) +tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap) : cpu_device(mconfig, type, tag, owner, clock) - , m_program_config("program", ENDIANNESS_BIG, 16, 16, -1) - , m_data_config("data", ENDIANNESS_BIG, 16, 16, -1, map) + , m_program_config("program", ENDIANNESS_BIG, 16, 16, -1, prgmap) + , m_data_config("data", ENDIANNESS_BIG, 16, 16, -1, datamap) , m_io_config("io", ENDIANNESS_BIG, 16, 16, -1) , m_b0(*this, "b0") , m_b1(*this, "b1") @@ -237,12 +256,24 @@ tms32025_device::tms32025_device(const machine_config &mconfig, device_type type , m_xf_out(*this) , m_dr_in(*this) , m_dx_out(*this) + , m_mp_mc(true) { } +tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : tms32025_device(mconfig, TMS32025, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32025_device::tms32025_data), this)) +{ + m_fixed_STR1 = 0x0180; +} + +tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : tms32025_device(mconfig, type, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32025_device::tms32025_data), this)) +{ + m_fixed_STR1 = 0x0180; +} tms32026_device::tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tms32025_device(mconfig, TMS32026, tag, owner, clock, address_map_constructor(FUNC(tms32026_device::tms32026_data), this)) + : tms32025_device(mconfig, TMS32026, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32026_device::tms32026_data), this)) { m_fixed_STR1 = 0x0100; } @@ -1625,6 +1656,11 @@ void tms32025_device::device_start() m_data = &space(AS_DATA); m_io = &space(AS_IO); + if (!m_mp_mc) // if pin 1 is 0 then we're using internal ROM + { + m_program->install_rom(0x0000, 0x0fff, memregion("internal")->base()); + } + m_bio_in.resolve_safe(0xffff); m_hold_in.resolve_safe(0xffff); m_hold_ack_out.resolve_safe(); diff --git a/src/devices/cpu/tms32025/tms32025.h b/src/devices/cpu/tms32025/tms32025.h index 4deaac2423f..2a4b937432f 100644 --- a/src/devices/cpu/tms32025/tms32025.h +++ b/src/devices/cpu/tms32025/tms32025.h @@ -63,6 +63,7 @@ class tms32025_device : public cpu_device public: // construction/destruction tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); // configuration helpers auto bio_in_cb() { return m_bio_in.bind(); } @@ -72,6 +73,8 @@ public: auto dr_in_cb() { return m_dr_in.bind(); } auto dx_out_cb() { return m_dx_out.bind(); } + void set_mp_mc(bool state) { m_mp_mc = state; } + DECLARE_READ16_MEMBER( drr_r); DECLARE_WRITE16_MEMBER(drr_w); DECLARE_READ16_MEMBER( dxr_r); @@ -85,10 +88,11 @@ public: DECLARE_READ16_MEMBER( greg_r); DECLARE_WRITE16_MEMBER(greg_w); + //void tms32025_program(address_map &map); void tms32025_data(address_map &map); void tms32026_data(address_map &map); protected: - tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map); + tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap); // device-level overrides virtual void device_start() override; @@ -110,6 +114,8 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr create_disassembler() override; + virtual const tiny_rom_entry *device_rom_region() const override; + void common_reset(); address_space_config m_program_config; @@ -354,6 +360,8 @@ protected: void zals(); inline int process_IRQs(); inline void process_timer(int clocks); + + bool m_mp_mc; }; @@ -370,7 +378,6 @@ protected: virtual void conf() override; }; - DECLARE_DEVICE_TYPE(TMS32025, tms32025_device) DECLARE_DEVICE_TYPE(TMS32026, tms32026_device) diff --git a/src/emu/emupal.cpp b/src/emu/emupal.cpp index 16fc8716c94..5bdffe04a4b 100644 --- a/src/emu/emupal.cpp +++ b/src/emu/emupal.cpp @@ -117,13 +117,22 @@ WRITE8_MEMBER(palette_device::write8_ext) update_for_write(offset, 1); } - WRITE16_MEMBER(palette_device::write16_ext) { m_paletteram_ext.write16(offset, data, mem_mask); update_for_write(offset * 2, 2); } +READ8_MEMBER(palette_device::read8_ext) +{ + return m_paletteram_ext.read8(offset); +} + +READ16_MEMBER(palette_device::read16_ext) +{ + return m_paletteram_ext.read16(offset); +} + //------------------------------------------------- // write_indirect - write a byte to the base diff --git a/src/emu/emupal.h b/src/emu/emupal.h index a9ccdc99565..cafed72589a 100644 --- a/src/emu/emupal.h +++ b/src/emu/emupal.h @@ -399,11 +399,13 @@ public: // generic read/write handlers DECLARE_READ8_MEMBER(read8); + DECLARE_READ8_MEMBER(read8_ext); DECLARE_WRITE8_MEMBER(write8); DECLARE_WRITE8_MEMBER(write8_ext); DECLARE_WRITE8_MEMBER(write_indirect); DECLARE_WRITE8_MEMBER(write_indirect_ext); DECLARE_READ16_MEMBER(read16); + DECLARE_READ16_MEMBER(read16_ext); DECLARE_WRITE16_MEMBER(write16); DECLARE_WRITE16_MEMBER(write16_ext); DECLARE_READ32_MEMBER(read32); diff --git a/src/mame/drivers/gal3.cpp b/src/mame/drivers/gal3.cpp index 002ae32e84c..f1ecbe4f451 100644 --- a/src/mame/drivers/gal3.cpp +++ b/src/mame/drivers/gal3.cpp @@ -45,8 +45,8 @@ | | | | | | | |------- Slave 68020 | | | |-------- 1x master DSP, 4x slave DSPs, Polygon, 2D Sprite ------> V-MIX board -----> SCREEN - | | | |-------- ........ more video boards ......... | - | | | |-------- ........ more video boards ......... LD Player + | | | |-------- ........ more video boards ......... (max 2 per slave?) | + | | | LD Player | | | | | |------- ........ more slave 68020s ......... | | @@ -135,6 +135,9 @@ better notes (complete chip lists) for each board still needed #include "rendlay.h" #include "speaker.h" #include "video/namco_c355spr.h" +#include "machine/namcos21_dsp_c67.h" +#include "video/namcos21_3d.h" + #define NAMCOS21_NUM_COLORS 0x8000 @@ -143,39 +146,45 @@ class gal3_state : public driver_device public: gal3_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_c355spr(*this, "c355spr"), - m_palette(*this, "palette"), + m_c355spr(*this, "c355spr_%u", 1U), + m_palette(*this, "palette_%u", 1U), m_rso_shared_ram(*this, "rso_shared_ram"), - m_generic_paletteram_16(*this, "paletteram"), m_c140_16a(*this, "c140_16a"), - m_c140_16g(*this, "c140_16g") + m_c140_16g(*this, "c140_16g"), + m_namcos21_3d(*this, "namcos21_3d_%u", 1U), + m_namcos21_dsp_c67(*this, "namcos21dsp_c67_%u", 1U) { } void gal3(machine_config &config); private: - required_device m_c355spr; - required_device m_palette; - uint16_t m_namcos21_video_enable; + required_device_array m_c355spr; + required_device_array m_palette; + uint16_t m_video_enable[2]; required_shared_ptr m_rso_shared_ram; - optional_shared_ptr m_generic_paletteram_16; required_device m_c140_16a; required_device m_c140_16g; + + + required_device_array m_namcos21_3d; + required_device_array m_namcos21_dsp_c67; + uint32_t m_led_mst; uint32_t m_led_slv; DECLARE_READ32_MEMBER(led_mst_r); DECLARE_WRITE32_MEMBER(led_mst_w); DECLARE_READ32_MEMBER(led_slv_r); DECLARE_WRITE32_MEMBER(led_slv_w); - DECLARE_READ32_MEMBER(paletteram32_r); - DECLARE_WRITE32_MEMBER(paletteram32_w); - DECLARE_READ32_MEMBER(namcos21_video_enable_r); - DECLARE_WRITE32_MEMBER(namcos21_video_enable_w); - DECLARE_READ32_MEMBER(rso_r); - DECLARE_WRITE32_MEMBER(rso_w); - DECLARE_VIDEO_START(gal3); - uint32_t screen_update_gal3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - void update_palette( ); + template DECLARE_READ16_MEMBER(video_enable_r); + template DECLARE_WRITE16_MEMBER(video_enable_w); + DECLARE_READ16_MEMBER(rso_r); + DECLARE_WRITE16_MEMBER(rso_w); + virtual void machine_start() override; + virtual void video_start() override; + + // using ind16 for now because namco_c355spr_device::zdrawgfxzoom does not support rgb32, will probably need to be improved for LD use + uint32_t screen_update_left(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_right(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void cpu_mst_map(address_map &map); void cpu_slv_map(address_map &map); void psn_b1_cpu_map(address_map &map); @@ -184,57 +193,37 @@ private: }; -VIDEO_START_MEMBER(gal3_state,gal3) +void gal3_state::machine_start() { - m_generic_paletteram_16.allocate(0x10000); + save_item(NAME(m_led_mst)); + save_item(NAME(m_led_slv)); } -/* FIXME: this code has simply been copypasted from namcos21.c - (which has subsequently been rewritten to use generic MAME - palette handling) with a 32-bit CPU it's rather unlikely - that the palette RAM is actually laid out this way */ - -void gal3_state::update_palette( ) +void gal3_state::video_start() { - int i; - int16_t data1,data2; - int r,g,b; + save_item(NAME(m_video_enable)); +} - for( i=0; i>8; - g = data1&0xff; - b = data2&0xff; - - m_palette->set_pen_color( i, rgb_t(r,g,b) ); - } -} /* update_palette */ - -uint32_t gal3_state::screen_update_gal3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t gal3_state::screen_update_left(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { int i; char mst[18], slv[18]; static int pivot = 15; int pri; - update_palette(); - if( machine().input().code_pressed_once(KEYCODE_H)&&(pivot<15) ) pivot+=1; if( machine().input().code_pressed_once(KEYCODE_J)&&(pivot>0) ) pivot-=1; for( pri=0; pridraw(screen, bitmap, cliprect, pri); + m_c355spr[0]->draw(screen, bitmap, cliprect, pri); } /* CopyVisiblePolyFrameBuffer( bitmap, cliprect,0,0x7fbf ); for( pri=pivot; pri<15; pri++ ) { - m_c355spr->draw(screen, bitmap, cliprect, pri); + m_c355spr[0]->draw(screen, bitmap, cliprect, pri); }*/ // CPU Diag LEDs @@ -265,6 +254,29 @@ uint32_t gal3_state::screen_update_gal3(screen_device &screen, bitmap_rgb32 &bit return 0; } +uint32_t gal3_state::screen_update_right(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + static int pivot = 15; + int pri; + + if( machine().input().code_pressed_once(KEYCODE_H)&&(pivot<15) ) pivot+=1; + if( machine().input().code_pressed_once(KEYCODE_J)&&(pivot>0) ) pivot-=1; + + for( pri=0; pridraw(screen, bitmap, cliprect, pri); + } + +/* CopyVisiblePolyFrameBuffer( bitmap, cliprect,0,0x7fbf ); + + for( pri=pivot; pri<15; pri++ ) + { + m_c355spr[1]->draw(screen, bitmap, cliprect, pri); + }*/ + + return 0; +} + /***************************************************************************************/ @@ -288,55 +300,30 @@ WRITE32_MEMBER(gal3_state::led_slv_w) COMBINE_DATA(&m_led_slv); } -/* palette memory handlers */ - -READ32_MEMBER(gal3_state::paletteram32_r) +template +READ16_MEMBER(gal3_state::video_enable_r) { - offset *= 2; - return (m_generic_paletteram_16[offset]<<16)|m_generic_paletteram_16[offset+1]; + return m_video_enable[Screen]; } -WRITE32_MEMBER(gal3_state::paletteram32_w) +template +WRITE16_MEMBER(gal3_state::video_enable_w) { - uint32_t v; - offset *= 2; - v = (m_generic_paletteram_16[offset]<<16)|m_generic_paletteram_16[offset+1]; - COMBINE_DATA( &v ); - m_generic_paletteram_16[offset+0] = v>>16; - m_generic_paletteram_16[offset+1] = v&0xffff; + COMBINE_DATA(&m_video_enable[Screen]); // 0xff53, instead of 0x40 in namcos21 } -READ32_MEMBER(gal3_state::namcos21_video_enable_r) -{ - return m_namcos21_video_enable<<16; -} - -WRITE32_MEMBER(gal3_state::namcos21_video_enable_w) -{ - uint32_t v; - v = m_namcos21_video_enable<<16; - COMBINE_DATA( &v ); // 0xff53, instead of 0x40 in namcos21 - m_namcos21_video_enable = v>>16; -} - -READ32_MEMBER(gal3_state::rso_r) +READ16_MEMBER(gal3_state::rso_r) { /*store $5555 @$0046, and readback @$0000 read @$0144 and store at A6_21e & A4_5c Check @$009a==1 to start DEMO HACK*/ - offset *= 2; - return (m_rso_shared_ram[offset]<<16)|m_rso_shared_ram[offset+1]; + return m_rso_shared_ram[offset]; } -WRITE32_MEMBER(gal3_state::rso_w) +WRITE16_MEMBER(gal3_state::rso_w) { - uint32_t v; - offset *= 2; - v = (m_rso_shared_ram[offset]<<16)|m_rso_shared_ram[offset+1]; - COMBINE_DATA( &v ); - m_rso_shared_ram[offset+0] = v>>16; - m_rso_shared_ram[offset+1] = v&0xffff; + COMBINE_DATA(&m_rso_shared_ram[offset]); } @@ -371,21 +358,31 @@ void gal3_state::cpu_slv_map(address_map &map) map(0x60010000, 0x60017fff).ram().share("share1"); map(0x80000000, 0x8007ffff).ram(); //512K Local RAM - map(0xf1200000, 0xf120ffff).ram(); //DSP RAM -/// AM_RANGE(0xf1400000, 0xf1400003) AM_WRITE(pointram_control_w) -/// AM_RANGE(0xf1440000, 0xf1440003) AM_READWRITE(pointram_data_r,pointram_data_w) -/// AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (frame buffer?) */ -/// AM_RANGE(0xf1480000, 0xf14807ff) AM_READWRITE(namcos21_depthcue_r,namcos21_depthcue_w) - map(0xf1700000, 0xf170ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)).share("objram"); - map(0xf1720000, 0xf1720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); - map(0xf1740000, 0xf175ffff).rw(FUNC(gal3_state::paletteram32_r), FUNC(gal3_state::paletteram32_w)); - map(0xf1760000, 0xf1760003).rw(FUNC(gal3_state::namcos21_video_enable_r), FUNC(gal3_state::namcos21_video_enable_w)); + // Video chain 1 + map(0xf1200000, 0xf120ffff).rw(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_hack_w)); + map(0xf1400000, 0xf1400003).w(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::pointram_control_w)); + map(0xf1440000, 0xf1440003).rw(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); + map(0xf1440004, 0xf147ffff).nopw(); + map(0xf1480000, 0xf14807ff).rw(m_namcos21_dsp_c67[0], FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); + + map(0xf1700000, 0xf170ffff).rw(m_c355spr[0], FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)).share("objram_1"); + map(0xf1720000, 0xf1720007).rw(m_c355spr[0], FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0xf1740000, 0xf174ffff).rw(m_palette[0], FUNC(palette_device::read16), FUNC(palette_device::write16)).share("palette_1"); + map(0xf1750000, 0xf175ffff).rw(m_palette[0], FUNC(palette_device::read16_ext), FUNC(palette_device::write16_ext)).share("palette_1_ext"); + map(0xf1760000, 0xf1760001).rw(FUNC(gal3_state::video_enable_r<0>), FUNC(gal3_state::video_enable_w<0>)); - map(0xf2200000, 0xf220ffff).ram(); - map(0xf2700000, 0xf270ffff).ram(); //AM_READWRITE16(spriteram_r,spriteram_w,0xffffffff) AM_SHARE("objram") - map(0xf2720000, 0xf2720007).ram(); //AM_READWRITE16(position_r,position_w,0xffffffff) - map(0xf2740000, 0xf275ffff).ram(); //AM_READWRITE(paletteram16_r,paletteram16_w) AM_SHARE("paletteram") - map(0xf2760000, 0xf2760003).ram(); //AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) + // Video chain 2 + map(0xf2200000, 0xf220ffff).rw(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_hack_w)); + map(0xf2400000, 0xf2400003).w(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::pointram_control_w)); + map(0xf2440000, 0xf2440003).rw(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); + map(0xf2440004, 0xf247ffff).nopw(); + map(0xf2480000, 0xf24807ff).rw(m_namcos21_dsp_c67[1], FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); + + map(0xf2700000, 0xf270ffff).rw(m_c355spr[1], FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)).share("objram_2"); + map(0xf2720000, 0xf2720007).rw(m_c355spr[1], FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0xf2740000, 0xf274ffff).rw(m_palette[1], FUNC(palette_device::read16), FUNC(palette_device::write16)).share("palette_2"); + map(0xf2750000, 0xf275ffff).rw(m_palette[1], FUNC(palette_device::read16_ext), FUNC(palette_device::write16_ext)).share("palette_2_ext"); + map(0xf2760000, 0xf2760001).rw(FUNC(gal3_state::video_enable_r<1>), FUNC(gal3_state::video_enable_w<1>)); } void gal3_state::rs_cpu_map(address_map &map) @@ -603,10 +600,14 @@ static const gfx_layout tile_layout = 8*64 /* sprite offset */ }; -static GFXDECODE_START( gfx_namcos21 ) +static GFXDECODE_START( gfx_gal3_l ) GFXDECODE_ENTRY( "obj_board1", 0x000000, tile_layout, 0x000, 0x20 ) GFXDECODE_END +static GFXDECODE_START( gfx_gal3_r ) + GFXDECODE_ENTRY( "obj_board2", 0x000000, tile_layout, 0x000, 0x20 ) +GFXDECODE_END + MACHINE_CONFIG_START(gal3_state::gal3) MCFG_DEVICE_ADD("maincpu", M68020, 49152000/2) MCFG_DEVICE_PROGRAM_MAP(cpu_mst_map) @@ -636,32 +637,68 @@ MACHINE_CONFIG_START(gal3_state::gal3) NVRAM(config, "nvmem", nvram_device::DEFAULT_ALL_0); + // video chain 1 + MCFG_SCREEN_ADD("lscreen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(64*8, 64*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 512-1, 0*8, 512-1) - MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_gal3) + MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_left) + MCFG_SCREEN_PALETTE("palette_1") + + MCFG_DEVICE_ADD("gfxdecode_1", GFXDECODE, "palette_1", gfx_gal3_l) + MCFG_PALETTE_ADD("palette_1", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_MEMBITS(16) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCO_C355SPR(config, m_c355spr[0], 0); + m_c355spr[0]->set_palette_tag("palette_1"); + m_c355spr[0]->set_gfxdecode_tag("gfxdecode_1"); + m_c355spr[0]->set_is_namcofl(false); + m_c355spr[0]->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr[0]->set_palxor(0xf); // reverse mapping + m_c355spr[0]->set_gfxregion(0); + + NAMCOS21_3D(config, m_namcos21_3d[0], 0); + m_namcos21_3d[0]->set_zz_shift_mult(11, 0x200); + m_namcos21_3d[0]->set_depth_reverse(false); + m_namcos21_3d[0]->set_framebuffer_size(496,480); + + NAMCOS21_DSP_C67(config, m_namcos21_dsp_c67[0], 0); + m_namcos21_dsp_c67[0]->set_renderer_tag("namcos21_3d_1"); + + // video chain 2 MCFG_SCREEN_ADD("rscreen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(64*8, 64*8) MCFG_SCREEN_VISIBLE_AREA(0*8, 512-1, 0*8, 512-1) - MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_gal3) + MCFG_SCREEN_UPDATE_DRIVER(gal3_state, screen_update_right) + MCFG_SCREEN_PALETTE("palette_2") - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) - MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) + MCFG_DEVICE_ADD("gfxdecode_2", GFXDECODE, "palette_2", gfx_gal3_r) + MCFG_PALETTE_ADD("palette_2", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_MEMBITS(16) + MCFG_PALETTE_FORMAT(XBRG) - NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); - m_c355spr->set_gfxdecode_tag("gfxdecode"); - m_c355spr->set_is_namcofl(false); - m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); - m_c355spr->set_palxor(0xf); // reverse mapping - m_c355spr->set_gfxregion(0); + NAMCO_C355SPR(config, m_c355spr[1], 0); + m_c355spr[1]->set_palette_tag("palette_2"); + m_c355spr[1]->set_gfxdecode_tag("gfxdecode_2"); + m_c355spr[1]->set_is_namcofl(false); + m_c355spr[1]->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr[1]->set_palxor(0xf); // reverse mapping + m_c355spr[1]->set_gfxregion(0); + + NAMCOS21_3D(config, m_namcos21_3d[1], 0); + m_namcos21_3d[1]->set_zz_shift_mult(11, 0x200); + m_namcos21_3d[1]->set_depth_reverse(false); + m_namcos21_3d[1]->set_framebuffer_size(496,480); + + NAMCOS21_DSP_C67(config, m_namcos21_dsp_c67[1], 0); + m_namcos21_dsp_c67[1]->set_renderer_tag("namcos21_3d_2"); - MCFG_VIDEO_START_OVERRIDE(gal3_state,gal3) SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -816,17 +853,15 @@ ROM_START( gal3 ) ROM_LOAD32_BYTE( "glc-slv-prg3.18b", 0x00000, 0x20000, CRC(deae86d2) SHA1(1898955423b8da585b6319406566aad02db20d64) ) /********* DSP board x2 *********/ - ROM_REGION32_BE( 0x400000, "dsp_board1", ROMREGION_ERASE ) /* 24bit signed point data */ + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67_1:point24", ROMREGION_ERASE ) /* 24bit signed point data */ ROM_LOAD32_BYTE( "glc1-dsp-ptoh.2f", 0x000001, 0x80000, CRC(b4213c83) SHA1(9d036b73149656fdc13eed38946a70f532bff3f1) ) /* most significant */ ROM_LOAD32_BYTE( "glc1-dsp-ptou.2k", 0x000002, 0x80000, CRC(14877cef) SHA1(5ebdccd6db837ceb9473bd219eb211431944cbf0) ) ROM_LOAD32_BYTE( "glc1-dsp-ptol.2n", 0x000003, 0x80000, CRC(b318534a) SHA1(6fcf2ead6dd0d5a6f22438520588ba4e33ca39a8) ) /* least significant */ - /* and 5x C67 (TMS320C25) */ - ROM_REGION32_BE( 0x400000, "dsp_board2", ROMREGION_ERASE ) /* 24bit signed point data */ + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67_2:point24", ROMREGION_ERASE ) /* 24bit signed point data */ ROM_LOAD32_BYTE( "glc1-dsp-ptoh.2f", 0x000001, 0x80000, CRC(b4213c83) SHA1(9d036b73149656fdc13eed38946a70f532bff3f1) ) /* most significant */ ROM_LOAD32_BYTE( "glc1-dsp-ptou.2k", 0x000002, 0x80000, CRC(14877cef) SHA1(5ebdccd6db837ceb9473bd219eb211431944cbf0) ) ROM_LOAD32_BYTE( "glc1-dsp-ptol.2n", 0x000003, 0x80000, CRC(b318534a) SHA1(6fcf2ead6dd0d5a6f22438520588ba4e33ca39a8) ) /* least significant */ - /* and 5x C67 (TMS320C25) */ /********* OBJ board x2 *********/ ROM_REGION( 0x200000, "obj_board1", 0 ) diff --git a/src/mame/drivers/namcos21.cpp b/src/mame/drivers/namcos21.cpp index 88610cbc8dd..a32a7ef7ab0 100644 --- a/src/mame/drivers/namcos21.cpp +++ b/src/mame/drivers/namcos21.cpp @@ -1,42 +1,21 @@ // license:BSD-3-Clause // copyright-holders:Phil Stroffolino /** -2008/06/11, by Naibo(translated to English by Mameplus team): -Driver's Eyes works, - -the communication work between CPU and 3D DSP should be limited to the master M68000, - if the address mapping is done in the shared memory, master CPU would be disturbed by the slave one. - - -DIP Switches - DIP3 ON for Screen on the left - DIP4 ON for Screen on the right - should not toggle on both - - -The left, center and right screens have separate programs and boards, each would work independently. - About projection angles of left and right screen, the angle is correct on "DRIVER'S EYES" title screen, however in the tracks of demo mode it doesn't seem correct. - - -On demo screen, should fog effects be turned off? - - -The game also features a pretty nice 2D sprite layer, which still doesn't show up yet. - it is known that the CPU does constantly feed the 2D video memory some meaningful and logical data. - Namco System 21 -Winning Run - polygon glitches/flicker - posirq effects for bitmap layer not working + | Winning Run(1)|Driver's Eyes(2) | Cyber Sled, Star Blade etc.(3) +--------------------------+---------------+-----------------+-------------------------- +GPU+bitmap layer | yes | no | no +Namco System NB1 Sprites | no | yes | yes +Number of DSPs | 1x TMS320C25 | 1x TMS320C25 | 1x Master C67 (TMS320C25) + | | | 4x Slave C67 -Driver's Eyes - not yet working +(1) namcos21.cpp (this driver) +(2) namcos21_de.cpp +(3) namcos21_c67.cpp - Questions? pstroffo@yahoo.com (Phil Stroffolino) +Galaxian 3 (gal3.cpp) uses the same DSP PCB as Cyber Sled, Star Blade etc. (2x, 1 for each screen) - There are at least four hardware variations, all of which are based on Namco System2: - - | Winning Run | Driver's Eyes | Starblade | Cyber Sled ---------------------------+-------------+---------------+-----------+------------ -GPU+bitmap layer | yes | no | no | no -Namco System NB1 Sprites | no | yes | yes | yes -Number of DSPs | 1 | 1 | 5 | 1x Ma, 4x Sl The main 68k CPUs populate a chunk of shared RAM with an display list describing a scene to be rendered. The main CPUs also specify attributes for a master camera which provides additional global transformations. @@ -53,12 +32,16 @@ Each quad has a reference color (shared across vertices), and for each vertex th The z-code scalar accounts for depth bias. A zbuffer is used while rendering quads, and depth cueing is used to shade pixels according to their depth. ---------------------------------------------------------------------------- +------------------- -STATUS: - Solvaou: - Air Combat: - no polys - why? + + +Winning Run + polygon glitches/flicker + posirq effects for bitmap layer not working + + + NOTES: Winning Run Winning Run 91 @@ -66,235 +49,6 @@ STATUS: - some minor polygon glitches - posirq handling broken - Driver's Eyes - Left and Right screen - -TODO: (*) Extract DSP BIOS - -TODO: namcoic.c: in StarBlade, the sprite list is stored at a different location during startup tests. - What register controls this? - -TODO: Map lamps/vibration outputs as used by StarBlade (and possibly other titles). - These likely involve the MCU. - ---------------------------------------------------------------------------- - -DSP RAM is shared with the 68000 CPUs and master DSP. -The memory map below reflects DSP RAM as seen by the 68000 CPUs. - - 0x200000: ROM: - 0x200010: RAM: - 0x200020: PTR: - 0x200024: - 0x200028: - 0x200030: SMU: // "NO RESPONS" (DSP) - 0x200040: IDC: // "NO RESPONS" (DSP) - 0x200050: CPU: BOOTING..COMPLETE - 0x200060: DSP: - 0x200070: CRC: OK from cpu - 0x200080: CRC: from dsp - 0x200090: ID: - 0x2000a0: B-M: - 0x2000b0: P-M: - 0x2000c0: S-M: - 0x200100 status: 2=upload needed, 4=error (abort) - 0x200102 status - 0x200104 0x0002 - 0x200106 addr written by main cpu - 0x20010a point rom checksum (starblade expects 0xed53) - 0x20010c point rom checksum (starblade expects 0xd5df) - 0x20010e 1 : upload-code-to-dsp request trigger - 0x200110 status - 0x200112 status - 0x200114 master dsp code size - 0x200116 slave dsp code size - 0x200120 upload source1 addr hi - 0x200122 upload source1 addr lo - 0x200124 upload source2 addr hi - 0x200126 upload source2 addr lo - 0x200200 enable - 0x200202 status - 0x200206 work page select - 0x200208 0xa2c2 (air combat) - 0x208000..0x2080ff camera attributes for page#0 - 0x208200..0x208fff 3d object attribute display list for page#0 - 0x20c000..0x20c0ff camera attributes for page#1 - 0x20c200..0x20cfff 3d object attribute display list for page#1 - - Starblade Cybersled AirCombat22 Solvalou -[400]:= 00 0000 00 0000 00 0000 00 0000 -[402]:= 00 0011 00 0011 00 0011 00 0011 -[404]:= 00 0000 00 0000 00 0000 00 0000 -[406]:= 00 0000 00 0000 00 0000 00 0000 -[408]:= 10 1002 10 1000 10 1000 10 1000 -[40a]:= 02 0000 00 0000 00 0000 00 ffff -[40c]:= 00 1040 00 023a 00 1000 ff ffff -[40e]:= 00 0000 00 0000 00 0000 ff ffff -[410]:= 10 1034 02 0258 10 1000 ff ffff -[412]:= 40 0000 3a 0000 00 0000 ff ffff -[414]:= 00 1030 00 027a 00 1000 ff ffff -[416]:= 00 0000 00 0000 00 0000 ff ffff -[418]:= 10 1030 02 02a2 10 1000 ff ffff -[41a]:= 34 0000 58 0000 00 0000 ff ffff -[41c]:= 00 1030 00 02c2 00 1000 ff ffff -[41e]:= 00 0000 00 0000 00 0000 ff ffff -[420]:= 10 1030 02 02e6 10 1000 ff ffff - ---------------------------------------------------------------------------- - -Thanks to Aaron Giles for originally making sense of the Point ROM data. - -Point data in ROMS (signed 24 bit words) encodes the 3d primitives. - -The first part of the Point ROMs is an address table. - -Given an object index, this table provides an address into the second part of -the ROM. - -The second part of the ROM is a series of display lists. -This is a sequence of pointers to actual polygon data. There may be -more than one, and the list is terminated by $ffffff. - -The remainder of the ROM is a series of polygon data. The first word of each -entry is the length of the entry (in words, not counting the length word). - -The rest of the data in each entry is organized as follows: - -length (1 word) -quad index (1 word) - this increments with each entry -vertex count (1 word) - the number of vertices encoded -unknown value (1 word) - almost always 0; depth bias -vertex list (n x 3 words) -quad count (1 word) - the number of quads to draw -quad primitives (n x 5 words) - color code and four vertex indices - ------------------------------------------------------------------------ -Board 1 : DSP Board - 1st PCB. (Uppermost) -DSP Type 1 : 1 x Master TMS320C25 (C67) 4 x Slave TMS320C25 (C67) each connected to a Namco Custom chip 342 -DSP Type 2 : 5 x TMS320C20 (Starblade) (verify this information) -OSC: 40.000MHz -RAM: HM62832 x 2, M5M5189 x 4, ISSI IS61C68 x 16 -ROMS: TMS27C040 -Custom Chips: -4 x Namco Custom 327 (24 pin NDIP), each one located next to a chip 67. -4 x Namco Custom chip 342 (160 pin PQFP), there are 3 leds (red/green/yellow) connected to each 342 chip. (12 leds total) -2 x Namco Custom 197 (28 pin NDIP) -Namco Custom chip 317 IDC (180 pin PQFP) -Namco Custom chip 195 (160 pin PQFP) ------------------------------------------------------------------------ -Board 2 : Unknown Board - 2nd PCB (no roms) -OSC: 20.000MHz -RAM: HM62256 x 10, 84256 x 4, CY7C128 x 5, M5M5178 x 4 -OTHER Chips: -MB8422-90LP -L7A0565 316 (111) x 1 (100 PIN PQFP) -150 (64 PIN PQFP) -167 (128 PIN PQFP) -L7A0564 x 2 (100 PIN PQFP) -157 x 16 (24 PIN NDIP) ------------------------------------------------------------------------ -Board 3 : CPU Board - 3rd PCB (looks very similar to Namco System 2 CPU PCB) -CPU: MC68000P12 x 2 @ 12 MHz (16-bit) -Sound CPU: MC68B09EP (3 MHz) -Sound Chips: C140 24-channel PCM (Sound Effects), YM2151 (Music), YM3012 (?) -XTAL: 3.579545 MHz -OSC: 49.152 MHz -RAM: MB8464 x 2, MCM2018 x 2, HM65256 x 4, HM62256 x 2 - -Other Chips: -Sharp PC900 - Opto-isolator -Sharp PC910 - Opto-isolator -HN58C65P (EEPROM) -MB3771 -MB87077-SK x 2 (24 pin NDIP, located in sound section) -LB1760 (16 pin DIP, located next to SYS87B-2B) -CY7C132 (48 PIN DIP) - -Namco Custom: -148 x 2 (64 pin PQFP) -C68 (64 pin PQFP) -139 (64 pin PQFP) -137 (28 pin NDIP) -149 (28 pin NDIP, near C68) ------------------------------------------------------------------------ -Board 4 : 4th PCB (bottom-most) -OSC: 38.76922 MHz -There is a 6 wire plug joining this PCB with the CPU PCB. It appears to be video cable (RGB, Sync etc..) -Jumpers: -JP7 INTERLACE = SHORTED (Other setting is NON-INTERLACE) -JP8 68000 = SHORTED (Other setting is 68020) -Namco Custom Chips: -C355 (160 pin PQFP) -187 (120 pin PQFP) -138 (64 pin PQFP) -165 (28 pin NDIP) ------------------------------------------------------------------------ - -There is a newer 2 board stack known as the SYSTEM21B which combines -the functions of 2 boards into a single board twice the size. - ------------------------------------------------------------------------ - -------------------- -Air Combat by NAMCO -------------------- -malcor - - -Location Device File ID Checksum -------------------------------------------------- -CPU68 1J 27C4001 MPR-L.AC1 9859 [ main program ] [ rev AC1 ] -CPU68 3J 27C4001 MPR-U.AC1 97F1 [ main program ] [ rev AC1 ] -CPU68 1J 27C4001 MPR-L.AC2 C778 [ main program ] [ rev AC2 ] -CPU68 3J 27C4001 MPR-U.AC2 6DD9 [ main program ] [ rev AC2 ] -CPU68 1C MB834000 EDATA1-L.AC1 7F77 [ data ] -CPU68 3C MB834000 EDATA1-U.AC1 FA2F [ data ] -CPU68 3A MB834000 EDATA-U.AC1 20F2 [ data ] -CPU68 1A MB834000 EDATA-L.AC1 9E8A [ data ] -CPU68 8J 27C010 SND0.AC1 71A8 [ sound prog ] -CPU68 12B MB834000 VOI0.AC1 08CF [ voice 0 ] -CPU68 12C MB834000 VOI1.AC1 925D [ voice 1 ] -CPU68 12D MB834000 VOI2.AC1 C498 [ voice 2 ] -CPU68 12E MB834000 VOI3.AC1 DE9F [ voice 3 ] -CPU68 4C 27C010 SPR-L.AC1 473B [ slave prog L ] [ rev AC1 ] -CPU68 6C 27C010 SPR-U.AC1 CA33 [ slave prog U ] [ rev AC1 ] -CPU68 4C 27C010 SPR-L.AC2 08CE [ slave prog L ] [ rev AC2 ] -CPU68 6C 27C010 SPR-U.AC2 A3F1 [ slave prog U ] [ rev AC2 ] -OBJ(B) 5S HN62344 OBJ0.AC1 CB72 [ object data ] -OBJ(B) 5X HN62344 OBJ1.AC1 85E2 [ object data ] -OBJ(B) 3S HN62344 OBJ2.AC1 89DC [ object data ] -OBJ(B) 3X HN62344 OBJ3.AC1 58FF [ object data ] -OBJ(B) 4S HN62344 OBJ4.AC1 46D6 [ object data ] -OBJ(B) 4X HN62344 OBJ5.AC1 7B91 [ object data ] -OBJ(B) 2S HN62344 OBJ6.AC1 5736 [ object data ] -OBJ(B) 2X HN62344 OBJ7.AC1 6D45 [ object data ] -OBJ(B) 17N PLHS18P8 3P0BJ3 4342 -OBJ(B) 17N PLHS18P8 3POBJ4 1143 -DSP 2N HN62344 AC1-POIL.L 8AAF [ DSP data ] -DSP 2K HN62344 AC1-POIL.L CF90 [ DSP data ] -DSP 2E HN62344 AC1-POIH 4D02 [ DSP data ] -DSP 17D GAL16V8A 3PDSP5 6C00 - -NOTE: CPU68 - CPU board 2252961002 (2252971002) - OBJ(B) - Object board 8623961803 (8623963803) - DSP - DSP board 8623961703 (8623963703) - PGN(C) - PGN board 2252961300 (8623963600) - - Namco System 21 Hardware - - ROMs that have the same locations are different revisions - of the same ROMs (AC1 or AC2). - -Jumper settings: - -Location Position set alt. setting ----------------------------------------- - -CPU68 PCB: - - JP2 /D-ST /VBL - JP3 - ***************************** Winning Run / Winning Run Suzuka GP/ Winning Run 91 @@ -516,33 +270,226 @@ Filter Board |-------CONN------| **************************** - + */ -#include "emu.h" -#include "includes/namcos21.h" +#include "emu.h" +#include "screen.h" +#include "emupal.h" +#include "speaker.h" #include "cpu/m68000/m68000.h" #include "cpu/m6805/m6805.h" #include "cpu/m6809/m6809.h" #include "cpu/tms32025/tms32025.h" -#include "sound/ym2151.h" +#include "machine/timer.h" #include "machine/nvram.h" -#include "speaker.h" +#include "machine/namco65.h" +#include "machine/namcos21_dsp.h" +#include "machine/namco_c139.h" +#include "machine/namco_c148.h" +#include "video/namcos21_3d.h" +#include "sound/c140.h" +#include "sound/ym2151.h" -#define PTRAM_SIZE 0x20000 // TODO: basic parameters to get 60.606060 Hz, x2 is for interlace #define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \ MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480) #define ENABLE_LOGGING 0 +#define NAMCOS21_NUM_COLORS 0x8000 -int32_t namcos21_state::read_pointrom_data(unsigned offset) +class namcos21_state : public driver_device { - return m_ptrom24[offset]; +public: + namcos21_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_slave(*this, "slave"), + m_c65(*this, "c65mcu"), + m_sci(*this, "sci"), + m_master_intc(*this, "master_intc"), + m_slave_intc(*this, "slave_intc"), + m_c140(*this, "c140"), + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_audiobank(*this, "audiobank"), + m_mpDualPortRAM(*this,"mpdualportram"), + m_gpu_intc(*this, "gpu_intc"), + m_namcos21_3d(*this, "namcos21_3d"), + m_namcos21_dsp(*this, "namcos21dsp") + { } + + void configure_c148_standard(machine_config &config); + void winrun(machine_config &config); + + void init_winrun(); + +private: + required_device m_maincpu; + required_device m_audiocpu; + required_device m_slave; + required_device m_c65; + required_device m_sci; + required_device m_master_intc; + required_device m_slave_intc; + required_device m_c140; + required_device m_palette; + required_device m_screen; + required_memory_bank m_audiobank; + required_shared_ptr m_mpDualPortRAM; + required_device m_gpu_intc; + required_device m_namcos21_3d; + required_device m_namcos21_dsp; + + std::unique_ptr m_gpu_videoram; + std::unique_ptr m_gpu_maskram; + + uint16_t m_video_enable; + + uint16_t m_winrun_color; + uint16_t m_winrun_gpu_register[0x10/2]; + DECLARE_READ16_MEMBER(namcos21_video_enable_r); + DECLARE_WRITE16_MEMBER(namcos21_video_enable_w); + + DECLARE_READ16_MEMBER(namcos2_68k_dualportram_word_r); + DECLARE_WRITE16_MEMBER(namcos2_68k_dualportram_word_w); + DECLARE_READ8_MEMBER(namcos2_dualportram_byte_r); + DECLARE_WRITE8_MEMBER(namcos2_dualportram_byte_w); + + DECLARE_READ16_MEMBER(winrun_gpu_color_r); + DECLARE_WRITE16_MEMBER(winrun_gpu_color_w); + DECLARE_READ16_MEMBER(winrun_gpu_register_r); + DECLARE_WRITE16_MEMBER(winrun_gpu_register_w); + DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w); + DECLARE_READ16_MEMBER(winrun_gpu_videoram_r); + + DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w ); + DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r ); + + DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w ); + + DECLARE_WRITE8_MEMBER(sound_reset_w); + DECLARE_WRITE8_MEMBER(system_reset_w); + void reset_all_subcpus(int state); + + std::unique_ptr m_eeprom; + + TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); + + DECLARE_MACHINE_START(namcos21); + DECLARE_MACHINE_RESET(namcos21); + + uint32_t screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect); + + void configure_c65_namcos21(machine_config &config); + void configure_c68_namcos21(machine_config &config); + + void winrun_master_map(address_map &map); + void winrun_slave_map(address_map &map); + void winrun_gpu_map(address_map &map); + + void sound_map(address_map &map); +}; + +READ16_MEMBER(namcos21_state::winrun_gpu_color_r) +{ + return m_winrun_color; } +WRITE16_MEMBER(namcos21_state::winrun_gpu_color_w) +{ + COMBINE_DATA( &m_winrun_color ); +} + +READ16_MEMBER(namcos21_state::winrun_gpu_register_r) +{ + return m_winrun_gpu_register[offset]; +} + +WRITE16_MEMBER(namcos21_state::winrun_gpu_register_w) +{ + COMBINE_DATA( &m_winrun_gpu_register[offset] ); + m_screen->update_partial(m_screen->vpos()); +} + +WRITE16_MEMBER(namcos21_state::winrun_gpu_videoram_w) +{ + int color = data>>8; + int mask = data&0xff; + int i; + for( i=0; i<8; i++ ) + { + if( mask&(0x01<vpos(),m_gpu_intc->get_posirq_line(),m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); + + int yscroll = -cliprect.top()+(int16_t)m_winrun_gpu_register[0x2/2]; + int xscroll = 0;//m_winrun_gpu_register[0xc/2] >> 7; + int base = 0x1000+0x100*(m_winrun_color&0xf); + int sx,sy; + for( sy=cliprect.top(); sy<=cliprect.bottom(); sy++ ) + { + const uint8_t *pSource = &videoram[((yscroll+sy)&0x3ff)*0x200]; + uint16_t *pDest = &bitmap.pix16(sy); + for( sx=cliprect.left(); sx<=cliprect.right(); sx++ ) + { + int pen = pSource[(sx+xscroll) & 0x1ff]; + switch( pen ) + { + case 0xff: + break; + // TODO: additive blending? winrun car select uses register [0xc] for a xscroll value + case 0x00: + pDest[sx] = (pDest[sx]&0x1fff)+0x4000; + break; + case 0x01: + pDest[sx] = (pDest[sx]&0x1fff)+0x6000; + break; + default: + pDest[sx] = base|pen; + break; + } + } + } +} + + +uint32_t namcos21_state::screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + bitmap.fill(0xff, cliprect ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); + winrun_bitmap_draw(bitmap,cliprect); + + //popmessage("%04x %04x %04x|%04x %04x",m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); + + return 0; +} + + + READ16_MEMBER(namcos21_state::namcos21_video_enable_r) { return m_video_enable; @@ -557,657 +504,7 @@ WRITE16_MEMBER(namcos21_state::namcos21_video_enable_w) } } - /***********************************************************/ -WRITE16_MEMBER(namcos21_state::dspcuskey_w) -{ /* TODO: proper cuskey emulation */ -} - -READ16_MEMBER(namcos21_state::dspcuskey_r) -{ - uint16_t result = 0; - if( m_gametype == NAMCOS21_SOLVALOU ) - { - switch( m_dspmaster->pc() ) - { - case 0x805e: result = 0x0000; break; - case 0x805f: result = 0xfeba; break; - case 0x8067: result = 0xffff; break; - case 0x806e: result = 0x0145; break; - default: - logerror( "unk cuskey_r; pc=0x%x\n", m_dspmaster->pc() ); - break; - } - } - else if( m_gametype == NAMCOS21_CYBERSLED ) - { - switch( m_dspmaster->pc() ) - { - case 0x8061: result = 0xfe95; break; - case 0x8069: result = 0xffff; break; - case 0x8070: result = 0x016A; break; - default: - break; - } - } - else if( m_gametype == NAMCOS21_AIRCOMBAT ) - { - switch( m_dspmaster->pc() ) - { - case 0x8062: result = 0xfeb9; break; - case 0x806a: result = 0xffff; break; - case 0x8071: result = 0x0146; break; - default: - break; - } - } - return result; -} - -void namcos21_state::transmit_word_to_slave(uint16_t data) -{ - unsigned offs = m_mpDspState->slaveInputStart+m_mpDspState->slaveBytesAvailable++; - m_mpDspState->slaveInputBuffer[offs%DSP_BUF_MAX] = data; - if (ENABLE_LOGGING) logerror( "+%04x(#%04x)\n", data, m_mpDspState->slaveBytesAvailable ); - m_mpDspState->slaveActive = 1; - if( m_mpDspState->slaveBytesAvailable >= DSP_BUF_MAX ) - { - fatalerror( "IDC overflow\n" ); - } -} - -void namcos21_state::transfer_dsp_data() -{ - uint16_t addr = m_mpDspState->masterSourceAddr; - int mode = addr&0x8000; - addr&=0x7fff; - if( addr ) - { - for(;;) - { - int i; - uint16_t old = addr; - uint16_t code = m_dspram16[addr++]; - if( code == 0xffff ) - { - if( mode ) - { - addr = m_dspram16[addr]; - m_mpDspState->masterSourceAddr = addr; - if (ENABLE_LOGGING) logerror( "LOOP:0x%04x\n", addr ); - addr&=0x7fff; - if( old==addr ) - { - return; - } - } - else - { - m_mpDspState->masterSourceAddr = 0; - return; - } - } - else if( mode==0 ) - { /* direct data transfer */ - if (ENABLE_LOGGING) logerror( "DATA TFR(0x%x)\n", code ); - transmit_word_to_slave(code); - for( i=0; i2 ) - { - transmit_word_to_slave(0); /* pad1 */ - transmit_word_to_slave(len+1); - for( i=0; i(); - - /* patch dsp watchdog */ - switch (state->m_gametype) - { - case namcos21_state::NAMCOS21_AIRCOMBAT: - state->m_master_dsp_code[0x008e] = 0x808f; - break; - case namcos21_state::NAMCOS21_SOLVALOU: - state->m_master_dsp_code[0x008b] = 0x808c; - break; - default: - break; - } - if (internal) - { - if (state->m_mbNeedsKickstart == 0) return; - state->m_mbNeedsKickstart--; - if (state->m_mbNeedsKickstart) return; - } - - state->clear_poly_framebuffer(); - state->m_mpDspState->masterSourceAddr = 0; - state->m_mpDspState->slaveOutputSize = 0; - state->m_mpDspState->masterFinished = 0; - state->m_mpDspState->slaveActive = 0; - state->m_dspmaster->set_input_line(0, HOLD_LINE); - state->m_dspslave->pulse_input_line(INPUT_LINE_RESET, attotime::zero); -} - -uint16_t namcos21_state::read_word_from_slave_input() -{ - uint16_t data = 0; - if( m_mpDspState->slaveBytesAvailable>0 ) - { - data = m_mpDspState->slaveInputBuffer[m_mpDspState->slaveInputStart++]; - m_mpDspState->slaveInputStart %= DSP_BUF_MAX; - m_mpDspState->slaveBytesAvailable--; - if( m_mpDspState->slaveBytesAdvertised>0 ) - { - m_mpDspState->slaveBytesAdvertised--; - } - if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", machine().describe_context(), data, m_mpDspState->slaveBytesAvailable ); - } - return data; -} - -uint16_t namcos21_state::get_input_bytes_advertised_for_slave() -{ - if( m_mpDspState->slaveBytesAdvertised < m_mpDspState->slaveBytesAvailable ) - { - m_mpDspState->slaveBytesAdvertised++; - } - else if( m_mpDspState->slaveActive && m_mpDspState->masterFinished && m_mpDspState->masterSourceAddr ) - { - namcos21_kickstart(machine(), 0); - } - return m_mpDspState->slaveBytesAdvertised; -} - -READ16_MEMBER(namcos21_state::dspram16_r) -{ - return m_dspram16[offset]; -} - -template WRITE16_MEMBER(namcos21_state::dspram16_w) -{ - COMBINE_DATA( &m_dspram16[offset] ); - - if( m_gametype != NAMCOS21_WINRUN91 ) - { - if( m_mpDspState->masterSourceAddr && - offset == 1+(m_mpDspState->masterSourceAddr&0x7fff) ) - { - if (ENABLE_LOGGING) logerror( "IDC-CONTINUE\n" ); - transfer_dsp_data(); - } - else if (m_gametype == NAMCOS21_SOLVALOU && - offset == 0x103 && - maincpu) - { /* hack; synchronization for solvalou */ - m_maincpu->yield(); - } - } -} - -/************************************************************************************/ - -int namcos21_state::init_dsp() -{ - // TODO: what actually tests this? - uint16_t *pMem = (uint16_t *)memregion("dspmaster")->base(); - /** - * DSP BIOS tests "CPU ID" on startup - * "JAPAN (C)1990 NAMCO LTD. by H.F " - */ - memcpy( &pMem[0xbff0], &pMem[0x0008], 0x20 ); - pMem[0x8000] = 0xFF80; - pMem[0x8001] = 0x0000; - - m_mpDspState = make_unique_clear(); - - return 0; -} - -/***********************************************************/ - - - -READ16_MEMBER(namcos21_state::dsp_port0_r) -{ - int32_t data = read_pointrom_data(m_pointrom_idx++); - m_mPointRomMSB = (uint8_t)(data>>16); - m_mbPointRomDataAvailable = 1; - return (uint16_t)data; -} - -WRITE16_MEMBER(namcos21_state::dsp_port0_w) -{ /* unused? */ - if (ENABLE_LOGGING) logerror( "PTRAM_LO(0x%04x)\n", data ); -} - -READ16_MEMBER(namcos21_state::dsp_port1_r) -{ - if( m_mbPointRomDataAvailable ) - { - m_mbPointRomDataAvailable = 0; - return m_mPointRomMSB; - } - return 0x8000; /* IDC ack? */ -} - -WRITE16_MEMBER(namcos21_state::dsp_port1_w) -{ /* unused? */ - if (ENABLE_LOGGING) logerror( "PTRAM_HI(0x%04x)\n", data ); -} - -READ16_MEMBER(namcos21_state::dsp_port2_r) -{ /* IDC TRANSMIT ENABLE? */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_port2_w) -{ - if (ENABLE_LOGGING) logerror( "IDC ADDR INIT(0x%04x)\n", data ); - m_mpDspState->masterSourceAddr = data; - transfer_dsp_data(); -} - -READ16_MEMBER(namcos21_state::dsp_port3_idc_rcv_enable_r) -{ /* IDC RECEIVE ENABLE? */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_port3_w) -{ - m_pointrom_idx<<=16; - m_pointrom_idx|=data; -} - -WRITE16_MEMBER(namcos21_state::dsp_port4_w) -{ /* receives $0B<<4 prior to IDC setup */ -} - -READ16_MEMBER(namcos21_state::dsp_port8_r) -{ /* SMU status */ - return 1; -} - - -WRITE16_MEMBER(namcos21_state::dsp_port8_w) -{ - if (ENABLE_LOGGING) logerror( "port8_w(%d)\n", data ); - if( data ) - { - m_mpDspState->masterFinished = 1; - } - m_irq_enable = data; -} - -READ16_MEMBER(namcos21_state::dsp_port9_r) -{ /* render-device-busy; used for direct-draw */ - return 0; -} - -READ16_MEMBER(namcos21_state::dsp_porta_r) -{ /* config */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_porta_w) -{ - /* boot: 1 */ - /* IRQ0 end: 0 */ - /* INT2 begin: 1 */ - /* direct-draw begin: 0 */ - /* INT1 begin: 1 */ -// if (ENABLE_LOGGING) logerror( "dsp_porta_w(0x%04x)\n", data ); -} - -READ16_MEMBER(namcos21_state::dsp_portb_r) -{ /* config */ - return 1; -} - -WRITE16_MEMBER(namcos21_state::dsp_portb_w) -{ - if( data==0 ) - { /* only 0->1 transition triggers */ - return; - } - if( m_mpDspState->masterDirectDrawSize == 13 ) - { - int i; - int sx[4], sy[4], zcode[4]; - int color = m_mpDspState->masterDirectDrawBuffer[0]; - for( i=0; i<4; i++ ) - { - sx[i] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+1]; - sy[i] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+2]; - zcode[i] = m_mpDspState->masterDirectDrawBuffer[i*3+3]; - } - if( color&0x8000 ) - { - draw_quad(sx, sy, zcode, color); - } - else - { - logerror( "indirection used w/ direct draw?\n" ); - } - } - else if( m_mpDspState->masterDirectDrawSize ) - { - logerror( "unexpected masterDirectDrawSize=%d!\n",m_mpDspState->masterDirectDrawSize ); - } - m_mpDspState->masterDirectDrawSize = 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_portc_w) -{ - if( m_mpDspState->masterDirectDrawSize < DSP_BUF_MAX ) - { - m_mpDspState->masterDirectDrawBuffer[m_mpDspState->masterDirectDrawSize++] = data; - } - else - { - logerror( "portc overflow\n" ); - } -} - -READ16_MEMBER(namcos21_state::dsp_portf_r) -{ /* informs BIOS that this is Master DSP */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::dsp_xf_w) -{ - if (ENABLE_LOGGING) logerror("xf(%d)\n",data); -} - -void namcos21_state::master_dsp_program(address_map &map) -{ - map(0x0000, 0x0fff).rom(); /* BIOS */ - map(0x8000, 0xbfff).ram().share("master_dsp_code"); -} - -void namcos21_state::master_dsp_data(address_map &map) -{ - map(0x2000, 0x200f).rw(FUNC(namcos21_state::dspcuskey_r), FUNC(namcos21_state::dspcuskey_w)); - map(0x8000, 0xffff).rw(FUNC(namcos21_state::dspram16_r), FUNC(namcos21_state::dspram16_w)); /* 0x8000 words */ -} - -void namcos21_state::master_dsp_io(address_map &map) -{ - map(0x00, 0x00).rw(FUNC(namcos21_state::dsp_port0_r), FUNC(namcos21_state::dsp_port0_w)); - map(0x01, 0x01).rw(FUNC(namcos21_state::dsp_port1_r), FUNC(namcos21_state::dsp_port1_w)); - map(0x02, 0x02).rw(FUNC(namcos21_state::dsp_port2_r), FUNC(namcos21_state::dsp_port2_w)); - map(0x03, 0x03).rw(FUNC(namcos21_state::dsp_port3_idc_rcv_enable_r), FUNC(namcos21_state::dsp_port3_w)); - map(0x04, 0x04).w(FUNC(namcos21_state::dsp_port4_w)); - map(0x08, 0x08).rw(FUNC(namcos21_state::dsp_port8_r), FUNC(namcos21_state::dsp_port8_w)); - map(0x09, 0x09).r(FUNC(namcos21_state::dsp_port9_r)); - map(0x0a, 0x0a).rw(FUNC(namcos21_state::dsp_porta_r), FUNC(namcos21_state::dsp_porta_w)); - map(0x0b, 0x0b).rw(FUNC(namcos21_state::dsp_portb_r), FUNC(namcos21_state::dsp_portb_w)); - map(0x0c, 0x0c).w(FUNC(namcos21_state::dsp_portc_w)); - map(0x0f, 0x0f).r(FUNC(namcos21_state::dsp_portf_r)); -} - -/************************************************************************************/ - -void namcos21_state::render_slave_output(uint16_t data) -{ - if( m_mpDspState->slaveOutputSize >= 4096 ) - { - fatalerror( "SLAVE OVERFLOW (0x%x)\n",m_mpDspState->slaveOutputBuffer[0] ); - } - - /* append word to slave output buffer */ - m_mpDspState->slaveOutputBuffer[m_mpDspState->slaveOutputSize++] = data; - - { - uint16_t *pSource = m_mpDspState->slaveOutputBuffer; - uint16_t count = *pSource++; - if( count && m_mpDspState->slaveOutputSize > count ) - { - uint16_t color = *pSource++; - int sx[4], sy[4],zcode[4]; - int j; - if( color&0x8000 ) - { - if( count!=13 ) logerror( "?!direct-draw(%d)\n", count ); - for( j=0; j<4; j++ ) - { - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)pSource[3*j+0]; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)pSource[3*j+1]; - zcode[j] = pSource[3*j+2]; - } - draw_quad(sx, sy, zcode, color&0x7fff); - } - else - { - int quad_idx = color*6; - for(;;) - { - uint8_t code = m_pointram[quad_idx++]; - color = m_pointram[quad_idx++]|(code<<8); - for( j=0; j<4; j++ ) - { - uint8_t vi = m_pointram[quad_idx++]; - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)pSource[vi*3+0]; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)pSource[vi*3+1]; - zcode[j] = pSource[vi*3+2]; - } - draw_quad(sx, sy, zcode, color&0x7fff); - if( code&0x80 ) - { /* end-of-quadlist marker */ - break; - } - } - } - m_mpDspState->slaveOutputSize = 0; - } - else if( count==0 ) - { - fatalerror( "RenderSlaveOutput\n" ); - } - } -} - -READ16_MEMBER(namcos21_state::slave_port0_r) -{ - return read_word_from_slave_input(); -} - -WRITE16_MEMBER(namcos21_state::slave_port0_w) -{ - render_slave_output(data); -} - -READ16_MEMBER(namcos21_state::slave_port2_r) -{ - return get_input_bytes_advertised_for_slave(); -} - -READ16_MEMBER(namcos21_state::slave_port3_r) -{ /* render-device queue size */ - /* up to 0x1fe bytes? - * slave blocks until free &space exists - */ - return 0; -} - -WRITE16_MEMBER(namcos21_state::slave_port3_w) -{ /* 0=busy, 1=ready? */ -} - -WRITE16_MEMBER(namcos21_state::slave_XF_output_w) -{ - if (ENABLE_LOGGING) logerror( "%s :slaveXF(%d)\n", machine().describe_context(), data ); -} - -READ16_MEMBER(namcos21_state::slave_portf_r) -{ /* informs BIOS that this is Slave DSP */ - return 1; -} - -void namcos21_state::slave_dsp_program(address_map &map) -{ - map(0x0000, 0x0fff).rom(); /* BIOS */ - map(0x8000, 0x8fff).ram(); -} - -void namcos21_state::slave_dsp_data(address_map &map) -{ - /* no external data memory */ -} - -void namcos21_state::slave_dsp_io(address_map &map) -{ - map(0x00, 0x00).rw(FUNC(namcos21_state::slave_port0_r), FUNC(namcos21_state::slave_port0_w)); - map(0x02, 0x02).r(FUNC(namcos21_state::slave_port2_r)); - map(0x03, 0x03).rw(FUNC(namcos21_state::slave_port3_r), FUNC(namcos21_state::slave_port3_w)); - map(0x0f, 0x0f).r(FUNC(namcos21_state::slave_portf_r)); -} - -/************************************************************************************/ - -/** - * 801f->800f : prepare for master access to point ram - * 801f : done - * - * #bits data line - * 8 1a0 4 - * 7 0f8 4 - * 7 0ff 4 - * 1 001 4 - * 7 00a 2 - * a 0fe 8 - * - * line #bits data - * 0003 000A 000004FE - * 0001 0007 0000000A - * 0002 001A 03FFF1A0 - */ -WRITE16_MEMBER(namcos21_state::pointram_control_w) -{ -// uint16_t prev = m_pointram_control; - COMBINE_DATA( &m_pointram_control ); - - /* m_pointram_control&0x20 : bank for depthcue data */ -#if 0 - logerror( "%s dsp_control_w:[%x]:=%04x ", - machine().describe_context(), - offset, - m_pointram_control ); - - uint16_t delta = (prev^m_pointram_control)&m_pointram_control; - if( delta&0x10 ) - { - logerror( " [reset]" ); - } - if( delta&2 ) - { - logerror( " send(A)%x", m_pointram_control&1 ); - } - if( delta&4 ) - { - logerror( " send(B)%x", m_pointram_control&1 ); - } - if( delta&8 ) - { - logerror( " send(C)%x", m_pointram_control&1 ); - } - logerror( "\n" ); -#endif - m_pointram_idx = 0; /* HACK */ -} - -READ16_MEMBER(namcos21_state::pointram_data_r) -{ - return m_pointram[m_pointram_idx]; -} - -WRITE16_MEMBER(namcos21_state::pointram_data_w) -{ - if( ACCESSING_BITS_0_7 ) - { -// if( (m_pointram_idx%6)==0 ) logerror("\n" ); -// logerror( " %02x", data ); - m_pointram[m_pointram_idx++] = data; - m_pointram_idx &= (PTRAM_SIZE-1); - } -} - - -READ16_MEMBER(namcos21_state::namcos21_depthcue_r) -{ - int bank = (m_pointram_control&0x20)?1:0; - return m_depthcue[bank][offset]; -} -WRITE16_MEMBER(namcos21_state::namcos21_depthcue_w) -{ - if( ACCESSING_BITS_0_7 ) - { - int bank = (m_pointram_control&0x20)?1:0; - m_depthcue[bank][offset] = data; -// if( (offset&0xf)==0 ) logerror( "\n depthcue: " ); -// logerror( " %02x", data ); - } -} /* dual port ram memory handlers */ @@ -1236,258 +533,22 @@ WRITE8_MEMBER(namcos21_state::namcos2_dualportram_byte_w) /******************************************************************************/ -/*************************************************************/ -/* MASTER 68000 CPU Memory declarations */ -/*************************************************************/ - -void namcos21_state::common_map(address_map &map) -{ - map(0x280000, 0x280001).nopw(); /* written once on startup */ - map(0x400000, 0x400001).w(FUNC(namcos21_state::pointram_control_w)); - map(0x440000, 0x440001).rw(FUNC(namcos21_state::pointram_data_r), FUNC(namcos21_state::pointram_data_w)); - map(0x440002, 0x47ffff).nopw(); /* (?) Air Combat */ - map(0x480000, 0x4807ff).rw(FUNC(namcos21_state::namcos21_depthcue_r), FUNC(namcos21_state::namcos21_depthcue_w)); /* Air Combat */ - map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); - map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); - map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); - map(0x760000, 0x760001).rw(FUNC(namcos21_state::namcos21_video_enable_r), FUNC(namcos21_state::namcos21_video_enable_w)); - map(0x800000, 0x8fffff).rom().region("data", 0); - map(0x900000, 0x90ffff).ram().share("sharedram"); - map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_state::namcos2_68k_dualportram_word_w)); - map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); - map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); - map(0xc00000, 0xcfffff).rom().mirror(0x100000).region("edata", 0); -} - -void namcos21_state::master_map(address_map &map) -{ - common_map(map); - map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ - map(0x180000, 0x183fff).rw(FUNC(namcos21_state::namcos2_68k_eeprom_r), FUNC(namcos21_state::namcos2_68k_eeprom_w)).umask16(0x00ff); - map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); - map(0x200000, 0x20ffff).rw(FUNC(namcos21_state::dspram16_r), FUNC(namcos21_state::dspram16_w)).share("dspram16"); -} - -void namcos21_state::slave_map(address_map &map) -{ - common_map(map); - map(0x000000, 0x07ffff).rom(); - map(0x100000, 0x13ffff).ram(); /* private work RAM */ - map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); - map(0x200000, 0x20ffff).rw(FUNC(namcos21_state::dspram16_r), FUNC(namcos21_state::dspram16_w)).share("dspram16"); -} - - -/************************************************************* - * Winning Run is prototype "System21" hardware. - *************************************************************/ -READ16_MEMBER(namcos21_state::winrun_dspcomram_r) -{ - int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - return mem[offset]; -} -WRITE16_MEMBER(namcos21_state::winrun_dspcomram_w) -{ - int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - COMBINE_DATA( &mem[offset] ); -} - -READ16_MEMBER(namcos21_state::winrun_cuskey_r) -{ - int pc = m_dsp->pc(); - switch( pc ) - { - case 0x0064: /* winrun91 */ - return 0xFEBB; - case 0x006c: /* winrun91 */ - return 0xFFFF; - case 0x0073: /* winrun91 */ - return 0x0144; - - case 0x0075: /* winrun */ - return 0x24; - - default: - break; - } - return 0; -} - -WRITE16_MEMBER(namcos21_state::winrun_cuskey_w) -{ -} - -void namcos21_state::winrun_flush_poly() -{ - if( m_winrun_poly_index>0 ) - { - const uint16_t *pSource = m_winrun_poly_buf; - uint16_t color; - int sx[4], sy[4], zcode[4]; - int j; - color = *pSource++; - if( color&0x8000 ) - { /* direct-draw */ - for( j=0; j<4; j++ ) - { - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)*pSource++; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)*pSource++; - zcode[j] = *pSource++; - } - draw_quad(sx, sy, zcode, color&0x7fff); - } - else - { - int quad_idx = color*6; - for(;;) - { - uint8_t code = m_pointram[quad_idx++]; - color = m_pointram[quad_idx++]; - for( j=0; j<4; j++ ) - { - uint8_t vi = m_pointram[quad_idx++]; - sx[j] = NAMCOS21_POLY_FRAME_WIDTH/2 + (int16_t)pSource[vi*3+0]; - sy[j] = NAMCOS21_POLY_FRAME_HEIGHT/2 + (int16_t)pSource[vi*3+1]; - zcode[j] = pSource[vi*3+2]; - } - draw_quad(sx, sy, zcode, color&0x7fff); - if( code&0x80 ) - { /* end-of-quadlist marker */ - break; - } - } - } - m_winrun_poly_index = 0; - } -} /* winrun_flushpoly */ - -READ16_MEMBER(namcos21_state::winrun_poly_reset_r) -{ - winrun_flush_poly(); - return 0; -} - -WRITE16_MEMBER(namcos21_state::winrun_dsp_render_w) -{ - if( m_winrun_poly_indexpulse_input_line(INPUT_LINE_RESET, attotime::zero); - clear_poly_framebuffer(); - } -} - -READ16_MEMBER(namcos21_state::winrun_table_r) -{ - return m_winrun_polydata[offset]; -} - -void namcos21_state::winrun_dsp_program(address_map &map) -{ - map(0x0000, 0x0fff).rom(); -} - -void namcos21_state::winrun_dsp_data(address_map &map) -{ - map(0x2000, 0x200f).rw(FUNC(namcos21_state::winrun_cuskey_r), FUNC(namcos21_state::winrun_cuskey_w)); - map(0x4000, 0x4fff).rw(FUNC(namcos21_state::winrun_dspcomram_r), FUNC(namcos21_state::winrun_dspcomram_w)); - map(0x8000, 0xffff).r(FUNC(namcos21_state::winrun_table_r)); -} - -void namcos21_state::winrun_dsp_io(address_map &map) -{ - map(0x08, 0x09).rw(FUNC(namcos21_state::winrun_dsp_pointrom_data_r), FUNC(namcos21_state::winrun_dsp_pointrom_addr_w)); - map(0x0a, 0x0a).w(FUNC(namcos21_state::winrun_dsp_render_w)); - map(0x0b, 0x0b).nopw(); - map(0x0c, 0x0c).w(FUNC(namcos21_state::winrun_dsp_complete_w)); -} - -WRITE16_MEMBER(namcos21_state::winrun_dspbios_w) -{ - COMBINE_DATA( &m_winrun_dspbios[offset] ); - if( offset==0xfff ) - { - uint16_t *mem = (uint16_t *)memregion("dsp")->base(); - memcpy( mem, m_winrun_dspbios, 0x2000 ); - m_winrun_dsp_alive = 1; - } -} - -//380000 : read : dsp status? 1 = busy -//380000 : write(0x01) - done before dsp comram init -//380004 : dspcomram bank, as seen by 68k -//380008 : read : state? - -READ16_MEMBER(namcos21_state::winrun_68k_dspcomram_r) -{ - int bank = m_winrun_dspcomram_control[0x4/2]&1; - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - return mem[offset]; -} - -WRITE16_MEMBER(namcos21_state::winrun_68k_dspcomram_w) -{ - int bank = m_winrun_dspcomram_control[0x4/2]&1; - uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; - COMBINE_DATA( &mem[offset] ); -} - -READ16_MEMBER(namcos21_state::winrun_dspcomram_control_r) -{ - return m_winrun_dspcomram_control[offset]; -} - -WRITE16_MEMBER(namcos21_state::winrun_dspcomram_control_w) -{ - COMBINE_DATA( &m_winrun_dspcomram_control[offset] ); -} - void namcos21_state::winrun_master_map(address_map &map) { map(0x000000, 0x03ffff).rom(); map(0x100000, 0x10ffff).ram(); /* work RAM */ map(0x180000, 0x183fff).rw(FUNC(namcos21_state::namcos2_68k_eeprom_r), FUNC(namcos21_state::namcos2_68k_eeprom_w)).umask16(0x00ff); map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); - map(0x250000, 0x25ffff).ram().share("winrun_polydata"); + + // DSP Related + map(0x250000, 0x25ffff).ram().share("namcos21dsp:winrun_polydata"); map(0x260000, 0x26ffff).ram(); /* unused? */ - map(0x280000, 0x281fff).w(FUNC(namcos21_state::winrun_dspbios_w)).share("winrun_dspbios"); - map(0x380000, 0x38000f).rw(FUNC(namcos21_state::winrun_dspcomram_control_r), FUNC(namcos21_state::winrun_dspcomram_control_w)); - map(0x3c0000, 0x3c1fff).rw(FUNC(namcos21_state::winrun_68k_dspcomram_r), FUNC(namcos21_state::winrun_68k_dspcomram_w)); - map(0x400000, 0x400001).w(FUNC(namcos21_state::pointram_control_w)); - map(0x440000, 0x440001).rw(FUNC(namcos21_state::pointram_data_r), FUNC(namcos21_state::pointram_data_w)); + map(0x280000, 0x281fff).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspbios_w)); + map(0x380000, 0x38000f).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspcomram_control_r), FUNC(namcos21_dsp_device::winrun_dspcomram_control_w)); + map(0x3c0000, 0x3c1fff).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_68k_dspcomram_r), FUNC(namcos21_dsp_device::winrun_68k_dspcomram_w)); + map(0x400000, 0x400001).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_control_w)); + map(0x440000, 0x440001).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_data_r), FUNC(namcos21_dsp_device::pointram_data_w)); + map(0x600000, 0x60ffff).ram().share("gpu_comram"); map(0x800000, 0x87ffff).rom().region("data", 0); map(0x900000, 0x90ffff).ram().share("sharedram"); @@ -1574,71 +635,6 @@ void namcos21_state::configure_c65_namcos21(machine_config &config) m_c65->dp_out_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_w)); } -void namcos21_state::configure_c68_namcos21(machine_config &config) -{ - NAMCOC68(config, m_c68, 8000000); - m_c68->in_pb_callback().set_ioport("MCUB"); - m_c68->in_pc_callback().set_ioport("MCUC"); - m_c68->in_ph_callback().set_ioport("MCUH"); - m_c68->in_pdsw_callback().set_ioport("DSW"); - m_c68->di0_in_cb().set_ioport("MCUDI0"); - m_c68->di1_in_cb().set_ioport("MCUDI1"); - m_c68->di2_in_cb().set_ioport("MCUDI2"); - m_c68->di3_in_cb().set_ioport("MCUDI3"); - m_c68->an0_in_cb().set_ioport("AN0"); - m_c68->an1_in_cb().set_ioport("AN1"); - m_c68->an2_in_cb().set_ioport("AN2"); - m_c68->an3_in_cb().set_ioport("AN3"); - m_c68->an4_in_cb().set_ioport("AN4"); - m_c68->an5_in_cb().set_ioport("AN5"); - m_c68->an6_in_cb().set_ioport("AN6"); - m_c68->an7_in_cb().set_ioport("AN7"); - m_c68->dp_in_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_r)); - m_c68->dp_out_callback().set(FUNC(namcos21_state::namcos2_dualportram_byte_w)); -} - -/*************************************************************/ -/* Driver's Eyes Memory declarations overrides */ -/*************************************************************/ - - -void namcos21_state::driveyes_common_map(address_map &map) -{ - map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); - map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); - map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); - map(0x760000, 0x760001).rw(FUNC(namcos21_state::namcos21_video_enable_r), FUNC(namcos21_state::namcos21_video_enable_w)); - map(0x800000, 0x8fffff).rom().region("data", 0); - map(0x900000, 0x90ffff).ram().share("sharedram"); - map(0xa00000, 0xa00fff).rw(FUNC(namcos21_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_state::namcos2_68k_dualportram_word_w)); - map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); - map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); -} - -void namcos21_state::driveyes_master_map(address_map &map) -{ - driveyes_common_map(map); - map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ - map(0x180000, 0x183fff).rw(FUNC(namcos21_state::namcos2_68k_eeprom_r), FUNC(namcos21_state::namcos2_68k_eeprom_w)).umask16(0x00ff); - map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); - map(0x250000, 0x25ffff).ram().share("winrun_polydata"); - map(0x280000, 0x281fff).w(FUNC(namcos21_state::winrun_dspbios_w)).share("winrun_dspbios"); - map(0x380000, 0x38000f).rw(FUNC(namcos21_state::winrun_dspcomram_control_r), FUNC(namcos21_state::winrun_dspcomram_control_w)); - map(0x3c0000, 0x3c1fff).rw(FUNC(namcos21_state::winrun_68k_dspcomram_r), FUNC(namcos21_state::winrun_68k_dspcomram_w)); - map(0x400000, 0x400001).w(FUNC(namcos21_state::pointram_control_w)); - map(0x440000, 0x440001).rw(FUNC(namcos21_state::pointram_data_r), FUNC(namcos21_state::pointram_data_w)); -} - -void namcos21_state::driveyes_slave_map(address_map &map) -{ - driveyes_common_map(map); - map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram(); /* private work RAM */ - map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); -} - /*************************************************************/ /* */ /* NAMCO SYSTEM 21 INPUT PORTS */ @@ -1769,114 +765,6 @@ static INPUT_PORTS_START( winrungp ) PORT_DIPSETTING( 0x00, "4M" ) INPUT_PORTS_END -static INPUT_PORTS_START( driveyes ) - PORT_INCLUDE(winrungp) - - PORT_MODIFY("MCUB") - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("gearbox", namcoio_gearbox_device, clutch_r ) - PORT_BIT( 0x37, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("MCUDI0") - PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER("gearbox", namcoio_gearbox_device, in_r, nullptr ) - PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("MCUH") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Red Button") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Green Button") - PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("DSW") - PORT_DIPNAME( 0x0c, 0x0c, "Screen") - PORT_DIPSETTING( 0x0c, "Center" ) - // these will show 'receive error' because they want comms from the main screen - PORT_DIPSETTING( 0x08, "Left" ) - PORT_DIPSETTING( 0x04, "Right" ) - PORT_DIPSETTING( 0x00, "Right (duplicate)" ) -INPUT_PORTS_END - -// the default inc/dec analog keys have been chosen to map 'tank' style inputs found on Assault. -// this makes the game easier to use with the keyboard, providing a familiar left/right stick mapping -// ports are limited to 10/ef because otherwise, even when calibrated, the game will act as if the -// inputs wrap around when they hit the maximum, causing undesired movement -static INPUT_PORTS_START( cybsled ) - PORT_INCLUDE(s21default) - - PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */ - PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ - PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */ - PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */ - PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("MCUH") /* 63B05Z0 - PORT H */ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Viewport Change Button") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Missile Button") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Gun Button") - PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - -static INPUT_PORTS_START( starblad ) - PORT_INCLUDE(s21default) - - PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) - PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) -INPUT_PORTS_END - -static INPUT_PORTS_START( aircomb ) - PORT_INCLUDE(s21default) - - PORT_MODIFY("AN0") /* IN#2: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) - PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) - PORT_MODIFY("AN3") /* IN#5: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ - PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE - PORT_MODIFY("AN4") /* IN#6: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN5") /* IN#7: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN6") /* IN#8: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_MODIFY("AN7") /* IN#9: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("DSW") /* 63B05Z0 - $2000 DIP SW */ - PORT_DIPNAME( 0x01, 0x01, "DSW1") // not test mode on this game - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_MODIFY("MCUH") /* IN#10: 63B05Z0 - PORT H */ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) ///??? - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // prev color - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ???next color - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) - PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - - static const gfx_layout tile_layout = { 16,16, @@ -1904,14 +792,11 @@ static GFXDECODE_START( gfx_namcos21 ) GFXDECODE_ENTRY( "gfx1", 0x000000, tile_layout, 0x1000, 0x10 ) GFXDECODE_END - WRITE8_MEMBER( namcos21_state::namcos2_sound_bankselect_w ) { m_audiobank->set_entry(data>>4); } -void (*namcos2_kickstart)(running_machine &machine, int internal); - WRITE8_MEMBER(namcos21_state::sound_reset_w) { if (data & 0x01) @@ -1925,15 +810,6 @@ WRITE8_MEMBER(namcos21_state::sound_reset_w) /* Suspend execution */ m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } - - if (namcos2_kickstart != nullptr) - { - //printf( "dspkick=0x%x\n", data ); - if (data & 0x04) - { - (*namcos2_kickstart)(machine(), 1); - } - } } WRITE8_MEMBER(namcos21_state::system_reset_w) @@ -1947,54 +823,9 @@ WRITE8_MEMBER(namcos21_state::system_reset_w) void namcos21_state::reset_all_subcpus(int state) { m_slave->set_input_line(INPUT_LINE_RESET, state); - if (m_c68) - { - m_c68->ext_reset(state); - } - else if (m_c65) - { - m_c65->ext_reset(state); - } - else - { - logerror("no MCU to reset?\n"); - } - - switch (m_gametype) - { - case namcos21_state::NAMCOS21_SOLVALOU: - case namcos21_state::NAMCOS21_STARBLADE: - case namcos21_state::NAMCOS21_AIRCOMBAT: - case namcos21_state::NAMCOS21_CYBERSLED: - m_dspmaster->set_input_line(INPUT_LINE_RESET, state); - m_dspslave->set_input_line(INPUT_LINE_RESET, state); - break; - - //case namcos21_state::NAMCOS21_WINRUN91: - //case namcos21_state::NAMCOS21_DRIVERS_EYES: - default: - break; - } + m_c65->ext_reset(state); } - -bool namcos21_state::is_system21() -{ - switch (m_gametype) - { - case namcos21_state::NAMCOS21_AIRCOMBAT: - case namcos21_state::NAMCOS21_STARBLADE: - case namcos21_state::NAMCOS21_CYBERSLED: - case namcos21_state::NAMCOS21_SOLVALOU: - case namcos21_state::NAMCOS21_WINRUN91: - case namcos21_state::NAMCOS21_DRIVERS_EYES: - return 1; - default: - return 0; - } -} - - WRITE8_MEMBER(namcos21_state::namcos2_68k_eeprom_w) { m_eeprom[offset] = data; @@ -2007,7 +838,6 @@ READ8_MEMBER(namcos21_state::namcos2_68k_eeprom_r) MACHINE_RESET_MEMBER(namcos21_state, namcos21) { -// address_space &space = m_maincpu->space(AS_PROGRAM); address_space &audio_space = m_audiocpu->space(AS_PROGRAM); /* Initialise the bank select in the sound CPU */ @@ -2023,47 +853,31 @@ MACHINE_RESET_MEMBER(namcos21_state, namcos21) MACHINE_START_MEMBER(namcos21_state,namcos21) { - namcos2_kickstart = nullptr; m_eeprom = std::make_unique(0x2000); subdevice("nvram")->set_base(m_eeprom.get(), 0x2000); - if (m_audiobank) - { - uint32_t max = memregion("audiocpu")->bytes() / 0x4000; - for (int i = 0; i < 0x10; i++) - m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); - m_audiobank->set_entry(0); - } - - namcos2_kickstart = namcos21_kickstart; + m_audiobank->set_entry(0); } TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::screen_scanline) { int scanline = param; -// int cur_posirq = get_posirq_scanline()*2; + // int cur_posirq = get_posirq_scanline()*2; - if(scanline == 240*2) + if (scanline == 240 * 2) { m_master_intc->vblank_irq_trigger(); m_slave_intc->vblank_irq_trigger(); - if(m_gpu_intc) - m_gpu_intc->vblank_irq_trigger(); - - if (m_c65) - m_c65->ext_interrupt(HOLD_LINE); - - if (m_c68) - m_c68->ext_interrupt(ASSERT_LINE); - + m_gpu_intc->vblank_irq_trigger(); + m_c65->ext_interrupt(HOLD_LINE); } - if(m_gpu_intc != nullptr) - { - if(scanline == (0xff-m_gpu_intc->get_posirq_line())*2) - m_gpu_intc->pos_irq_trigger(); - } + if (scanline == (0xff - m_gpu_intc->get_posirq_line()) * 2) + m_gpu_intc->pos_irq_trigger(); } void namcos21_state::configure_c148_standard(machine_config &config) @@ -2093,14 +907,8 @@ MACHINE_CONFIG_START(namcos21_state::winrun) configure_c65_namcos21(config); - tms32025_device& dsp(TMS32025(config, m_dsp, 24000000)); /* 24 MHz? overclocked */ - dsp.set_addrmap(AS_PROGRAM, &namcos21_state::winrun_dsp_program); - dsp.set_addrmap(AS_DATA, &namcos21_state::winrun_dsp_data); - dsp.set_addrmap(AS_IO, &namcos21_state::winrun_dsp_io); - dsp.bio_in_cb().set(FUNC(namcos21_state::winrun_poly_reset_r)); - dsp.hold_in_cb().set_constant(0); - dsp.hold_ack_out_cb().set_nop(); - dsp.xf_out_cb().set_nop(); + NAMCOS21_DSP(config, m_namcos21_dsp, 0); + m_namcos21_dsp->set_renderer_tag("namcos21_3d"); MCFG_DEVICE_ADD("gpu", M68000,12288000) /* graphics coprocessor */ MCFG_DEVICE_PROGRAM_MAP(winrun_gpu_map) @@ -2123,7 +931,11 @@ MACHINE_CONFIG_START(namcos21_state::winrun) MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) MCFG_PALETTE_FORMAT(XBRG) - MCFG_VIDEO_START_OVERRIDE(namcos21_state,namcos21) + NAMCOS21_3D(config, m_namcos21_3d, 0); + m_namcos21_3d->set_fixed_palbase(0x4000); + m_namcos21_3d->set_zz_shift_mult(10, 0x100); + m_namcos21_3d->set_depth_reverse(true); + m_namcos21_3d->set_framebuffer_size(496,480); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -2139,152 +951,6 @@ MACHINE_CONFIG_START(namcos21_state::winrun) MACHINE_CONFIG_END -// driveyes only -MACHINE_CONFIG_START(namcos21_state::driveyes) - MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ - MCFG_DEVICE_PROGRAM_MAP(driveyes_master_map) - MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1) - - MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ - MCFG_DEVICE_PROGRAM_MAP(driveyes_slave_map) - - MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ - MCFG_DEVICE_PROGRAM_MAP(sound_map) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) - - configure_c68_namcos21(config); - - tms32025_device& dsp(TMS32025(config, m_dsp, 24000000*2)); /* 24 MHz? overclocked */ - dsp.set_addrmap(AS_PROGRAM, &namcos21_state::winrun_dsp_program); - dsp.set_addrmap(AS_DATA, &namcos21_state::winrun_dsp_data); - dsp.set_addrmap(AS_IO, &namcos21_state::winrun_dsp_io); - dsp.bio_in_cb().set(FUNC(namcos21_state::winrun_poly_reset_r)); - dsp.hold_in_cb().set_constant(0); - dsp.hold_ack_out_cb().set_nop(); - dsp.xf_out_cb().set_nop(); - - MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */ - - MCFG_MACHINE_START_OVERRIDE(namcos21_state,namcos21) - MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos21) - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); - - MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0) - - configure_c148_standard(config); - NAMCO_C139(config, m_sci, 0); - - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS_NAMCO480I - MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_driveyes) - MCFG_SCREEN_PALETTE("palette") - - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) - MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) - MCFG_PALETTE_FORMAT(XBRG) - - NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); - m_c355spr->set_gfxdecode_tag("gfxdecode"); - m_c355spr->set_is_namcofl(false); - m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); - m_c355spr->set_palxor(0xf); // reverse mapping - m_c355spr->set_gfxregion(0); - - MCFG_VIDEO_START_OVERRIDE(namcos21_state,namcos21) - - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - C140(config, m_c140, 8000000/374); - m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); - m_c140->add_route(0, "lspeaker", 0.50); - m_c140->add_route(1, "rspeaker", 0.50); - - MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) - MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) - MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) -MACHINE_CONFIG_END - -// starblad, solvalou, aircomb, cybsled -MACHINE_CONFIG_START(namcos21_state::namcos21) - MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ - MCFG_DEVICE_PROGRAM_MAP(master_map) - MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1) - - MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ - MCFG_DEVICE_PROGRAM_MAP(slave_map) - - MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ - MCFG_DEVICE_PROGRAM_MAP(sound_map) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq0_line_hold, 2*60) - MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_state, irq1_line_hold, 120) - - configure_c68_namcos21(config); - - tms32025_device& dspmaster(TMS32025(config, m_dspmaster, 24000000)); /* 24 MHz? overclocked */ - dspmaster.set_addrmap(AS_PROGRAM, &namcos21_state::master_dsp_program); - dspmaster.set_addrmap(AS_DATA, &namcos21_state::master_dsp_data); - dspmaster.set_addrmap(AS_IO, &namcos21_state::master_dsp_io); - dspmaster.hold_in_cb().set_constant(0); - dspmaster.hold_ack_out_cb().set_nop(); - dspmaster.xf_out_cb().set(FUNC(namcos21_state::dsp_xf_w)); - - tms32025_device& dspslave(TMS32025(config, m_dspslave, 24000000*4)); /* 24 MHz? overclocked */ - dspslave.set_addrmap(AS_PROGRAM, &namcos21_state::slave_dsp_program); - dspslave.set_addrmap(AS_DATA, &namcos21_state::slave_dsp_data); - dspslave.set_addrmap(AS_IO, &namcos21_state::slave_dsp_io); - dspslave.hold_in_cb().set_constant(0); - dspslave.hold_ack_out_cb().set_nop(); - dspslave.xf_out_cb().set(FUNC(namcos21_state::slave_XF_output_w)); - - MCFG_QUANTUM_TIME(attotime::from_hz(12000)) - - MCFG_MACHINE_START_OVERRIDE(namcos21_state,namcos21) - MCFG_MACHINE_RESET_OVERRIDE(namcos21_state,namcos21) - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); - - MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_RAW_PARAMS_NAMCO480I - MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21) - MCFG_SCREEN_PALETTE("palette") - - configure_c148_standard(config); - NAMCO_C139(config, m_sci, 0); - - MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) - MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) - MCFG_PALETTE_FORMAT(XBRG) - - NAMCO_C355SPR(config, m_c355spr, 0); - m_c355spr->set_palette_tag("palette"); - m_c355spr->set_gfxdecode_tag("gfxdecode"); - m_c355spr->set_is_namcofl(false); - m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); - m_c355spr->set_palxor(0xf); // reverse mapping - m_c355spr->set_gfxregion(0); - - MCFG_VIDEO_START_OVERRIDE(namcos21_state,namcos21) - - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); - - C140(config, m_c140, 8000000/374); - m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); - m_c140->add_route(0, "lspeaker", 0.50); - m_c140->add_route(1, "rspeaker", 0.50); - - MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) - MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) - MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) -MACHINE_CONFIG_END - - - - - - ROM_START( winrun ) ROM_REGION( 0x40000, "maincpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "wr2-mpub.3k", 0x000000, 0x20000, CRC(3bb0ea17) SHA1(201cedf5865224c1c4a0c9b017982e36ec9b8243) ) @@ -2300,8 +966,6 @@ ROM_START( winrun ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP */ - ROM_REGION( 0x80000, "gpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "wr1-gp0u.1k", 0x00000, 0x20000, CRC(c66a43be) SHA1(88ec02c5c18c8bb91a95934c14e9ae530ae09880) ) ROM_LOAD16_BYTE( "wr1-gp0l.3k", 0x00001, 0x20000, CRC(91a70e6f) SHA1(e613e2544f63cd386588445a2a199ae6b84d741e) ) @@ -2318,7 +982,7 @@ ROM_START( winrun ) ROM_LOAD16_BYTE( "wr1-gd0u-2.1p", 0x00000, 0x40000, CRC(9752eef5) SHA1(d6df0faf9c2696247bdf463f53c1e474ec595dd0) ) ROM_LOAD16_BYTE( "wr1-gd0l-2.3p", 0x00001, 0x40000, CRC(349c95cc) SHA1(8898eecf5918485ec683900520f123483077df28) ) - ROM_REGION16_BE( 0x80000, "point16", 0 ) /* 3d objects */ + ROM_REGION16_BE( 0x80000, "namcos21dsp:point16", 0 ) /* 3d objects */ ROM_LOAD16_BYTE( "wr1-pt0u.8j", 0x00000, 0x20000, CRC(7ec4cf6b) SHA1(92ec92567b9f7321efb4a3724cbcdba216eb22f9) ) ROM_LOAD16_BYTE( "wr1-pt0l.8d", 0x00001, 0x20000, CRC(58c14b73) SHA1(e34a26866cd870743e166669f7fa5915a82104e9) ) @@ -2366,8 +1030,6 @@ ROM_START( winrungp ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP */ - ROM_REGION( 0x80000, "gpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "sg1-gp0-u.1j", 0x00000, 0x20000, CRC(475da78a) SHA1(6e69bcc6caf2e3cd28fed75796c8992e754f9323) ) ROM_LOAD16_BYTE( "sg1-gp0-l.3j", 0x00001, 0x20000, CRC(580479bf) SHA1(ba682190cba0d3cdc49aa4937c898ba7ed2a25f5) ) @@ -2386,7 +1048,7 @@ ROM_START( winrungp ) ROM_LOAD16_BYTE( "sg1-gd1-u.1s", 0x80000, 0x40000, CRC(271db29b) SHA1(8b35fcf273b9aec28d4c606c41c0626dded697e1) ) ROM_LOAD16_BYTE( "sg1-gd1-l.3s", 0x80001, 0x40000, CRC(a6c4da96) SHA1(377dbf21a1bede01de16708c96c112abab4417ce) ) - ROM_REGION16_BE( 0x80000, "point16", 0 ) /* 3d objects */ + ROM_REGION16_BE( 0x80000, "namcos21dsp:point16", 0 ) /* 3d objects */ ROM_LOAD16_BYTE( "sg1-pt0-u.8j", 0x00000, 0x20000, CRC(160c3634) SHA1(485d20d6cc459f17d77682201dee07bdf76bf343) ) ROM_LOAD16_BYTE( "sg1-pt0-l.8d", 0x00001, 0x20000, CRC(b5a665bf) SHA1(5af6ec492f31395c0492e14590b025b120067b8d) ) ROM_LOAD16_BYTE( "sg1-pt1-u.8l", 0x40000, 0x20000, CRC(b63d3006) SHA1(78e78619766b0fd91b1e830cfb066495d6773981) ) @@ -2415,8 +1077,6 @@ ROM_START( winrun91 ) ROM_REGION( 0x8000, "c65mcu:external", ROMREGION_ERASE00 ) /* I/O MCU */ ROM_LOAD( "sys2c65c.bin", 0x000000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP */ - ROM_REGION( 0x80000, "gpu", 0 ) /* 68k code */ ROM_LOAD16_BYTE( "r911-gp0u.1j", 0x00000, 0x20000, CRC(f5469a29) SHA1(38b6ea1fbe482b69fbb0e2f44f44a0ca2a49f6bc) ) ROM_LOAD16_BYTE( "r911-gp0l.3j", 0x00001, 0x20000, CRC(5c18f596) SHA1(215cbda62254e31b4ff6431623384df1639bfdb7) ) @@ -2435,7 +1095,7 @@ ROM_START( winrun91 ) ROM_LOAD16_BYTE( "r911-gd1u.1s", 0x80000, 0x40000, CRC(17e5a61c) SHA1(272ebd7daa56847f1887809535362331b5465dec) ) ROM_LOAD16_BYTE( "r911-gd1l.3s", 0x80001, 0x40000, CRC(64df59a2) SHA1(1e9d0945b94780bb0be16803e767466d2cda07e8) ) - ROM_REGION16_BE( 0x80000, "point16", 0 ) /* winrun91 - 3d objects */ + ROM_REGION16_BE( 0x80000, "namcos21dsp:point16", 0 ) /* winrun91 - 3d objects */ ROM_LOAD16_BYTE( "r911-pt0u.8j", 0x00000, 0x20000, CRC(abf512a6) SHA1(e86288039d6c4dedfa95b11cb7e4b87637f90c09) ) /* Version on SYSTEM21B CPU only has R911 PTU @ 8W */ ROM_LOAD16_BYTE( "r911-pt0l.8d", 0x00001, 0x20000, CRC(ac8d468c) SHA1(d1b457a19a5d3259d0caf933f42b3a02b485867b) ) /* and R911 PTL @ 12W with rom type 27C020 */ ROM_LOAD16_BYTE( "r911-pt1u.8l", 0x40000, 0x20000, CRC(7e5dab74) SHA1(5bde219d5b4305d38d17b494b2e759f05d05329f) ) @@ -2449,509 +1109,10 @@ ROM_START( winrun91 ) ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(75bcbc22) SHA1(1e7e785735d27aa8cd8393b16b589a46ecd7956a) ) ROM_END - - -ROM_START( driveyes ) - ROM_REGION( 0x40000, "maincpu", 0 ) /* C68C - 68k code */ - ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) - ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) - - ROM_REGION( 0x40000, "slave", 0 ) /* C68 - 68k code */ - ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) - ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) - - ROM_REGION( 0x20000, "audiocpu", 0 ) /* Sound */ -/* -There are 3 separate complete boards used for this 3 screen version.... -"Set2" (center screen board?) has de1_snd0 while the other 2 sets have de1_snd0r (rear speakers??) -Only "Set2" has voice roms present/dumped? -We load the "r" set, then load set2's sound CPU code over it to keep the "r" rom in the set -*/ - ROM_LOAD( "de1-snd0r.8j", 0x000000, 0x020000, CRC(7bbeda42) SHA1(fe840cc9069758928492bbeec79acded18daafd9) ) /* Sets 1 & 3 */ - ROM_LOAD( "de1-snd0.8j", 0x000000, 0x020000, CRC(5474f203) SHA1(e0ae2f6978deb0c934d9311a334a6e36bb402aee) ) /* Set 2 */ - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dsp", ROMREGION_ERASEFF ) /* DSP (no internal ROM?) */ - - ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ - ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) - ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) - ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) - ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) - ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) - ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) - ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) - ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) /* 68k */ - ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) - ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) - - ROM_REGION16_BE( 0xc0000, "point16", 0 ) /* 3d objects */ - ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) - ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) - ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) - ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) - ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) - ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("de1-voi0.12b", 0x040000, 0x40000, CRC(fc44adbd) SHA1(4268bb1f025e47a94212351d1c1cfd0e5029221f) ) - ROM_LOAD("de1-voi1.12c", 0x0c0000, 0x40000, CRC(a71dc55a) SHA1(5e746184db9144ab4e3a97b20195b92b0f56c8cc) ) - ROM_LOAD("de1-voi2.12d", 0x140000, 0x40000, CRC(4d32879a) SHA1(eae65f4b98cee9efe4e5dad7298c3717cfb1e6bf) ) - ROM_LOAD("de1-voi3.12e", 0x1c0000, 0x40000, CRC(e4832d18) SHA1(0460c79d3942aab89a765b0bd8bbddaf19a6d682) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) -ROM_END - - - -ROM_START( starblad ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "st2_mpu.mpru", 0x000000, 0x80000, CRC(35bc9e4a) SHA1(03401fb846c1b2aee775071a554654e49fe5c47c) ) - ROM_LOAD16_BYTE( "st2_mpl.mprl", 0x000001, 0x80000, CRC(193e641b) SHA1(fed803167c5b0bba5b8381c26c909b7380d57efd) ) - - ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) - ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ - ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) - ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) - ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) - ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) - ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) - - ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) - ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) - ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) - ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) - ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) - ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) - ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) - ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) - ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) - - ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) - // starblad needs default NVRAM to be all 0 -ROM_END - -ROM_START( starbladj ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "st1_mpu.mpru", 0x000000, 0x80000, CRC(483a311c) SHA1(dd9416b8d4b0f8b361630e312eac71c113064eae) ) - ROM_LOAD16_BYTE( "st1_mpl.mprl", 0x000001, 0x80000, CRC(0a4dd661) SHA1(fc2b71a255a8613693c4d1c79ddd57a6d396165a) ) - - ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) - ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ - ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) - ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) - ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) - ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) - ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) - - ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) - ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) - ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) - ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) - ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) - ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) - ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) - ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) - ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) - - ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) - // starblad needs default NVRAM to be all 0 -ROM_END - -ROM_START( solvalou ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "sv1-mp-u.bin", 0x000000, 0x20000, CRC(b6f92762) SHA1(d177328b3da2ab0580e101478142bc8c373d6140) ) - ROM_LOAD16_BYTE( "sv1-mp-l.bin", 0x000001, 0x20000, CRC(28c54c42) SHA1(32fcca2eb4bb8ba8c2587b03d3cf59f072f7fac5) ) - - ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "sv1-sp-u.bin", 0x000000, 0x20000, CRC(ebd4bf82) SHA1(67946360d680a675abcb3c131bac0502b2455573) ) - ROM_LOAD16_BYTE( "sv1-sp-l.bin", 0x000001, 0x20000, CRC(7acab679) SHA1(764297c9601be99dbbffb75bbc6fe4a40ea38529) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "sv1-snd0.bin", 0x000000, 0x020000, CRC(5e007864) SHA1(94da2d51544c6127056beaa251353038646da15f) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "sv1-obj0.bin", 0x000000, 0x80000, CRC(773798bb) SHA1(51ab76c95030bab834f1a74ae677b2f0afc18c52) ) - ROM_LOAD( "sv1-obj4.bin", 0x080000, 0x80000, CRC(33a008a7) SHA1(4959a0ac24ad64f1367e2d8d63d39a0273c60f3e) ) - ROM_LOAD( "sv1-obj1.bin", 0x100000, 0x80000, CRC(a36d9e79) SHA1(928d9995e97ee7509e23e6cc64f5e7bfb5c02d42) ) - ROM_LOAD( "sv1-obj5.bin", 0x180000, 0x80000, CRC(31551245) SHA1(385452ea4830c466263ad5241313ac850dfef756) ) - ROM_LOAD( "sv1-obj2.bin", 0x200000, 0x80000, CRC(c8672b8a) SHA1(8da037b27d2c2b178aab202781f162371458f788) ) - ROM_LOAD( "sv1-obj6.bin", 0x280000, 0x80000, CRC(fe319530) SHA1(8f7e46c8f0b86c7515f6d763b795ce07d11c77bc) ) - ROM_LOAD( "sv1-obj3.bin", 0x300000, 0x80000, CRC(293ef1c5) SHA1(f677883bfec16bbaeb0a01ac565d0e6cac679174) ) - ROM_LOAD( "sv1-obj7.bin", 0x380000, 0x80000, CRC(95ed6dcb) SHA1(931706ce3fea630823ce0c79febec5eec0cc623d) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "sv1-data-u.bin", 0x000000, 0x80000, CRC(2e561996) SHA1(982158481e5649f21d5c2816fdc80cb725ed1419) ) - ROM_LOAD16_BYTE( "sv1-data-l.bin", 0x000001, 0x80000, CRC(495fb8dd) SHA1(813d1da4109652008d72b3bdb03032efc5c0c2d5) ) - - ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "sv1-pt0-h.bin", 0x000001, 0x80000, CRC(3be21115) SHA1(c9f30353c1216f64199f87cd34e787efd728e739) ) /* most significant */ - ROM_LOAD32_BYTE( "sv1-pt0-u.bin", 0x000002, 0x80000, CRC(4aacfc42) SHA1(f0e179e057183b41744ca429764f44306f0ce9bf) ) - ROM_LOAD32_BYTE( "sv1-pt0-l.bin", 0x000003, 0x80000, CRC(6a4dddff) SHA1(9ed182d21d328c6a684ee6658a9dfcf3f3dd8646) ) /* least significant */ - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("sv1-voi0.bin", 0x000000, 0x80000,CRC(7f61bbcf) SHA1(b3b7e66e24d9cb16ebd139237c1e51f5d60c1585) ) - ROM_LOAD("sv1-voi1.bin", 0x080000, 0x80000,CRC(c732e66c) SHA1(14e75dd9bea4055f85eb2bcbf69cf6695a3f7ec4) ) - ROM_LOAD("sv1-voi2.bin", 0x100000, 0x80000,CRC(51076298) SHA1(ec52c9ae3029118f3ea3732948d6de28f5fba561) ) - ROM_LOAD("sv1-voi3.bin", 0x180000, 0x80000,CRC(33085ff3) SHA1(0a30b91618c250a5e7bd896a8ceeb3d16da178a9) ) -ROM_END - - -ROM_START( aircomb ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "ac2-mpr-u.3j", 0x000000, 0x80000, CRC(a7133f85) SHA1(9f1c99dd503f1fc81096170fd272e33ae8a7de2f) ) - ROM_LOAD16_BYTE( "ac2-mpr-l.1j", 0x000001, 0x80000, CRC(520a52e6) SHA1(74306e02abfe08aa1afbf325b74dbc0840c3ad3a) ) - - ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "ac2-spr-u.6c", 0x000000, 0x20000, CRC(42aca956) SHA1(10ea2400bb4d5b2d805e2de43ca0e0f54597f660) ) - ROM_LOAD16_BYTE( "ac2-spr-l.4c", 0x000001, 0x20000, CRC(3e15fa19) SHA1(65dbb33ab6b3c06c793613348ebb7b110b8bba0d) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "ac2-obj0.5s", 0x000000, 0x80000, CRC(8327ff22) SHA1(16f6022dedb7a74590898bc8ed3e8a97993c4635) ) - ROM_LOAD( "ac2-obj4.4s", 0x080000, 0x80000, CRC(e433e344) SHA1(98ade550cf066fcb5c09fa905f441a1464d4d625) ) - ROM_LOAD( "ac2-obj1.5x", 0x100000, 0x80000, CRC(43af566d) SHA1(99f0d9f005e28040f5cc10de2198893946a31d09) ) - ROM_LOAD( "ac2-obj5.4x", 0x180000, 0x80000, CRC(ecb19199) SHA1(8e0aa1bc1141c4b09576ab08970d0c7629560643) ) - ROM_LOAD( "ac2-obj2.3s", 0x200000, 0x80000, CRC(dafbf489) SHA1(c53ccb3e1b4a6a660bd28c8abe52ccc3f85d111f) ) - ROM_LOAD( "ac2-obj6.2s", 0x280000, 0x80000, CRC(24cc3f36) SHA1(e50af176eb3034c9cab7613ca614f5cc2c62f95e) ) - ROM_LOAD( "ac2-obj3.3x", 0x300000, 0x80000, CRC(bd555a1d) SHA1(96e432b30da6f5f7ccb768c516b1f7186bc0d4c9) ) - ROM_LOAD( "ac2-obj7.2x", 0x380000, 0x80000, CRC(d561fbe3) SHA1(a23976e10bddf74d4a6b292f044dfd0affbab101) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) /* collision */ - ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) - ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) - ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ - ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) - ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) - ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) - ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) - ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) - - ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) - ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) - ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "aircomb.nv", 0x0000, 0x2000, CRC(a97ea3e0) SHA1(95684bb7369c1cb1e2fa53c743d4f94b0080c6f5) ) -ROM_END - -ROM_START( aircombj ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "ac1-mpr-u.3j", 0x000000, 0x80000, CRC(a4dec813) SHA1(2ee8b3492d30db4c841f695151880925a5e205e0) ) - ROM_LOAD16_BYTE( "ac1-mpr-l.1j", 0x000001, 0x80000, CRC(8577b6a2) SHA1(32194e392fbd051754be88eb8c90688c65c65d85) ) - - ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "ac1-spr-u.6c", 0x000000, 0x20000, CRC(5810e219) SHA1(c312ffd8324670897871b12d521779570dc0f580) ) - ROM_LOAD16_BYTE( "ac1-spr-l.4c", 0x000001, 0x20000, CRC(175a7d6c) SHA1(9e31dde6646cd9b6dcdbdb3f2326177508559e56) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "ac1-obj0.5s", 0x000000, 0x80000, CRC(d2310c6a) SHA1(9bb8fdfc2c232574777248f4959975f9a20e3105) ) - ROM_LOAD( "ac1-obj4.4s", 0x080000, 0x80000, CRC(0c93b478) SHA1(a92ffbcf04b64e0eee5bcf37008e247700641b25) ) - ROM_LOAD( "ac1-obj1.5x", 0x100000, 0x80000, CRC(f5783a77) SHA1(0be1815ceb4ce4fa7ab75ba588e090f20ee0cac9) ) - ROM_LOAD( "ac1-obj5.4x", 0x180000, 0x80000, CRC(476aed15) SHA1(0e53fdf02e8ffe7852a1fa8bd2f64d0e58f3dc09) ) - ROM_LOAD( "ac1-obj2.3s", 0x200000, 0x80000, CRC(01343d5c) SHA1(64171fed1d1f8682b3d70d3233ea017719f4cc63) ) - ROM_LOAD( "ac1-obj6.2s", 0x280000, 0x80000, CRC(c67607b1) SHA1(df64ea7920cf64271fe742d3d0a57f842ee61e8d) ) - ROM_LOAD( "ac1-obj3.3x", 0x300000, 0x80000, CRC(7717f52e) SHA1(be1df3f4d0fdcaa5d3c81a724e5eb9d14136c6f5) ) - ROM_LOAD( "ac1-obj7.2x", 0x380000, 0x80000, CRC(cfa9fe5f) SHA1(0da25663b89d653c87ed32d15f7c82f3035702ab) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) - ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) - ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ - ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) - ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) - ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) - ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) - ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) - - ROM_REGION( 0x0600, "plds", 0 ) - ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) - ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) - ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "aircombj.nv", 0x0000, 0x2000, CRC(56c71c83) SHA1(83dfcf4e3232f78e3807e9d3e862aa5446444165) ) -ROM_END - -ROM_START( cybsled ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "cy2-mpr-u.3j", 0x000000, 0x80000, CRC(b35a72bc) SHA1(d9bc5b8f0bc30510fca8fc57eeb67e5ca0e4c67f) ) - ROM_LOAD16_BYTE( "cy2-mpr-l.1j", 0x000001, 0x80000, CRC(c4a25919) SHA1(52f6947102001376e37730ace16283141b13fee7) ) - - ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "cy2-spr-u.6c", 0x000000, 0x80000, CRC(575a422d) SHA1(cad97742da1e2baf47ac110fadef5544b3a30cc7) ) - ROM_LOAD16_BYTE( "cy2-spr-l.4c", 0x000001, 0x80000, CRC(4066291a) SHA1(6ebbc11a68f66ec1e6d2e6ee857e8c599691e289) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) - ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) - ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) - ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) - ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) - ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) - ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) - ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) - ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) - ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ - ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) - ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ - ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) - ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) - ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) - ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) - ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) - ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "cybsled.nv", 0x0000, 0x2000, CRC(aa18bf9e) SHA1(3712d4d20e5f5f1c920e3f1f6a00101e874662d0) ) -ROM_END - -ROM_START( cybsledj ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ - ROM_LOAD16_BYTE( "cy1-mpr-u.3j", 0x000000, 0x80000, CRC(cc5a2e83) SHA1(b794051b2c351e9ca43351603845e4e563f6740f) ) - ROM_LOAD16_BYTE( "cy1-mpr-l.1j", 0x000001, 0x80000, CRC(f7ee8b48) SHA1(6d36eb3dba9cf7f5f5e1a26c156e77a2dad3f257) ) - - ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ - ROM_LOAD16_BYTE( "cy1-spr-u.6c", 0x000000, 0x80000, CRC(28dd707b) SHA1(11297ceae4fe78d170785a5cf9ad77833bbe7fff) ) - ROM_LOAD16_BYTE( "cy1-spr-l.4c", 0x000001, 0x80000, CRC(437029de) SHA1(3d275a2b0ce6909e77e657c371bd22597ea9d398) ) - - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ - ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) - - ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ - /* external ROM not populated, unclear how it would map */ - - ROM_REGION( 0x20000, "dspmaster", 0 ) /* Master DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - ROM_REGION( 0x20000, "dspslave", 0 ) /* Slave DSP */ - ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) - - ROM_REGION( 0x400000, "gfx1", 0 ) - ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) - ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) - ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) - ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) - ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) - ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) - ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) - ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) - - ROM_REGION16_BE( 0x100000, "data", 0 ) - ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) - ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) - - ROM_REGION16_BE( 0x100000, "edata", 0 ) - ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) - ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) - - ROM_REGION32_BE( 0x400000, "point24", ROMREGION_ERASE00) /* 24bit signed point data */ - ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ - ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) - ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ - ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) - ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) - ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) - - ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ - ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) - ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) - ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) - ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) - - ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ - ROM_LOAD( "cybsledj.nv", 0x0000, 0x2000, CRC(a73bb03e) SHA1(e074bfeae14178c867070e06f6690ed13115f5fa) ) -ROM_END - - -void namcos21_state::init(int game_type) -{ - m_gametype = game_type; - m_pointram = std::make_unique(PTRAM_SIZE); - init_dsp(); - m_mbNeedsKickstart = 20; - if( game_type==NAMCOS21_CYBERSLED ) - { - m_mbNeedsKickstart = 200; - } -} - void namcos21_state::init_winrun() { - uint16_t *pMem = (uint16_t *)memregion("dsp")->base(); - int pc = 0; - pMem[pc++] = 0xff80; /* b */ - pMem[pc++] = 0; - - m_winrun_dspcomram = std::make_unique(0x1000*2); - - m_gametype = NAMCOS21_WINRUN91; - m_pointram = std::make_unique(PTRAM_SIZE); - m_pointram_idx = 0; - m_mbNeedsKickstart = 0; -} - -void namcos21_state::init_aircomb() -{ - init(NAMCOS21_AIRCOMBAT); -} - -void namcos21_state::init_starblad() -{ - init(NAMCOS21_STARBLADE); -} - - -void namcos21_state::init_cybsled() -{ - init(NAMCOS21_CYBERSLED); -} - -void namcos21_state::init_solvalou() -{ - uint16_t *mem = (uint16_t *)memregion("maincpu")->base(); - mem[0x20ce4/2+1] = 0x0000; // $200128 - mem[0x20cf4/2+0] = 0x4e71; // 2nd ptr_booting - mem[0x20cf4/2+1] = 0x4e71; - mem[0x20cf4/2+2] = 0x4e71; - - init(NAMCOS21_SOLVALOU ); -} - -void namcos21_state::init_driveyes() -{ - uint16_t *pMem = (uint16_t *)memregion("dsp")->base(); - int pc = 0; - pMem[pc++] = 0xff80; /* b */ - pMem[pc++] = 0; - m_winrun_dspcomram = std::make_unique(0x1000*2); - m_gametype = NAMCOS21_DRIVERS_EYES; - m_pointram = std::make_unique(PTRAM_SIZE); - m_pointram_idx = 0; - m_mbNeedsKickstart = 0; + m_gpu_videoram = std::make_unique(0x80000); + m_gpu_maskram = std::make_unique(0x80000); } /* YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS */ @@ -2961,17 +1122,3 @@ GAME( 1988, winrun, 0, winrun, winrun, namcos21_state, init_winr GAME( 1989, winrungp, 0, winrun, winrungp, namcos21_state, init_winrun, ROT0, "Namco", "Winning Run Suzuka Grand Prix (Japan) (89/12/03, Ver.02)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // Sub Ver.02, 1989, Graphic Ver.02 89/12/03, Sound Ver.0000 // Available on a size/cost reduced 2 PCB set with 'Namco System 21B' printed on each board, still C65 I/O MCU, appears to be functionally identical to original NS21 GAME( 1991, winrun91, 0, winrun, winrungp, namcos21_state, init_winrun, ROT0, "Namco", "Winning Run '91 (Japan) (1991/03/05, Main Ver 1.0, Sub Ver 1.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) - -// 3 PCB stacks in a single cage (3x 4 PCBs) linked for 3 screen panorama, boards look similar to original Namco System 21 (not 21B) including TMS320C25 DSP, but use C68 I/O MCU and sprite chip instead of "68000 'GPU'" ? -GAME( 1992, driveyes, 0, driveyes, driveyes, namcos21_state, init_driveyes, ROT0, "Namco", "Driver's Eyes (Japan) (1992/01/10, Main Ver 2.1, Sub Ver 1.1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN) - -// revised hardware, much more DSP power, similar to below but apparently uses TMS320C20 (no Namco part #?) instead of TMS320C25 (C67)? (verify this isn't just a miscommunication, it seems out of place) -GAME( 1991, starblad, 0, namcos21, starblad, namcos21_state, init_starblad, ROT0, "Namco", "Starblade (World)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1991, starbladj, starblad, namcos21, starblad, namcos21_state, init_starblad, ROT0, "Namco", "Starblade (Japan)", MACHINE_IMPERFECT_GRAPHICS ) - -// uses 5x TMS320C25 (C67, has internal ROM - dumped) but otherwise same as above? -GAME( 1991, solvalou, 0, namcos21, s21default, namcos21_state, init_solvalou, ROT0, "Namco", "Solvalou (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) -GAME( 1992, aircomb, 0, namcos21, aircomb, namcos21_state, init_aircomb, ROT0, "Namco", "Air Combat (US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // There's code for a SCI, is it even possible to play multiplayer? -GAME( 1992, aircombj, aircomb, namcos21, aircomb, namcos21_state, init_aircomb, ROT0, "Namco", "Air Combat (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1993, cybsled, 0, namcos21, cybsled, namcos21_state, init_cybsled, ROT0, "Namco", "Cyber Sled (World)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) -GAME( 1993, cybsledj, cybsled, namcos21, cybsled, namcos21_state, init_cybsled, ROT0, "Namco", "Cyber Sled (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) diff --git a/src/mame/drivers/namcos21_c67.cpp b/src/mame/drivers/namcos21_c67.cpp new file mode 100644 index 00000000000..bfd109fea02 --- /dev/null +++ b/src/mame/drivers/namcos21_c67.cpp @@ -0,0 +1,1265 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino +/* + NOTES: + + Air Combat: + priority issues + +TODO: namcoic.c: in StarBlade, the sprite list is stored at a different location during startup tests. + What register controls this? + +TODO: Map lamps/vibration outputs as used by StarBlade (and possibly other titles). + These likely involve the MCU. + +--------------------------------------------------------------------------- + +DSP RAM is shared with the 68000 CPUs and master DSP. +The memory map below reflects DSP RAM as seen by the 68000 CPUs. + + 0x200000: ROM: + 0x200010: RAM: + 0x200020: PTR: + 0x200024: + 0x200028: + 0x200030: SMU: // "NO RESPONS" (DSP) + 0x200040: IDC: // "NO RESPONS" (DSP) + 0x200050: CPU: BOOTING..COMPLETE + 0x200060: DSP: + 0x200070: CRC: OK from cpu + 0x200080: CRC: from dsp + 0x200090: ID: + 0x2000a0: B-M: + 0x2000b0: P-M: + 0x2000c0: S-M: + 0x200100 status: 2=upload needed, 4=error (abort) + 0x200102 status + 0x200104 0x0002 + 0x200106 addr written by main cpu + 0x20010a point rom checksum (starblade expects 0xed53) + 0x20010c point rom checksum (starblade expects 0xd5df) + 0x20010e 1 : upload-code-to-dsp request trigger + 0x200110 status + 0x200112 status + 0x200114 master dsp code size + 0x200116 slave dsp code size + 0x200120 upload source1 addr hi + 0x200122 upload source1 addr lo + 0x200124 upload source2 addr hi + 0x200126 upload source2 addr lo + 0x200200 enable + 0x200202 status + 0x200206 work page select + 0x200208 0xa2c2 (air combat) + 0x208000..0x2080ff camera attributes for page#0 + 0x208200..0x208fff 3d object attribute display list for page#0 + 0x20c000..0x20c0ff camera attributes for page#1 + 0x20c200..0x20cfff 3d object attribute display list for page#1 + + Starblade Cybersled AirCombat22 Solvalou +[400]:= 00 0000 00 0000 00 0000 00 0000 +[402]:= 00 0011 00 0011 00 0011 00 0011 +[404]:= 00 0000 00 0000 00 0000 00 0000 +[406]:= 00 0000 00 0000 00 0000 00 0000 +[408]:= 10 1002 10 1000 10 1000 10 1000 +[40a]:= 02 0000 00 0000 00 0000 00 ffff +[40c]:= 00 1040 00 023a 00 1000 ff ffff +[40e]:= 00 0000 00 0000 00 0000 ff ffff +[410]:= 10 1034 02 0258 10 1000 ff ffff +[412]:= 40 0000 3a 0000 00 0000 ff ffff +[414]:= 00 1030 00 027a 00 1000 ff ffff +[416]:= 00 0000 00 0000 00 0000 ff ffff +[418]:= 10 1030 02 02a2 10 1000 ff ffff +[41a]:= 34 0000 58 0000 00 0000 ff ffff +[41c]:= 00 1030 00 02c2 00 1000 ff ffff +[41e]:= 00 0000 00 0000 00 0000 ff ffff +[420]:= 10 1030 02 02e6 10 1000 ff ffff + +--------------------------------------------------------------------------- + +Thanks to Aaron Giles for originally making sense of the Point ROM data. + +Point data in ROMS (signed 24 bit words) encodes the 3d primitives. + +The first part of the Point ROMs is an address table. + +Given an object index, this table provides an address into the second part of +the ROM. + +The second part of the ROM is a series of display lists. +This is a sequence of pointers to actual polygon data. There may be +more than one, and the list is terminated by $ffffff. + +The remainder of the ROM is a series of polygon data. The first word of each +entry is the length of the entry (in words, not counting the length word). + +The rest of the data in each entry is organized as follows: + +length (1 word) +quad index (1 word) - this increments with each entry +vertex count (1 word) - the number of vertices encoded +unknown value (1 word) - almost always 0; depth bias +vertex list (n x 3 words) +quad count (1 word) - the number of quads to draw +quad primitives (n x 5 words) - color code and four vertex indices + +----------------------------------------------------------------------- +Board 1 : DSP Board - 1st PCB. (Uppermost) +DSP : 1 x Master TMS320C25 (C67) 4 x Slave TMS320C25 (C67) each connected to a Namco Custom chip 342 +OSC: 40.000MHz +RAM: HM62832 x 2, M5M5189 x 4, ISSI IS61C68 x 16 +ROMS: TMS27C040 +Custom Chips: +4 x Namco Custom 327 (24 pin NDIP), each one located next to a chip 67. +4 x Namco Custom chip 342 (160 pin PQFP), there are 3 leds (red/green/yellow) connected to each 342 chip. (12 leds total) +2 x Namco Custom 197 (28 pin NDIP) +Namco Custom chip 317 IDC (180 pin PQFP) +Namco Custom chip 195 (160 pin PQFP) +----------------------------------------------------------------------- +Board 2 : Unknown Board - 2nd PCB (no roms) +OSC: 20.000MHz +RAM: HM62256 x 10, 84256 x 4, CY7C128 x 5, M5M5178 x 4 +OTHER Chips: +MB8422-90LP +L7A0565 316 (111) x 1 (100 PIN PQFP) +150 (64 PIN PQFP) +167 (128 PIN PQFP) +L7A0564 x 2 (100 PIN PQFP) +157 x 16 (24 PIN NDIP) +----------------------------------------------------------------------- +Board 3 : CPU Board - 3rd PCB (looks very similar to Namco System 2 CPU PCB) +CPU: MC68000P12 x 2 @ 12 MHz (16-bit) +Sound CPU: MC68B09EP (3 MHz) +Sound Chips: C140 24-channel PCM (Sound Effects), YM2151 (Music), YM3012 (?) +XTAL: 3.579545 MHz +OSC: 49.152 MHz +RAM: MB8464 x 2, MCM2018 x 2, HM65256 x 4, HM62256 x 2 + +Other Chips: +Sharp PC900 - Opto-isolator +Sharp PC910 - Opto-isolator +HN58C65P (EEPROM) +MB3771 +MB87077-SK x 2 (24 pin NDIP, located in sound section) +LB1760 (16 pin DIP, located next to SYS87B-2B) +CY7C132 (48 PIN DIP) + +Namco Custom: +148 x 2 (64 pin PQFP) +C68 (64 pin PQFP) +139 (64 pin PQFP) +137 (28 pin NDIP) +149 (28 pin NDIP, near C68) +----------------------------------------------------------------------- +Board 4 : 4th PCB (bottom-most) +OSC: 38.76922 MHz +There is a 6 wire plug joining this PCB with the CPU PCB. It appears to be video cable (RGB, Sync etc..) +Jumpers: +JP7 INTERLACE = SHORTED (Other setting is NON-INTERLACE) +JP8 68000 = SHORTED (Other setting is 68020) +Namco Custom Chips: +C355 (160 pin PQFP) +187 (120 pin PQFP) +138 (64 pin PQFP) +165 (28 pin NDIP) +----------------------------------------------------------------------- + +------------------- +Air Combat by NAMCO +------------------- +malcor + + +Location Device File ID Checksum +------------------------------------------------- +CPU68 1J 27C4001 MPR-L.AC1 9859 [ main program ] [ rev AC1 ] +CPU68 3J 27C4001 MPR-U.AC1 97F1 [ main program ] [ rev AC1 ] +CPU68 1J 27C4001 MPR-L.AC2 C778 [ main program ] [ rev AC2 ] +CPU68 3J 27C4001 MPR-U.AC2 6DD9 [ main program ] [ rev AC2 ] +CPU68 1C MB834000 EDATA1-L.AC1 7F77 [ data ] +CPU68 3C MB834000 EDATA1-U.AC1 FA2F [ data ] +CPU68 3A MB834000 EDATA-U.AC1 20F2 [ data ] +CPU68 1A MB834000 EDATA-L.AC1 9E8A [ data ] +CPU68 8J 27C010 SND0.AC1 71A8 [ sound prog ] +CPU68 12B MB834000 VOI0.AC1 08CF [ voice 0 ] +CPU68 12C MB834000 VOI1.AC1 925D [ voice 1 ] +CPU68 12D MB834000 VOI2.AC1 C498 [ voice 2 ] +CPU68 12E MB834000 VOI3.AC1 DE9F [ voice 3 ] +CPU68 4C 27C010 SPR-L.AC1 473B [ slave prog L ] [ rev AC1 ] +CPU68 6C 27C010 SPR-U.AC1 CA33 [ slave prog U ] [ rev AC1 ] +CPU68 4C 27C010 SPR-L.AC2 08CE [ slave prog L ] [ rev AC2 ] +CPU68 6C 27C010 SPR-U.AC2 A3F1 [ slave prog U ] [ rev AC2 ] +OBJ(B) 5S HN62344 OBJ0.AC1 CB72 [ object data ] +OBJ(B) 5X HN62344 OBJ1.AC1 85E2 [ object data ] +OBJ(B) 3S HN62344 OBJ2.AC1 89DC [ object data ] +OBJ(B) 3X HN62344 OBJ3.AC1 58FF [ object data ] +OBJ(B) 4S HN62344 OBJ4.AC1 46D6 [ object data ] +OBJ(B) 4X HN62344 OBJ5.AC1 7B91 [ object data ] +OBJ(B) 2S HN62344 OBJ6.AC1 5736 [ object data ] +OBJ(B) 2X HN62344 OBJ7.AC1 6D45 [ object data ] +OBJ(B) 17N PLHS18P8 3P0BJ3 4342 +OBJ(B) 17N PLHS18P8 3POBJ4 1143 +DSP 2N HN62344 AC1-POIL.L 8AAF [ DSP data ] +DSP 2K HN62344 AC1-POIL.L CF90 [ DSP data ] +DSP 2E HN62344 AC1-POIH 4D02 [ DSP data ] +DSP 17D GAL16V8A 3PDSP5 6C00 + +NOTE: CPU68 - CPU board 2252961002 (2252971002) + OBJ(B) - Object board 8623961803 (8623963803) + DSP - DSP board 8623961703 (8623963703) + PGN(C) - PGN board 2252961300 (8623963600) + + Namco System 21 Hardware + + ROMs that have the same locations are different revisions + of the same ROMs (AC1 or AC2). + +Jumper settings: + +Location Position set alt. setting +---------------------------------------- + +CPU68 PCB: + + JP2 /D-ST /VBL + JP3 + +***************************** + +Namco System 21 Video Hardware + +- sprite hardware is identical to Namco System NB1 +- there are no tilemaps +- 3d graphics are managed by DSP processors + + Palette: + 0x0000..0x1fff sprite palettes (0x10 sets of 0x100 colors) + + 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors) + (in starblade, some palette animation effects are performed here) + + 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors) + + 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors) + + The polygon-dedicated color sets within a bank typically increase in + intensity from very dark to full intensity. + + Probably the selected palette is determined by most significant bits of z-code. + This is not yet hooked up. + +*/ + +#include "emu.h" +#include "screen.h" +#include "emupal.h" +#include "speaker.h" +#include "cpu/m68000/m68000.h" +#include "cpu/m6805/m6805.h" +#include "cpu/m6809/m6809.h" +#include "machine/nvram.h" +#include "machine/namcoio_gearbox.h" +#include "machine/timer.h" +#include "machine/namco_c139.h" +#include "machine/namco_c148.h" +#include "machine/namco68.h" +#include "machine/namco_c67.h" +#include "machine/namcos21_dsp_c67.h" +#include "video/namco_c355spr.h" +#include "video/namcos21_3d.h" +#include "sound/c140.h" +#include "sound/ym2151.h" + +// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace +#define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \ + MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480) + +#define ENABLE_LOGGING 0 + +#define NAMCOS21_NUM_COLORS 0x8000 + +class namcos21_c67_state : public driver_device +{ +public: + namcos21_c67_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_slave(*this, "slave"), + m_c68(*this, "c68mcu"), + m_sci(*this, "sci"), + m_master_intc(*this, "master_intc"), + m_slave_intc(*this, "slave_intc"), + m_c140(*this, "c140"), + m_c355spr(*this, "c355spr"), + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_audiobank(*this, "audiobank"), + m_mpDualPortRAM(*this,"mpdualportram"), + m_namcos21_3d(*this, "namcos21_3d"), + m_namcos21_dsp_c67(*this, "namcos21dsp_c67") + { } + + void configure_c148_standard(machine_config &config); + void namcos21(machine_config &config); + void cybsled(machine_config &config); + void solvalou(machine_config &config); + void aircomb(machine_config &config); + void starblad(machine_config &config); + + void init_solvalou(); + +private: + required_device m_maincpu; + required_device m_audiocpu; + required_device m_slave; + required_device m_c68; + required_device m_sci; + required_device m_master_intc; + required_device m_slave_intc; + required_device m_c140; + required_device m_c355spr; + required_device m_palette; + required_device m_screen; + required_memory_bank m_audiobank; + required_shared_ptr m_mpDualPortRAM; + required_device m_namcos21_3d; + required_device m_namcos21_dsp_c67; + + uint16_t m_video_enable; + + DECLARE_READ16_MEMBER(namcos21_video_enable_r); + DECLARE_WRITE16_MEMBER(namcos21_video_enable_w); + + DECLARE_READ16_MEMBER(namcos2_68k_dualportram_word_r); + DECLARE_WRITE16_MEMBER(namcos2_68k_dualportram_word_w); + DECLARE_READ8_MEMBER(namcos2_dualportram_byte_r); + DECLARE_WRITE8_MEMBER(namcos2_dualportram_byte_w); + + DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w ); + DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r ); + + DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w ); + + DECLARE_WRITE8_MEMBER(sound_reset_w); + DECLARE_WRITE8_MEMBER(system_reset_w); + void reset_all_subcpus(int state); + + std::unique_ptr m_eeprom; + + TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); + + DECLARE_WRITE_LINE_MEMBER(yield_hack); + + DECLARE_MACHINE_START(namcos21); + DECLARE_MACHINE_RESET(namcos21); + + uint32_t screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void configure_c68_namcos21(machine_config &config); + + void common_map(address_map &map); + void master_map(address_map &map); + void slave_map(address_map &map); + + void sound_map(address_map &map); +}; + + +uint32_t namcos21_c67_state::screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + //uint8_t *videoram = m_gpu_videoram.get(); + int pivot = 3; + int pri; + bitmap.fill(0xff, cliprect ); + + m_c355spr->draw(screen, bitmap, cliprect, 2 ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); + + m_c355spr->draw(screen, bitmap, cliprect, 0 ); + m_c355spr->draw(screen, bitmap, cliprect, 1 ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); + + /* draw high priority 2d sprites */ + for( pri=pivot; pri<8; pri++ ) + { + m_c355spr->draw(screen, bitmap, cliprect, pri ); + } + return 0; +} + +READ16_MEMBER(namcos21_c67_state::namcos21_video_enable_r) +{ + return m_video_enable; +} + +WRITE16_MEMBER(namcos21_c67_state::namcos21_video_enable_w) +{ + COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ + if( m_video_enable!=0 && m_video_enable!=0x40 ) + { + logerror( "unexpected namcos21_video_enable_w=0x%x\n", m_video_enable ); + } +} + +/***********************************************************/ + +/* dual port ram memory handlers */ + +READ16_MEMBER(namcos21_c67_state::namcos2_68k_dualportram_word_r) +{ + return m_mpDualPortRAM[offset]; +} + +WRITE16_MEMBER(namcos21_c67_state::namcos2_68k_dualportram_word_w) +{ + if( ACCESSING_BITS_0_7 ) + { + m_mpDualPortRAM[offset] = data&0xff; + } +} + +READ8_MEMBER(namcos21_c67_state::namcos2_dualportram_byte_r) +{ + return m_mpDualPortRAM[offset]; +} + +WRITE8_MEMBER(namcos21_c67_state::namcos2_dualportram_byte_w) +{ + m_mpDualPortRAM[offset] = data; +} + +/******************************************************************************/ + +/*************************************************************/ +/* MASTER 68000 CPU Memory declarations */ +/*************************************************************/ + +void namcos21_c67_state::common_map(address_map &map) +{ + map(0x280000, 0x280001).nopw(); /* written once on startup */ + map(0x400000, 0x400001).w(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::pointram_control_w)); + map(0x440000, 0x440001).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::pointram_data_r), FUNC(namcos21_dsp_c67_device::pointram_data_w)); + map(0x440002, 0x47ffff).nopw(); /* (?) Air Combat */ + map(0x480000, 0x4807ff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::namcos21_depthcue_r), FUNC(namcos21_dsp_c67_device::namcos21_depthcue_w)); /* Air Combat */ + map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); + map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); + map(0x760000, 0x760001).rw(FUNC(namcos21_c67_state::namcos21_video_enable_r), FUNC(namcos21_c67_state::namcos21_video_enable_w)); + map(0x800000, 0x8fffff).rom().region("data", 0); + map(0x900000, 0x90ffff).ram().share("sharedram"); + map(0xa00000, 0xa00fff).rw(FUNC(namcos21_c67_state::namcos2_68k_dualportram_word_r), FUNC(namcos21_c67_state::namcos2_68k_dualportram_word_w)); + map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); + map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); + map(0xc00000, 0xcfffff).rom().mirror(0x100000).region("edata", 0); +} + +void namcos21_c67_state::master_map(address_map &map) +{ + common_map(map); + map(0x000000, 0x0fffff).rom(); + map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x180000, 0x183fff).rw(FUNC(namcos21_c67_state::namcos2_68k_eeprom_r), FUNC(namcos21_c67_state::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); + map(0x200000, 0x20ffff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_hack_w)); +} + +void namcos21_c67_state::slave_map(address_map &map) +{ + common_map(map); + map(0x000000, 0x07ffff).rom(); + map(0x100000, 0x13ffff).ram(); /* private work RAM */ + map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); + map(0x200000, 0x20ffff).rw(m_namcos21_dsp_c67, FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); +} + +/*************************************************************/ +/* SOUND 6809 CPU Memory declarations */ +/*************************************************************/ + +void namcos21_c67_state::sound_map(address_map &map) +{ + map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ + map(0x3000, 0x3003).nopw(); /* ? */ + map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); + map(0x5000, 0x6fff).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); + map(0x7000, 0x77ff).rw(FUNC(namcos21_c67_state::namcos2_dualportram_byte_r), FUNC(namcos21_c67_state::namcos2_dualportram_byte_w)).share("mpdualportram"); + map(0x7800, 0x7fff).rw(FUNC(namcos21_c67_state::namcos2_dualportram_byte_r), FUNC(namcos21_c67_state::namcos2_dualportram_byte_w)); /* mirror */ + map(0x8000, 0x9fff).ram(); + map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ + map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xc000, 0xc001).w(FUNC(namcos21_c67_state::namcos2_sound_bankselect_w)); + map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); +} + +/*************************************************************/ +/* I/O HD63705 MCU Memory declarations */ +/*************************************************************/ + +void namcos21_c67_state::configure_c68_namcos21(machine_config &config) +{ + NAMCOC68(config, m_c68, 8000000); + m_c68->in_pb_callback().set_ioport("MCUB"); + m_c68->in_pc_callback().set_ioport("MCUC"); + m_c68->in_ph_callback().set_ioport("MCUH"); + m_c68->in_pdsw_callback().set_ioport("DSW"); + m_c68->di0_in_cb().set_ioport("MCUDI0"); + m_c68->di1_in_cb().set_ioport("MCUDI1"); + m_c68->di2_in_cb().set_ioport("MCUDI2"); + m_c68->di3_in_cb().set_ioport("MCUDI3"); + m_c68->an0_in_cb().set_ioport("AN0"); + m_c68->an1_in_cb().set_ioport("AN1"); + m_c68->an2_in_cb().set_ioport("AN2"); + m_c68->an3_in_cb().set_ioport("AN3"); + m_c68->an4_in_cb().set_ioport("AN4"); + m_c68->an5_in_cb().set_ioport("AN5"); + m_c68->an6_in_cb().set_ioport("AN6"); + m_c68->an7_in_cb().set_ioport("AN7"); + m_c68->dp_in_callback().set(FUNC(namcos21_c67_state::namcos2_dualportram_byte_r)); + m_c68->dp_out_callback().set(FUNC(namcos21_c67_state::namcos2_dualportram_byte_w)); +} + +/*************************************************************/ +/* */ +/* NAMCO SYSTEM 21 INPUT PORTS */ +/* */ +/*************************************************************/ + +static INPUT_PORTS_START( s21default ) + PORT_START("MCUB") /* 63B05Z0 - PORT B */ + PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) + + PORT_START("MCUC") /* 63B05Z0 - PORT C & SCI */ + PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_0) PORT_TOGGLE // alt test mode switch + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) + + PORT_START("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) + PORT_START("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x60,0x9f) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) + PORT_START("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("MCUH") /* 63B05Z0 - PORT H */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("DSW") /* 63B05Z0 - $2000 DIP SW */ + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, "DSW3") + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, "DSW4") + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("MCUDI0") /* 63B05Z0 - $3000 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("MCUDI1") /* 63B05Z0 - $3001 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("MCUDI2") /* 63B05Z0 - $3002 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("MCUDI3") /* 63B05Z0 - $3003 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +// the default inc/dec analog keys have been chosen to map 'tank' style inputs found on Assault. +// this makes the game easier to use with the keyboard, providing a familiar left/right stick mapping +// ports are limited to 10/ef because otherwise, even when calibrated, the game will act as if the +// inputs wrap around when they hit the maximum, causing undesired movement +static INPUT_PORTS_START( cybsled ) + PORT_INCLUDE(s21default) + + PORT_MODIFY("AN0") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_I) PORT_CODE_INC(KEYCODE_K) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: vertical */ + PORT_MODIFY("AN1") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_E) PORT_CODE_INC(KEYCODE_D) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: vertical */ + PORT_MODIFY("AN2") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_J) PORT_CODE_INC(KEYCODE_L) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* right joystick: horizontal */ + PORT_MODIFY("AN3") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xef) /* using 0x00 / 0xff causes controls to malfunction */ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_INC(KEYCODE_F) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1) /* left joystick: horizontal */ + PORT_MODIFY("AN4") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN5") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN6") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN7") /* 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("MCUH") /* 63B05Z0 - PORT H */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Viewport Change Button") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Missile Button") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Gun Button") + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + +static INPUT_PORTS_START( starblad ) + PORT_INCLUDE(s21default) + + PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) + PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) +INPUT_PORTS_END + +static INPUT_PORTS_START( aircomb ) + PORT_INCLUDE(s21default) + + PORT_MODIFY("AN0") /* IN#2: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 0 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN1") /* IN#3: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 1 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_MODIFY("AN2") /* IN#4: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 2 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) + PORT_MODIFY("AN3") /* IN#5: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 3 */ + PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE + PORT_MODIFY("AN4") /* IN#6: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 4 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN5") /* IN#7: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 5 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN6") /* IN#8: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 6 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_MODIFY("AN7") /* IN#9: 63B05Z0 - 8 CHANNEL ANALOG - CHANNEL 7 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("DSW") /* 63B05Z0 - $2000 DIP SW */ + PORT_DIPNAME( 0x01, 0x01, "DSW1") // not test mode on this game + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_MODIFY("MCUH") /* IN#10: 63B05Z0 - PORT H */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) ///??? + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // prev color + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ???next color + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) +INPUT_PORTS_END + + +static const gfx_layout tile_layout = +{ + 16,16, + RGN_FRAC(1,4), /* number of tiles */ + 8, /* bits per pixel */ + { /* plane offsets */ + 0,1,2,3,4,5,6,7 + }, + { /* x offsets */ + 0*8,RGN_FRAC(1,4)+0*8,RGN_FRAC(2,4)+0*8,RGN_FRAC(3,4)+0*8, + 1*8,RGN_FRAC(1,4)+1*8,RGN_FRAC(2,4)+1*8,RGN_FRAC(3,4)+1*8, + 2*8,RGN_FRAC(1,4)+2*8,RGN_FRAC(2,4)+2*8,RGN_FRAC(3,4)+2*8, + 3*8,RGN_FRAC(1,4)+3*8,RGN_FRAC(2,4)+3*8,RGN_FRAC(3,4)+3*8 + }, + { /* y offsets */ + 0*32,1*32,2*32,3*32, + 4*32,5*32,6*32,7*32, + 8*32,9*32,10*32,11*32, + 12*32,13*32,14*32,15*32 + }, + 8*64 /* sprite offset */ +}; + +static GFXDECODE_START( gfx_namcos21 ) + GFXDECODE_ENTRY( "gfx1", 0x000000, tile_layout, 0x1000, 0x10 ) +GFXDECODE_END + + +WRITE8_MEMBER( namcos21_c67_state::namcos2_sound_bankselect_w ) +{ + m_audiobank->set_entry(data>>4); +} + + +WRITE8_MEMBER(namcos21_c67_state::sound_reset_w) +{ + if (data & 0x01) + { + /* Resume execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_maincpu->yield(); + } + else + { + /* Suspend execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + } + + if (data & 0x04) + { + m_namcos21_dsp_c67->reset_kickstart(); + } +} + +WRITE8_MEMBER(namcos21_c67_state::system_reset_w) +{ + reset_all_subcpus(data & 1 ? CLEAR_LINE : ASSERT_LINE); + + if (data & 0x01) + m_maincpu->yield(); +} + +void namcos21_c67_state::reset_all_subcpus(int state) +{ + m_slave->set_input_line(INPUT_LINE_RESET, state); + m_c68->ext_reset(state); + m_namcos21_dsp_c67->reset_dsps(state); +} + +WRITE8_MEMBER(namcos21_c67_state::namcos2_68k_eeprom_w) +{ + m_eeprom[offset] = data; +} + +READ8_MEMBER(namcos21_c67_state::namcos2_68k_eeprom_r) +{ + return m_eeprom[offset]; +} + +MACHINE_RESET_MEMBER(namcos21_c67_state, namcos21) +{ + address_space &audio_space = m_audiocpu->space(AS_PROGRAM); + + /* Initialise the bank select in the sound CPU */ + namcos2_sound_bankselect_w(audio_space, 0, 0); /* Page in bank 0 */ + + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); + + /* Place CPU2 & CPU3 into the reset condition */ + reset_all_subcpus(ASSERT_LINE); +} + + + +MACHINE_START_MEMBER(namcos21_c67_state,namcos21) +{ + m_eeprom = std::make_unique(0x2000); + subdevice("nvram")->set_base(m_eeprom.get(), 0x2000); + + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); + + m_audiobank->set_entry(0); + +} + +TIMER_DEVICE_CALLBACK_MEMBER(namcos21_c67_state::screen_scanline) +{ + int scanline = param; +// int cur_posirq = get_posirq_scanline()*2; + + if(scanline == 240*2) + { + m_master_intc->vblank_irq_trigger(); + m_slave_intc->vblank_irq_trigger(); + m_c68->ext_interrupt(ASSERT_LINE); + } +} + +void namcos21_c67_state::configure_c148_standard(machine_config &config) +{ + NAMCO_C148(config, m_master_intc, 0, m_maincpu, true); + m_master_intc->link_c148_device(m_slave_intc); + m_master_intc->out_ext1_callback().set(FUNC(namcos21_c67_state::sound_reset_w)); + m_master_intc->out_ext2_callback().set(FUNC(namcos21_c67_state::system_reset_w)); + + NAMCO_C148(config, m_slave_intc, 0, m_slave, false); + m_slave_intc->link_c148_device(m_master_intc); +} + +// starblad, solvalou, aircomb, cybsled base state +MACHINE_CONFIG_START(namcos21_c67_state::namcos21) + MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ + MCFG_DEVICE_PROGRAM_MAP(master_map) + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_c67_state, screen_scanline, "screen", 0, 1) + + MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ + MCFG_DEVICE_PROGRAM_MAP(slave_map) + + MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ + MCFG_DEVICE_PROGRAM_MAP(sound_map) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_c67_state, irq0_line_hold, 2*60) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namcos21_c67_state, irq1_line_hold, 120) + + configure_c68_namcos21(config); + + NAMCOS21_DSP_C67(config, m_namcos21_dsp_c67, 0); + m_namcos21_dsp_c67->set_renderer_tag("namcos21_3d"); + + MCFG_QUANTUM_TIME(attotime::from_hz(12000)) + + MCFG_MACHINE_START_OVERRIDE(namcos21_c67_state,namcos21) + MCFG_MACHINE_RESET_OVERRIDE(namcos21_c67_state,namcos21) + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); + + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_RAW_PARAMS_NAMCO480I + MCFG_SCREEN_UPDATE_DRIVER(namcos21_c67_state, screen_update_namcos21) + MCFG_SCREEN_PALETTE("palette") + + NAMCOS21_3D(config, m_namcos21_3d, 0); + m_namcos21_3d->set_zz_shift_mult(11, 0x200); + m_namcos21_3d->set_depth_reverse(false); + m_namcos21_3d->set_framebuffer_size(496,480); + + configure_c148_standard(config); + NAMCO_C139(config, m_sci, 0); + + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) + MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCO_C355SPR(config, m_c355spr, 0); + m_c355spr->set_palette_tag("palette"); + m_c355spr->set_gfxdecode_tag("gfxdecode"); + m_c355spr->set_is_namcofl(false); + m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr->set_palxor(0xf); // reverse mapping + m_c355spr->set_gfxregion(0); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + C140(config, m_c140, 8000000/374); + m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); + m_c140->add_route(0, "lspeaker", 0.50); + m_c140->add_route(1, "rspeaker", 0.50); + + MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) + MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) + MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) +MACHINE_CONFIG_END + +MACHINE_CONFIG_START(namcos21_c67_state::aircomb) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_AIRCOMBAT); +MACHINE_CONFIG_END + +MACHINE_CONFIG_START(namcos21_c67_state::starblad) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_STARBLADE); +MACHINE_CONFIG_END + +MACHINE_CONFIG_START(namcos21_c67_state::cybsled) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_CYBERSLED); +MACHINE_CONFIG_END + +WRITE_LINE_MEMBER(namcos21_c67_state::yield_hack) +{ + m_maincpu->yield(); +} + +MACHINE_CONFIG_START(namcos21_c67_state::solvalou) + namcos21(config); + m_namcos21_dsp_c67->set_gametype(namcos21_dsp_c67_device::NAMCOS21_SOLVALOU); + m_namcos21_dsp_c67->yield_hack_callback().set(FUNC(namcos21_c67_state::yield_hack)); // VCK function +MACHINE_CONFIG_END + + +ROM_START( starblad ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "st2_mpu.mpru", 0x000000, 0x80000, CRC(35bc9e4a) SHA1(03401fb846c1b2aee775071a554654e49fe5c47c) ) + ROM_LOAD16_BYTE( "st2_mpl.mprl", 0x000001, 0x80000, CRC(193e641b) SHA1(fed803167c5b0bba5b8381c26c909b7380d57efd) ) + + ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) + ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ + ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) + ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) + ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) + ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) + ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) + + ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) + ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) + ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) + ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) + ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) + ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) + ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) + ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) + ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) + + ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) + // starblad needs default NVRAM to be all 0 +ROM_END + +ROM_START( starbladj ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "st1_mpu.mpru", 0x000000, 0x80000, CRC(483a311c) SHA1(dd9416b8d4b0f8b361630e312eac71c113064eae) ) + ROM_LOAD16_BYTE( "st1_mpl.mprl", 0x000001, 0x80000, CRC(0a4dd661) SHA1(fc2b71a255a8613693c4d1c79ddd57a6d396165a) ) + + ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "st1-sp-u.bin", 0x000000, 0x40000, CRC(9f9a55db) SHA1(72bf5d6908cc57cc490fa2292b4993d796b2974d) ) + ROM_LOAD16_BYTE( "st1-sp-l.bin", 0x000001, 0x40000, CRC(acbe39c7) SHA1(ca48b7ea619b1caaf590eed33001826ce7ef36d8) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "st1-snd0.bin", 0x000000, 0x020000, CRC(c0e934a3) SHA1(678ed6705c6f494d7ecb801a4ef1b123b80979a5) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "gfx1", 0 ) /* sprites */ + ROM_LOAD( "st1-obj0.bin", 0x000000, 0x80000, CRC(5d42c71e) SHA1(f1aa2bb31bbbcdcac8e94334b1c78238cac1a0e7) ) + ROM_LOAD( "st1-obj1.bin", 0x080000, 0x80000, CRC(c98011ad) SHA1(bc34c21428e0ef5887051c0eb0fdef5397823a82) ) + ROM_LOAD( "st1-obj2.bin", 0x100000, 0x80000, CRC(6cf5b608) SHA1(c8537fbe97677c4c8a365b1cf86c4645db7a7d6b) ) + ROM_LOAD( "st1-obj3.bin", 0x180000, 0x80000, CRC(cdc195bb) SHA1(91443917a6982c286b6f15381d441d061aefb138) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "st1-data-u.bin", 0x000000, 0x20000, CRC(2433e911) SHA1(95f5f00d3bacda4996e055a443311fb9f9a5fe2f) ) + ROM_LOAD16_BYTE( "st1-data-l.bin", 0x000001, 0x20000, CRC(4a2cc252) SHA1(d9da9992bac878f8a1f5e84cc3c6d457b4705e8f) ) + + ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "st1-pt0-h.bin", 0x000001, 0x80000, CRC(84eb355f) SHA1(89a248b8be2e0afcee29ba4c4c9cca65d5fb246a) ) + ROM_LOAD32_BYTE( "st1-pt0-u.bin", 0x000002, 0x80000, CRC(1956cd0a) SHA1(7d21b3a59f742694de472c545a1f30c3d92e3390) ) + ROM_LOAD32_BYTE( "st1-pt0-l.bin", 0x000003, 0x80000, CRC(ff577049) SHA1(1e1595174094e88d5788753d05ce296c1f7eca75) ) + ROM_LOAD32_BYTE( "st1-pt1-h.bin", 0x200001, 0x80000, CRC(96b1bd7d) SHA1(55da7896dda2aa4c35501a55c8605a065b02aa17) ) + ROM_LOAD32_BYTE( "st1-pt1-u.bin", 0x200002, 0x80000, CRC(ecf21047) SHA1(ddb13f5a2e7d192f0662fa420b49f89e1e991e66) ) + ROM_LOAD32_BYTE( "st1-pt1-l.bin", 0x200003, 0x80000, CRC(01cb0407) SHA1(4b58860bbc353de8b4b8e83d12b919d9386846e8) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("st1-voi0.bin", 0x000000, 0x80000,CRC(5b3d43a9) SHA1(cdc04f19dc91dca9fa88ba0c2fca72aa195a3694) ) + ROM_LOAD("st1-voi1.bin", 0x080000, 0x80000,CRC(413e6181) SHA1(e827ec11f5755606affd2635718512aeac9354da) ) + ROM_LOAD("st1-voi2.bin", 0x100000, 0x80000,CRC(067d0720) SHA1(a853b2d43027a46c5e707fc677afdaae00f450c7) ) + ROM_LOAD("st1-voi3.bin", 0x180000, 0x80000,CRC(8b5aa45f) SHA1(e1214e639200758ad2045bde0368a2d500c1b84a) ) + + ROM_REGION( 0x2000, "nvram", ROMREGION_ERASE00) + // starblad needs default NVRAM to be all 0 +ROM_END + +ROM_START( solvalou ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "sv1-mp-u.bin", 0x000000, 0x20000, CRC(b6f92762) SHA1(d177328b3da2ab0580e101478142bc8c373d6140) ) + ROM_LOAD16_BYTE( "sv1-mp-l.bin", 0x000001, 0x20000, CRC(28c54c42) SHA1(32fcca2eb4bb8ba8c2587b03d3cf59f072f7fac5) ) + + ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "sv1-sp-u.bin", 0x000000, 0x20000, CRC(ebd4bf82) SHA1(67946360d680a675abcb3c131bac0502b2455573) ) + ROM_LOAD16_BYTE( "sv1-sp-l.bin", 0x000001, 0x20000, CRC(7acab679) SHA1(764297c9601be99dbbffb75bbc6fe4a40ea38529) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "sv1-snd0.bin", 0x000000, 0x020000, CRC(5e007864) SHA1(94da2d51544c6127056beaa251353038646da15f) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "sv1-obj0.bin", 0x000000, 0x80000, CRC(773798bb) SHA1(51ab76c95030bab834f1a74ae677b2f0afc18c52) ) + ROM_LOAD( "sv1-obj4.bin", 0x080000, 0x80000, CRC(33a008a7) SHA1(4959a0ac24ad64f1367e2d8d63d39a0273c60f3e) ) + ROM_LOAD( "sv1-obj1.bin", 0x100000, 0x80000, CRC(a36d9e79) SHA1(928d9995e97ee7509e23e6cc64f5e7bfb5c02d42) ) + ROM_LOAD( "sv1-obj5.bin", 0x180000, 0x80000, CRC(31551245) SHA1(385452ea4830c466263ad5241313ac850dfef756) ) + ROM_LOAD( "sv1-obj2.bin", 0x200000, 0x80000, CRC(c8672b8a) SHA1(8da037b27d2c2b178aab202781f162371458f788) ) + ROM_LOAD( "sv1-obj6.bin", 0x280000, 0x80000, CRC(fe319530) SHA1(8f7e46c8f0b86c7515f6d763b795ce07d11c77bc) ) + ROM_LOAD( "sv1-obj3.bin", 0x300000, 0x80000, CRC(293ef1c5) SHA1(f677883bfec16bbaeb0a01ac565d0e6cac679174) ) + ROM_LOAD( "sv1-obj7.bin", 0x380000, 0x80000, CRC(95ed6dcb) SHA1(931706ce3fea630823ce0c79febec5eec0cc623d) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "sv1-data-u.bin", 0x000000, 0x80000, CRC(2e561996) SHA1(982158481e5649f21d5c2816fdc80cb725ed1419) ) + ROM_LOAD16_BYTE( "sv1-data-l.bin", 0x000001, 0x80000, CRC(495fb8dd) SHA1(813d1da4109652008d72b3bdb03032efc5c0c2d5) ) + + ROM_REGION16_BE( 0x100000, "edata", ROMREGION_ERASEFF ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "sv1-pt0-h.bin", 0x000001, 0x80000, CRC(3be21115) SHA1(c9f30353c1216f64199f87cd34e787efd728e739) ) /* most significant */ + ROM_LOAD32_BYTE( "sv1-pt0-u.bin", 0x000002, 0x80000, CRC(4aacfc42) SHA1(f0e179e057183b41744ca429764f44306f0ce9bf) ) + ROM_LOAD32_BYTE( "sv1-pt0-l.bin", 0x000003, 0x80000, CRC(6a4dddff) SHA1(9ed182d21d328c6a684ee6658a9dfcf3f3dd8646) ) /* least significant */ + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("sv1-voi0.bin", 0x000000, 0x80000,CRC(7f61bbcf) SHA1(b3b7e66e24d9cb16ebd139237c1e51f5d60c1585) ) + ROM_LOAD("sv1-voi1.bin", 0x080000, 0x80000,CRC(c732e66c) SHA1(14e75dd9bea4055f85eb2bcbf69cf6695a3f7ec4) ) + ROM_LOAD("sv1-voi2.bin", 0x100000, 0x80000,CRC(51076298) SHA1(ec52c9ae3029118f3ea3732948d6de28f5fba561) ) + ROM_LOAD("sv1-voi3.bin", 0x180000, 0x80000,CRC(33085ff3) SHA1(0a30b91618c250a5e7bd896a8ceeb3d16da178a9) ) +ROM_END + + +ROM_START( aircomb ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "ac2-mpr-u.3j", 0x000000, 0x80000, CRC(a7133f85) SHA1(9f1c99dd503f1fc81096170fd272e33ae8a7de2f) ) + ROM_LOAD16_BYTE( "ac2-mpr-l.1j", 0x000001, 0x80000, CRC(520a52e6) SHA1(74306e02abfe08aa1afbf325b74dbc0840c3ad3a) ) + + ROM_REGION( 0x80000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "ac2-spr-u.6c", 0x000000, 0x20000, CRC(42aca956) SHA1(10ea2400bb4d5b2d805e2de43ca0e0f54597f660) ) + ROM_LOAD16_BYTE( "ac2-spr-l.4c", 0x000001, 0x20000, CRC(3e15fa19) SHA1(65dbb33ab6b3c06c793613348ebb7b110b8bba0d) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "ac2-obj0.5s", 0x000000, 0x80000, CRC(8327ff22) SHA1(16f6022dedb7a74590898bc8ed3e8a97993c4635) ) + ROM_LOAD( "ac2-obj4.4s", 0x080000, 0x80000, CRC(e433e344) SHA1(98ade550cf066fcb5c09fa905f441a1464d4d625) ) + ROM_LOAD( "ac2-obj1.5x", 0x100000, 0x80000, CRC(43af566d) SHA1(99f0d9f005e28040f5cc10de2198893946a31d09) ) + ROM_LOAD( "ac2-obj5.4x", 0x180000, 0x80000, CRC(ecb19199) SHA1(8e0aa1bc1141c4b09576ab08970d0c7629560643) ) + ROM_LOAD( "ac2-obj2.3s", 0x200000, 0x80000, CRC(dafbf489) SHA1(c53ccb3e1b4a6a660bd28c8abe52ccc3f85d111f) ) + ROM_LOAD( "ac2-obj6.2s", 0x280000, 0x80000, CRC(24cc3f36) SHA1(e50af176eb3034c9cab7613ca614f5cc2c62f95e) ) + ROM_LOAD( "ac2-obj3.3x", 0x300000, 0x80000, CRC(bd555a1d) SHA1(96e432b30da6f5f7ccb768c516b1f7186bc0d4c9) ) + ROM_LOAD( "ac2-obj7.2x", 0x380000, 0x80000, CRC(d561fbe3) SHA1(a23976e10bddf74d4a6b292f044dfd0affbab101) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) /* collision */ + ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) + ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) + ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ + ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) + ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) + ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) + ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) + ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) + + ROM_REGION( 0x0600, "plds", 0 ) + ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) + ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) + ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "aircomb.nv", 0x0000, 0x2000, CRC(a97ea3e0) SHA1(95684bb7369c1cb1e2fa53c743d4f94b0080c6f5) ) +ROM_END + +ROM_START( aircombj ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "ac1-mpr-u.3j", 0x000000, 0x80000, CRC(a4dec813) SHA1(2ee8b3492d30db4c841f695151880925a5e205e0) ) + ROM_LOAD16_BYTE( "ac1-mpr-l.1j", 0x000001, 0x80000, CRC(8577b6a2) SHA1(32194e392fbd051754be88eb8c90688c65c65d85) ) + + ROM_REGION( 0x080000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "ac1-spr-u.6c", 0x000000, 0x20000, CRC(5810e219) SHA1(c312ffd8324670897871b12d521779570dc0f580) ) + ROM_LOAD16_BYTE( "ac1-spr-l.4c", 0x000001, 0x20000, CRC(175a7d6c) SHA1(9e31dde6646cd9b6dcdbdb3f2326177508559e56) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "ac1-snd0.8j", 0x000000, 0x020000, CRC(5c1fb84b) SHA1(20e4d81289dbe58ffcfc947251a6ff1cc1e36436) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "ac1-obj0.5s", 0x000000, 0x80000, CRC(d2310c6a) SHA1(9bb8fdfc2c232574777248f4959975f9a20e3105) ) + ROM_LOAD( "ac1-obj4.4s", 0x080000, 0x80000, CRC(0c93b478) SHA1(a92ffbcf04b64e0eee5bcf37008e247700641b25) ) + ROM_LOAD( "ac1-obj1.5x", 0x100000, 0x80000, CRC(f5783a77) SHA1(0be1815ceb4ce4fa7ab75ba588e090f20ee0cac9) ) + ROM_LOAD( "ac1-obj5.4x", 0x180000, 0x80000, CRC(476aed15) SHA1(0e53fdf02e8ffe7852a1fa8bd2f64d0e58f3dc09) ) + ROM_LOAD( "ac1-obj2.3s", 0x200000, 0x80000, CRC(01343d5c) SHA1(64171fed1d1f8682b3d70d3233ea017719f4cc63) ) + ROM_LOAD( "ac1-obj6.2s", 0x280000, 0x80000, CRC(c67607b1) SHA1(df64ea7920cf64271fe742d3d0a57f842ee61e8d) ) + ROM_LOAD( "ac1-obj3.3x", 0x300000, 0x80000, CRC(7717f52e) SHA1(be1df3f4d0fdcaa5d3c81a724e5eb9d14136c6f5) ) + ROM_LOAD( "ac1-obj7.2x", 0x380000, 0x80000, CRC(cfa9fe5f) SHA1(0da25663b89d653c87ed32d15f7c82f3035702ab) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "ac1-data-u.3a", 0x000000, 0x80000, CRC(82320c71) SHA1(2be98d46853febb46e1cc728af2735c0e00ce303) ) + ROM_LOAD16_BYTE( "ac1-data-l.1a", 0x000001, 0x80000, CRC(fd7947d3) SHA1(2696eeae37de6d256e626cc3f3cea7b0f6eff60e) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "ac1-edata1-u.3c", 0x000000, 0x80000, CRC(a9547509) SHA1(1bc663cec03b60ad968896bbc2546f02efda135e) ) + ROM_LOAD16_BYTE( "ac1-edata1-l.1c", 0x000001, 0x80000, CRC(a87087dd) SHA1(cd9b83a8f07886ab44e4ded68002b44338777e8c) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "ac1-poi-h.2f", 0x000001, 0x80000, CRC(573bbc3b) SHA1(371be12b915db6872049f18980c1b55544cfc445) ) /* most significant */ + ROM_LOAD32_BYTE( "ac1-poi-lu.2k", 0x000002, 0x80000, CRC(d99084b9) SHA1(c604d60a2162af7610e5ff7c1aa4195f7df82efe) ) + ROM_LOAD32_BYTE( "ac1-poi-ll.2n", 0x000003, 0x80000, CRC(abb32307) SHA1(8e936ba99479215dd33a951d81ec2b04020dfd62) ) /* least significant */ + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("ac1-voi0.12b", 0x000000, 0x80000,CRC(f427b119) SHA1(bd45bbe41c8be26d6c997fcdc226d080b416a2cf) ) + ROM_LOAD("ac1-voi1.12c", 0x080000, 0x80000,CRC(c9490667) SHA1(4b6fbe635c32469870a8e6f82742be6a9d4918c9) ) + ROM_LOAD("ac1-voi2.12d", 0x100000, 0x80000,CRC(1fcb51ba) SHA1(80fc815e5fad76d20c3795ab1d89b57d9abc3efd) ) + ROM_LOAD("ac1-voi3.12e", 0x180000, 0x80000,CRC(cd202e06) SHA1(72a18f5ba402caefef14b8d1304f337eaaa3eb1d) ) + + ROM_REGION( 0x0600, "plds", 0 ) + ROM_LOAD( "gal16v8a-3pdsp5.17d", 0x0000, 0x0117, CRC(799c1f26) SHA1(d28ed1b9fa78180c5a0b01a7198a2870137c7349) ) + ROM_LOAD( "plhs18p8-3pobj3.17n", 0x0200, 0x0149, CRC(9625f469) SHA1(29158a3d37485fb0714d0a60bcd07abd26a3f56e) ) + ROM_LOAD( "plhs18p8-3pobj4.17n", 0x0400, 0x0149, CRC(1b7c90c1) SHA1(ae65aab7a191cdf1af488e144af22b9d8669c903) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "aircombj.nv", 0x0000, 0x2000, CRC(56c71c83) SHA1(83dfcf4e3232f78e3807e9d3e862aa5446444165) ) +ROM_END + +ROM_START( cybsled ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "cy2-mpr-u.3j", 0x000000, 0x80000, CRC(b35a72bc) SHA1(d9bc5b8f0bc30510fca8fc57eeb67e5ca0e4c67f) ) + ROM_LOAD16_BYTE( "cy2-mpr-l.1j", 0x000001, 0x80000, CRC(c4a25919) SHA1(52f6947102001376e37730ace16283141b13fee7) ) + + ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "cy2-spr-u.6c", 0x000000, 0x80000, CRC(575a422d) SHA1(cad97742da1e2baf47ac110fadef5544b3a30cc7) ) + ROM_LOAD16_BYTE( "cy2-spr-l.4c", 0x000001, 0x80000, CRC(4066291a) SHA1(6ebbc11a68f66ec1e6d2e6ee857e8c599691e289) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) + ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) + ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) + ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) + ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) + ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) + ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) + ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) + ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) + ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ + ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) + ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ + ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) + ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) + ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) + ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) + ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) + ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "cybsled.nv", 0x0000, 0x2000, CRC(aa18bf9e) SHA1(3712d4d20e5f5f1c920e3f1f6a00101e874662d0) ) +ROM_END + +ROM_START( cybsleda ) + ROM_REGION( 0x100000, "maincpu", 0 ) /* Master */ + ROM_LOAD16_BYTE( "cy1-mpr-u.3j", 0x000000, 0x80000, CRC(cc5a2e83) SHA1(b794051b2c351e9ca43351603845e4e563f6740f) ) + ROM_LOAD16_BYTE( "cy1-mpr-l.1j", 0x000001, 0x80000, CRC(f7ee8b48) SHA1(6d36eb3dba9cf7f5f5e1a26c156e77a2dad3f257) ) + + ROM_REGION( 0x100000, "slave", 0 ) /* Slave */ + ROM_LOAD16_BYTE( "cy1-spr-u.6c", 0x000000, 0x80000, CRC(28dd707b) SHA1(11297ceae4fe78d170785a5cf9ad77833bbe7fff) ) + ROM_LOAD16_BYTE( "cy1-spr-l.4c", 0x000001, 0x80000, CRC(437029de) SHA1(3d275a2b0ce6909e77e657c371bd22597ea9d398) ) + + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound */ + ROM_LOAD( "cy1-snd0.8j", 0x000000, 0x020000, CRC(3dddf83b) SHA1(e16119cbef176b6f8f8ace773fcbc201e987823f) ) + + ROM_REGION( 0x8000, "c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x400000, "gfx1", 0 ) + ROM_LOAD( "cy1-obj0.5s", 0x000000, 0x80000, CRC(5ae542d5) SHA1(99b1a3ed476da4a97cb864538909d7b831f0fd3b) ) + ROM_LOAD( "cy1-obj4.4s", 0x080000, 0x80000, CRC(57904076) SHA1(b1dc0d99543bc4b9584b37ffc12c6ebc59e30e3b) ) + ROM_LOAD( "cy1-obj1.5x", 0x100000, 0x80000, CRC(4aae3eff) SHA1(c80240bd2f4228a0261a14adb6b10560b31b5aa0) ) + ROM_LOAD( "cy1-obj5.4x", 0x180000, 0x80000, CRC(0e11ca47) SHA1(076a9a4cfddbee2d8aaa06110333090d8fdbefeb) ) + ROM_LOAD( "cy1-obj2.3s", 0x200000, 0x80000, CRC(d64ec4c3) SHA1(0bed1cafc21ed8cef3850fb81e30076977086eb0) ) + ROM_LOAD( "cy1-obj6.2s", 0x280000, 0x80000, CRC(7748b485) SHA1(adb4da419a6cdbefd0fef182d866a3479be379af) ) + ROM_LOAD( "cy1-obj3.3x", 0x300000, 0x80000, CRC(3d1f7168) SHA1(392dddcc79fe61dcc6514a91ac27b5e36825d8b7) ) + ROM_LOAD( "cy1-obj7.2x", 0x380000, 0x80000, CRC(b6eb6ad2) SHA1(85a660c5e44012491be7d4e783cce6ba12c135cb) ) + + ROM_REGION16_BE( 0x100000, "data", 0 ) + ROM_LOAD16_BYTE( "cy1-data-u.3a", 0x000000, 0x80000, CRC(570da15d) SHA1(9ebe756f10756c079a92fb522332e9e52ff715c3) ) + ROM_LOAD16_BYTE( "cy1-data-l.1a", 0x000001, 0x80000, CRC(9cf96f9e) SHA1(91783f48b93e03c778c6641ca8fb419c13b0d3c5) ) + + ROM_REGION16_BE( 0x100000, "edata", 0 ) + ROM_LOAD16_BYTE( "cy1-edata0-u.3b", 0x000000, 0x80000, CRC(77452533) SHA1(48fc199bcc1beb23c714eebd9b09b153c980170b) ) + ROM_LOAD16_BYTE( "cy1-edata0-l.1b", 0x000001, 0x80000, CRC(e812e290) SHA1(719e0a026ae8ef63d0d0269b67669ea9b4d950dd) ) + + ROM_REGION32_BE( 0x400000, "namcos21dsp_c67:point24", ROMREGION_ERASE00) /* 24bit signed point data */ + ROM_LOAD32_BYTE( "cy1-poi-h1.2f", 0x000001, 0x80000, CRC(eaf8bac3) SHA1(7a2caf6672af158b4a23ce4626342d1f17d1a4e4) ) /* most significant */ + ROM_LOAD32_BYTE( "cy1-poi-lu1.2k", 0x000002, 0x80000, CRC(c544a8dc) SHA1(4cce5f2ab3519b4aa7edbdd15b2d79a7fdcade3c) ) + ROM_LOAD32_BYTE( "cy1-poi-ll1.2n", 0x000003, 0x80000, CRC(30acb99b) SHA1(a28dcb3e5405f166644f6353a903c1143ee268f1) ) /* least significant */ + ROM_LOAD32_BYTE( "cy1-poi-h2.2j", 0x200001, 0x80000, CRC(4079f342) SHA1(fa36aed1abbda54a42f29b183007474580870319) ) + ROM_LOAD32_BYTE( "cy1-poi-lu2.2l", 0x200002, 0x80000, CRC(61d816d4) SHA1(7991957b910d32530151abc7f469fcf1de62d8f3) ) + ROM_LOAD32_BYTE( "cy1-poi-ll2.2p", 0x200003, 0x80000, CRC(faf09158) SHA1(b56ebed6012362b1d599c396a43e90a1e4d9dc38) ) + + ROM_REGION( 0x200000, "c140", 0 ) /* sound samples */ + ROM_LOAD("cy1-voi0.12b", 0x000000, 0x80000,CRC(99d7ce46) SHA1(b75f4055c3ce847daabfacda22df14e3f80c4fb9) ) + ROM_LOAD("cy1-voi1.12c", 0x080000, 0x80000,CRC(2b335f06) SHA1(2b2cd407c34388b56496f84a414daa153780b098) ) + ROM_LOAD("cy1-voi2.12d", 0x100000, 0x80000,CRC(10cd15f0) SHA1(9b721654ed97a13287373c1b2854ac9aeddc271f) ) + ROM_LOAD("cy1-voi3.12e", 0x180000, 0x80000,CRC(c902b4a4) SHA1(816357ec1a02a7ebf817ac1182e9c50ce5ca71f6) ) + + ROM_REGION( 0x2000, "nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "cybsleda.nv", 0x0000, 0x2000, CRC(a73bb03e) SHA1(e074bfeae14178c867070e06f6690ed13115f5fa) ) +ROM_END + +void namcos21_c67_state::init_solvalou() +{ + uint16_t *mem = (uint16_t *)memregion("maincpu")->base(); + mem[0x20ce4/2+1] = 0x0000; // $200128 + mem[0x20cf4/2+0] = 0x4e71; // 2nd ptr_booting + mem[0x20cf4/2+1] = 0x4e71; + mem[0x20cf4/2+2] = 0x4e71; +} + +/* YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS */ + +// uses 5x TMS320C25 (C67, has internal ROM - dumped) +GAME( 1991, starblad, 0, starblad, starblad, namcos21_c67_state, empty_init, ROT0, "Namco", "Starblade (ST2, World)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1991, starbladj, starblad, starblad, starblad, namcos21_c67_state, empty_init, ROT0, "Namco", "Starblade (ST1, Japan)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1991, solvalou, 0, solvalou, s21default, namcos21_c67_state, init_solvalou, ROT0, "Namco", "Solvalou (SV1, Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAME( 1992, aircomb, 0, aircomb, aircomb, namcos21_c67_state, empty_init, ROT0, "Namco", "Air Combat (AC2, US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // There's code for a SCI, is it even possible to play multiplayer? +GAME( 1992, aircombj, aircomb, aircomb, aircomb, namcos21_c67_state, empty_init, ROT0, "Namco", "Air Combat (AC1, Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1993, cybsled, 0, cybsled, cybsled, namcos21_c67_state, empty_init, ROT0, "Namco", "Cyber Sled (CY2, World)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) +GAME( 1993, cybsleda, cybsled, cybsled, cybsled, namcos21_c67_state, empty_init, ROT0, "Namco", "Cyber Sled (CY1, World?)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN | MACHINE_NOT_WORKING ) // usually an 'xx1' set would be Japan, but this shows neither a warning nor Japanese text, verify on hardware diff --git a/src/mame/drivers/namcos21_de.cpp b/src/mame/drivers/namcos21_de.cpp new file mode 100644 index 00000000000..d036cc1b99a --- /dev/null +++ b/src/mame/drivers/namcos21_de.cpp @@ -0,0 +1,861 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, Naibo, David Haywood +/** + +see http://www.tvspels-nostalgi.com/driverseye.htm for details about setup + +2008/06/11, by Naibo(translated to English by Mameplus team): +Driver's Eyes works, + -the communication work between CPU and 3D DSP should be limited to the master M68000, + if the address mapping is done in the shared memory, master CPU would be disturbed by the slave one. + + -The left, center and right screens have separate programs and boards, each would work independently. + About projection angles of left and right screen, the angle is correct on "DRIVER'S EYES" title screen, however in the tracks of demo mode it doesn't seem correct. + (probably wants angle sent by main board?) + + -On demo screen, should fog effects be turned off? + + NOTES: + + Driver's Eyes + not yet working + + TODO: + + Driver's Eyes + add communications for Left and Right screen (linked C139 or something else?) + +*/ + +#include "emu.h" +#include "machine/namcoio_gearbox.h" +#include "screen.h" +#include "emupal.h" +#include "speaker.h" +#include "cpu/m68000/m68000.h" +#include "cpu/m6805/m6805.h" +#include "cpu/m6809/m6809.h" +#include "cpu/tms32025/tms32025.h" +#include "machine/nvram.h" +#include "machine/timer.h" +#include "machine/namco_c139.h" +#include "machine/namco_c148.h" +#include "machine/namco68.h" +#include "machine/namcos21_dsp.h" +#include "video/namco_c355spr.h" +#include "video/namcos21_3d.h" +#include "sound/ym2151.h" +#include "sound/c140.h" + +// TODO: basic parameters to get 60.606060 Hz, x2 is for interlace +#define MCFG_SCREEN_RAW_PARAMS_NAMCO480I \ + MCFG_SCREEN_RAW_PARAMS(12288000*2, 768, 0, 496, 264*2,0,480) + +#define ENABLE_LOGGING 0 + +#define NAMCOS21_NUM_COLORS 0x8000 + +DECLARE_DEVICE_TYPE(NAMCO_DE_PCB, namco_de_pcbstack_device) + + +class namco_de_pcbstack_device : public device_t +{ +public: + // construction/destruction + namco_de_pcbstack_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + void configure_c148_standard(machine_config &config); + +protected: + virtual void device_add_mconfig(machine_config &config) override; + virtual void device_start() override; + virtual void device_reset() override; + +private: + + INTERRUPT_GEN_MEMBER( irq0_line_hold ); + INTERRUPT_GEN_MEMBER( irq1_line_hold ); + + required_device m_maincpu; + required_device m_audiocpu; + required_device m_slave; + required_device m_c68; + required_device m_sci; + required_device m_master_intc; + required_device m_slave_intc; + required_device m_c140; + required_device m_c355spr; + required_device m_palette; + required_device m_screen; + required_memory_bank m_audiobank; + required_shared_ptr m_mpDualPortRAM; + required_device m_namcos21_3d; + required_device m_namcos21_dsp; + + uint16_t m_video_enable; + + DECLARE_READ16_MEMBER(namcos21_video_enable_r); + DECLARE_WRITE16_MEMBER(namcos21_video_enable_w); + + DECLARE_READ16_MEMBER(namcos2_68k_dualportram_word_r); + DECLARE_WRITE16_MEMBER(namcos2_68k_dualportram_word_w); + DECLARE_READ8_MEMBER(namcos2_dualportram_byte_r); + DECLARE_WRITE8_MEMBER(namcos2_dualportram_byte_w); + + DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w ); + DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r ); + + DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w ); + + DECLARE_WRITE8_MEMBER(sound_reset_w); + DECLARE_WRITE8_MEMBER(system_reset_w); + void reset_all_subcpus(int state); + + std::unique_ptr m_eeprom; + + TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); + + uint32_t screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void configure_c68_namcos21(machine_config &config); + + void driveyes_common_map(address_map &map); + void driveyes_master_map(address_map &map); + void driveyes_slave_map(address_map &map); + + void sound_map(address_map &map); +}; + + +DEFINE_DEVICE_TYPE(NAMCO_DE_PCB, namco_de_pcbstack_device, "namco_de_pcb", "Namco Driver's Eyes PCB stack") + + +namco_de_pcbstack_device::namco_de_pcbstack_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCO_DE_PCB, tag, owner, clock), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_slave(*this, "slave"), + m_c68(*this, "c68mcu"), + m_sci(*this, "sci"), + m_master_intc(*this, "master_intc"), + m_slave_intc(*this, "slave_intc"), + m_c140(*this, "c140"), + m_c355spr(*this, "c355spr"), + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_audiobank(*this, "audiobank"), + m_mpDualPortRAM(*this, "mpdualportram"), + m_namcos21_3d(*this, "namcos21_3d"), + m_namcos21_dsp(*this, "namcos21dsp") +{} + +INTERRUPT_GEN_MEMBER( namco_de_pcbstack_device::irq0_line_hold ) { device.execute().set_input_line(0, HOLD_LINE); } +INTERRUPT_GEN_MEMBER( namco_de_pcbstack_device::irq1_line_hold ) { device.execute().set_input_line(1, HOLD_LINE); } + + +static const gfx_layout tile_layout = +{ + 16,16, + RGN_FRAC(1,4), /* number of tiles */ + 8, /* bits per pixel */ + { /* plane offsets */ + 0,1,2,3,4,5,6,7 + }, + { /* x offsets */ + 0*8,RGN_FRAC(1,4)+0*8,RGN_FRAC(2,4)+0*8,RGN_FRAC(3,4)+0*8, + 1*8,RGN_FRAC(1,4)+1*8,RGN_FRAC(2,4)+1*8,RGN_FRAC(3,4)+1*8, + 2*8,RGN_FRAC(1,4)+2*8,RGN_FRAC(2,4)+2*8,RGN_FRAC(3,4)+2*8, + 3*8,RGN_FRAC(1,4)+3*8,RGN_FRAC(2,4)+3*8,RGN_FRAC(3,4)+3*8 + }, + { /* y offsets */ + 0*32,1*32,2*32,3*32, + 4*32,5*32,6*32,7*32, + 8*32,9*32,10*32,11*32, + 12*32,13*32,14*32,15*32 + }, + 8*64 /* sprite offset */ +}; + +static GFXDECODE_START( gfx_namcos21 ) + GFXDECODE_ENTRY( "gfx1", 0x000000, tile_layout, 0x1000, 0x10 ) +GFXDECODE_END + + +MACHINE_CONFIG_START(namco_de_pcbstack_device::device_add_mconfig) + MCFG_DEVICE_ADD("maincpu", M68000,12288000) /* Master */ + MCFG_DEVICE_PROGRAM_MAP(driveyes_master_map) + MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namco_de_pcbstack_device, screen_scanline, "screen", 0, 1) + + MCFG_DEVICE_ADD("slave", M68000,12288000) /* Slave */ + MCFG_DEVICE_PROGRAM_MAP(driveyes_slave_map) + + MCFG_DEVICE_ADD("audiocpu", MC6809E, 3072000) /* Sound */ + MCFG_DEVICE_PROGRAM_MAP(sound_map) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namco_de_pcbstack_device, irq0_line_hold, 2*60) + MCFG_DEVICE_PERIODIC_INT_DRIVER(namco_de_pcbstack_device, irq1_line_hold, 120) + + configure_c68_namcos21(config); + + NAMCOS21_DSP(config, m_namcos21_dsp, 0); + m_namcos21_dsp->set_renderer_tag("namcos21_3d"); + + MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */ + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); + + configure_c148_standard(config); + NAMCO_C139(config, m_sci, 0); + + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_RAW_PARAMS_NAMCO480I + MCFG_SCREEN_UPDATE_DRIVER(namco_de_pcbstack_device, screen_update_driveyes) + MCFG_SCREEN_PALETTE("palette") + + MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_namcos21) + MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS) + MCFG_PALETTE_FORMAT(XBRG) + + NAMCOS21_3D(config, m_namcos21_3d, 0); + m_namcos21_3d->set_fixed_palbase(0x3f00); + m_namcos21_3d->set_zz_shift_mult(10, 0x100); + m_namcos21_3d->set_depth_reverse(false); + m_namcos21_3d->set_framebuffer_size(496,480); + + NAMCO_C355SPR(config, m_c355spr, 0); + m_c355spr->set_palette_tag("palette"); + m_c355spr->set_gfxdecode_tag("gfxdecode"); + m_c355spr->set_is_namcofl(false); + m_c355spr->set_tile_callback(namco_c355spr_device::c355_obj_code2tile_delegate()); + m_c355spr->set_palxor(0xf); // reverse mapping + m_c355spr->set_gfxregion(0); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + C140(config, m_c140, 8000000/374); + m_c140->set_bank_type(c140_device::C140_TYPE::SYSTEM21); + m_c140->add_route(0, "lspeaker", 0.50); + m_c140->add_route(1, "rspeaker", 0.50); + + MCFG_DEVICE_ADD("ymsnd", YM2151, 3579580) + MCFG_SOUND_ROUTE(0, "lspeaker", 0.30) + MCFG_SOUND_ROUTE(1, "rspeaker", 0.30) +MACHINE_CONFIG_END + + +uint32_t namco_de_pcbstack_device::screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + //uint8_t *videoram = m_gpu_videoram.get(); + int pivot = 3; + int pri; + bitmap.fill(0xff, cliprect ); + + m_c355spr->draw(screen, bitmap, cliprect, 2 ); + m_c355spr->draw(screen, bitmap, cliprect, 14 ); //driver's eyes + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); + + m_c355spr->draw(screen, bitmap, cliprect, 0 ); + m_c355spr->draw(screen, bitmap, cliprect, 1 ); + + m_namcos21_3d->copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); + + for (pri = pivot; pri < 8; pri++) + { + m_c355spr->draw(screen, bitmap, cliprect, pri); + } + + m_c355spr->draw(screen, bitmap, cliprect, 15 ); //driver's eyes + + return 0; + +} + +READ16_MEMBER(namco_de_pcbstack_device::namcos21_video_enable_r) +{ + return m_video_enable; +} + +WRITE16_MEMBER(namco_de_pcbstack_device::namcos21_video_enable_w) +{ + COMBINE_DATA( &m_video_enable ); /* 0x40 = enable */ + if( m_video_enable!=0 && m_video_enable!=0x40 ) + { + logerror( "unexpected namcos21_video_enable_w=0x%x\n", m_video_enable ); + } +} + +/***********************************************************/ + +/* dual port ram memory handlers */ + +READ16_MEMBER(namco_de_pcbstack_device::namcos2_68k_dualportram_word_r) +{ + return m_mpDualPortRAM[offset]; +} + +WRITE16_MEMBER(namco_de_pcbstack_device::namcos2_68k_dualportram_word_w) +{ + if( ACCESSING_BITS_0_7 ) + { + m_mpDualPortRAM[offset] = data&0xff; + } +} + +READ8_MEMBER(namco_de_pcbstack_device::namcos2_dualportram_byte_r) +{ + return m_mpDualPortRAM[offset]; +} + +WRITE8_MEMBER(namco_de_pcbstack_device::namcos2_dualportram_byte_w) +{ + m_mpDualPortRAM[offset] = data; +} + +/*************************************************************/ +/* SOUND 6809 CPU Memory declarations */ +/*************************************************************/ + +void namco_de_pcbstack_device::sound_map(address_map &map) +{ + map(0x0000, 0x3fff).bankr("audiobank"); /* banked */ + map(0x3000, 0x3003).nopw(); /* ? */ + map(0x4000, 0x4001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); + map(0x5000, 0x6fff).rw(m_c140, FUNC(c140_device::c140_r), FUNC(c140_device::c140_w)); + map(0x7000, 0x77ff).rw(FUNC(namco_de_pcbstack_device::namcos2_dualportram_byte_r), FUNC(namco_de_pcbstack_device::namcos2_dualportram_byte_w)).share("mpdualportram"); + map(0x7800, 0x7fff).rw(FUNC(namco_de_pcbstack_device::namcos2_dualportram_byte_r), FUNC(namco_de_pcbstack_device::namcos2_dualportram_byte_w)); /* mirror */ + map(0x8000, 0x9fff).ram(); + map(0xa000, 0xbfff).nopw(); /* amplifier enable on 1st write */ + map(0xc000, 0xffff).nopw(); /* avoid debug log noise; games write frequently to 0xe000 */ + map(0xc000, 0xc001).w(FUNC(namco_de_pcbstack_device::namcos2_sound_bankselect_w)); + map(0xd001, 0xd001).nopw(); /* watchdog */ + map(0xd000, 0xffff).rom().region("audiocpu", 0x01000); +} + +/*************************************************************/ +/* I/O HD63705 MCU Memory declarations */ +/*************************************************************/ + +void namco_de_pcbstack_device::configure_c68_namcos21(machine_config &config) +{ + NAMCOC68(config, m_c68, 8000000); + m_c68->in_pb_callback().set_ioport("MCUB"); + m_c68->in_pc_callback().set_ioport("MCUC"); + m_c68->in_ph_callback().set_ioport("MCUH"); + m_c68->in_pdsw_callback().set_ioport("DSW"); + m_c68->di0_in_cb().set_ioport("MCUDI0"); + m_c68->di1_in_cb().set_ioport("MCUDI1"); + m_c68->di2_in_cb().set_ioport("MCUDI2"); + m_c68->di3_in_cb().set_ioport("MCUDI3"); + m_c68->an0_in_cb().set_ioport("AN0"); + m_c68->an1_in_cb().set_ioport("AN1"); + m_c68->an2_in_cb().set_ioport("AN2"); + m_c68->an3_in_cb().set_ioport("AN3"); + m_c68->an4_in_cb().set_ioport("AN4"); + m_c68->an5_in_cb().set_ioport("AN5"); + m_c68->an6_in_cb().set_ioport("AN6"); + m_c68->an7_in_cb().set_ioport("AN7"); + m_c68->dp_in_callback().set(FUNC(namco_de_pcbstack_device::namcos2_dualportram_byte_r)); + m_c68->dp_out_callback().set(FUNC(namco_de_pcbstack_device::namcos2_dualportram_byte_w)); +} + +/*************************************************************/ +/* Driver's Eyes Memory declarations overrides */ +/*************************************************************/ + + +void namco_de_pcbstack_device::driveyes_common_map(address_map &map) +{ + map(0x700000, 0x71ffff).rw(m_c355spr, FUNC(namco_c355spr_device::spriteram_r), FUNC(namco_c355spr_device::spriteram_w)); + map(0x720000, 0x720007).rw(m_c355spr, FUNC(namco_c355spr_device::position_r), FUNC(namco_c355spr_device::position_w)); + map(0x740000, 0x74ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x750000, 0x75ffff).ram().w(m_palette, FUNC(palette_device::write16_ext)).share("palette_ext"); + map(0x760000, 0x760001).rw(FUNC(namco_de_pcbstack_device::namcos21_video_enable_r), FUNC(namco_de_pcbstack_device::namcos21_video_enable_w)); + map(0x800000, 0x8fffff).rom().region("data", 0); + map(0x900000, 0x90ffff).ram().share("sharedram"); + map(0xa00000, 0xa00fff).rw(FUNC(namco_de_pcbstack_device::namcos2_68k_dualportram_word_r), FUNC(namco_de_pcbstack_device::namcos2_68k_dualportram_word_w)); + map(0xb00000, 0xb03fff).rw(m_sci, FUNC(namco_c139_device::ram_r), FUNC(namco_c139_device::ram_w)); + map(0xb80000, 0xb8000f).m(m_sci, FUNC(namco_c139_device::regs_map)); +} + +void namco_de_pcbstack_device::driveyes_master_map(address_map &map) +{ + driveyes_common_map(map); + map(0x000000, 0x03ffff).rom(); + map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x180000, 0x183fff).rw(FUNC(namco_de_pcbstack_device::namcos2_68k_eeprom_r), FUNC(namco_de_pcbstack_device::namcos2_68k_eeprom_w)).umask16(0x00ff); + map(0x1c0000, 0x1fffff).m(m_master_intc, FUNC(namco_c148_device::map)); + + // DSP related + map(0x250000, 0x25ffff).ram().share("namcos21dsp:winrun_polydata"); + map(0x280000, 0x281fff).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspbios_w)); + map(0x380000, 0x38000f).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_dspcomram_control_r), FUNC(namcos21_dsp_device::winrun_dspcomram_control_w)); + map(0x3c0000, 0x3c1fff).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::winrun_68k_dspcomram_r), FUNC(namcos21_dsp_device::winrun_68k_dspcomram_w)); + map(0x400000, 0x400001).w(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_control_w)); + map(0x440000, 0x440001).rw(m_namcos21_dsp, FUNC(namcos21_dsp_device::pointram_data_r), FUNC(namcos21_dsp_device::pointram_data_w)); +} + +void namco_de_pcbstack_device::driveyes_slave_map(address_map &map) +{ + driveyes_common_map(map); + map(0x000000, 0x03ffff).rom(); + map(0x100000, 0x10ffff).ram(); /* private work RAM */ + map(0x1c0000, 0x1fffff).m(m_slave_intc, FUNC(namco_c148_device::map)); +} + +WRITE8_MEMBER( namco_de_pcbstack_device::namcos2_sound_bankselect_w ) +{ + m_audiobank->set_entry(data>>4); +} + +WRITE8_MEMBER(namco_de_pcbstack_device::sound_reset_w) +{ + if (data & 0x01) + { + /* Resume execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_maincpu->yield(); + } + else + { + /* Suspend execution */ + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + } +} + +WRITE8_MEMBER(namco_de_pcbstack_device::system_reset_w) +{ + reset_all_subcpus(data & 1 ? CLEAR_LINE : ASSERT_LINE); + + if (data & 0x01) + m_maincpu->yield(); +} + +void namco_de_pcbstack_device::reset_all_subcpus(int state) +{ + m_slave->set_input_line(INPUT_LINE_RESET, state); + m_c68->ext_reset(state); +} + +WRITE8_MEMBER(namco_de_pcbstack_device::namcos2_68k_eeprom_w) +{ + m_eeprom[offset] = data; +} + +READ8_MEMBER(namco_de_pcbstack_device::namcos2_68k_eeprom_r) +{ + return m_eeprom[offset]; +} + + +TIMER_DEVICE_CALLBACK_MEMBER(namco_de_pcbstack_device::screen_scanline) +{ + int scanline = param; +// int cur_posirq = get_posirq_scanline()*2; + + if(scanline == 240*2) + { + m_master_intc->vblank_irq_trigger(); + m_slave_intc->vblank_irq_trigger(); + m_c68->ext_interrupt(ASSERT_LINE); + } +} + +void namco_de_pcbstack_device::configure_c148_standard(machine_config &config) +{ + NAMCO_C148(config, m_master_intc, 0, m_maincpu, true); + m_master_intc->link_c148_device(m_slave_intc); + m_master_intc->out_ext1_callback().set(FUNC(namco_de_pcbstack_device::sound_reset_w)); + m_master_intc->out_ext2_callback().set(FUNC(namco_de_pcbstack_device::system_reset_w)); + + NAMCO_C148(config, m_slave_intc, 0, m_slave, false); + m_slave_intc->link_c148_device(m_master_intc); +} + +void namco_de_pcbstack_device::device_start() +{ + m_eeprom = std::make_unique(0x2000); + subdevice("nvram")->set_base(m_eeprom.get(), 0x2000); + + if (m_audiobank) + { + uint32_t max = memregion("audiocpu")->bytes() / 0x4000; + for (int i = 0; i < 0x10; i++) + m_audiobank->configure_entry(i, memregion("audiocpu")->base() + (i % max) * 0x4000); + + m_audiobank->set_entry(0); + } +} + +void namco_de_pcbstack_device::device_reset() +{ + address_space &audio_space = m_audiocpu->space(AS_PROGRAM); + + /* Initialise the bank select in the sound CPU */ + namcos2_sound_bankselect_w(audio_space, 0, 0); /* Page in bank 0 */ + + m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE ); + + /* Place CPU2 & CPU3 into the reset condition */ + reset_all_subcpus(ASSERT_LINE); +} + + +class namcos21_de_state : public driver_device +{ +public: + namcos21_de_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_pcb(*this, "pcb_%u", 0U), + m_io_gearbox(*this, "gearbox") + { } + + void driveyes(machine_config &config); + +private: + required_device_array m_pcb; + required_device m_io_gearbox; +}; + +// driveyes only +MACHINE_CONFIG_START(namcos21_de_state::driveyes) + MCFG_DEVICE_ADD("pcb_0", NAMCO_DE_PCB,0) + MCFG_DEVICE_ADD("pcb_1", NAMCO_DE_PCB,0) + MCFG_DEVICE_ADD("pcb_2", NAMCO_DE_PCB,0) + + MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0) +MACHINE_CONFIG_END + +// stacks with the DSWs set to left or right screen will show 'receive error' because they want comms from the main screen + +static INPUT_PORTS_START( driveyes ) + PORT_START("pcb_1:MCUC") + PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_0) PORT_TOGGLE // alt test mode switch + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) + + PORT_START("pcb_1:MCUB") + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("gearbox", namcoio_gearbox_device, clutch_r ) + PORT_BIT( 0x37, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */ + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* ? */ + + PORT_START("pcb_1:MCUH") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Red Button") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Green Button") + PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("pcb_1:DSW") + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x0c, 0x0c, "Screen (DON'T CHANGE)") + PORT_DIPSETTING( 0x0c, "Center (correct)" ) + PORT_DIPSETTING( 0x08, "Left (invalid)" ) + PORT_DIPSETTING( 0x04, "Right (invalid)" ) + PORT_DIPSETTING( 0x00, "Right (invalid) (duplicate)" ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("pcb_1:AN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN1") + PORT_BIT( 0xff, 0x80, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Gas Pedal") + PORT_START("pcb_1:AN2") + PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Steering Wheel") + PORT_START("pcb_1:AN3") + PORT_BIT( 0xff, 0x80, IPT_PEDAL2 ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(15) PORT_KEYDELTA(10) PORT_NAME("Brake Pedal") + PORT_START("pcb_1:AN4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN5") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN6") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:AN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("pcb_1:MCUDI0") + PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER("gearbox", namcoio_gearbox_device, in_r, nullptr ) + PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("pcb_1:MCUDI1") /* 63B05Z0 - $3001 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:MCUDI2") /* 63B05Z0 - $3002 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_1:MCUDI3") /* 63B05Z0 - $3003 */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + // the side view screens do still read inputs, but it's more likely that the main screen should be transfering them + // somehow rather than the controls being directly split + PORT_START("pcb_0:DSW") + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x0c, 0x08, "Screen (DON'T CHANGE)") + PORT_DIPSETTING( 0x0c, "Center (invalid)" ) + PORT_DIPSETTING( 0x08, "Left (correct)" ) + PORT_DIPSETTING( 0x04, "Right (invalid)" ) + PORT_DIPSETTING( 0x00, "Right (invalid) (duplicate)" ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_START("pcb_0:MCUC") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUB") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUH") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN5") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN6") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:AN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_0:MCUDI3") + + PORT_START("pcb_2:DSW") + PORT_SERVICE( 0x01, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x02, 0x02, "DSW2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x0c, 0x04, "Screen (DON'T CHANGE)") + PORT_DIPSETTING( 0x0c, "Center (invalid)" ) + PORT_DIPSETTING( 0x08, "Left (invalid)" ) + PORT_DIPSETTING( 0x04, "Right (correct)" ) + PORT_DIPSETTING( 0x00, "Right (invalid) (duplicate)" ) + PORT_DIPNAME( 0x10, 0x10, "DSW5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "PCM ROM") + PORT_DIPSETTING( 0x20, "2M" ) + PORT_DIPSETTING( 0x00, "4M" ) + PORT_DIPNAME( 0x40, 0x40, "DSW7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Screen Stop") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_START("pcb_2:MCUC") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUB") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUH") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN5") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN6") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:AN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("pcb_2:MCUDI3") +INPUT_PORTS_END + +/* + Note, only the main screen PCB stack has voice roms populated + the sound program also differs on the side screen sets + + pcb_0 = left + pcb_1 = center + pcb_2 = right +*/ + +ROM_START( driveyes ) + // pcb_1 - center + ROM_REGION( 0x40000, "pcb_1:maincpu", 0 ) /* C68C - 68k code */ + ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) + ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) + + ROM_REGION( 0x40000, "pcb_1:slave", 0 ) /* C68 - 68k code */ + ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) + ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) + + ROM_REGION( 0x20000, "pcb_1:audiocpu", 0 ) /* Sound */ + ROM_LOAD( "de1-snd0.8j", 0x000000, 0x020000, CRC(5474f203) SHA1(e0ae2f6978deb0c934d9311a334a6e36bb402aee) ) /* correct for center view */ + + ROM_REGION( 0x200000, "pcb_1:c140", 0 ) /* sound samples - populated for center view only */ + ROM_LOAD("de1-voi0.12b", 0x040000, 0x40000, CRC(fc44adbd) SHA1(4268bb1f025e47a94212351d1c1cfd0e5029221f) ) + ROM_LOAD("de1-voi1.12c", 0x0c0000, 0x40000, CRC(a71dc55a) SHA1(5e746184db9144ab4e3a97b20195b92b0f56c8cc) ) + ROM_LOAD("de1-voi2.12d", 0x140000, 0x40000, CRC(4d32879a) SHA1(eae65f4b98cee9efe4e5dad7298c3717cfb1e6bf) ) + ROM_LOAD("de1-voi3.12e", 0x1c0000, 0x40000, CRC(e4832d18) SHA1(0460c79d3942aab89a765b0bd8bbddaf19a6d682) ) + + ROM_REGION( 0x8000, "pcb_1:c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "pcb_1:gfx1", 0 ) /* sprites */ + ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) + ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) + ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) + ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) + ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) + ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) + ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) + ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) + + ROM_REGION16_BE( 0x100000, "pcb_1:data", 0 ) /* 68k */ + ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) + ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) + + ROM_REGION16_BE( 0xc0000, "pcb_1:namcos21dsp:point16", 0 ) /* 3d objects */ + ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) + ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) + ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) + ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) + ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) + ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) + + ROM_REGION( 0x2000, "pcb_1:nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) + + // pcb_0 - left + ROM_REGION( 0x40000, "pcb_0:maincpu", 0 ) /* C68C - 68k code */ + ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) + ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) + + ROM_REGION( 0x40000, "pcb_0:slave", 0 ) /* C68 - 68k code */ + ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) + ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) + + ROM_REGION( 0x20000, "pcb_0:audiocpu", 0 ) /* Sound */ + ROM_LOAD( "de1-snd0r.8j", 0x000000, 0x020000, CRC(7bbeda42) SHA1(fe840cc9069758928492bbeec79acded18daafd9) ) // correct for left & right views + + ROM_REGION( 0x200000, "pcb_0:c140", ROMREGION_ERASE00 ) /* sound samples */ + /* unpopulated for left / right views */ + + ROM_REGION( 0x8000, "pcb_0:c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "pcb_0:gfx1", 0 ) /* sprites */ + ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) + ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) + ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) + ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) + ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) + ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) + ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) + ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) + + ROM_REGION16_BE( 0x100000, "pcb_0:data", 0 ) /* 68k */ + ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) + ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) + + ROM_REGION16_BE( 0xc0000, "pcb_0:namcos21dsp:point16", 0 ) /* 3d objects */ + ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) + ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) + ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) + ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) + ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) + ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) + + ROM_REGION( 0x2000, "pcb_0:nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) + + // pcb_2 - right + ROM_REGION( 0x40000, "pcb_2:maincpu", 0 ) /* C68C - 68k code */ + ROM_LOAD16_BYTE( "de2-mp-ub.3j", 0x000000, 0x20000, CRC(f9c86fb5) SHA1(b48d16e8f26e7a2cfecb30285b517c42e5585ac7) ) + ROM_LOAD16_BYTE( "de2-mp-lb.1j", 0x000001, 0x20000, CRC(11d8587a) SHA1(ecb1e8fe2ba56b6f6a71a5552d5663b597165786) ) + + ROM_REGION( 0x40000, "pcb_2:slave", 0 ) /* C68 - 68k code */ + ROM_LOAD16_BYTE( "de1-sp-ub.6c", 0x000000, 0x20000, CRC(231b144f) SHA1(42518614cb083455dc5fec71e699403907ca784b) ) + ROM_LOAD16_BYTE( "de1-sp-lb.4c", 0x000001, 0x20000, CRC(50cb9f59) SHA1(aec7fa080854f0297d9e90e3aaeb0f332fd579bd) ) + + ROM_REGION( 0x20000, "pcb_2:audiocpu", 0 ) /* Sound */ + ROM_LOAD( "de1-snd0r.8j", 0x000000, 0x020000, CRC(7bbeda42) SHA1(fe840cc9069758928492bbeec79acded18daafd9) ) // correct for left & right views + + ROM_REGION( 0x200000, "pcb_2:c140", ROMREGION_ERASE00 ) /* sound samples */ + /* unpopulated for left / right views */ + + ROM_REGION( 0x8000, "pcb_2:c68mcu:external", ROMREGION_ERASE00 ) /* C68 (M37450) I/O MCU program */ + /* external ROM not populated, unclear how it would map */ + + ROM_REGION( 0x200000, "pcb_2:gfx1", 0 ) /* sprites */ + ROM_LOAD( "de1-obj0.5s", 0x000000, 0x40000, CRC(7438bd53) SHA1(7619c4b56d5c466e845eb45e6157dcaf2a03ad94) ) + ROM_LOAD( "de1-obj4.4s", 0x040000, 0x40000, CRC(335f0ea4) SHA1(9ec065d99ad0874b262b372334179a7e7612558e) ) + ROM_LOAD( "de1-obj1.5x", 0x080000, 0x40000, CRC(45f2334e) SHA1(95f277a4e43d6662ae44d6b69a57f65c72978319) ) + ROM_LOAD( "de1-obj5.4x", 0x0c0000, 0x40000, CRC(9e22999c) SHA1(02624186c359b5e2c96cd3f0e2cb1598ea36dff7) ) + ROM_LOAD( "de1-obj2.3s", 0x100000, 0x40000, CRC(8f1a542c) SHA1(2cb59713607d8929815a9b28bf2a384b6a6c9db8) ) + ROM_LOAD( "de1-obj6.2s", 0x140000, 0x40000, CRC(346df4d5) SHA1(edbadb9db93b7f5a3b064c7f6acb77001cdacce2) ) + ROM_LOAD( "de1-obj3.3x", 0x180000, 0x40000, CRC(fc94544c) SHA1(6297445c64784ee253716f6438d98e5fcd4e7520) ) + ROM_LOAD( "de1-obj7.2x", 0x1c0000, 0x40000, CRC(9ce325d7) SHA1(de4d788bec14842507ed405244974b4fd4f07515) ) + + ROM_REGION16_BE( 0x100000, "pcb_2:data", 0 ) /* 68k */ + ROM_LOAD16_BYTE( "de1-data-u.3a", 0x00000, 0x80000, CRC(fe65d2ab) SHA1(dbe962dda7efa60357fa3a684a265aaad49df5b5) ) + ROM_LOAD16_BYTE( "de1-data-l.1a", 0x00001, 0x80000, CRC(9bb37aca) SHA1(7f5dffc95cadcf12f53ff7944920afc25ed3cf68) ) + + ROM_REGION16_BE( 0xc0000, "pcb_2:namcos21dsp:point16", 0 ) /* 3d objects */ + ROM_LOAD16_BYTE( "de1-pt0-ub.8j", 0x00000, 0x20000, CRC(3b6b746d) SHA1(40c992ef4cf5187b30aba42c5fe7ce0f8f02bee0) ) + ROM_LOAD16_BYTE( "de1-pt0-lb.8d", 0x00001, 0x20000, CRC(9c5c477e) SHA1(c8ae8a663227d636d35bd5f432d23f05d6695942) ) + ROM_LOAD16_BYTE( "de1-pt1-u.8l", 0x40000, 0x20000, CRC(23bc72a1) SHA1(083e2955ae2f88d1ad461517b47054d64375b46e) ) + ROM_LOAD16_BYTE( "de1-pt1-l.8e", 0x40001, 0x20000, CRC(a05ee081) SHA1(1be4c61ad716abb809856e04d4bb450943706a55) ) + ROM_LOAD16_BYTE( "de1-pt2-u.5n", 0x80000, 0x20000, CRC(10e83d81) SHA1(446fedc3b1e258a39fb9467e5327c9f9a9f1ac3f) ) + ROM_LOAD16_BYTE( "de1-pt2-l.7n", 0x80001, 0x20000, CRC(3339a976) SHA1(c9eb9c04f7b3f2a85e5ab64ffb2fe4fcfb6c494b) ) + + + ROM_REGION( 0x2000, "pcb_2:nvram", 0 ) /* default settings, including calibration */ + ROM_LOAD( "nvram", 0x0000, 0x2000, CRC(fa6623e9) SHA1(8c313f136724eb6c829261b223a2ac1fc08d00c2) ) +ROM_END + + +/* YEAR NAME PARENT MACHINE INPUT CLASS INIT MONITOR COMPANY FULLNAME FLAGS */ + +// 3 PCB stacks in a single cage (3x 4 PCBs) linked for 3 screen panorama, boards look similar to original Namco System 21 (not 21B) including TMS320C25 DSP, but use C68 I/O MCU and sprite chip instead of "68000 'GPU'" ? +GAME( 1992, driveyes, 0, driveyes, driveyes, namcos21_de_state, empty_init, ROT0, "Namco", "Driver's Eyes (Japan) (1992/01/10, Main Ver 2.1, Sub Ver 1.1)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN) + diff --git a/src/mame/includes/namcos21.h b/src/mame/includes/namcos21.h deleted file mode 100644 index 5e4db1e258a..00000000000 --- a/src/mame/includes/namcos21.h +++ /dev/null @@ -1,305 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Phil Stroffolino -/** - * @file namcos21.h - */ -#ifndef MAME_INCLUDES_NAMCOS21_H -#define MAME_INCLUDES_NAMCOS21_H - -#pragma once - - -#include "machine/namcoio_gearbox.h" -#include "machine/timer.h" -#include "machine/namco_c139.h" -#include "machine/namco_c148.h" -#include "machine/timer.h" -#include "sound/c140.h" -#include "video/c45.h" -#include "machine/namco65.h" -#include "machine/namco68.h" -#include "video/namco_c355spr.h" -#include "video/namcos2_sprite.h" -#include "video/namcos2_roz.h" - - -#define NAMCOS21_POLY_FRAME_WIDTH 496 -#define NAMCOS21_POLY_FRAME_HEIGHT 480 - -#define WINRUN_MAX_POLY_PARAM (1+256*3) - -#define NAMCOS21_NUM_COLORS 0x8000 - -#define DSP_BUF_MAX (4096*12) -struct dsp_state -{ - unsigned masterSourceAddr; - uint16_t slaveInputBuffer[DSP_BUF_MAX]; - unsigned slaveBytesAvailable; - unsigned slaveBytesAdvertised; - unsigned slaveInputStart; - uint16_t slaveOutputBuffer[DSP_BUF_MAX]; - unsigned slaveOutputSize; - uint16_t masterDirectDrawBuffer[256]; - unsigned masterDirectDrawSize; - int masterFinished; - int slaveActive; -}; - -struct n21_vertex -{ - double x,y; - double z; -}; - -struct edge -{ - double x; - double z; -}; - - -class namcos21_state : public driver_device -{ -public: - enum - { /* Namco System21 */ - NAMCOS21_AIRCOMBAT = 0x4000, - NAMCOS21_STARBLADE, - NAMCOS21_CYBERSLED, - NAMCOS21_SOLVALOU, - NAMCOS21_WINRUN91, - NAMCOS21_DRIVERS_EYES, - }; - - namcos21_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_master_dsp_code(*this,"master_dsp_code"), - m_gametype(0), - m_dspmaster(*this, "dspmaster"), - m_dspslave(*this, "dspslave"), - m_maincpu(*this, "maincpu"), - m_audiocpu(*this, "audiocpu"), - m_slave(*this, "slave"), - m_c65(*this, "c65mcu"), - m_c68(*this, "c68mcu"), - m_sci(*this, "sci"), - m_master_intc(*this, "master_intc"), - m_slave_intc(*this, "slave_intc"), - m_c140(*this, "c140"), - m_c355spr(*this, "c355spr"), - m_palette(*this, "palette"), - m_screen(*this, "screen"), - m_audiobank(*this, "audiobank"), - m_winrun_dspbios(*this,"winrun_dspbios"), - m_winrun_polydata(*this,"winrun_polydata"), - m_dspram16(*this,"dspram16"), - m_mpDualPortRAM(*this,"mpdualportram"), - m_ptrom24(*this,"point24"), - m_ptrom16(*this,"point16"), - m_dsp(*this, "dsp"), - m_io_gearbox(*this, "gearbox"), - m_gpu_intc(*this, "gpu_intc") - { } - - void configure_c148_standard(machine_config &config); - void driveyes(machine_config &config); - void winrun(machine_config &config); - void namcos21(machine_config &config); - - void init_driveyes(); - void init_winrun(); - void init_starblad(); - void init_solvalou(); - void init_cybsled(); - void init_aircomb(); - - optional_shared_ptr m_master_dsp_code; - int m_mbNeedsKickstart; - void clear_poly_framebuffer(); - std::unique_ptr m_mpDspState; - - int m_gametype; - - optional_device m_dspmaster; - optional_device m_dspslave; - -private: - required_device m_maincpu; - optional_device m_audiocpu; - optional_device m_slave; - optional_device m_c65; - optional_device m_c68; - optional_device m_sci; - optional_device m_master_intc; - optional_device m_slave_intc; - optional_device m_c140; - optional_device m_c355spr; - required_device m_palette; - - optional_device m_screen; - optional_memory_bank m_audiobank; - - optional_shared_ptr m_winrun_dspbios; - optional_shared_ptr m_winrun_polydata; - optional_shared_ptr m_dspram16; - required_shared_ptr m_mpDualPortRAM; - - optional_region_ptr m_ptrom24; - optional_region_ptr m_ptrom16; - - optional_device m_dsp; - optional_device m_io_gearbox; - optional_device m_gpu_intc; - - std::unique_ptr m_videoram; - std::unique_ptr m_maskram; - std::unique_ptr m_winrun_dspcomram; - uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM]; - int m_winrun_poly_index; - uint32_t m_winrun_pointrom_addr; - int m_winrun_dsp_alive; - uint16_t m_winrun_dspcomram_control[8]; - uint16_t m_video_enable; - std::unique_ptr m_pointram; - int m_pointram_idx; - uint16_t m_pointram_control; - uint32_t m_pointrom_idx; - uint8_t m_mPointRomMSB; - int m_mbPointRomDataAvailable; - int m_irq_enable; - uint8_t m_depthcue[2][0x400]; - std::unique_ptr m_mpPolyFrameBufferPens; - std::unique_ptr m_mpPolyFrameBufferZ; - std::unique_ptr m_mpPolyFrameBufferPens2; - std::unique_ptr m_mpPolyFrameBufferZ2; - uint16_t m_winrun_color; - uint16_t m_winrun_gpu_register[0x10/2]; - DECLARE_READ16_MEMBER(namcos21_video_enable_r); - DECLARE_WRITE16_MEMBER(namcos21_video_enable_w); - DECLARE_WRITE16_MEMBER(dspcuskey_w); - DECLARE_READ16_MEMBER(dspcuskey_r); - DECLARE_READ16_MEMBER(dspram16_r); - template DECLARE_WRITE16_MEMBER(dspram16_w); - DECLARE_READ16_MEMBER(dsp_port0_r); - DECLARE_WRITE16_MEMBER(dsp_port0_w); - DECLARE_READ16_MEMBER(dsp_port1_r); - DECLARE_WRITE16_MEMBER(dsp_port1_w); - DECLARE_READ16_MEMBER(dsp_port2_r); - DECLARE_WRITE16_MEMBER(dsp_port2_w); - DECLARE_READ16_MEMBER(dsp_port3_idc_rcv_enable_r); - DECLARE_WRITE16_MEMBER(dsp_port3_w); - DECLARE_WRITE16_MEMBER(dsp_port4_w); - DECLARE_READ16_MEMBER(dsp_port8_r); - DECLARE_WRITE16_MEMBER(dsp_port8_w); - DECLARE_READ16_MEMBER(dsp_port9_r); - DECLARE_READ16_MEMBER(dsp_porta_r); - DECLARE_WRITE16_MEMBER(dsp_porta_w); - DECLARE_READ16_MEMBER(dsp_portb_r); - DECLARE_WRITE16_MEMBER(dsp_portb_w); - DECLARE_WRITE16_MEMBER(dsp_portc_w); - DECLARE_READ16_MEMBER(dsp_portf_r); - DECLARE_WRITE16_MEMBER(dsp_xf_w); - DECLARE_READ16_MEMBER(slave_port0_r); - DECLARE_WRITE16_MEMBER(slave_port0_w); - DECLARE_READ16_MEMBER(slave_port2_r); - DECLARE_READ16_MEMBER(slave_port3_r); - DECLARE_WRITE16_MEMBER(slave_port3_w); - DECLARE_WRITE16_MEMBER(slave_XF_output_w); - DECLARE_READ16_MEMBER(slave_portf_r); - DECLARE_WRITE16_MEMBER(pointram_control_w); - DECLARE_READ16_MEMBER(pointram_data_r); - DECLARE_WRITE16_MEMBER(pointram_data_w); - DECLARE_READ16_MEMBER(namcos21_depthcue_r); - DECLARE_WRITE16_MEMBER(namcos21_depthcue_w); - DECLARE_READ16_MEMBER(namcos2_68k_dualportram_word_r); - DECLARE_WRITE16_MEMBER(namcos2_68k_dualportram_word_w); - DECLARE_READ8_MEMBER(namcos2_dualportram_byte_r); - DECLARE_WRITE8_MEMBER(namcos2_dualportram_byte_w); - DECLARE_READ16_MEMBER(winrun_dspcomram_r); - DECLARE_WRITE16_MEMBER(winrun_dspcomram_w); - DECLARE_READ16_MEMBER(winrun_cuskey_r); - DECLARE_WRITE16_MEMBER(winrun_cuskey_w); - DECLARE_READ16_MEMBER(winrun_poly_reset_r); - DECLARE_WRITE16_MEMBER(winrun_dsp_render_w); - DECLARE_WRITE16_MEMBER(winrun_dsp_pointrom_addr_w); - DECLARE_READ16_MEMBER(winrun_dsp_pointrom_data_r); - DECLARE_WRITE16_MEMBER(winrun_dsp_complete_w); - DECLARE_READ16_MEMBER(winrun_table_r); - DECLARE_WRITE16_MEMBER(winrun_dspbios_w); - DECLARE_READ16_MEMBER(winrun_68k_dspcomram_r); - DECLARE_WRITE16_MEMBER(winrun_68k_dspcomram_w); - DECLARE_READ16_MEMBER(winrun_dspcomram_control_r); - DECLARE_WRITE16_MEMBER(winrun_dspcomram_control_w); - DECLARE_READ16_MEMBER(winrun_gpu_color_r); - DECLARE_WRITE16_MEMBER(winrun_gpu_color_w); - DECLARE_READ16_MEMBER(winrun_gpu_register_r); - DECLARE_WRITE16_MEMBER(winrun_gpu_register_w); - DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w); - DECLARE_READ16_MEMBER(winrun_gpu_videoram_r); - - DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w ); - DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r ); - - DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w ); - - DECLARE_WRITE8_MEMBER(sound_reset_w); - DECLARE_WRITE8_MEMBER(system_reset_w); - void reset_all_subcpus(int state); - - // game type helpers - bool is_system21(); - - std::unique_ptr m_eeprom; - - TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline); - - uint8_t m_gearbox_state; - DECLARE_CUSTOM_INPUT_MEMBER(driveyes_gearbox_r); - - DECLARE_MACHINE_START(namcos21); - DECLARE_MACHINE_RESET(namcos21); - DECLARE_VIDEO_START(namcos21); - uint32_t screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void allocate_poly_framebuffer(); - void copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi); - void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect); - void renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable); - void rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable); - void draw_quad(int sx[4], int sy[4], int zcode[4], int color); - int32_t read_pointrom_data(unsigned offset); - void transmit_word_to_slave(uint16_t data); - void transfer_dsp_data(); - uint16_t read_word_from_slave_input(); - uint16_t get_input_bytes_advertised_for_slave(); - int init_dsp(); - void render_slave_output(uint16_t data); - void winrun_flush_poly(); - void init(int game_type); - void configure_c65_namcos21(machine_config &config); - void configure_c68_namcos21(machine_config &config); - void common_map(address_map &map); - void driveyes_common_map(address_map &map); - void driveyes_master_map(address_map &map); - void driveyes_slave_map(address_map &map); - void master_dsp_data(address_map &map); - void master_dsp_io(address_map &map); - void master_dsp_program(address_map &map); - void master_map(address_map &map); - void mcu_map(address_map &map); - void slave_dsp_data(address_map &map); - void slave_dsp_io(address_map &map); - void slave_dsp_program(address_map &map); - void slave_map(address_map &map); - void sound_map(address_map &map); - void winrun_dsp_data(address_map &map); - void winrun_dsp_io(address_map &map); - void winrun_dsp_program(address_map &map); - void winrun_gpu_map(address_map &map); - void winrun_master_map(address_map &map); - void winrun_slave_map(address_map &map); -}; - -#endif // MAME_INCLUDES_NAMCOS21_H diff --git a/src/mame/machine/namco_c139.cpp b/src/mame/machine/namco_c139.cpp index fa842d84089..d9c757e1d2e 100644 --- a/src/mame/machine/namco_c139.cpp +++ b/src/mame/machine/namco_c139.cpp @@ -8,6 +8,7 @@ TODO: - Make this to actually work! - Is RAM shared with a specific CPU other than master/slave? + - is this another MCU with internal ROM? ***************************************************************************/ diff --git a/src/mame/machine/namco_c67.cpp b/src/mame/machine/namco_c67.cpp new file mode 100644 index 00000000000..509fd21dc00 --- /dev/null +++ b/src/mame/machine/namco_c67.cpp @@ -0,0 +1,32 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/****************************************************************************** + + This is simply a TMS320C25 with internal ROM and Namco code '67' + + used by Namco System 21 for both the master and slave DSPs (configuration + is decided based on a port read) + +******************************************************************************/ + + +#include "emu.h" +#include "namco_c67.h" + +DEFINE_DEVICE_TYPE(NAMCO_C67, namco_c67_device, "namcoc67", "Namco C67 (TMS320C25)") + +namco_c67_device::namco_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + tms32025_device(mconfig, NAMCO_C67, tag, owner, clock) +{ + set_mp_mc(false); +} + +ROM_START( c67 ) + ROM_REGION16_BE( 0x2000, "internal", 0 ) + ROM_LOAD( "c67.bin", 0, 0x2000, CRC(6bd8988e) SHA1(c9ec18d5f88d53976b94444eedc64d5568155958) ) +ROM_END + +const tiny_rom_entry *namco_c67_device::device_rom_region() const +{ + return ROM_NAME(c67); +} diff --git a/src/mame/machine/namco_c67.h b/src/mame/machine/namco_c67.h new file mode 100644 index 00000000000..9aa54dac090 --- /dev/null +++ b/src/mame/machine/namco_c67.h @@ -0,0 +1,25 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_MACHINE_NAMCO_C67_H +#define MAME_MACHINE_NAMCO_C67_H + +#pragma once + +#include "cpu/tms32025/tms32025.h" + +// base class +class namco_c67_device : public tms32025_device +{ +public: + namco_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual const tiny_rom_entry *device_rom_region() const override; + +}; + +DECLARE_DEVICE_TYPE(NAMCO_C67, namco_c67_device) + + + +#endif // MAME_MACHINE_NAMCO_C67_H diff --git a/src/mame/machine/namcos21_dsp.cpp b/src/mame/machine/namcos21_dsp.cpp new file mode 100644 index 00000000000..30caac6c524 --- /dev/null +++ b/src/mame/machine/namcos21_dsp.cpp @@ -0,0 +1,275 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, David Haywood + +/* + +Common code for the original Namco System 21 DSP board, with a single DSP +used by Winning Run, Driver's Eyes + +TODO: handle protection properly and with callbacks + some of the list processing should probably be in the 3d device, split it out + +*/ + +#include "emu.h" +#include "namcos21_dsp.h" + +DEFINE_DEVICE_TYPE(NAMCOS21_DSP, namcos21_dsp_device, "namcos21_dsp_device", "Namco System 21 DSP Setup (1x TMS320C25 type)") + +namcos21_dsp_device::namcos21_dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCOS21_DSP, tag, owner, clock), + m_dsp(*this, "dsp"), + m_winrun_dspbios(*this,"winrun_dspbios"), + m_winrun_polydata(*this,"winrun_polydata"), + m_ptrom16(*this,"point16"), + m_renderer(*this, finder_base::DUMMY_TAG) +{ +} + +void namcos21_dsp_device::device_start() +{ + m_winrun_dspcomram = std::make_unique(0x1000*2); + m_suspend_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos21_dsp_device::suspend_callback),this)); + m_pointram = std::make_unique(PTRAM_SIZE); + m_pointram_idx = 0; +} + +TIMER_CALLBACK_MEMBER(namcos21_dsp_device::suspend_callback) +{ + m_dsp->suspend(SUSPEND_REASON_HALT, true); +} + +void namcos21_dsp_device::device_reset() +{ + m_poly_frame_width = m_renderer->get_width(); + m_poly_frame_height = m_renderer->get_height(); + // can't suspend directly from here, needs to be on a timer? + m_suspend_timer->adjust(attotime::zero); +} + + +READ16_MEMBER(namcos21_dsp_device::winrun_dspcomram_r) +{ + int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + return mem[offset]; +} +WRITE16_MEMBER(namcos21_dsp_device::winrun_dspcomram_w) +{ + int bank = 1-(m_winrun_dspcomram_control[0x4/2]&1); + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + COMBINE_DATA( &mem[offset] ); +} + +READ16_MEMBER(namcos21_dsp_device::winrun_cuskey_r) +{ + int pc = m_dsp->pc(); + switch( pc ) + { + case 0x0064: /* winrun91 */ + return 0xFEBB; + case 0x006c: /* winrun91 */ + return 0xFFFF; + case 0x0073: /* winrun91 */ + return 0x0144; + + case 0x0075: /* winrun */ + return 0x24; + + default: + break; + } + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_cuskey_w) +{ +} + +void namcos21_dsp_device::winrun_flush_poly() +{ + if( m_winrun_poly_index>0 ) + { + const uint16_t *pSource = m_winrun_poly_buf; + uint16_t color; + int sx[4], sy[4], zcode[4]; + int j; + color = *pSource++; + if( color&0x8000 ) + { /* direct-draw */ + for( j=0; j<4; j++ ) + { + sx[j] = m_poly_frame_width/2 + (int16_t)*pSource++; + sy[j] = m_poly_frame_height/2 + (int16_t)*pSource++; + zcode[j] = *pSource++; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + } + else + { + int quad_idx = color*6; + for(;;) + { + uint8_t code = m_pointram[quad_idx++]; + color = m_pointram[quad_idx++]; + for( j=0; j<4; j++ ) + { + uint8_t vi = m_pointram[quad_idx++]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi*3+0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi*3+1]; + zcode[j] = pSource[vi*3+2]; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + if( code&0x80 ) + { /* end-of-quadlist marker */ + break; + } + } + } + m_winrun_poly_index = 0; + } +} /* winrun_flushpoly */ + +READ16_MEMBER(namcos21_dsp_device::winrun_poly_reset_r) +{ + winrun_flush_poly(); + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dsp_render_w) +{ + if( m_winrun_poly_indexpulse_input_line(INPUT_LINE_RESET, attotime::zero); + m_renderer->swap_and_clear_poly_framebuffer(); + } +} + +READ16_MEMBER(namcos21_dsp_device::winrun_table_r) +{ + return m_winrun_polydata[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dspbios_w) +{ + COMBINE_DATA( &m_winrun_dspbios[offset] ); + if( offset==0xfff ) // is this the real trigger? + { + m_winrun_dsp_alive = 1; + m_dsp->resume(SUSPEND_REASON_HALT); + } +} + +//380000 : read : dsp status? 1 = busy +//380000 : write(0x01) - done before dsp comram init +//380004 : dspcomram bank, as seen by 68k +//380008 : read : state? + +READ16_MEMBER(namcos21_dsp_device::winrun_68k_dspcomram_r) +{ + int bank = m_winrun_dspcomram_control[0x4/2]&1; + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + return mem[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_68k_dspcomram_w) +{ + int bank = m_winrun_dspcomram_control[0x4/2]&1; + uint16_t *mem = &m_winrun_dspcomram[0x1000*bank]; + COMBINE_DATA( &mem[offset] ); +} + +READ16_MEMBER(namcos21_dsp_device::winrun_dspcomram_control_r) +{ + return m_winrun_dspcomram_control[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_device::winrun_dspcomram_control_w) +{ + COMBINE_DATA( &m_winrun_dspcomram_control[offset] ); +} + + +void namcos21_dsp_device::winrun_dsp_program(address_map &map) +{ + // MCU is used in external program mode, program is uploaded to shared RAM by the 68k + map(0x0000, 0x0fff).ram().share("winrun_dspbios"); +} + +void namcos21_dsp_device::winrun_dsp_data(address_map &map) +{ + map(0x2000, 0x200f).rw(FUNC(namcos21_dsp_device::winrun_cuskey_r), FUNC(namcos21_dsp_device::winrun_cuskey_w)); + map(0x4000, 0x4fff).rw(FUNC(namcos21_dsp_device::winrun_dspcomram_r), FUNC(namcos21_dsp_device::winrun_dspcomram_w)); + map(0x8000, 0xffff).r(FUNC(namcos21_dsp_device::winrun_table_r)); +} + +void namcos21_dsp_device::winrun_dsp_io(address_map &map) +{ + map(0x08, 0x09).rw(FUNC(namcos21_dsp_device::winrun_dsp_pointrom_data_r), FUNC(namcos21_dsp_device::winrun_dsp_pointrom_addr_w)); + map(0x0a, 0x0a).w(FUNC(namcos21_dsp_device::winrun_dsp_render_w)); + map(0x0b, 0x0b).nopw(); + map(0x0c, 0x0c).w(FUNC(namcos21_dsp_device::winrun_dsp_complete_w)); +} + + +void namcos21_dsp_device::device_add_mconfig(machine_config &config) +{ + tms32025_device& dsp(TMS32025(config, m_dsp, 24000000*2)); /* 48 MHz? overclocked */ + dsp.set_addrmap(AS_PROGRAM, &namcos21_dsp_device::winrun_dsp_program); + dsp.set_addrmap(AS_DATA, &namcos21_dsp_device::winrun_dsp_data); + dsp.set_addrmap(AS_IO, &namcos21_dsp_device::winrun_dsp_io); + dsp.bio_in_cb().set(FUNC(namcos21_dsp_device::winrun_poly_reset_r)); + dsp.hold_in_cb().set_constant(0); + dsp.hold_ack_out_cb().set_nop(); + dsp.xf_out_cb().set_nop(); +} + +WRITE16_MEMBER(namcos21_dsp_device::pointram_control_w) +{ + COMBINE_DATA( &m_pointram_control ); + m_pointram_idx = 0; /* HACK */ +} + +READ16_MEMBER(namcos21_dsp_device::pointram_data_r) +{ + return m_pointram[m_pointram_idx]; +} + +WRITE16_MEMBER(namcos21_dsp_device::pointram_data_w) +{ + if( ACCESSING_BITS_0_7 ) + { + m_pointram[m_pointram_idx++] = data; + m_pointram_idx &= (PTRAM_SIZE-1); + } +} diff --git a/src/mame/machine/namcos21_dsp.h b/src/mame/machine/namcos21_dsp.h new file mode 100644 index 00000000000..17bf24a4c5c --- /dev/null +++ b/src/mame/machine/namcos21_dsp.h @@ -0,0 +1,85 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_NAMCOS21_DSP_H +#define MAME_VIDEO_NAMCOS21_DSP_H + +#pragma once + +#include "cpu/tms32025/tms32025.h" +#include "video/namcos21_3d.h" + +#define WINRUN_MAX_POLY_PARAM (1+256*3) + +#define PTRAM_SIZE 0x20000 + +class namcos21_dsp_device : public device_t +{ +public: + namcos21_dsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // config + template void set_renderer_tag(T &&tag) { m_renderer.set_tag(std::forward(tag)); } + + DECLARE_WRITE16_MEMBER(winrun_dspbios_w); + DECLARE_READ16_MEMBER(winrun_68k_dspcomram_r); + DECLARE_WRITE16_MEMBER(winrun_68k_dspcomram_w); + DECLARE_READ16_MEMBER(winrun_dspcomram_control_r); + DECLARE_WRITE16_MEMBER(winrun_dspcomram_control_w); + + DECLARE_WRITE16_MEMBER(pointram_control_w); + DECLARE_READ16_MEMBER(pointram_data_r); + DECLARE_WRITE16_MEMBER(pointram_data_w); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + virtual void device_add_mconfig(machine_config &config) override; + + void winrun_dsp_data(address_map &map); + void winrun_dsp_io(address_map &map); + void winrun_dsp_program(address_map &map); +private: + + required_device m_dsp; + required_shared_ptr m_winrun_dspbios; + required_shared_ptr m_winrun_polydata; + required_region_ptr m_ptrom16; + + required_device m_renderer; + std::unique_ptr m_pointram; + int m_pointram_idx; + uint16_t m_pointram_control; + + uint16_t m_winrun_dspcomram_control[8]; + std::unique_ptr m_winrun_dspcomram; + uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM]; + int m_winrun_poly_index; + uint32_t m_winrun_pointrom_addr; + int m_winrun_dsp_alive; + + void winrun_flush_poly(); + + int m_poly_frame_width; + int m_poly_frame_height; + + DECLARE_READ16_MEMBER(winrun_cuskey_r); + DECLARE_WRITE16_MEMBER(winrun_cuskey_w); + DECLARE_READ16_MEMBER(winrun_dspcomram_r); + DECLARE_WRITE16_MEMBER(winrun_dspcomram_w); + DECLARE_READ16_MEMBER(winrun_table_r); + DECLARE_WRITE16_MEMBER(winrun_dsp_complete_w); + DECLARE_WRITE16_MEMBER(winrun_dsp_render_w); + DECLARE_READ16_MEMBER(winrun_poly_reset_r); + DECLARE_WRITE16_MEMBER(winrun_dsp_pointrom_addr_w); + DECLARE_READ16_MEMBER(winrun_dsp_pointrom_data_r); + + TIMER_CALLBACK_MEMBER(suspend_callback); + emu_timer *m_suspend_timer; + +}; + +DECLARE_DEVICE_TYPE(NAMCOS21_DSP, namcos21_dsp_device) + +#endif // MAME_VIDEO_NAMCOS21_DSP_H diff --git a/src/mame/machine/namcos21_dsp_c67.cpp b/src/mame/machine/namcos21_dsp_c67.cpp new file mode 100644 index 00000000000..c3167ce6b75 --- /dev/null +++ b/src/mame/machine/namcos21_dsp_c67.cpp @@ -0,0 +1,769 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, David Haywood + +/* + +Common code for the later Namco System 21 DSP board 5 TMS320C25 DSPs with custom Namco programming (marked C67) in a 1x Master, 4x Slave configuration + +used by Star Blade, Cybersled + +TODO: handle protection properly and with callbacks + handle splitting of workload across slaves + remove hacks! + some of the list processing should probably be in the 3d device, split it out + +*/ + +#include "emu.h" +#include "namcos21_dsp_c67.h" + +DEFINE_DEVICE_TYPE(NAMCOS21_DSP_C67, namcos21_dsp_c67_device, "namcos21_dsp_c67_device", "Namco System 21 DSP Setup (5x C67 type)") + +namcos21_dsp_c67_device::namcos21_dsp_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCOS21_DSP_C67, tag, owner, clock), + m_renderer(*this, finder_base::DUMMY_TAG), + m_c67master(*this, "dspmaster"), + m_c67slave(*this, "dspslave%u", 0U), + m_ptrom24(*this,"point24"), + m_master_dsp_ram(*this,"master_dsp_ram"), + m_gametype(0), + m_yield_hack_cb(*this), + m_irq_enable(false) +{ +} + +void namcos21_dsp_c67_device::device_start() +{ + m_dspram16.resize(0x10000/2); // 0x8000 16-bit words + std::fill(std::begin(m_dspram16), std::end(m_dspram16), 0x0000); + + m_yield_hack_cb.resolve_safe(); + m_pointram = std::make_unique(PTRAM_SIZE); + m_mpDspState = make_unique_clear(); + + save_item(NAME(m_dspram16)); +} + +void namcos21_dsp_c67_device::device_reset() +{ + m_poly_frame_width = m_renderer->get_width(); + m_poly_frame_height = m_renderer->get_height(); + + /* DSP startup hacks */ + m_mbNeedsKickstart = 20; + if (m_gametype == NAMCOS21_CYBERSLED) + { + m_mbNeedsKickstart = 200; + } + + /* Wipe the framebuffers */ + m_renderer->swap_and_clear_poly_framebuffer(); + m_renderer->swap_and_clear_poly_framebuffer(); + + //reset_dsps(ASSERT_LINE); + + m_mpDspState->masterSourceAddr = 0; + m_mpDspState->slaveBytesAvailable = 0; + m_mpDspState->slaveBytesAdvertised = 0; + m_mpDspState->slaveInputStart = 0; + m_mpDspState->slaveOutputSize = 0; + m_mpDspState->masterDirectDrawSize = 0; + m_mpDspState->masterFinished = 0; + m_mpDspState->slaveActive = 0; + + m_pointram_idx = 0; + m_pointram_control = 0; + m_pointrom_idx = 0; + m_mPointRomMSB = 0; + m_mbPointRomDataAvailable = 0; + m_irq_enable = 0; + + // clear these? + //m_depthcue[2][0x400]; + //m_pointram + //m_mpDspState->slaveInputBuffer[DSP_BUF_MAX]; + //m_mpDspState->slaveOutputBuffer[DSP_BUF_MAX]; + //m_mpDspState->masterDirectDrawBuffer[256]; +} + +void namcos21_dsp_c67_device::reset_dsps(int state) +{ + if (m_c67master) + m_c67master->set_input_line(INPUT_LINE_RESET, state); + + if (m_c67slave[0]) + m_c67slave[0]->set_input_line(INPUT_LINE_RESET, state); +} + + +void namcos21_dsp_c67_device::reset_kickstart() +{ + //printf( "dspkick=0x%x\n", data ); + namcos21_kickstart_hacks(1); +} + +void namcos21_dsp_c67_device::device_add_mconfig(machine_config &config) +{ + namco_c67_device& dspmaster(NAMCO_C67(config, m_c67master, 24000000)); /* 24 MHz? overclocked */ + dspmaster.set_addrmap(AS_PROGRAM, &namcos21_dsp_c67_device::master_dsp_program); + dspmaster.set_addrmap(AS_DATA, &namcos21_dsp_c67_device::master_dsp_data); + dspmaster.set_addrmap(AS_IO, &namcos21_dsp_c67_device::master_dsp_io); + dspmaster.hold_in_cb().set_constant(0); + dspmaster.hold_ack_out_cb().set_nop(); + dspmaster.xf_out_cb().set(FUNC(namcos21_dsp_c67_device::dsp_xf_w)); + + for (int i = 0; i < 4; i++) + { + namco_c67_device& dspslave(NAMCO_C67(config, m_c67slave[i], 24000000)); /* 24 MHz? overclocked */ + dspslave.set_addrmap(AS_PROGRAM, &namcos21_dsp_c67_device::slave_dsp_program); + dspslave.set_addrmap(AS_DATA, &namcos21_dsp_c67_device::slave_dsp_data); + dspslave.set_addrmap(AS_IO, &namcos21_dsp_c67_device::slave_dsp_io); + dspslave.hold_in_cb().set_constant(0); + dspslave.hold_ack_out_cb().set_nop(); + dspslave.xf_out_cb().set(FUNC(namcos21_dsp_c67_device::slave_XF_output_w)); + + // the emulation currently only uses one slave DSP clocked at 4x the normal rate instead of the master splitting the workload across the 4 slaves + if (i!=0) + dspslave.set_disable(); + else + dspslave.set_clock(24000000*4); + } +} + + +WRITE16_MEMBER(namcos21_dsp_c67_device::dspcuskey_w) +{ /* TODO: proper cuskey emulation */ +} + +READ16_MEMBER(namcos21_dsp_c67_device::dspcuskey_r) +{ + uint16_t result = 0; + if( m_gametype == NAMCOS21_SOLVALOU ) + { + switch( m_c67master->pc() ) + { + case 0x805e: result = 0x0000; break; + case 0x805f: result = 0xfeba; break; + case 0x8067: result = 0xffff; break; + case 0x806e: result = 0x0145; break; + default: + logerror( "unk cuskey_r; pc=0x%x\n", m_c67master->pc() ); + break; + } + } + else if( m_gametype == NAMCOS21_CYBERSLED ) + { + switch( m_c67master->pc() ) + { + case 0x8061: result = 0xfe95; break; + case 0x8069: result = 0xffff; break; + case 0x8070: result = 0x016A; break; + default: + break; + } + } + else if( m_gametype == NAMCOS21_AIRCOMBAT ) + { + switch( m_c67master->pc() ) + { + case 0x8062: result = 0xfeb9; break; + case 0x806a: result = 0xffff; break; + case 0x8071: result = 0x0146; break; + default: + break; + } + } + return result; +} + +void namcos21_dsp_c67_device::transmit_word_to_slave(uint16_t data) +{ + unsigned offs = m_mpDspState->slaveInputStart+m_mpDspState->slaveBytesAvailable++; + m_mpDspState->slaveInputBuffer[offs%DSP_BUF_MAX] = data; + if (ENABLE_LOGGING) logerror( "+%04x(#%04x)\n", data, m_mpDspState->slaveBytesAvailable ); + m_mpDspState->slaveActive = 1; + if( m_mpDspState->slaveBytesAvailable >= DSP_BUF_MAX ) + { + fatalerror( "IDC overflow\n" ); + } +} + +void namcos21_dsp_c67_device::transfer_dsp_data() +{ + uint16_t addr = m_mpDspState->masterSourceAddr; + int mode = addr&0x8000; + addr&=0x7fff; + if( addr ) + { + for(;;) + { + int i; + uint16_t old = addr; + uint16_t code = m_dspram16[addr++]; + if( code == 0xffff ) + { + if( mode ) + { + addr = m_dspram16[addr]; + m_mpDspState->masterSourceAddr = addr; + if (ENABLE_LOGGING) logerror( "LOOP:0x%04x\n", addr ); + addr&=0x7fff; + if( old==addr ) + { + return; + } + } + else + { + m_mpDspState->masterSourceAddr = 0; + return; + } + } + else if( mode==0 ) + { /* direct data transfer */ + if (ENABLE_LOGGING) logerror( "DATA TFR(0x%x)\n", code ); + transmit_word_to_slave(code); + for( i=0; i2 ) + { + transmit_word_to_slave(0); /* pad1 */ + transmit_word_to_slave(len+1); + for( i=0; iswap_and_clear_poly_framebuffer(); + m_mpDspState->masterSourceAddr = 0; + m_mpDspState->slaveOutputSize = 0; + m_mpDspState->masterFinished = 0; + m_mpDspState->slaveActive = 0; + m_c67master->set_input_line(0, HOLD_LINE); + m_c67slave[0]->pulse_input_line(INPUT_LINE_RESET, attotime::zero); +} + +uint16_t namcos21_dsp_c67_device::read_word_from_slave_input() +{ + uint16_t data = 0; + if( m_mpDspState->slaveBytesAvailable>0 ) + { + data = m_mpDspState->slaveInputBuffer[m_mpDspState->slaveInputStart++]; + m_mpDspState->slaveInputStart %= DSP_BUF_MAX; + m_mpDspState->slaveBytesAvailable--; + if( m_mpDspState->slaveBytesAdvertised>0 ) + { + m_mpDspState->slaveBytesAdvertised--; + } + if (ENABLE_LOGGING) logerror( "%s:-%04x(0x%04x)\n", machine().describe_context(), data, m_mpDspState->slaveBytesAvailable ); + } + return data; +} + +uint16_t namcos21_dsp_c67_device::get_input_bytes_advertised_for_slave() +{ + if( m_mpDspState->slaveBytesAdvertised < m_mpDspState->slaveBytesAvailable ) + { + m_mpDspState->slaveBytesAdvertised++; + } + else if( m_mpDspState->slaveActive && m_mpDspState->masterFinished && m_mpDspState->masterSourceAddr ) + { + namcos21_kickstart_hacks(0); + } + return m_mpDspState->slaveBytesAdvertised; +} + +READ16_MEMBER(namcos21_dsp_c67_device::dspram16_r) +{ + return m_dspram16[offset]; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dspram16_hack_w) +{ + COMBINE_DATA(&m_dspram16[offset]); + + if (m_mpDspState->masterSourceAddr && offset == 1 + (m_mpDspState->masterSourceAddr & 0x7fff)) + { + if (ENABLE_LOGGING) logerror("IDC-CONTINUE\n"); + transfer_dsp_data(); + } + else if (m_gametype == NAMCOS21_SOLVALOU && offset == 0x103) + { + // HACK: synchronization for solvalou - is this really needed? + m_yield_hack_cb(1); + } +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dspram16_w) +{ + COMBINE_DATA(&m_dspram16[offset]); + + if (m_mpDspState->masterSourceAddr && offset == 1 + (m_mpDspState->masterSourceAddr & 0x7fff)) + { + if (ENABLE_LOGGING) logerror("IDC-CONTINUE\n"); + transfer_dsp_data(); + } +} + +/***********************************************************/ + +int32_t namcos21_dsp_c67_device::read_pointrom_data(unsigned offset) +{ + return m_ptrom24[offset]; +} + + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port0_r) +{ + int32_t data = read_pointrom_data(m_pointrom_idx++); + m_mPointRomMSB = (uint8_t)(data>>16); + m_mbPointRomDataAvailable = 1; + return (uint16_t)data; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port0_w) +{ /* unused? */ + if (ENABLE_LOGGING) logerror( "PTRAM_LO(0x%04x)\n", data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port1_r) +{ + if( m_mbPointRomDataAvailable ) + { + m_mbPointRomDataAvailable = 0; + return m_mPointRomMSB; + } + return 0x8000; /* IDC ack? */ +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port1_w) +{ /* unused? */ + if (ENABLE_LOGGING) logerror( "PTRAM_HI(0x%04x)\n", data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port2_r) +{ /* IDC TRANSMIT ENABLE? */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port2_w) +{ + if (ENABLE_LOGGING) logerror( "IDC ADDR INIT(0x%04x)\n", data ); + m_mpDspState->masterSourceAddr = data; + transfer_dsp_data(); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port3_idc_rcv_enable_r) +{ /* IDC RECEIVE ENABLE? */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port3_w) +{ + m_pointrom_idx<<=16; + m_pointrom_idx|=data; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port4_w) +{ /* receives $0B<<4 prior to IDC setup */ +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port8_r) +{ /* SMU status */ + return 1; +} + + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_port8_w) +{ + if (ENABLE_LOGGING) logerror( "port8_w(%d)\n", data ); + if( data ) + { + m_mpDspState->masterFinished = 1; + } + m_irq_enable = data; +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_port9_r) +{ /* render-device-busy; used for direct-draw */ + return 0; +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_porta_r) +{ /* config */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_porta_w) +{ + /* boot: 1 */ + /* IRQ0 end: 0 */ + /* INT2 begin: 1 */ + /* direct-draw begin: 0 */ + /* INT1 begin: 1 */ +// if (ENABLE_LOGGING) logerror( "dsp_porta_w(0x%04x)\n", data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_portb_r) +{ /* config */ + return 1; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_portb_w) +{ + if( data==0 ) + { /* only 0->1 transition triggers */ + return; + } + if( m_mpDspState->masterDirectDrawSize == 13 ) + { + int i; + int sx[4], sy[4], zcode[4]; + int color = m_mpDspState->masterDirectDrawBuffer[0]; + for( i=0; i<4; i++ ) + { + sx[i] = m_poly_frame_width/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+1]; + sy[i] = m_poly_frame_height/2 + (int16_t)m_mpDspState->masterDirectDrawBuffer[i*3+2]; + zcode[i] = m_mpDspState->masterDirectDrawBuffer[i*3+3]; + } + if( color&0x8000 ) + { + m_renderer->draw_quad(sx, sy, zcode, color); + } + else + { + logerror( "indirection used w/ direct draw?\n" ); + } + } + else if( m_mpDspState->masterDirectDrawSize ) + { + logerror( "unexpected masterDirectDrawSize=%d!\n",m_mpDspState->masterDirectDrawSize ); + } + m_mpDspState->masterDirectDrawSize = 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_portc_w) +{ + if( m_mpDspState->masterDirectDrawSize < DSP_BUF_MAX ) + { + m_mpDspState->masterDirectDrawBuffer[m_mpDspState->masterDirectDrawSize++] = data; + } + else + { + logerror( "portc overflow\n" ); + } +} + +READ16_MEMBER(namcos21_dsp_c67_device::dsp_portf_r) +{ /* informs BIOS that this is Master DSP */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::dsp_xf_w) +{ + if (ENABLE_LOGGING) logerror("xf(%d)\n",data); +} + +void namcos21_dsp_c67_device::master_dsp_program(address_map &map) +{ + map(0x8000, 0xbfff).ram().share("master_dsp_ram"); +} + +void namcos21_dsp_c67_device::master_dsp_data(address_map &map) +{ + map(0x2000, 0x200f).rw(FUNC(namcos21_dsp_c67_device::dspcuskey_r), FUNC(namcos21_dsp_c67_device::dspcuskey_w)); + map(0x8000, 0xffff).rw(FUNC(namcos21_dsp_c67_device::dspram16_r), FUNC(namcos21_dsp_c67_device::dspram16_w)); /* 0x8000 words */ +} + +void namcos21_dsp_c67_device::master_dsp_io(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(namcos21_dsp_c67_device::dsp_port0_r), FUNC(namcos21_dsp_c67_device::dsp_port0_w)); + map(0x01, 0x01).rw(FUNC(namcos21_dsp_c67_device::dsp_port1_r), FUNC(namcos21_dsp_c67_device::dsp_port1_w)); + map(0x02, 0x02).rw(FUNC(namcos21_dsp_c67_device::dsp_port2_r), FUNC(namcos21_dsp_c67_device::dsp_port2_w)); + map(0x03, 0x03).rw(FUNC(namcos21_dsp_c67_device::dsp_port3_idc_rcv_enable_r), FUNC(namcos21_dsp_c67_device::dsp_port3_w)); + map(0x04, 0x04).w(FUNC(namcos21_dsp_c67_device::dsp_port4_w)); + map(0x08, 0x08).rw(FUNC(namcos21_dsp_c67_device::dsp_port8_r), FUNC(namcos21_dsp_c67_device::dsp_port8_w)); + map(0x09, 0x09).r(FUNC(namcos21_dsp_c67_device::dsp_port9_r)); + map(0x0a, 0x0a).rw(FUNC(namcos21_dsp_c67_device::dsp_porta_r), FUNC(namcos21_dsp_c67_device::dsp_porta_w)); + map(0x0b, 0x0b).rw(FUNC(namcos21_dsp_c67_device::dsp_portb_r), FUNC(namcos21_dsp_c67_device::dsp_portb_w)); + map(0x0c, 0x0c).w(FUNC(namcos21_dsp_c67_device::dsp_portc_w)); + map(0x0f, 0x0f).r(FUNC(namcos21_dsp_c67_device::dsp_portf_r)); +} + +/************************************************************************************/ + +void namcos21_dsp_c67_device::render_slave_output(uint16_t data) +{ + if( m_mpDspState->slaveOutputSize >= 4096 ) + { + fatalerror( "SLAVE OVERFLOW (0x%x)\n",m_mpDspState->slaveOutputBuffer[0] ); + } + + /* append word to slave output buffer */ + m_mpDspState->slaveOutputBuffer[m_mpDspState->slaveOutputSize++] = data; + + { + uint16_t *pSource = m_mpDspState->slaveOutputBuffer; + uint16_t count = *pSource++; + if( count && m_mpDspState->slaveOutputSize > count ) + { + uint16_t color = *pSource++; + int sx[4], sy[4],zcode[4]; + int j; + if( color&0x8000 ) + { + if( count!=13 ) logerror( "?!direct-draw(%d)\n", count ); + for( j=0; j<4; j++ ) + { + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[3*j+0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[3*j+1]; + zcode[j] = pSource[3*j+2]; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + } + else + { + int quad_idx = color*6; + for(;;) + { + uint8_t code = m_pointram[quad_idx++]; + color = m_pointram[quad_idx++]|(code<<8); + for( j=0; j<4; j++ ) + { + uint8_t vi = m_pointram[quad_idx++]; + sx[j] = m_poly_frame_width/2 + (int16_t)pSource[vi*3+0]; + sy[j] = m_poly_frame_height/2 + (int16_t)pSource[vi*3+1]; + zcode[j] = pSource[vi*3+2]; + } + m_renderer->draw_quad(sx, sy, zcode, color&0x7fff); + if( code&0x80 ) + { /* end-of-quadlist marker */ + break; + } + } + } + m_mpDspState->slaveOutputSize = 0; + } + else if( count==0 ) + { + fatalerror( "RenderSlaveOutput\n" ); + } + } +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_port0_r) +{ + return read_word_from_slave_input(); +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::slave_port0_w) +{ + render_slave_output(data); +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_port2_r) +{ + return get_input_bytes_advertised_for_slave(); +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_port3_r) +{ /* render-device queue size */ + /* up to 0x1fe bytes? + * slave blocks until free &space exists + */ + return 0; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::slave_port3_w) +{ /* 0=busy, 1=ready? */ +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::slave_XF_output_w) +{ + if (ENABLE_LOGGING) logerror( "%s :slaveXF(%d)\n", machine().describe_context(), data ); +} + +READ16_MEMBER(namcos21_dsp_c67_device::slave_portf_r) +{ /* informs BIOS that this is Slave DSP */ + return 1; +} + +void namcos21_dsp_c67_device::slave_dsp_program(address_map &map) +{ + map(0x8000, 0x8fff).ram(); +} + +void namcos21_dsp_c67_device::slave_dsp_data(address_map &map) +{ + /* no external data memory */ +} + +void namcos21_dsp_c67_device::slave_dsp_io(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(namcos21_dsp_c67_device::slave_port0_r), FUNC(namcos21_dsp_c67_device::slave_port0_w)); + map(0x02, 0x02).r(FUNC(namcos21_dsp_c67_device::slave_port2_r)); + map(0x03, 0x03).rw(FUNC(namcos21_dsp_c67_device::slave_port3_r), FUNC(namcos21_dsp_c67_device::slave_port3_w)); + map(0x0f, 0x0f).r(FUNC(namcos21_dsp_c67_device::slave_portf_r)); +} + +/************************************************************************************/ + +/** + * 801f->800f : prepare for master access to point ram + * 801f : done + * + * #bits data line + * 8 1a0 4 + * 7 0f8 4 + * 7 0ff 4 + * 1 001 4 + * 7 00a 2 + * a 0fe 8 + * + * line #bits data + * 0003 000A 000004FE + * 0001 0007 0000000A + * 0002 001A 03FFF1A0 + */ +WRITE16_MEMBER(namcos21_dsp_c67_device::pointram_control_w) +{ +// uint16_t prev = m_pointram_control; + COMBINE_DATA( &m_pointram_control ); + + /* m_pointram_control&0x20 : bank for depthcue data */ +#if 0 + logerror( "%s dsp_control_w:[%x]:=%04x ", + machine().describe_context(), + offset, + m_pointram_control ); + + uint16_t delta = (prev^m_pointram_control)&m_pointram_control; + if( delta&0x10 ) + { + logerror( " [reset]" ); + } + if( delta&2 ) + { + logerror( " send(A)%x", m_pointram_control&1 ); + } + if( delta&4 ) + { + logerror( " send(B)%x", m_pointram_control&1 ); + } + if( delta&8 ) + { + logerror( " send(C)%x", m_pointram_control&1 ); + } + logerror( "\n" ); +#endif + m_pointram_idx = 0; /* HACK */ +} + +READ16_MEMBER(namcos21_dsp_c67_device::pointram_data_r) +{ + return m_pointram[m_pointram_idx]; +} + +WRITE16_MEMBER(namcos21_dsp_c67_device::pointram_data_w) +{ + if( ACCESSING_BITS_0_7 ) + { +// if( (m_pointram_idx%6)==0 ) logerror("\n" ); +// logerror( " %02x", data ); + m_pointram[m_pointram_idx++] = data; + m_pointram_idx &= (PTRAM_SIZE-1); + } +} + + +READ16_MEMBER(namcos21_dsp_c67_device::namcos21_depthcue_r) +{ + int bank = (m_pointram_control&0x20)?1:0; + return m_depthcue[bank][offset]; +} +WRITE16_MEMBER(namcos21_dsp_c67_device::namcos21_depthcue_w) +{ + if( ACCESSING_BITS_0_7 ) + { + int bank = (m_pointram_control&0x20)?1:0; + m_depthcue[bank][offset] = data; +// if( (offset&0xf)==0 ) logerror( "\n depthcue: " ); +// logerror( " %02x", data ); + } +} diff --git a/src/mame/machine/namcos21_dsp_c67.h b/src/mame/machine/namcos21_dsp_c67.h new file mode 100644 index 00000000000..b8790f71858 --- /dev/null +++ b/src/mame/machine/namcos21_dsp_c67.h @@ -0,0 +1,147 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_NAMCOS21_DSP_C67_H +#define MAME_VIDEO_NAMCOS21_DSP_C67_H + +#pragma once + +#include "machine/namco_c67.h" +#include "video/namcos21_3d.h" + +#define PTRAM_SIZE 0x20000 + +#define ENABLE_LOGGING 0 + +class namcos21_dsp_c67_device : public device_t +{ +public: + enum + { /* Namco System21 */ + NAMCOS21_AIRCOMBAT = 0x4000, + NAMCOS21_STARBLADE, + NAMCOS21_CYBERSLED, + NAMCOS21_SOLVALOU, + }; + + namcos21_dsp_c67_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // config + template void set_renderer_tag(T &&tag) { m_renderer.set_tag(std::forward(tag)); } + template devcb_base &set_yield_hack_callback(Object &&cb) { return m_yield_hack_cb.set_callback(std::forward(cb)); } + auto yield_hack_callback() { return m_yield_hack_cb.bind(); } + + void set_gametype(int gametype) { m_gametype = gametype; } + + DECLARE_READ16_MEMBER(dspram16_r); + DECLARE_WRITE16_MEMBER(dspram16_hack_w); + DECLARE_WRITE16_MEMBER(dspram16_w); + DECLARE_WRITE16_MEMBER(pointram_control_w); + DECLARE_READ16_MEMBER(pointram_data_r); + DECLARE_WRITE16_MEMBER(pointram_data_w); + DECLARE_READ16_MEMBER(namcos21_depthcue_r); + DECLARE_WRITE16_MEMBER(namcos21_depthcue_w); + + void reset_dsps(int state); + void reset_kickstart(); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + virtual void device_add_mconfig(machine_config &config) override; + +private: + #define DSP_BUF_MAX (4096*12) + struct dsp_state + { + unsigned masterSourceAddr; + uint16_t slaveInputBuffer[DSP_BUF_MAX]; + unsigned slaveBytesAvailable; + unsigned slaveBytesAdvertised; + unsigned slaveInputStart; + uint16_t slaveOutputBuffer[DSP_BUF_MAX]; + unsigned slaveOutputSize; + uint16_t masterDirectDrawBuffer[256]; + unsigned masterDirectDrawSize; + int masterFinished; + int slaveActive; + }; + + required_device m_renderer; + required_device m_c67master; + required_device_array m_c67slave; + required_region_ptr m_ptrom24; + std::vector m_dspram16; + + required_shared_ptr m_master_dsp_ram; + + int m_gametype; // hacks + devcb_write_line m_yield_hack_cb; + + std::unique_ptr m_mpDspState; + + std::unique_ptr m_pointram; + int m_pointram_idx; + uint16_t m_pointram_control; + uint32_t m_pointrom_idx; + uint8_t m_mPointRomMSB; + int m_mbPointRomDataAvailable; + uint8_t m_depthcue[2][0x400]; + int m_irq_enable; + + int m_mbNeedsKickstart; + + int m_poly_frame_width; + int m_poly_frame_height; + + int32_t read_pointrom_data(unsigned offset); + void transmit_word_to_slave(uint16_t data); + void transfer_dsp_data(); + uint16_t read_word_from_slave_input(); + uint16_t get_input_bytes_advertised_for_slave(); + void render_slave_output(uint16_t data); + + void namcos21_kickstart_hacks(int internal); + + DECLARE_WRITE16_MEMBER(dspcuskey_w); + DECLARE_READ16_MEMBER(dspcuskey_r); + DECLARE_READ16_MEMBER(dsp_port0_r); + DECLARE_WRITE16_MEMBER(dsp_port0_w); + DECLARE_READ16_MEMBER(dsp_port1_r); + DECLARE_WRITE16_MEMBER(dsp_port1_w); + DECLARE_READ16_MEMBER(dsp_port2_r); + DECLARE_WRITE16_MEMBER(dsp_port2_w); + DECLARE_READ16_MEMBER(dsp_port3_idc_rcv_enable_r); + DECLARE_WRITE16_MEMBER(dsp_port3_w); + DECLARE_WRITE16_MEMBER(dsp_port4_w); + DECLARE_READ16_MEMBER(dsp_port8_r); + DECLARE_WRITE16_MEMBER(dsp_port8_w); + DECLARE_READ16_MEMBER(dsp_port9_r); + DECLARE_READ16_MEMBER(dsp_porta_r); + DECLARE_WRITE16_MEMBER(dsp_porta_w); + DECLARE_READ16_MEMBER(dsp_portb_r); + DECLARE_WRITE16_MEMBER(dsp_portb_w); + DECLARE_WRITE16_MEMBER(dsp_portc_w); + DECLARE_READ16_MEMBER(dsp_portf_r); + DECLARE_WRITE16_MEMBER(dsp_xf_w); + DECLARE_READ16_MEMBER(slave_port0_r); + DECLARE_WRITE16_MEMBER(slave_port0_w); + DECLARE_READ16_MEMBER(slave_port2_r); + DECLARE_READ16_MEMBER(slave_port3_r); + DECLARE_WRITE16_MEMBER(slave_port3_w); + DECLARE_WRITE16_MEMBER(slave_XF_output_w); + DECLARE_READ16_MEMBER(slave_portf_r); + + void master_dsp_data(address_map &map); + void master_dsp_io(address_map &map); + void master_dsp_program(address_map &map); + + void slave_dsp_data(address_map &map); + void slave_dsp_io(address_map &map); + void slave_dsp_program(address_map &map); +}; + +DECLARE_DEVICE_TYPE(NAMCOS21_DSP_C67, namcos21_dsp_c67_device) + +#endif // MAME_VIDEO_NAMCOS21_DSP_C67_H diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 64fdef0a394..93269bee4d7 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -29191,7 +29191,7 @@ valkyrie // (c) 1989 (Japan) aircomb // (c) 1992 (US) aircombj // (c) 1992 (Japan) cybsled // (c) 1993 (World) -cybsledj // (c) 1993 (Japan) +cybsleda // (c) 1993 (World) driveyes // (c) 1992? solvalou // (c) 1991 (Japan) starblad // (c) 1991 (World) diff --git a/src/mame/video/namcos21.cpp b/src/mame/video/namcos21.cpp deleted file mode 100644 index 620f0a01445..00000000000 --- a/src/mame/video/namcos21.cpp +++ /dev/null @@ -1,471 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Phil Stroffolino -/*************************************************************************** -Namco System 21 Video Hardware - -- sprite hardware is identical to Namco System NB1 -- there are no tilemaps -- 3d graphics are managed by DSP processors -*/ -/* Palette: - 0x0000..0x1fff sprite palettes (0x10 sets of 0x100 colors) - - 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors) - (in starblade, some palette animation effects are performed here) - - 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors) - - 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors) - - The polygon-dedicated color sets within a bank typically increase in - intensity from very dark to full intensity. - - Probably the selected palette is determined by most significant bits of z-code. - This is not yet hooked up. - */ - -#include "emu.h" -#include "includes/namcos21.h" - -#define FRAMEBUFFER_SIZE_IN_BYTES (sizeof(uint16_t)*NAMCOS21_POLY_FRAME_WIDTH*NAMCOS21_POLY_FRAME_HEIGHT) - -READ16_MEMBER(namcos21_state::winrun_gpu_color_r) -{ - return m_winrun_color; -} - -WRITE16_MEMBER(namcos21_state::winrun_gpu_color_w) -{ - COMBINE_DATA( &m_winrun_color ); -} - -READ16_MEMBER(namcos21_state::winrun_gpu_register_r) -{ - return m_winrun_gpu_register[offset]; -} - -WRITE16_MEMBER(namcos21_state::winrun_gpu_register_w) -{ - COMBINE_DATA( &m_winrun_gpu_register[offset] ); - m_screen->update_partial(m_screen->vpos()); -} - -WRITE16_MEMBER(namcos21_state::winrun_gpu_videoram_w) -{ - int color = data>>8; - int mask = data&0xff; - int i; - for( i=0; i<8; i++ ) - { - if( mask&(0x01<(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - m_mpPolyFrameBufferPens = std::make_unique(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - - m_mpPolyFrameBufferZ2 = std::make_unique(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - m_mpPolyFrameBufferPens2 = std::make_unique(FRAMEBUFFER_SIZE_IN_BYTES/2 ); - - clear_poly_framebuffer(); - clear_poly_framebuffer(); -} - -void namcos21_state::clear_poly_framebuffer() -{ - /* swap work and visible framebuffers */ - m_mpPolyFrameBufferZ.swap(m_mpPolyFrameBufferZ2); - - m_mpPolyFrameBufferPens.swap(m_mpPolyFrameBufferPens2); - - /* wipe work zbuffer */ - for( int i = 0; i < NAMCOS21_POLY_FRAME_WIDTH*NAMCOS21_POLY_FRAME_HEIGHT; i++ ) - { - m_mpPolyFrameBufferZ[i] = 0x7fff; - } -} - -void namcos21_state::copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi) -{ - /* blit the visible framebuffer */ - int sy; - for( sy=clip.top(); sy<=clip.bottom(); sy++ ) - { - uint16_t *dest = &bitmap.pix16(sy); - const uint16_t *pPen = m_mpPolyFrameBufferPens2.get()+NAMCOS21_POLY_FRAME_WIDTH*sy; - const uint16_t *pZ = m_mpPolyFrameBufferZ2.get()+NAMCOS21_POLY_FRAME_WIDTH*sy; - int sx; - for( sx=clip.left(); sx<=clip.right(); sx++ ) - { - int z = pZ[sx]; - //if( pZ[sx]!=0x7fff ) - if( z>=zlo && z<=zhi ) - { - dest[sx] = pPen[sx]; - } - } - } -} - - -/*********************************************************************************************/ - -#define SWAP(T,A,B) { const T *temp = A; A = B; B = temp; } - -void namcos21_state::renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable) -{ - if( e1->x > e2->x ) - { - SWAP(edge,e1,e2); - } - - { - uint16_t *pDest = m_mpPolyFrameBufferPens.get() + sy*NAMCOS21_POLY_FRAME_WIDTH; - uint16_t *pZBuf = m_mpPolyFrameBufferZ.get() + sy*NAMCOS21_POLY_FRAME_WIDTH; - int x0 = (int)e1->x; - int x1 = (int)e2->x; - int w = x1-x0; - if( w ) - { - double z = e1->z; - double dz = (e2->z - e1->z)/w; - int x, crop; - crop = - x0; - if( crop>0 ) - { - z += crop*dz; - x0 = 0; - } - if( x1>NAMCOS21_POLY_FRAME_WIDTH-1 ) - { - x1 = NAMCOS21_POLY_FRAME_WIDTH-1; - } - - for( x=x0; x0 ) - { - int depth = 0; - if( m_gametype == NAMCOS21_WINRUN91 ) - { - depth = (zz>>10)*0x100; - pen += depth; - } - else if( m_gametype == NAMCOS21_DRIVERS_EYES ) - { - depth = (zz>>10)*0x100; - pen -= depth; - } - else - { - depth = (zz>>11)*0x200; - pen -= depth; - } - } - pDest[x] = pen; - pZBuf[x] = zz; - } - z += dz; - } - } - } -} - -void namcos21_state::rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable) -{ - int dy,ystart,yend,crop; - - /* first, sort so that v0->y <= v1->y <= v2->y */ - for(;;) - { - if( v0->y > v1->y ) - { - SWAP(n21_vertex,v0,v1); - } - else if( v1->y > v2->y ) - { - SWAP(n21_vertex,v1,v2); - } - else - { - break; - } - } - - ystart = v0->y; - yend = v2->y; - dy = yend-ystart; - if( dy ) - { - int y; - edge e1; /* short edge (top and bottom) */ - edge e2; /* long (common) edge */ - - double dx2dy = (v2->x - v0->x)/dy; - double dz2dy = (v2->z - v0->z)/dy; - - double dx1dy; - double dz1dy; - - e2.x = v0->x; - e2.z = v0->z; - crop = -ystart; - if( crop>0 ) - { - e2.x += dx2dy*crop; - e2.z += dz2dy*crop; - } - - ystart = v0->y; - yend = v1->y; - dy = yend-ystart; - if( dy ) - { - e1.x = v0->x; - e1.z = v0->z; - - dx1dy = (v1->x - v0->x)/dy; - dz1dy = (v1->z - v0->z)/dy; - - crop = -ystart; - if( crop>0 ) - { - e1.x += dx1dy*crop; - e1.z += dz1dy*crop; - ystart = 0; - } - if( yend>NAMCOS21_POLY_FRAME_HEIGHT-1 ) yend = NAMCOS21_POLY_FRAME_HEIGHT-1; - - for( y=ystart; yy; - yend = v2->y; - dy = yend-ystart; - if( dy ) - { - e1.x = v1->x; - e1.z = v1->z; - - dx1dy = (v2->x - v1->x)/dy; - dz1dy = (v2->z - v1->z)/dy; - - crop = -ystart; - if( crop>0 ) - { - e1.x += dx1dy*crop; - e1.z += dz1dy*crop; - ystart = 0; - } - if( yend>NAMCOS21_POLY_FRAME_HEIGHT-1 ) - { - yend = NAMCOS21_POLY_FRAME_HEIGHT-1; - } - for( y=ystart; y>8; - if( code&0x80 ) - { - color = color&0xff; -// color = 0x3e00|color; - color = 0x2100|color; - depthcueenable = 0; - } - else - { - color&=0xff; - color = 0x3e00|color; - if( (code&0x02)==0 ) - { - color|=0x100; - } - } - } - a.x = sx[0]; - a.y = sy[0]; - a.z = zcode[0]; - - b.x = sx[1]; - b.y = sy[1]; - b.z = zcode[1]; - - c.x = sx[2]; - c.y = sy[2]; - c.z = zcode[2]; - - d.x = sx[3]; - d.y = sy[3]; - d.z = zcode[3]; - - rendertri(&a, &b, &c, color, depthcueenable); - rendertri(&c, &d, &a, color, depthcueenable); -} - -VIDEO_START_MEMBER(namcos21_state,namcos21) -{ - if( m_gametype == NAMCOS21_WINRUN91 ) - { - m_videoram = std::make_unique(0x80000); - m_maskram = std::make_unique(0x80000); - } - allocate_poly_framebuffer(); -} - -uint32_t namcos21_state::screen_update_namcos21(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - //uint8_t *videoram = m_videoram.get(); - int pivot = 3; - int pri; - bitmap.fill(0xff, cliprect ); - - m_c355spr->draw(screen, bitmap, cliprect, 2 ); - //draw(screen, bitmap, cliprect, 14 ); //driver's eyes - - copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); - - m_c355spr->draw(screen, bitmap, cliprect, 0 ); - m_c355spr->draw(screen, bitmap, cliprect, 1 ); - - copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); - - /* draw high priority 2d sprites */ - for( pri=pivot; pri<8; pri++ ) - { - m_c355spr->draw(screen, bitmap, cliprect, pri ); - } - // draw(screen, bitmap, cliprect, 15 ); //driver's eyes - return 0; -} - -uint32_t namcos21_state::screen_update_driveyes(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - //uint8_t *videoram = m_videoram.get(); - int pivot = 3; - int pri; - bitmap.fill(0xff, cliprect ); - - m_c355spr->draw(screen, bitmap, cliprect, 2 ); - m_c355spr->draw(screen, bitmap, cliprect, 14 ); //driver's eyes - - copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); - - m_c355spr->draw(screen, bitmap, cliprect, 0 ); - m_c355spr->draw(screen, bitmap, cliprect, 1 ); - - copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); - - for (pri = pivot; pri < 8; pri++) - { - m_c355spr->draw(screen, bitmap, cliprect, pri); - } - - m_c355spr->draw(screen, bitmap, cliprect, 15 ); //driver's eyes - - return 0; - -} - -void namcos21_state::winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - uint8_t *videoram = m_videoram.get(); - //printf("%d %d (%d %d) - %04x %04x %04x|%04x %04x\n",cliprect.top(),cliprect.bottom(),m_screen->vpos(),m_gpu_intc->get_posirq_line(),m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); - - int yscroll = -cliprect.top()+(int16_t)m_winrun_gpu_register[0x2/2]; - int xscroll = 0;//m_winrun_gpu_register[0xc/2] >> 7; - int base = 0x1000+0x100*(m_winrun_color&0xf); - int sx,sy; - for( sy=cliprect.top(); sy<=cliprect.bottom(); sy++ ) - { - const uint8_t *pSource = &videoram[((yscroll+sy)&0x3ff)*0x200]; - uint16_t *pDest = &bitmap.pix16(sy); - for( sx=cliprect.left(); sx<=cliprect.right(); sx++ ) - { - int pen = pSource[(sx+xscroll) & 0x1ff]; - switch( pen ) - { - case 0xff: - break; - // TODO: additive blending? winrun car select uses register [0xc] for a xscroll value - case 0x00: - pDest[sx] = (pDest[sx]&0x1fff)+0x4000; - break; - case 0x01: - pDest[sx] = (pDest[sx]&0x1fff)+0x6000; - break; - default: - pDest[sx] = base|pen; - break; - } - } - } -} - - -uint32_t namcos21_state::screen_update_winrun(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - bitmap.fill(0xff, cliprect ); - - copy_visible_poly_framebuffer(bitmap, cliprect, 0x7fc0, 0x7ffe); - copy_visible_poly_framebuffer(bitmap, cliprect, 0, 0x7fbf); - winrun_bitmap_draw(bitmap,cliprect); - - //popmessage("%04x %04x %04x|%04x %04x",m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]); - - return 0; -} diff --git a/src/mame/video/namcos21_3d.cpp b/src/mame/video/namcos21_3d.cpp new file mode 100644 index 00000000000..1702ba8be2d --- /dev/null +++ b/src/mame/video/namcos21_3d.cpp @@ -0,0 +1,311 @@ +// license:BSD-3-Clause +// copyright-holders:Phil Stroffolino, David Haywood + +#include "emu.h" +#include "namcos21_3d.h" + +DEFINE_DEVICE_TYPE(NAMCOS21_3D, namcos21_3d_device, "namcos21_3d", "Namco System 21 3D Rasterizer") + +namcos21_3d_device::namcos21_3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NAMCOS21_3D, tag, owner, clock), + m_fixed_palbase(-1), + m_zz_shift(10), + m_zzmult(0x100), + m_depth_reverse(false), + m_poly_frame_width(0), + m_poly_frame_height(0), + m_framebuffer_size_in_bytes(0) +{ +} + +void namcos21_3d_device::device_start() +{ + allocate_poly_framebuffer(); +} + +void namcos21_3d_device::device_reset() +{ +} + +void namcos21_3d_device::allocate_poly_framebuffer() +{ + if (m_framebuffer_size_in_bytes == 0) + fatalerror("m_framebuffer_size_in_bytes == 0\n"); + + m_mpPolyFrameBufferZ = std::make_unique(m_framebuffer_size_in_bytes / 2); + m_mpPolyFrameBufferPens = std::make_unique(m_framebuffer_size_in_bytes / 2); + + m_mpPolyFrameBufferZ2 = std::make_unique(m_framebuffer_size_in_bytes / 2); + m_mpPolyFrameBufferPens2 = std::make_unique(m_framebuffer_size_in_bytes / 2); + + swap_and_clear_poly_framebuffer(); + swap_and_clear_poly_framebuffer(); +} + +void namcos21_3d_device::swap_and_clear_poly_framebuffer() +{ + /* swap work and visible framebuffers */ + m_mpPolyFrameBufferZ.swap(m_mpPolyFrameBufferZ2); + + m_mpPolyFrameBufferPens.swap(m_mpPolyFrameBufferPens2); + + /* wipe work zbuffer */ + for (int i = 0; i < m_poly_frame_width*m_poly_frame_height; i++) + { + m_mpPolyFrameBufferZ[i] = 0x7fff; + } +} + +void namcos21_3d_device::copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi) +{ + /* blit the visible framebuffer */ + int sy; + for (sy = clip.top(); sy <= clip.bottom(); sy++) + { + uint16_t *dest = &bitmap.pix16(sy); + const uint16_t *pPen = m_mpPolyFrameBufferPens2.get() + m_poly_frame_width * sy; + const uint16_t *pZ = m_mpPolyFrameBufferZ2.get() + m_poly_frame_width * sy; + int sx; + for (sx = clip.left(); sx <= clip.right(); sx++) + { + int z = pZ[sx]; + //if( pZ[sx]!=0x7fff ) + if (z >= zlo && z <= zhi) + { + dest[sx] = pPen[sx]; + } + } + } +} + +/*********************************************************************************************/ + +#define SWAP(T,A,B) { const T *temp = A; A = B; B = temp; } + +void namcos21_3d_device::renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable) +{ + if (e1->x > e2->x) + { + SWAP(edge, e1, e2); + } + + { + uint16_t *pDest = m_mpPolyFrameBufferPens.get() + sy * m_poly_frame_width; + uint16_t *pZBuf = m_mpPolyFrameBufferZ.get() + sy * m_poly_frame_width; + int x0 = (int)e1->x; + int x1 = (int)e2->x; + int w = x1 - x0; + if (w) + { + double z = e1->z; + double dz = (e2->z - e1->z) / w; + int x, crop; + crop = -x0; + if (crop > 0) + { + z += crop * dz; + x0 = 0; + } + if (x1 > m_poly_frame_width - 1) + { + x1 = m_poly_frame_width - 1; + } + + for (x = x0; x < x1; x++) + { + uint16_t zz = (uint16_t)z; + if (zz < pZBuf[x]) + { + int pen = color; + if (depthcueenable && zz > 0) + { + int depth = 0; + if (m_depth_reverse) + { + depth = (zz >> m_zz_shift)*m_zzmult; + pen += depth; + } + else + { + depth = (zz >> m_zz_shift)*m_zzmult; + pen -= depth; + } + } + pDest[x] = pen; + pZBuf[x] = zz; + } + z += dz; + } + } + } +} + +void namcos21_3d_device::rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable) +{ + int dy, ystart, yend, crop; + + /* first, sort so that v0->y <= v1->y <= v2->y */ + for (;;) + { + if (v0->y > v1->y) + { + SWAP(n21_vertex, v0, v1); + } + else if (v1->y > v2->y) + { + SWAP(n21_vertex, v1, v2); + } + else + { + break; + } + } + + ystart = v0->y; + yend = v2->y; + dy = yend - ystart; + if (dy) + { + int y; + edge e1; /* short edge (top and bottom) */ + edge e2; /* long (common) edge */ + + double dx2dy = (v2->x - v0->x) / dy; + double dz2dy = (v2->z - v0->z) / dy; + + double dx1dy; + double dz1dy; + + e2.x = v0->x; + e2.z = v0->z; + crop = -ystart; + if (crop > 0) + { + e2.x += dx2dy * crop; + e2.z += dz2dy * crop; + } + + ystart = v0->y; + yend = v1->y; + dy = yend - ystart; + if (dy) + { + e1.x = v0->x; + e1.z = v0->z; + + dx1dy = (v1->x - v0->x) / dy; + dz1dy = (v1->z - v0->z) / dy; + + crop = -ystart; + if (crop > 0) + { + e1.x += dx1dy * crop; + e1.z += dz1dy * crop; + ystart = 0; + } + if (yend > m_poly_frame_height - 1) yend = m_poly_frame_height - 1; + + for (y = ystart; y < yend; y++) + { + renderscanline_flat(&e1, &e2, y, color, depthcueenable); + + e2.x += dx2dy; + e2.z += dz2dy; + + e1.x += dx1dy; + e1.z += dz1dy; + } + } + + ystart = v1->y; + yend = v2->y; + dy = yend - ystart; + if (dy) + { + e1.x = v1->x; + e1.z = v1->z; + + dx1dy = (v2->x - v1->x) / dy; + dz1dy = (v2->z - v1->z) / dy; + + crop = -ystart; + if (crop > 0) + { + e1.x += dx1dy * crop; + e1.z += dz1dy * crop; + ystart = 0; + } + if (yend > m_poly_frame_height - 1) + { + yend = m_poly_frame_height - 1; + } + for (y = ystart; y < yend; y++) + { + renderscanline_flat(&e1, &e2, y, color, depthcueenable); + + e2.x += dx2dy; + e2.z += dz2dy; + + e1.x += dx1dy; + e1.z += dz1dy; + } + } + } +} + +void namcos21_3d_device::draw_quad(int sx[4], int sy[4], int zcode[4], int color) +{ + n21_vertex a, b, c, d; + int depthcueenable = 1; + /* + 0x0000..0x1fff sprite palettes (0x20 sets of 0x100 colors) + 0x2000..0x3fff polygon palette bank0 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + 0x4000..0x5fff polygon palette bank1 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + 0x6000..0x7fff polygon palette bank2 (0x10 sets of 0x200 colors or 0x20 sets of 0x100 colors) + */ + + + if (m_fixed_palbase != -1) + { + // Winning Run & Driver's Eyes use this logic + color = m_fixed_palbase | (color & 0xff); + } + else + { /* map color code to hardware pen */ + int code = color >> 8; + if (code & 0x80) + { + color = color & 0xff; + // color = 0x3e00|color; + color = 0x2100 | color; + depthcueenable = 0; + } + else + { + color &= 0xff; + color = 0x3e00 | color; + if ((code & 0x02) == 0) + { + color |= 0x100; + } + } + } + a.x = sx[0]; + a.y = sy[0]; + a.z = zcode[0]; + + b.x = sx[1]; + b.y = sy[1]; + b.z = zcode[1]; + + c.x = sx[2]; + c.y = sy[2]; + c.z = zcode[2]; + + d.x = sx[3]; + d.y = sy[3]; + d.z = zcode[3]; + + rendertri(&a, &b, &c, color, depthcueenable); + rendertri(&c, &d, &a, color, depthcueenable); +} diff --git a/src/mame/video/namcos21_3d.h b/src/mame/video/namcos21_3d.h new file mode 100644 index 00000000000..78b2e18d103 --- /dev/null +++ b/src/mame/video/namcos21_3d.h @@ -0,0 +1,71 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +#ifndef MAME_VIDEO_NAMCOS21_3D_H +#define MAME_VIDEO_NAMCOS21_3D_H + +#pragma once + +class namcos21_3d_device : public device_t +{ +public: + namcos21_3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // config + void set_fixed_palbase(int base) { m_fixed_palbase = base; } + void set_zz_shift_mult(int shift, int mult) { m_zz_shift = shift; m_zzmult = mult; } + void set_depth_reverse(bool reverse) { m_depth_reverse = reverse; } + + void set_framebuffer_size(int width, int height) + { + m_poly_frame_width = width; + m_poly_frame_height = height; + m_framebuffer_size_in_bytes = (sizeof(uint16_t)*m_poly_frame_width*m_poly_frame_height); + } + + int get_width() { return m_poly_frame_width; } + int get_height() { return m_poly_frame_height; } + + void copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi); + void swap_and_clear_poly_framebuffer(); + + void draw_quad(int sx[4], int sy[4], int zcode[4], int color); + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + +private: + struct n21_vertex + { + double x,y; + double z; + }; + + struct edge + { + double x; + double z; + }; + + void renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable); + void rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable); + void allocate_poly_framebuffer(); + + std::unique_ptr m_mpPolyFrameBufferPens; + std::unique_ptr m_mpPolyFrameBufferZ; + std::unique_ptr m_mpPolyFrameBufferPens2; + std::unique_ptr m_mpPolyFrameBufferZ2; + + int m_fixed_palbase; + int m_zz_shift, m_zzmult; + bool m_depth_reverse; + + int m_poly_frame_width; + int m_poly_frame_height; + int m_framebuffer_size_in_bytes; +}; + +DECLARE_DEVICE_TYPE(NAMCOS21_3D, namcos21_3d_device) + +#endif // MAME_VIDEO_NAMCOS21_3D_H