tms5220.cpp : Remove unnecessary arguments in handlers (#4692)

This commit is contained in:
cam900 2019-03-31 00:47:30 +09:00 committed by R. Belmont
parent eee5a80ae0
commit cd9b9d0bcd
4 changed files with 7 additions and 7 deletions

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@ -67,7 +67,7 @@ READ8Z_MEMBER( ti_speech_synthesizer_device::readz )
// lines by setting the address bus to a different value, but the
// Geneve may behave differently. This may not 100% reflect the real
// situation, but it ensures a safe processing.
m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
m_vsp->combined_rsq_wsq_w(~0);
}
}
@ -106,11 +106,11 @@ SETADDRESS_DBIN_MEMBER( ti_speech_synthesizer_device::setaddress_dbin )
// both RS* and WS* are active, which is illegal.
// Alternatively, we'll use the combined settings method
m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, m_reading ? ~tms5220_device::RS : ~tms5220_device::WS);
m_vsp->combined_rsq_wsq_w(m_reading ? ~tms5220_device::RS : ~tms5220_device::WS);
}
else
// If other address, turn off RS* and WS* (negative logic!)
m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
m_vsp->combined_rsq_wsq_w(~0);
}
/****************************************************************************/
@ -125,7 +125,7 @@ WRITE_LINE_MEMBER( ti_speech_synthesizer_device::speech_ready )
if ((state==0) && !m_reading)
// Clear the lines only when we are done with writing.
m_vsp->combined_rsq_wsq_w(machine().dummy_space(), 0, ~0);
m_vsp->combined_rsq_wsq_w(~0);
}
void ti_speech_synthesizer_device::device_start()

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@ -1890,7 +1890,7 @@ WRITE_LINE_MEMBER( tms5220_device::wsq_w )
* /RS is bit 1, /WS is bit 0
* Note this is a hack and probably can be removed later, once the 'real' line handlers above defer by at least 4 clock cycles before taking effect
*/
WRITE8_MEMBER( tms5220_device::combined_rsq_wsq_w )
void tms5220_device::combined_rsq_wsq_w(u8 data)
{
uint8_t falling_edges;
m_true_timing = true;

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@ -48,7 +48,7 @@ public:
WRITE_LINE_MEMBER( rsq_w );
WRITE_LINE_MEMBER( wsq_w );
DECLARE_WRITE8_MEMBER( combined_rsq_wsq_w );
void combined_rsq_wsq_w(u8 data);
/* this combined_rsq_wsq_w hack is necessary for specific systems such as
the TI 99/8 since the 5220c and cd2501ecd do specific things if both lines
go active or inactive at slightly different times by separate write_line

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@ -123,7 +123,7 @@ WRITE8_MEMBER( pes_state::rsq_wsq_w )
logerror("port0 write: RSWS states updated: /RS: %d, /WS: %d\n", (data&0x2)>>1, data&0x1);
#endif
/* /RS is bit 1, /WS is bit 0 */
m_speech->combined_rsq_wsq_w(space, 0, data&0x3);
m_speech->combined_rsq_wsq_w(data&0x3);
}
WRITE8_MEMBER( pes_state::port1_w )