arm: fixed STR! with rd == rn. (nw)

This commit is contained in:
Sandro Ronco 2016-12-23 19:40:38 +01:00
parent 822c3b4232
commit cda99ff070

View File

@ -635,13 +635,7 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn )
rnv = (R15 & ADDRESS_MASK) - off;
}
if (insn & INSN_SDT_W)
{
SetRegister(rn,rnv);
if (ARM_DEBUG_CORE && rn == eR15)
logerror("writeback R15 %08x\n", R15);
}
else if (rn == eR15)
if (rn == eR15)
{
rnv = rnv + 8;
}
@ -685,7 +679,7 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn )
In other cases, 4 is subracted from R15 here to account for pipelining.
*/
if ((cpu_read32(rnv)&3)==0)
if (m_copro_type == ARM_COPRO_TYPE_VL86C020 || (cpu_read32(rnv)&3)==0)
R15 -= 4;
m_icount -= S_CYCLE + N_CYCLE;
@ -716,6 +710,18 @@ void arm_cpu_device::HandleMemSingle( uint32_t insn )
}
}
/* Do pre-indexing writeback */
if ((insn & INSN_SDT_P) && (insn & INSN_SDT_W))
{
if ((insn & INSN_SDT_L) && rd == rn)
SetRegister(rn, GetRegister(rd));
else
SetRegister(rn, rnv);
if (ARM_DEBUG_CORE && rn == eR15)
logerror("writeback R15 %08x\n", R15);
}
/* Do post-indexing writeback */
if (!(insn & INSN_SDT_P)/* && (insn&INSN_SDT_W)*/)
{