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Merge branch 'master' of https://github.com/mamedev/mame

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This commit is contained in:
Roberto Fresca 2018-09-16 15:56:20 +02:00
commit cdb4ae2fab
59 changed files with 1207 additions and 507 deletions
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12
docs/source/commandline/commandline-all.rst
View File

@ -133,7 +133,7 @@ Example:
.. _mame-commandline-listroms:
**-listroms** [<*pattern*>]
**-listroms** / **-lr** [<*pattern*>]
Displays a list of ROM images referenced by the specified pattern of system or device names. If no pattern is specified, the results will be *all* systems and devices.
@ -174,7 +174,7 @@ Example:
.. _mame-commandline-listslots:
**-listslots** [<*pattern*>]
**-listslots** / **-lslot** [<*pattern*>]
Show available slots and options for each slot (if available). Primarily used for MAME to allow control over internal plug-in cards, much like PCs needing video, sound and other expansion cards.
@ -190,25 +190,25 @@ Example:
.. _mame-commandline-listsoftware:
**-listsoftware** [<*pattern*>]
**-listsoftware** / **-lsoft** [<*pattern*>]
Posts to screen all software lists which can be used by the entered *pattern* or system. Note that this is simply a copy/paste of the .XML file which reside in the HASH folder which are allowed to be used.
.. _mame-commandline-verifysoftware:
**-verifysoftware** [<*pattern*>]
**-verifysoftware** / **-vsoft** [<*pattern*>]
Checks for invalid or missing ROM images in your software lists. By default all drivers that have valid ZIP files or directories in the rompath are verified; however, you can limit this list by specifying a specific driver name or *pattern* after the -verifysoftware command.
.. _mame-commandline-getsoftlist:
**-getsoftlist** [<*pattern*>]
**-getsoftlist** / **-glist** [<*pattern*>]
Posts to screen a specific software list which matches with the system name provided.
.. _mame-commandline-verifysoftlist:
**-verifysoftlist** [softwarelistname]
**-verifysoftlist** / **-vlist** [softwarelistname]
Checks a specified software list for missing ROM images if files exist for issued softwarelistname. By default, all drivers that have valid ZIP files or directories in the rompath are verified; however, you can limit this list by specifying a specific softwarelistname (without .XML) after the -verifysoftlist command.

49
hash/ibm5170.xml
View File

@ -9266,6 +9266,55 @@
</part>
</software>
<software name="heimdall">
<description>Heimdall</description>
<year>1992</year>
<publisher>Core Design</publisher>
<info name="developer" value="The 8th Day" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall [Core Design] [1992] [3.5HD] [Disk 1 of 5].img" size="1474560" crc="93610141" sha1="6d610d2402cc423169f46333303602251d9c41f1" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall [Core Design] [1992] [3.5HD] [Disk 2 of 5].img" size="1474560" crc="449bb3cb" sha1="aa57c403aad12b1f9c5258aa5bc0da1d0b3e5059" offset="0"/>
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall [Core Design] [1992] [3.5HD] [Disk 3 of 5].img" size="1474560" crc="7e5e7097" sha1="fe321736a36b25d794fe6b38e313a18f0ec1740b" offset="0"/>
</dataarea>
</part>
<part name="flop4" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall [Core Design] [1992] [3.5HD] [Disk 4 of 5].img" size="1474560" crc="077b1db2" sha1="3771378b2c6fd94dd018360a6fe647f414256196" offset="0"/>
</dataarea>
</part>
<part name="flop5" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall [Core Design] [1992] [3.5HD] [Disk 5 of 5].img" size="1474560" crc="2531f06f" sha1="bc40b0d2b9c0c61c838c1f858417e32545f1f5c4" offset="0"/>
</dataarea>
</part>
</software>
<software name="heimdal2">
<description>Heimdall 2: Into the Hall of Worlds</description>
<year>1994</year>
<publisher>Core Design</publisher>
<info name="developer" value="The 8th Day" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall 2 [Core Design] [1994] [3.5HD] [Disk 1 of 2].img" size="1474560" crc="36c5583d" sha1="d31a05f78342c21ee75f53e64a2bcf2df34bab0c" offset="0"/>
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size = "1474560">
<rom name="Heimdall 2 [Core Design] [1994] [3.5HD] [Disk 2 of 2].img" size="1474560" crc="350f6993" sha1="b71c6413d3ef4e8593f6a2dbe635dee9beadf7e7" offset="0"/>
</dataarea>
</part>
</software>
<software name="heretic">
<description>Heretic</description>
<year>1994</year>

189
plugins/hiscore/hiscore.dat
View File

@ -2550,6 +2550,7 @@ speedfrk:
;@s:circus.cpp
crash:
crasha:
smash:
@:maincpu,program,000f,2,00,00
@ -2858,6 +2859,9 @@ sf2ceea:
sf2ceja:
sf2cejb:
sf2cejc:
sf2cems6a:
sf2cems6b:
sf2cems6c:
sf2cet:
sf2ceua:
sf2ceub:
@ -4125,6 +4129,7 @@ stoffyu:
wwfwfest:
wwfwfestj:
wwfwfestu:
wwfwfestu1:
wwfwfestub:
@:maincpu,program,1c00c2,84,08,01
@ -5725,18 +5730,19 @@ asurabusa:
;@s:gaelco.cpp
bioplayc:
@:maincpu,program,ff078a,17,06,2e
;(biomechanical toy (unprotected))
;** you must let the highscore display in attract mode before starting a game **
biomtoy:
biomtoya:
biomtoyb:
biomtoyc:
@:maincpu,program,ff0794,17,06,2e
bioplayc:
@:maincpu,program,ff078a,17,06,2e
;(big karnak) (by GeoMan)
bigkarnk:
@:maincpu,program,102086,a0,00,0a
@ -6854,6 +6860,11 @@ venus:
;@s:halleys.cpp
halleysc87:
@:maincpu,program,fc5a,23,02,54
@:maincpu,program,fc3f,3,02,00
;*******(halley's comet)(By Firebrand)
halleysc:
halleyscj:
@ -6862,16 +6873,16 @@ halleyscja:
@:maincpu,program,fc21,3,02,00
halleyscjp:
@:maincpu,program,fc3c,23,02,2e
@:maincpu,program,fc21,3,02,00
;*******ben bero beh (japan)
benberob:
@:maincpu,program,fa4d,3,00,96
halleysc87:
@:maincpu,program,fc5a,23,02,54
@:maincpu,program,fc3f,3,02,00
;@s:hcastle.cpp
akumajou:
@ -7518,6 +7529,19 @@ pinbos:
;@s:lastduel.cpp
leds2011:
leds2011u:
@:maincpu,program,ff8890,78,00,00
@:maincpu,program,ffcb76,23,41,01
@:maincpu,program,ff87c9,1,d2,d2
leds2011p:
@:maincpu,program,ff8852,78,00,00
@:maincpu,program,ffc936,23,41,01
@:maincpu,program,ff87c9,1,d2,d2
lastduel:
lastduelb:
lastduelo:
@ -7533,12 +7557,6 @@ lastduelo:
@:maincpu,program,fccaed,1,00,00
leds2011u:
@:maincpu,program,ff8890,78,00,00
@:maincpu,program,ffcb76,23,41,01
@:maincpu,program,ff87c9,1,d2,d2
ledstorm:
madgear:
madgearj:
@ -8223,6 +8241,7 @@ magmax:
;Devastators clones
devstors:
devstors2:
devstorsv:
devstorsx:
garuka:
@ -8362,6 +8381,7 @@ springer:
mario:
mariobl:
mariobla:
marioe:
mariof:
marioj:
@ -10096,6 +10116,10 @@ pclubysa:
;@s:nmk16.cpp
hachamfa:
@:maincpu,program,fc000,3df,01,4e
tomagic:
@:maincpu,program,f905c,31,00,20
@ -11530,6 +11554,19 @@ raidenb:
;@s:raiden2.cpp
raiden2:
raiden2dx:
raiden2f:
raiden2hk:
raiden2i:
raiden2j:
raiden2k:
raiden2nl:
raiden2sw:
raiden2u:
@:maincpu,program,9dd4,ef,50,2a
;***** raiden dx fixed (thanks to Takasaki) **********
raidendx:
raidendxa1:
@ -11539,6 +11576,7 @@ raidendxg:
raidendxj:
raidendxk:
raidendxnl:
raidendxpt:
raidendxu:
@:maincpu,program,a25a,2cf,a0,2a
@ -11562,18 +11600,6 @@ zeroteamsr:
@:maincpu,program,9212,4b,40,55
raiden2:
raiden2dx:
raiden2f:
raiden2hk:
raiden2i:
raiden2j:
raiden2nl:
raiden2sw:
raiden2u:
@:maincpu,program,9dd4,ef,50,2a
;@s:rallyx.cpp
dngrtrck:
@ -12024,6 +12050,7 @@ knockoutc:
mariner:
offensiv:
scramb2:
scramb3:
scramblb:
scramble:
scramblebb:
@ -12266,6 +12293,14 @@ hangonjr:
;@s:segag80r.cpp
;******Astro Blaster (version 2a)
astrob1:
astrob2a:
astrob2b:
astrobg:
@:maincpu,program,cb3f,da,00,5c
;monsterb:******monster bash (fixed) *
;monsterb2:******monster bash (2 board version) (fixed) *
monsterb:
@ -12274,11 +12309,11 @@ monsterb2:
@:maincpu,program,c8f6,1,0d,0d
;******Astro Blaster (version 2a)
astrob1:
astrob2a:
astrobg:
@:maincpu,program,cb3f,da,00,5c
;(astro blaster (version 2 & 3))
astrob:
astrob2:
@:maincpu,program,cb3f,f6,00,00
@:maincpu,program,cc18,1,5c,5c
;005:******005 ;[Special thanks to Cananas for enhancing this entry]
@ -12309,13 +12344,6 @@ spaceod2:
@:maincpu,program,c921,1,05,05
;(astro blaster (version 2 & 3))
astrob:
astrob2:
@:maincpu,program,cb3f,f6,00,00
@:maincpu,program,cc18,1,5c,5c
;@s:segag80v.cpp
elim2a:
@ -12754,6 +12782,12 @@ crkdownu:
;@s:segas32.cpp
arescue:
arescuej:
arescueu:
@:mainpcb:maincpu,program,20fb00,9f,a0,49
;alien3u:*******alien 3: the gun (us)
alien3:
alien3j:
@ -12761,11 +12795,6 @@ alien3u:
@:mainpcb:maincpu,program,20f2bc,78,80,00
arescue:
arescuej:
@:mainpcb:maincpu,program,20fb00,9f,a0,49
;*******stadium cross
scross:
scrossa:
@ -13607,6 +13636,18 @@ slapfighb3:
;@s:snk.cpp
;ikarinc:******ikari warriors (us no continues)
;ikaria:******ikari warriors (us)
ikari:
ikaria:
ikaria2:
ikarijp:
ikarijpb:
ikarinc:
@:maincpu,program,ff0b,50,00,49
@:maincpu,program,fc5f,3,00,00
;(athena) (fix)
;** fixed, but delete any athena.hi file before playing first time **
athena:
@ -13688,17 +13729,6 @@ tnk3j:
@:maincpu,program,fc59,3,00,00
;ikarinc:******ikari warriors (us no continues)
;ikaria:******ikari warriors (us)
ikari:
ikaria:
ikarijp:
ikarijpb:
ikarinc:
@:maincpu,program,ff0b,50,00,49
@:maincpu,program,fc5f,3,00,00
ikariram:
@:maincpu,program,ff0b,50,00,4f
@:maincpu,program,fc5f,3,00,00
@ -13798,6 +13828,14 @@ vanguardj:
;@s:snk68.cpp
ikari3:
ikari3j:
ikari3k:
ikari3u:
ikari3w:
@:maincpu,program,4007e,58,00,1d
pow:
powj:
@:maincpu,program,43e8e,4,00,00
@ -13822,13 +13860,6 @@ streetsmw:
@:maincpu,program,43f7e,4,00,00
ikari3:
ikari3j:
ikari3k:
ikari3u:
@:maincpu,program,4007e,58,00,1d
;@s:snowbros.cpp
;******cookie & bibi 2
@ -14125,6 +14156,7 @@ srumbler3:
;********(super shanghai dragon`s eye (world,bootleg))
sshangha:
sshanghab:
sshanghaj:
@:maincpu,program,fec478,13f,00,1c
@ -14566,6 +14598,7 @@ flickya:
flickyo:
flickys1:
flickys2:
flickyup:
@:maincpu,program,e700,31,00,41
@:maincpu,program,c0d5,3,00,00
@ -16045,6 +16078,14 @@ timepltc:
;@s:tmnt.cpp
;********(golfing greats)
glfgreat:
glfgreatj:
glfgreatu:
@:maincpu,program,100320,50,41,9
@:maincpu,program,100400,50,41,9
;Teenage Mutant Ninja Turtles (US & clones)
tmht:
tmht2p:
@ -16125,12 +16166,6 @@ punkshotj:
@:maincpu,program,80700,30,00,40
;********(golfing greats)
glfgreat:
@:maincpu,program,100320,50,41,9
@:maincpu,program,100400,50,41,9
;@s:tnzs.cpp
chukatai:
@ -16653,6 +16688,11 @@ noahsark:
;@s:tumbleb.cpp
;******Super Trio Thanks to Mr Valtric for this addition ******
suprtrio:
@:maincpu,program,f03308,5a,01,4e
;(jump kids) (by GeoMan)
jumpkids:
@:maincpu,program,123c10,a0,50,50
@ -16976,6 +17016,17 @@ vaportrau:
;@s:vastar.cpp
dogfightp:
@:maincpu,program,f16a,82,20,ff
@:maincpu,program,b2df,1,24,24
@:maincpu,program,b2ff,1,24,24
@:maincpu,program,b31f,1,03,03
@:maincpu,program,b33f,1,05,05
@:maincpu,program,b35f,1,02,02
@:maincpu,program,b37f,1,00,00
@:maincpu,program,b39f,1,00,00
pprobe:
@:maincpu,program,f380,45,00,15
@:maincpu,program,cd9e,1,00,00
@ -17449,6 +17500,7 @@ twcup90b:
twcup90b1:
twcup90b2:
twcup90ba:
twcup90c:
twcup90t:
@:maincpu,program,800f,1e,00,00
@:maincpu,program,804d,01,11,11
@ -17485,6 +17537,7 @@ welltrisj:
;** starting a game, for the save to work **
;** THIS SAVE DOES NOT SAVE THE COURSE RECORDS **
wgp:
wgpu:
@:maincpu,program,10bbd9,c5,01,02
@:maincpu,program,10bc9b,1,44,44

10
scripts/src/bus.lua
View File

@ -3038,12 +3038,18 @@ end
if (BUSES["SBUS"]~=null) then
files {
MAME_DIR .. "src/devices/bus/sbus/artecon.cpp",
MAME_DIR .. "src/devices/bus/sbus/artecon.h",
MAME_DIR .. "src/devices/bus/sbus/bwtwo.cpp",
MAME_DIR .. "src/devices/bus/sbus/bwtwo.h",
MAME_DIR .. "src/devices/bus/sbus/cgsix.cpp",
MAME_DIR .. "src/devices/bus/sbus/cgsix.h",
MAME_DIR .. "src/devices/bus/sbus/cgthree.cpp",
MAME_DIR .. "src/devices/bus/sbus/cgthree.h",
MAME_DIR .. "src/devices/bus/sbus/turbogx.cpp",
MAME_DIR .. "src/devices/bus/sbus/turbogx.h",
MAME_DIR .. "src/devices/bus/sbus/hme.cpp",
MAME_DIR .. "src/devices/bus/sbus/hme.h",
MAME_DIR .. "src/devices/bus/sbus/sunpc.cpp",
MAME_DIR .. "src/devices/bus/sbus/sunpc.h",
MAME_DIR .. "src/devices/bus/sbus/sbus.cpp",
MAME_DIR .. "src/devices/bus/sbus/sbus.h",
}

2
scripts/target/mame/arcade.lua
View File

@ -4840,7 +4840,7 @@ files {
MAME_DIR .. "src/mame/includes/vectrex.h",
MAME_DIR .. "src/mame/video/vectrex.cpp",
MAME_DIR .. "src/mame/machine/vectrex.cpp",
MAME_DIR .. "src/mame/drivers/videolich.cpp",
MAME_DIR .. "src/mame/drivers/video21.cpp",
MAME_DIR .. "src/mame/drivers/videosaa.cpp",
MAME_DIR .. "src/mame/drivers/vlc.cpp",
MAME_DIR .. "src/mame/drivers/voyager.cpp",

72
src/devices/bus/sbus/artecon.cpp Normal file
View File

@ -0,0 +1,72 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/***************************************************************************
Artecon SB-300P 3-serial 1-parallel SBus card skeleton
The Artecon SB series of SBus cards uses up to 4 Cirrus Logic
CL-CD1400 Four-Channel Serial/Parallel Communications Engines.
Each chip supports up to four full-duplex serial channels, or three
full-duplex serial channels and one high-speed bidirectional parallel
channel.
***************************************************************************/
#include "emu.h"
#include "artecon.h"
DEFINE_DEVICE_TYPE(SBUS_SB300P, sbus_artecon_device, "sb300p", "Artecon SB-300P 3S/1P controller")
void sbus_artecon_device::mem_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(FUNC(sbus_artecon_device::unknown_r), FUNC(sbus_artecon_device::unknown_w));
map(0x00000000, 0x00003fff).r(FUNC(sbus_artecon_device::rom_r));
}
ROM_START( sbus_artecon )
ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "artecon_sbus_port.bin", 0x0000, 0x4000, CRC(bced6981) SHA1(1c6006fb8cb555eff0cb7c2783c776d05c6797f8))
ROM_END
const tiny_rom_entry *sbus_artecon_device::device_rom_region() const
{
return ROM_NAME( sbus_artecon );
}
void sbus_artecon_device::device_add_mconfig(machine_config &config)
{
}
sbus_artecon_device::sbus_artecon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SBUS_SB300P, tag, owner, clock)
, device_sbus_card_interface(mconfig, *this)
, m_rom(*this, "prom")
{
}
void sbus_artecon_device::device_start()
{
}
void sbus_artecon_device::install_device()
{
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_artecon_device::mem_map);
}
READ32_MEMBER(sbus_artecon_device::unknown_r)
{
logerror("%s: unknown_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask);
return 0;
}
WRITE32_MEMBER(sbus_artecon_device::unknown_w)
{
logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
READ32_MEMBER(sbus_artecon_device::rom_r)
{
return ((uint32_t*)m_rom->base())[offset];
}

45
src/devices/bus/sbus/artecon.h Normal file
View File

@ -0,0 +1,45 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/***************************************************************************
Artecon SB-300P 3-serial 1-parallel SBus card skeleton
***************************************************************************/
#ifndef MAME_BUS_SBUS_ARTECON_H
#define MAME_BUS_SBUS_ARTECON_H
#pragma once
#include "sbus.h"
class sbus_artecon_device : public device_t, public device_sbus_card_interface
{
public:
// construction/destruction
sbus_artecon_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_t overrides
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
// device_sbus_slot_interface overrides
virtual void install_device() override;
DECLARE_READ32_MEMBER(unknown_r);
DECLARE_WRITE32_MEMBER(unknown_w);
DECLARE_READ32_MEMBER(rom_r);
private:
void mem_map(address_map &map) override;
required_memory_region m_rom;
};
DECLARE_DEVICE_TYPE(SBUS_SB300P, sbus_artecon_device)
#endif // MAME_BUS_SBUS_ARTECON_H

10
src/devices/bus/sbus/bwtwo.cpp
View File

@ -14,14 +14,18 @@ DEFINE_DEVICE_TYPE(SBUS_BWTWO, sbus_bwtwo_device, "bwtwo", "Sun bwtwo SBus Video
void sbus_bwtwo_device::mem_map(address_map &map)
{
map(0x00000000, 0x000007ff).r(FUNC(sbus_bwtwo_device::rom_r));
map(0x00000000, 0x00007fff).r(FUNC(sbus_bwtwo_device::rom_r));
map(0x00400000, 0x0040001f).rw(FUNC(sbus_bwtwo_device::regs_r), FUNC(sbus_bwtwo_device::regs_w));
map(0x00800000, 0x008fffff).rw(FUNC(sbus_bwtwo_device::vram_r), FUNC(sbus_bwtwo_device::vram_w));
}
ROM_START( sbus_bwtwo )
ROM_REGION32_BE(0x800, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "sunw,501-1561.bin", 0x0000, 0x0800, CRC(e37a3314) SHA1(78761bd2369cb0c58ef1344c697a47d3a659d4bc))
ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF)
ROM_SYSTEM_BIOS(0, "1081", "P/N 525-1081-01")
ROMX_LOAD( "bw2_525-1081-01.bin", 0x0000, 0x8000, CRC(8b70c8c7) SHA1(fd750ad2fd6efdde957f8b0f9abf962e14fe221a), ROM_BIOS(0) )
ROM_SYSTEM_BIOS(1, "1124", "P/N 525-1124-01")
ROMX_LOAD( "bw2_525-1124-01.bin", 0x0000, 0x0800, CRC(e37a3314) SHA1(78761bd2369cb0c58ef1344c697a47d3a659d4bc), ROM_BIOS(1) )
ROM_END
const tiny_rom_entry *sbus_bwtwo_device::device_rom_region() const

2
src/devices/bus/sbus/bwtwo.h
View File

@ -45,7 +45,7 @@ private:
required_device<screen_device> m_screen;
};
// device type definition
DECLARE_DEVICE_TYPE(SBUS_BWTWO, sbus_bwtwo_device)
#endif // MAME_BUS_SBUS_BWTWO_H

221
src/devices/bus/sbus/turbogx.cpp → src/devices/bus/sbus/cgsix.cpp
View File

@ -2,95 +2,50 @@
// copyright-holders:Ryan Holtz
/***************************************************************************
Sun TurboGX accelerated 8-bit color video controller
Sun cgsix-series accelerated 8-bit color video controller
***************************************************************************/
#include "emu.h"
#include "turbogx.h"
#include "screen.h"
#include "cgsix.h"
DEFINE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device, "turbogx", "Sun TurboGX SBus Video")
DEFINE_DEVICE_TYPE(SBUS_TURBOGXP, sbus_turbogxp_device, "turbogxp", "Sun TurboGX+ SBus Video")
void sbus_turbogx_device::mem_map(address_map &map)
//-------------------------------------------------
// base cgsix device
//-------------------------------------------------
void sbus_cgsix_device::base_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(FUNC(sbus_turbogx_device::unknown_r), FUNC(sbus_turbogx_device::unknown_w));
map(0x00000000, 0x00007fff).r(FUNC(sbus_turbogx_device::rom_r));
map(0x00200000, 0x00200007).w(FUNC(sbus_turbogx_device::palette_w));
map(0x00700000, 0x00700fff).rw(FUNC(sbus_turbogx_device::fbc_r), FUNC(sbus_turbogx_device::fbc_w));
map(0x00800000, 0x008fffff).rw(FUNC(sbus_turbogx_device::vram_r), FUNC(sbus_turbogx_device::vram_w));
map(0x00000000, 0x01ffffff).rw(FUNC(sbus_cgsix_device::unknown_r), FUNC(sbus_cgsix_device::unknown_w));
map(0x00000000, 0x00007fff).r(FUNC(sbus_cgsix_device::rom_r));
map(0x00200000, 0x0020000f).m(m_ramdac, FUNC(bt458_device::map)).umask32(0xff000000);
map(0x00700000, 0x00700fff).rw(FUNC(sbus_cgsix_device::fbc_r), FUNC(sbus_cgsix_device::fbc_w));
}
ROM_START( sbus_turbogx )
ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "sunw,501-2325.bin", 0x0000, 0x8000, CRC(bbdc45f8) SHA1(e4a51d78e199cd57f2fcb9d45b25dfae2bd537e4))
ROM_END
const tiny_rom_entry *sbus_turbogx_device::device_rom_region() const
{
return ROM_NAME( sbus_turbogx );
}
void sbus_turbogx_device::device_add_mconfig(machine_config &config)
{
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_screen_update(FUNC(sbus_turbogx_device::screen_update));
screen.set_size(1152, 900);
screen.set_visarea(0, 1152-1, 0, 900-1);
screen.set_refresh_hz(72);
PALETTE(config, m_palette, 256).set_init(DEVICE_SELF, FUNC(sbus_turbogx_device::palette_init));
}
sbus_turbogx_device::sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SBUS_TURBOGX, tag, owner, clock)
sbus_cgsix_device::sbus_cgsix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock)
, device_sbus_card_interface(mconfig, *this)
, m_rom(*this, "prom")
, m_screen(*this, "screen")
, m_palette(*this, "palette")
, m_ramdac(*this, "ramdac")
{
}
void sbus_turbogx_device::device_start()
void sbus_cgsix_device::device_start()
{
m_vram = std::make_unique<uint32_t[]>(0x100000/4);
save_item(NAME(m_palette_entry));
save_item(NAME(m_palette_r));
save_item(NAME(m_palette_g));
save_item(NAME(m_palette_b));
save_item(NAME(m_palette_step));
m_vram = std::make_unique<uint32_t[]>(m_vram_size / 4);
}
void sbus_turbogx_device::device_reset()
void sbus_cgsix_device::device_reset()
{
m_palette_entry = 0;
m_palette_r = 0;
m_palette_g = 0;
m_palette_b = 0;
m_palette_step = 0;
memset(&m_fbc, 0, sizeof(m_fbc));
}
void sbus_turbogx_device::install_device()
uint32_t sbus_cgsix_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_turbogx_device::mem_map);
}
void sbus_turbogx_device::palette_init(palette_device &palette)
{
for (int i = 0; i < 256; i++)
{
const uint8_t reversed = 255 - i;
palette.set_pen_color(i, rgb_t(reversed, reversed, reversed));
}
}
uint32_t sbus_turbogx_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
const pen_t *pens = m_palette->pens();
const pen_t *pens = m_ramdac->pens();
uint8_t *vram = (uint8_t *)&m_vram[0];
for (int y = 0; y < 900; y++)
@ -106,66 +61,33 @@ uint32_t sbus_turbogx_device::screen_update(screen_device &screen, bitmap_rgb32
return 0;
}
READ32_MEMBER(sbus_turbogx_device::rom_r)
READ32_MEMBER(sbus_cgsix_device::rom_r)
{
return ((uint32_t*)m_rom->base())[offset];
}
READ32_MEMBER(sbus_turbogx_device::unknown_r)
READ32_MEMBER(sbus_cgsix_device::unknown_r)
{
logerror("%s: unknown_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask);
return 0;
}
WRITE32_MEMBER(sbus_turbogx_device::unknown_w)
WRITE32_MEMBER(sbus_cgsix_device::unknown_w)
{
logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
READ32_MEMBER(sbus_turbogx_device::vram_r)
READ32_MEMBER(sbus_cgsix_device::vram_r)
{
return m_vram[offset];
}
WRITE32_MEMBER(sbus_turbogx_device::vram_w)
WRITE32_MEMBER(sbus_cgsix_device::vram_w)
{
COMBINE_DATA(&m_vram[offset]);
}
WRITE32_MEMBER(sbus_turbogx_device::palette_w)
{
if (offset == 0)
{
m_palette_entry = data >> 24;
logerror("selecting palette entry %d\n", (uint32_t)m_palette_entry);
m_palette_step = 0;
}
else if (offset == 1)
{
switch (m_palette_step)
{
case 0:
logerror("palette entry %d red: %02x\n", (uint32_t)m_palette_entry, data);
m_palette_r = data >> 24;
m_palette_step++;
break;
case 1:
logerror("palette entry %d green: %02x\n", (uint32_t)m_palette_entry, data);
m_palette_g = data >> 24;
m_palette_step++;
break;
case 2:
logerror("palette entry %d blue: %02x\n", (uint32_t)m_palette_entry, data);
m_palette_b = data >> 24;
m_palette->set_pen_color(m_palette_entry, rgb_t(m_palette_r, m_palette_g, m_palette_b));
m_palette_step = 0;
m_palette_entry++;
break;
}
}
}
uint8_t sbus_turbogx_device::perform_rasterop(uint8_t src, uint8_t dst)
uint8_t sbus_cgsix_device::perform_rasterop(uint8_t src, uint8_t dst)
{
const uint32_t rops[4] = { fbc_rasterop_rop00(), fbc_rasterop_rop01(), fbc_rasterop_rop10(), fbc_rasterop_rop11() };
@ -208,7 +130,7 @@ uint8_t sbus_turbogx_device::perform_rasterop(uint8_t src, uint8_t dst)
}
// NOTE: This is basically untested, and probably full of bugs!
void sbus_turbogx_device::handle_draw_command()
void sbus_cgsix_device::handle_draw_command()
{
if (fbc_misc_draw() != FBC_MISC_DRAW_RENDER)
{
@ -252,7 +174,7 @@ void sbus_turbogx_device::handle_draw_command()
}
// NOTE: This is basically untested, and probably full of bugs!
void sbus_turbogx_device::handle_blit_command()
void sbus_cgsix_device::handle_blit_command()
{
uint8_t *vram = (uint8_t*)&m_vram[0];
const uint32_t fbw = (m_fbc.m_clip_maxx + 1);
@ -281,7 +203,7 @@ void sbus_turbogx_device::handle_blit_command()
}
}
READ32_MEMBER(sbus_turbogx_device::fbc_r)
READ32_MEMBER(sbus_cgsix_device::fbc_r)
{
uint32_t ret = 0;
switch (offset)
@ -588,7 +510,7 @@ READ32_MEMBER(sbus_turbogx_device::fbc_r)
return ret;
}
WRITE32_MEMBER(sbus_turbogx_device::fbc_w)
WRITE32_MEMBER(sbus_cgsix_device::fbc_w)
{
static const char* misc_bdisp_name[4] = { "IGNORE", "0", "1", "ILLEGAL" };
static const char* misc_bread_name[4] = { "IGNORE", "0", "1", "ILLEGAL" };
@ -1026,3 +948,86 @@ WRITE32_MEMBER(sbus_turbogx_device::fbc_w)
break;
}
}
//-------------------------------------------------
// TurboGX implementation
//-------------------------------------------------
void sbus_turbogx_device::mem_map(address_map &map)
{
base_map(map);
map(0x00800000, 0x008fffff).rw(FUNC(sbus_turbogx_device::vram_r), FUNC(sbus_turbogx_device::vram_w));
}
ROM_START( sbus_turbogx )
ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "sunw,501-2325.bin", 0x0000, 0x8000, CRC(bbdc45f8) SHA1(e4a51d78e199cd57f2fcb9d45b25dfae2bd537e4))
ROM_END
const tiny_rom_entry *sbus_turbogx_device::device_rom_region() const
{
return ROM_NAME( sbus_turbogx );
}
void sbus_turbogx_device::device_add_mconfig(machine_config &config)
{
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_screen_update(FUNC(sbus_turbogx_device::screen_update));
m_screen->set_size(1152, 900);
m_screen->set_visarea(0, 1152-1, 0, 900-1);
m_screen->set_refresh_hz(72);
BT458(config, m_ramdac, 0);
}
sbus_turbogx_device::sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sbus_cgsix_device(mconfig, SBUS_TURBOGX, tag, owner, clock, 0x100000)
{
}
void sbus_turbogx_device::install_device()
{
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_turbogx_device::mem_map);
}
//-------------------------------------------------
// TurboGX+ implementation
//-------------------------------------------------
void sbus_turbogxp_device::mem_map(address_map &map)
{
base_map(map);
map(0x00800000, 0x00bfffff).rw(FUNC(sbus_turbogxp_device::vram_r), FUNC(sbus_turbogxp_device::vram_w));
}
ROM_START( sbus_turbogxp )
ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "sunw,501-2253.bin", 0x0000, 0x8000, CRC(525a58db) SHA1(721fc378d4b952b5cbb271e16bd67bc02439efdc))
ROM_END
const tiny_rom_entry *sbus_turbogxp_device::device_rom_region() const
{
return ROM_NAME( sbus_turbogxp );
}
void sbus_turbogxp_device::device_add_mconfig(machine_config &config)
{
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_screen_update(FUNC(sbus_turbogxp_device::screen_update));
m_screen->set_size(1152, 900);
m_screen->set_visarea(0, 1152-1, 0, 900-1);
m_screen->set_refresh_hz(72);
BT467(config, m_ramdac, 0);
}
sbus_turbogxp_device::sbus_turbogxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: sbus_cgsix_device(mconfig, SBUS_TURBOGXP, tag, owner, clock, 0x400000)
{
}
void sbus_turbogxp_device::install_device()
{
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_turbogxp_device::mem_map);
}

87
src/devices/bus/sbus/turbogx.h → src/devices/bus/sbus/cgsix.h
View File

@ -2,52 +2,53 @@
// copyright-holders:Ryan Holtz
/***************************************************************************
Sun TurboGX accelerated 8-bit color video controller
Sun cgsix-series accelerated 8-bit color video controller
***************************************************************************/
#ifndef MAME_BUS_SBUS_TURBOGX_H
#define MAME_BUS_SBUS_TURBOGX_H
#ifndef MAME_BUS_SBUS_CGSIX_H
#define MAME_BUS_SBUS_CGSIX_H
#pragma once
#include "sbus.h"
#include "emupal.h"
#include "video/bt45x.h"
#include "screen.h"
class sbus_turbogx_device : public device_t, public device_sbus_card_interface
class sbus_cgsix_device : public device_t, public device_sbus_card_interface
{
public:
// construction/destruction
sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// construction/destruction
sbus_cgsix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const uint32_t vram_size)
: sbus_cgsix_device(mconfig, type, tag, owner, clock)
{
set_vram_size(vram_size);
}
sbus_cgsix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// configuration
void set_vram_size(uint32_t vram_size) { m_vram_size = vram_size; }
// device_t overrides
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
// device_sbus_slot_interface overrides
virtual void install_device() override;
void palette_init(palette_device &palette);
DECLARE_READ32_MEMBER(rom_r);
DECLARE_READ32_MEMBER(unknown_r);
DECLARE_WRITE32_MEMBER(unknown_w);
DECLARE_READ32_MEMBER(vram_r);
DECLARE_WRITE32_MEMBER(vram_w);
DECLARE_WRITE32_MEMBER(palette_w);
DECLARE_READ32_MEMBER(fbc_r);
DECLARE_WRITE32_MEMBER(fbc_w);
private:
protected:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
uint8_t perform_rasterop(uint8_t src, uint8_t dst);
void handle_blit_command();
void handle_draw_command();
void mem_map(address_map &map) override;
void base_map(address_map &map);
enum
{
@ -466,18 +467,46 @@ private:
required_memory_region m_rom;
std::unique_ptr<uint32_t[]> m_vram;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
uint8_t m_palette_entry;
uint8_t m_palette_r;
uint8_t m_palette_g;
uint8_t m_palette_b;
uint8_t m_palette_step;
required_device<bt458_device> m_ramdac;
fbc_t m_fbc;
uint32_t m_vram_size;
};
// device type definition
DECLARE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device)
class sbus_turbogx_device : public sbus_cgsix_device
{
public:
sbus_turbogx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
#endif // MAME_BUS_SBUS_TURBOGX_H
protected:
// device_t overrides
virtual const tiny_rom_entry *device_rom_region() const override;
void device_add_mconfig(machine_config &config) override;
// device_sbus_slot_interface overrides
virtual void install_device() override;
void mem_map(address_map &map) override;
};
class sbus_turbogxp_device : public sbus_cgsix_device
{
public:
sbus_turbogxp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_t overrides
virtual const tiny_rom_entry *device_rom_region() const override;
void device_add_mconfig(machine_config &config) override;
// device_sbus_slot_interface overrides
virtual void install_device() override;
void mem_map(address_map &map) override;
};
DECLARE_DEVICE_TYPE(SBUS_TURBOGX, sbus_turbogx_device)
DECLARE_DEVICE_TYPE(SBUS_TURBOGXP, sbus_turbogxp_device)
#endif // MAME_BUS_SBUS_CGSIX_H

84
src/devices/bus/sbus/cgthree.cpp
View File

@ -16,10 +16,10 @@ void sbus_cgthree_device::mem_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(FUNC(sbus_cgthree_device::unknown_r), FUNC(sbus_cgthree_device::unknown_w));
map(0x00000000, 0x000007ff).r(FUNC(sbus_cgthree_device::rom_r));
map(0x00400000, 0x00400007).w(FUNC(sbus_cgthree_device::palette_w));
map(0x00400000, 0x0040000f).m(m_ramdac, FUNC(bt458_device::map)).umask32(0xff000000);
map(0x007ff800, 0x007ff81f).rw(FUNC(sbus_cgthree_device::regs_r), FUNC(sbus_cgthree_device::regs_w));
map(0x00800000, 0x008fd1ff).rw(FUNC(sbus_cgthree_device::vram2_r), FUNC(sbus_cgthree_device::vram2_w));
map(0x00bff800, 0x00cfcbff).rw(FUNC(sbus_cgthree_device::vram_r), FUNC(sbus_cgthree_device::vram_w));
map(0x00800000, 0x008fffff).rw(FUNC(sbus_cgthree_device::vram_r), FUNC(sbus_cgthree_device::vram_w));
map(0x00bff800, 0x00cff7ff).rw(FUNC(sbus_cgthree_device::vram_r), FUNC(sbus_cgthree_device::vram_w));
}
ROM_START( sbus_cgthree )
@ -34,13 +34,13 @@ const tiny_rom_entry *sbus_cgthree_device::device_rom_region() const
void sbus_cgthree_device::device_add_mconfig(machine_config &config)
{
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_screen_update(FUNC(sbus_cgthree_device::screen_update));
screen.set_size(1152, 900);
screen.set_visarea(0, 1152-1, 0, 900-1);
screen.set_refresh_hz(72);
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_screen_update(FUNC(sbus_cgthree_device::screen_update));
m_screen->set_size(1152, 900);
m_screen->set_visarea(0, 1152-1, 0, 900-1);
m_screen->set_refresh_hz(72);
PALETTE(config, m_palette, 256).set_init(DEVICE_SELF, FUNC(sbus_cgthree_device::palette_init));
BT458(config, m_ramdac, 0);
}
sbus_cgthree_device::sbus_cgthree_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@ -48,29 +48,17 @@ sbus_cgthree_device::sbus_cgthree_device(const machine_config &mconfig, const ch
, device_sbus_card_interface(mconfig, *this)
, m_rom(*this, "prom")
, m_screen(*this, "screen")
, m_palette(*this, "palette")
, m_ramdac(*this, "ramdac")
{
}
void sbus_cgthree_device::device_start()
{
m_vram = std::make_unique<uint32_t[]>(0x100000/4);
m_vram2 = std::make_unique<uint32_t[]>(0x100000/4);
save_item(NAME(m_palette_entry));
save_item(NAME(m_palette_r));
save_item(NAME(m_palette_g));
save_item(NAME(m_palette_b));
save_item(NAME(m_palette_step));
}
void sbus_cgthree_device::device_reset()
{
m_palette_entry = 0;
m_palette_r = 0;
m_palette_g = 0;
m_palette_b = 0;
m_palette_step = 0;
}
void sbus_cgthree_device::install_device()
@ -78,19 +66,10 @@ void sbus_cgthree_device::install_device()
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_cgthree_device::mem_map);
}
void sbus_cgthree_device::palette_init(palette_device &palette)
{
for (int i = 0; i < 256; i++)
{
const uint8_t reversed = 255 - i;
palette.set_pen_color(i, rgb_t(reversed, reversed, reversed));
}
}
uint32_t sbus_cgthree_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
const pen_t *pens = m_palette->pens();
uint8_t *vram = (uint8_t *)&m_vram2[0];
const pen_t *pens = m_ramdac->pens();
uint8_t *vram = (uint8_t *)&m_vram[0];
for (int y = 0; y < 900; y++)
{
@ -116,35 +95,6 @@ WRITE32_MEMBER(sbus_cgthree_device::unknown_w)
logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
WRITE32_MEMBER(sbus_cgthree_device::palette_w)
{
if (offset == 0)
{
m_palette_entry = data >> 24;
m_palette_step = 0;
}
else
{
switch (m_palette_step)
{
case 0:
m_palette_r = data >> 24;
m_palette_step++;
break;
case 1:
m_palette_g = data >> 24;
m_palette_step++;
break;
case 2:
m_palette_b = data >> 24;
m_palette->set_pen_color(m_palette_entry, rgb_t(m_palette_r, m_palette_g, m_palette_b));
m_palette_step = 0;
m_palette_entry++;
break;
}
}
}
READ8_MEMBER(sbus_cgthree_device::regs_r)
{
logerror("%s: regs_r: Unimplemented: %08x\n", machine().describe_context(), 0x7ff800 + offset);
@ -170,13 +120,3 @@ WRITE32_MEMBER(sbus_cgthree_device::vram_w)
{
COMBINE_DATA(&m_vram[offset]);
}
READ32_MEMBER(sbus_cgthree_device::vram2_r)
{
return m_vram2[offset];
}
WRITE32_MEMBER(sbus_cgthree_device::vram2_w)
{
COMBINE_DATA(&m_vram2[offset]);
}

16
src/devices/bus/sbus/cgthree.h
View File

@ -12,7 +12,7 @@
#pragma once
#include "sbus.h"
#include "emupal.h"
#include "video/bt45x.h"
class sbus_cgthree_device : public device_t, public device_sbus_card_interface
{
@ -30,8 +30,6 @@ protected:
// device_sbus_slot_interface overrides
virtual void install_device() override;
void palette_init(palette_device &palette);
DECLARE_READ32_MEMBER(unknown_r);
DECLARE_WRITE32_MEMBER(unknown_w);
DECLARE_WRITE32_MEMBER(palette_w);
@ -40,8 +38,6 @@ protected:
DECLARE_READ32_MEMBER(rom_r);
DECLARE_READ32_MEMBER(vram_r);
DECLARE_WRITE32_MEMBER(vram_w);
DECLARE_READ32_MEMBER(vram2_r);
DECLARE_WRITE32_MEMBER(vram2_w);
private:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@ -50,17 +46,11 @@ private:
required_memory_region m_rom;
std::unique_ptr<uint32_t[]> m_vram;
std::unique_ptr<uint32_t[]> m_vram2; // ???
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
uint8_t m_palette_entry;
uint8_t m_palette_r;
uint8_t m_palette_g;
uint8_t m_palette_b;
uint8_t m_palette_step;
required_device<bt458_device> m_ramdac;
};
// device type definition
DECLARE_DEVICE_TYPE(SBUS_CGTHREE, sbus_cgthree_device)
#endif // MAME_BUS_SBUS_CGTHREE_H

71
src/devices/bus/sbus/hme.cpp Normal file
View File

@ -0,0 +1,71 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/***************************************************************************
Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" skeleton
Notable parts on board:
- 1x 32-pin PLCC ROM, label 525 / 1409 / -08 on separate lines
- 1x Sun STP2002QFP, marked 100-4156-05 / 609-0392458 / DP03972
- 1x National Semiconductor DP83840AVCE-1 Ethernet Physical Layer
- 1x National Semiconductor DP83223V Twisted Pair Transceiver
***************************************************************************/
#include "emu.h"
#include "hme.h"
DEFINE_DEVICE_TYPE(SBUS_HME, sbus_hme_device, "sbus_hme", "Sun 10/100 + Fast Wide SCSI")
void sbus_hme_device::mem_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(FUNC(sbus_hme_device::unknown_r), FUNC(sbus_hme_device::unknown_w));
map(0x00000000, 0x0000ffff).r(FUNC(sbus_hme_device::rom_r));
}
ROM_START( sbus_hme )
ROM_REGION32_BE(0x10000, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "525 1409 -08.bin", 0x00000, 0x10000, CRC(10f0b28f) SHA1(b54bb0f01c45accdbc58c3a86f8de34949374880))
ROM_END
const tiny_rom_entry *sbus_hme_device::device_rom_region() const
{
return ROM_NAME( sbus_hme );
}
void sbus_hme_device::device_add_mconfig(machine_config &config)
{
}
sbus_hme_device::sbus_hme_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SBUS_HME, tag, owner, clock)
, device_sbus_card_interface(mconfig, *this)
, m_rom(*this, "prom")
{
}
void sbus_hme_device::device_start()
{
}
void sbus_hme_device::install_device()
{
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_hme_device::mem_map);
}
READ32_MEMBER(sbus_hme_device::unknown_r)
{
logerror("%s: unknown_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask);
return 0;
}
WRITE32_MEMBER(sbus_hme_device::unknown_w)
{
logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
READ32_MEMBER(sbus_hme_device::rom_r)
{
return ((uint32_t*)m_rom->base())[offset];
}

45
src/devices/bus/sbus/hme.h Normal file
View File

@ -0,0 +1,45 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/***************************************************************************
Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" skeleton
***************************************************************************/
#ifndef MAME_BUS_SBUS_HME_H
#define MAME_BUS_SBUS_HME_H
#pragma once
#include "sbus.h"
class sbus_hme_device : public device_t, public device_sbus_card_interface
{
public:
// construction/destruction
sbus_hme_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_t overrides
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
// device_sbus_slot_interface overrides
virtual void install_device() override;
DECLARE_READ32_MEMBER(unknown_r);
DECLARE_WRITE32_MEMBER(unknown_w);
DECLARE_READ32_MEMBER(rom_r);
private:
void mem_map(address_map &map) override;
required_memory_region m_rom;
};
DECLARE_DEVICE_TYPE(SBUS_HME, sbus_hme_device)
#endif // MAME_BUS_SBUS_HME_H

16
src/devices/bus/sbus/sbus.cpp
View File

@ -7,9 +7,19 @@
***************************************************************************/
#include "emu.h"
// Display boards
#include "bwtwo.h"
#include "cgthree.h"
#include "turbogx.h"
#include "cgsix.h"
// Accelerator boards
#include "sunpc.h"
// Peripheral boards
#include "artecon.h"
#include "hme.h"
#include "sbus.h"
void sbus_cards(device_slot_interface &device)
@ -17,6 +27,10 @@ void sbus_cards(device_slot_interface &device)
device.option_add("bwtwo", SBUS_BWTWO); /* Sun bwtwo monochrome display board */
device.option_add("cgthree", SBUS_CGTHREE); /* Sun cgthree color display board */
device.option_add("turbogx", SBUS_TURBOGX); /* Sun TurboGX 8-bit color display board */
device.option_add("turbogxp", SBUS_TURBOGXP); /* Sun TurboGX+ 8-bit color display board */
device.option_add("sunpc", SBUS_SUNPC); /* Sun SunPC 5x86 Accelerator board */
device.option_add("hme", SBUS_HME); /* Sun SunSwift 10/100 + Fast Wide SCSI "Colossus" board */
device.option_add("sb300p", SBUS_SB300P); /* Artecon CB300P 3-serial/4-parallel board */
}
DEFINE_DEVICE_TYPE(SBUS_SLOT, sbus_slot_device, "sbus_slot", "Sun SBus Slot")

71
src/devices/bus/sbus/sunpc.cpp Normal file
View File

@ -0,0 +1,71 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/***************************************************************************
Sun SunPC 5x86 Accelerator (501-4230) skeleton
Notable parts on board:
- 1x AMD AM27C256 PLCC ROM
- 1x Motorola SunPC Accelerator 100-3069-03, mfr/date AANL9732
- 6x Cypress CY7B185-10VC 64kBit Static RAM
- 1x AMD 5x86 (under heatsink; markings unknown)
***************************************************************************/
#include "emu.h"
#include "sunpc.h"
DEFINE_DEVICE_TYPE(SBUS_SUNPC, sbus_sunpc_device, "sbus_sunpc", "Sun SunPC accelerator")
void sbus_sunpc_device::mem_map(address_map &map)
{
map(0x00000000, 0x01ffffff).rw(FUNC(sbus_sunpc_device::unknown_r), FUNC(sbus_sunpc_device::unknown_w));
map(0x00000000, 0x00007fff).r(FUNC(sbus_sunpc_device::rom_r));
}
ROM_START( sbus_sunpc )
ROM_REGION32_BE(0x8000, "prom", ROMREGION_ERASEFF)
ROM_LOAD( "sunw,501-1763-01.bin", 0x0000, 0x8000, CRC(171f50f8) SHA1(21c4c02bc5a3a0494301f19c54ba0e207568fb42))
ROM_END
const tiny_rom_entry *sbus_sunpc_device::device_rom_region() const
{
return ROM_NAME( sbus_sunpc );
}
void sbus_sunpc_device::device_add_mconfig(machine_config &config)
{
}
sbus_sunpc_device::sbus_sunpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SBUS_SUNPC, tag, owner, clock)
, device_sbus_card_interface(mconfig, *this)
, m_rom(*this, "prom")
{
}
void sbus_sunpc_device::device_start()
{
}
void sbus_sunpc_device::install_device()
{
m_sbus->install_device(m_base, m_base + 0x1ffffff, *this, &sbus_sunpc_device::mem_map);
}
READ32_MEMBER(sbus_sunpc_device::unknown_r)
{
logerror("%s: unknown_r: %08x & %08x\n", machine().describe_context(), offset << 2, mem_mask);
return 0;
}
WRITE32_MEMBER(sbus_sunpc_device::unknown_w)
{
logerror("%s: unknown_w: %08x = %08x & %08x\n", machine().describe_context(), offset << 2, data, mem_mask);
}
READ32_MEMBER(sbus_sunpc_device::rom_r)
{
return ((uint32_t*)m_rom->base())[offset];
}

45
src/devices/bus/sbus/sunpc.h Normal file
View File

@ -0,0 +1,45 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/***************************************************************************
Sun SunPC 5x86 Accelerator (501-4230) skeleton
***************************************************************************/
#ifndef MAME_BUS_SBUS_SUNPC_H
#define MAME_BUS_SBUS_SUNPC_H
#pragma once
#include "sbus.h"
class sbus_sunpc_device : public device_t, public device_sbus_card_interface
{
public:
// construction/destruction
sbus_sunpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
// device_t overrides
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
// device_sbus_slot_interface overrides
virtual void install_device() override;
DECLARE_READ32_MEMBER(unknown_r);
DECLARE_WRITE32_MEMBER(unknown_w);
DECLARE_READ32_MEMBER(rom_r);
private:
void mem_map(address_map &map) override;
required_memory_region m_rom;
};
DECLARE_DEVICE_TYPE(SBUS_SUNPC, sbus_sunpc_device)
#endif // MAME_BUS_SBUS_SUNPC_H

2
src/devices/cpu/sparc/mb86901.cpp
View File

@ -2846,7 +2846,7 @@ void mb86901_device::dispatch_instruction(uint32_t op)
if (illegal_IU_instr)
{
printf("illegal instruction at %08x\n", PC);
printf("illegal instruction at %08x: %08x\n", PC, op);
m_trap = 1;
m_illegal_instruction = 1;
}

2
src/devices/cpu/sparc/sparc.h
View File

@ -11,7 +11,7 @@
#include "sparcdasm.h"
#define SPARCV8 (0)
#define SPARCV8 (1)
#define LOG_FCODES (0)
#if LOG_FCODES

1
src/devices/cpu/z8/z8.cpp
View File

@ -12,7 +12,6 @@
- strobed I/O
- expose register file to disassembler
- decimal adjust instruction
- timer Tin/Tout modes
- serial
- instruction pipeline

19
src/devices/cpu/z8/z8ops.hxx
View File

@ -308,6 +308,25 @@ INSTRUCTION( cp_IR1_IM ) { mode_IR1_IM(compare) }
void z8_device::decimal_adjust(uint8_t dst)
{
uint8_t data = register_read(dst);
uint16_t new_data = data;
if (flag(D))
{
if (flag(H) | ((data&0xf)>9)) new_data-=6;
if (flag(C) | (data>0x99)) new_data-=0x60;
}
else
{
if (flag(H) | ((data&0xf)>9)) new_data+=6;
if (flag(C) | (data>0x99)) new_data+=0x60;
}
set_flag_c(new_data & 0x100);
set_flag_s(new_data & 0x80);
new_data &= 0xff;
set_flag_z(new_data == 0);
// officially, v is undefined
register_write(dst, new_data);
}
INSTRUCTION( da_R1 ) { mode_R1(decimal_adjust) }

14
src/devices/machine/nscsi_bus.cpp
View File

@ -563,11 +563,13 @@ void nscsi_full_device::scsi_data_out(int buf, int size)
c->param2 = size;
}
void nscsi_full_device::sense(bool deferred, uint8_t key)
void nscsi_full_device::sense(bool deferred, uint8_t key, uint8_t asc, uint8_t ascq)
{
memset(scsi_sense_buffer, 0, sizeof(scsi_sense_buffer));
scsi_sense_buffer[0] = deferred ? 0x71 : 0x70;
scsi_sense_buffer[2] = key;
scsi_sense_buffer[12] = asc;
scsi_sense_buffer[13] = ascq;
}
void nscsi_full_device::scsi_unknown_command()
@ -586,7 +588,11 @@ void nscsi_full_device::scsi_command()
switch(scsi_cmdbuf[0]) {
case SC_REQUEST_SENSE:
LOG("command REQUEST SENSE\n");
scsi_data_in(SBUF_SENSE, 8);
/*
* Targets shall be capable of returning eighteen bytes of data in
* response to a REQUEST SENSE command.
*/
scsi_data_in(SBUF_SENSE, 18);
scsi_status_complete(SS_GOOD);
break;
default:
@ -619,7 +625,9 @@ int nscsi_full_device::get_lun(int def)
void nscsi_full_device::bad_lun()
{
scsi_status_complete(SS_CHECK_CONDITION);
sense(false, 2);
// key:illegal request, asc:logical unit not supported
sense(false, 5, 0x25);
}
// Arbitration delay (2.4us)

4
src/devices/machine/nscsi_bus.h
View File

@ -285,7 +285,7 @@ protected:
void scsi_data_in(int buf, int size);
void scsi_data_out(int buf, int size);
void sense(bool deferred, uint8_t key);
void sense(bool deferred, uint8_t key, uint8_t asc = 0, uint8_t ascq = 0);
int get_lun(int def = 0);
void bad_lun();
@ -354,7 +354,7 @@ protected:
// Fast negation period (30ns)
virtual attotime scsi_fast_negation_period();
uint8_t scsi_cmdbuf[4096], scsi_sense_buffer[8];
uint8_t scsi_cmdbuf[4096], scsi_sense_buffer[18];
int scsi_cmdsize;
uint8_t scsi_identify;

21
src/devices/machine/nscsi_cd.cpp
View File

@ -49,6 +49,7 @@ uint8_t nscsi_cdrom_device::scsi_get_data(int id, int pos)
if(id != 2)
return nscsi_full_device::scsi_get_data(id, pos);
const int sector = (lba * bytes_per_block + pos) / bytes_per_sector;
const int extra_pos = (lba * bytes_per_block) % bytes_per_sector;
if(sector != cur_sector) {
cur_sector = sector;
if(!cdrom_read_data(cdrom, sector, sector_buffer, CD_TRACK_MODE1)) {
@ -56,7 +57,7 @@ uint8_t nscsi_cdrom_device::scsi_get_data(int id, int pos)
std::fill_n(sector_buffer, sizeof(sector_buffer), 0);
}
}
return sector_buffer[pos & (bytes_per_sector - 1)];
return sector_buffer[(pos + extra_pos) & (bytes_per_sector - 1)];
}
void nscsi_cdrom_device::return_no_cd()
@ -112,6 +113,22 @@ void nscsi_cdrom_device::scsi_command()
int lun = get_lun(scsi_cmdbuf[1] >> 5);
LOG("command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n",
lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]);
/*
* 7.5.3 Selection of an invalid logical unit
*
* The logical unit may not be valid because:
* a) the target does not support the logical unit (e.g. some targets
* support only one peripheral device). In response to an INQUIRY
* command, the target shall return the INQUIRY data with the
* peripheral qualifier set to the value required in 8.2.5.1.
*
* If the logic from the specification above is applied, Sun SCSI probe
* code gets confused and reports multiple valid logical units are
* attached; proper behaviour is produced when check condition status
* is returned with sense data ILLEGAL REQUEST and LOGICAL UNIT NOT
* SUPPORTED.
*/
if(lun) {
bad_lun();
return;
@ -223,7 +240,7 @@ void nscsi_cdrom_device::scsi_command()
int pmin = page == 0x3f ? 0x00 : page;
for(int page=pmax; page >= pmin; page--) {
switch(page) {
case 0x00: // Unit attention parameters page (weird)
case 0x00: // Vendor specific (does not require page format)
scsi_cmdbuf[pos++] = 0x80; // PS, page id
scsi_cmdbuf[pos++] = 0x02; // Page length
scsi_cmdbuf[pos++] = 0x00; // Meh

11
src/devices/machine/timekpr.cpp
View File

@ -274,9 +274,11 @@ void timekeeper_device::counters_from_ram()
void timekeeper_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
logerror("Tick\n");
if( ( m_seconds & SECONDS_ST ) != 0 ||
( m_control & CONTROL_W ) != 0 )
{
logerror("No Tick\n");
return;
}
@ -368,6 +370,7 @@ WRITE8_MEMBER(timekeeper_device::watchdog_write)
WRITE8_MEMBER( timekeeper_device::write )
{
logerror("timekeeper_device::write: %04x = %02x\n", offset, data);
if( offset == m_offset_control )
{
if( ( m_control & CONTROL_W ) != 0 &&
@ -375,6 +378,13 @@ WRITE8_MEMBER( timekeeper_device::write )
{
counters_from_ram();
}
if( ( m_control & CONTROL_R ) != 0 &&
( data & CONTROL_W ) == 0 )
{
counters_to_ram();
}
m_control = data;
}
else if( offset == m_offset_day )
@ -419,6 +429,7 @@ READ8_MEMBER( timekeeper_device::read )
m_reset_cb(CLEAR_LINE);
m_irq_cb(CLEAR_LINE);
}
logerror("timekeeper_device::read: %04x (%02x)\n", offset, result);
return result;
}

14
src/devices/machine/watchdog.cpp
View File

@ -29,7 +29,7 @@ watchdog_timer_device::watchdog_timer_device(const machine_config &mconfig, cons
: device_t(mconfig, WATCHDOG_TIMER, tag, owner, clock)
, m_vblank_count(0)
, m_time(attotime::zero)
, m_screen_tag(nullptr)
, m_screen(*this, finder_base::DUMMY_TAG)
{
}
@ -43,9 +43,10 @@ void watchdog_timer_device::device_validity_check(validity_checker &valid) const
{
if (m_vblank_count != 0)
{
screen_device *screen = dynamic_cast<screen_device *>(siblingdevice(m_screen_tag));
if (screen == nullptr)
osd_printf_error("Invalid screen tag specified\n");
if (m_screen.finder_tag() == finder_base::DUMMY_TAG)
osd_printf_error("VBLANK count set without setting screen tag\n");
else if (!m_screen)
osd_printf_error("Screen device %s not found\n", m_screen.finder_tag());
}
}
@ -64,9 +65,8 @@ void watchdog_timer_device::device_start()
if (m_vblank_count != 0)
{
// fetch the screen
screen_device *screen = siblingdevice<screen_device>(m_screen_tag);
if (screen != nullptr)
screen->register_vblank_callback(vblank_state_delegate(&watchdog_timer_device::watchdog_vblank, this));
if (m_screen)
m_screen->register_vblank_callback(vblank_state_delegate(&watchdog_timer_device::watchdog_vblank, this));
}
save_item(NAME(m_enabled));
save_item(NAME(m_counter));

7
src/devices/machine/watchdog.h
View File

@ -1,11 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
#ifndef MAME_MACHINE_WATCHDOG_H
#define MAME_MACHINE_WATCHDOG_H
#pragma once
#include <screen.h>
//**************************************************************************
// TYPE DEFINITIONS
@ -20,7 +21,7 @@ public:
watchdog_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
// inline configuration helpers
void set_vblank_count(const char *screen_tag, int32_t count) { m_screen_tag = screen_tag; m_vblank_count = count; }
template <typename T> void set_vblank_count(T &&screen_tag, int32_t count) { m_screen.set_tag(std::forward<T>(screen_tag)); m_vblank_count = count; }
void set_time(attotime time) { m_time = time; }
// watchdog control
@ -51,7 +52,7 @@ private:
// configuration data
int32_t m_vblank_count; // number of VBLANKs until resetting the machine
attotime m_time; // length of time until resetting the machine
const char * m_screen_tag; // the tag of the screen this timer tracks
optional_device<screen_device> m_screen; // the tag of the screen this timer tracks
// internal state
bool m_enabled; // is the watchdog enabled?

6
src/devices/machine/z80dart.cpp
View File

@ -467,7 +467,7 @@ z80dart_channel::z80dart_channel(const machine_config &mconfig, const char *tag,
, m_rx_first(0)
, m_rx_break(0)
, m_rx_rr0_latch(0)
, m_rxd(0)
, m_rxd(1)
, m_ri(0)
, m_cts(0)
, m_dcd(0)
@ -802,7 +802,7 @@ void z80dart_channel::control_write(uint8_t data)
if (!m_dcd) m_rr[0] |= RR0_DCD;
if (m_ri) m_rr[0] |= RR0_RI;
if (m_cts) m_rr[0] |= RR0_CTS;
if (!m_cts) m_rr[0] |= RR0_CTS;
m_rx_rr0_latch = 0;
@ -932,6 +932,8 @@ void z80dart_channel::control_write(uint8_t data)
else
{
// when the RTS bit is reset, the _RTS output goes high after the transmitter empties
if (m_rr[1] & RR1_ALL_SENT)
set_rts(1);
m_rts = 0;
}

17
src/devices/video/bt45x.cpp
View File

@ -17,12 +17,16 @@
* Bt455 170MHz 4 bit 1 bit 1 4 bit
* Bt457 165Mhz 8 bit 2 bit 1 8 bit blinking, multiplexing
* Bt458 165MHz 8 bit 2 bit 3 8 bit blinking, multiplexing
* Bt467 220MHz 8 bit 2 bit 3 8 bit blinking, multiplexing [NOTE: Specs are assumed based on Bt458 compatibility)
*
* Reference: http://www.bitsavers.org/components/brooktree/_dataBooks/1991_Brooktree_Product_Databook.pdf
*
* The bt45x_mono_device_base uses the standard red/green/blue read/write
* cycles defined in the databook, with color data active on the green cycle.
*
* The Bt467 is specified in its datasheet as register-compatible with the Bt458.
* As such, it is currently implemented as a simple alias of the Bt458.
*
* TODO
* - refactor to separate devices with registers
* - implement blinking and overlay
@ -45,6 +49,7 @@ DEFINE_DEVICE_TYPE(BT454, bt454_device, "bt454", "Brooktree Bt454 16 Color RAMDA
DEFINE_DEVICE_TYPE(BT455, bt455_device, "bt455", "Brooktree Bt455 16 Color RAMDAC")
DEFINE_DEVICE_TYPE(BT457, bt457_device, "bt457", "Brooktree Bt457 256 Color RAMDAC")
DEFINE_DEVICE_TYPE(BT458, bt458_device, "bt458", "Brooktree Bt458 256 Color RAMDAC")
DEFINE_DEVICE_TYPE(BT467, bt467_device, "bt467", "Brooktree Bt467 256 Color RAMDAC")
void bt45x_device_base::map(address_map &map)
{
@ -122,8 +127,18 @@ bt457_device::bt457_device(const machine_config &mconfig, const char *tag, devic
{
}
bt458_device::bt458_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: bt45x_rgb_device_base(mconfig, type, tag, owner, clock, 256, 3)
{
}
bt458_device::bt458_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: bt45x_rgb_device_base(mconfig, BT458, tag, owner, clock, 256, 3)
: bt458_device(mconfig, BT458, tag, owner, clock)
{
}
bt467_device::bt467_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: bt458_device(mconfig, BT467, tag, owner, clock)
{
}

10
src/devices/video/bt45x.h
View File

@ -169,6 +169,15 @@ class bt458_device : public bt45x_rgb_device_base
{
public:
bt458_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
bt458_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
};
class bt467_device : public bt458_device
{
public:
bt467_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(BT451, bt451_device)
@ -177,5 +186,6 @@ DECLARE_DEVICE_TYPE(BT454, bt454_device)
DECLARE_DEVICE_TYPE(BT455, bt455_device)
DECLARE_DEVICE_TYPE(BT457, bt457_device)
DECLARE_DEVICE_TYPE(BT458, bt458_device)
DECLARE_DEVICE_TYPE(BT467, bt467_device)
#endif // MAME_VIDEO_BT45X_H

8
src/lib/formats/tzx_cas.cpp
View File

@ -282,13 +282,15 @@ static int tzx_cas_handle_block( int16_t **buffer, const uint8_t *bytes, int pau
}
}
/* pause */
if (pause > 0)
{
int start_pause_samples = millisec_to_samplecount(1);
int rest_pause_samples = millisec_to_samplecount(pause - 1);
tzx_output_wave(buffer, start_pause_samples);
size += start_pause_samples;
if (pause > 0)
{
int rest_pause_samples = millisec_to_samplecount(pause - 1);
wave_data = WAVE_LOW;
tzx_output_wave(buffer, rest_pause_samples);
size += rest_pause_samples;

2
src/mame/arcade.flt
View File

@ -1315,7 +1315,7 @@ vendetta.cpp
vertigo.cpp
vicdual.cpp
victory.cpp
videolich.cpp
video21.cpp
videopin.cpp
videopkr.cpp
videosaa.cpp

12
src/mame/audio/exidy.cpp
View File

@ -403,21 +403,21 @@ WRITE8_MEMBER(exidy_sh8253_sound_device::r6532_porta_w)
READ8_MEMBER(exidy_sh8253_sound_device::r6532_porta_r)
{
uint8_t status = 0xff;
if (m_tms.found())
{
logerror("(%f)%s:TMS5220 status read = %02X\n", machine().time().as_double(), machine().describe_context(), m_tms->status_r());
return m_tms->status_r();
status = m_tms->status_r();
logerror("(%f)%s:TMS5220 status read = %02X\n", machine().time().as_double(), machine().describe_context(), status);
}
else
return 0xff;
return status;
}
WRITE8_MEMBER(exidy_sh8253_sound_device::r6532_portb_w)
{
if (m_tms.found())
{
m_tms->rsq_w(data & 0x01);
m_tms->wsq_w((data >> 1) & 0x01);
m_tms->rsq_w(BIT(data, 0));
m_tms->wsq_w(BIT(data, 1));
}
}

153
src/mame/drivers/ampex.cpp
View File

@ -42,6 +42,7 @@ public:
private:
u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_WRITE8_MEMBER(write_54xx);
DECLARE_READ8_MEMBER(read_5840);
DECLARE_WRITE8_MEMBER(write_5840);
DECLARE_READ8_MEMBER(read_5841);
@ -80,6 +81,11 @@ u32 ampex_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, cons
return 0;
}
WRITE8_MEMBER(ampex_state::write_54xx)
{
// Written during keyboard polling
}
READ8_MEMBER(ampex_state::read_5840)
{
logerror("%s: Read from 5840\n", machine().describe_context());
@ -116,7 +122,7 @@ READ8_MEMBER(ampex_state::read_5842)
WRITE8_MEMBER(ampex_state::write_5843)
{
logerror("%s: Write %02X to 5843\n", machine().describe_context(), data);
//logerror("%s: Write %02X to 5843\n", machine().describe_context(), data);
m_attr = (data & 0x78) >> 3;
}
@ -165,7 +171,21 @@ void ampex_state::mem_map(address_map &map)
{
map(0x0000, 0x2fff).rom().region("roms", 0);
map(0x4000, 0x43ff).ram(); // main RAM
map(0x4400, 0x57ff).ram(); // expansion RAM
map(0x4400, 0x53ff).ram(); // expansion RAM
map(0x5400, 0x5400).portr("IN0");
map(0x5401, 0x5401).portr("IN1");
map(0x5402, 0x5402).portr("IN2");
map(0x5403, 0x5403).portr("IN3");
map(0x5404, 0x5404).portr("IN4");
map(0x5405, 0x5405).portr("IN5");
map(0x5406, 0x5406).portr("IN6");
map(0x5407, 0x5407).portr("IN7");
map(0x5408, 0x5408).portr("IN8");
map(0x5409, 0x5409).portr("IN9");
map(0x540a, 0x540a).portr("INA");
map(0x540b, 0x540b).portr("INB");
map(0x540c, 0x540c).portr("INC");
map(0x5400, 0x54ff).w(FUNC(ampex_state::write_54xx));
map(0x5840, 0x5840).rw(FUNC(ampex_state::read_5840), FUNC(ampex_state::write_5840));
map(0x5841, 0x5841).rw(FUNC(ampex_state::read_5841), FUNC(ampex_state::write_5841));
map(0x5842, 0x5842).r(FUNC(ampex_state::read_5842)).w(m_uart, FUNC(ay31015_device::transmit));
@ -178,6 +198,135 @@ void ampex_state::mem_map(address_map &map)
}
static INPUT_PORTS_START( ampex )
PORT_START("IN0")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('\\') PORT_CHAR('|') PORT_CODE(KEYCODE_TILDE)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('1') PORT_CHAR('!') PORT_CODE(KEYCODE_1)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('2') PORT_CHAR('"') PORT_CODE(KEYCODE_2)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('3') PORT_CHAR('#') PORT_CODE(KEYCODE_3)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('4') PORT_CHAR('$') PORT_CODE(KEYCODE_4)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('5') PORT_CHAR('%') PORT_CODE(KEYCODE_5)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('6') PORT_CHAR('&') PORT_CODE(KEYCODE_6)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('7') PORT_CHAR('\'') PORT_CODE(KEYCODE_7)
PORT_START("IN1")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(0x1b) PORT_CODE(KEYCODE_TAB)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('q') PORT_CHAR('Q') PORT_CODE(KEYCODE_Q)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('w') PORT_CHAR('W') PORT_CODE(KEYCODE_W)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('e') PORT_CHAR('E') PORT_CODE(KEYCODE_E)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('r') PORT_CHAR('R') PORT_CODE(KEYCODE_R)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('t') PORT_CHAR('T') PORT_CODE(KEYCODE_T)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('y') PORT_CHAR('Y') PORT_CODE(KEYCODE_Y)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('u') PORT_CHAR('U') PORT_CODE(KEYCODE_U)
PORT_START("IN2")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_CODE(KEYCODE_CAPSLOCK)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CHAR(UCHAR_SHIFT_2) PORT_CODE(KEYCODE_LCONTROL)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('a') PORT_CHAR('A') PORT_CODE(KEYCODE_A)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('s') PORT_CHAR('S') PORT_CODE(KEYCODE_S)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('d') PORT_CHAR('D') PORT_CODE(KEYCODE_D)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('f') PORT_CHAR('F') PORT_CODE(KEYCODE_F)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('g') PORT_CHAR('G') PORT_CODE(KEYCODE_G)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('h') PORT_CHAR('H') PORT_CODE(KEYCODE_H)
PORT_START("IN3")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x83 (Break?)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Shift (Left)") PORT_CHAR(UCHAR_SHIFT_1) PORT_CODE(KEYCODE_LSHIFT)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('z') PORT_CHAR('Z') PORT_CODE(KEYCODE_Z)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('x') PORT_CHAR('X') PORT_CODE(KEYCODE_X)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('c') PORT_CHAR('C') PORT_CODE(KEYCODE_C)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('v') PORT_CHAR('V') PORT_CODE(KEYCODE_V)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('b') PORT_CHAR('B') PORT_CODE(KEYCODE_B)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('n') PORT_CHAR('N') PORT_CODE(KEYCODE_N)
PORT_START("IN4")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('m') PORT_CHAR('M') PORT_CODE(KEYCODE_M)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(',') PORT_CHAR('<') PORT_CODE(KEYCODE_COMMA)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('.') PORT_CHAR('>') PORT_CODE(KEYCODE_STOP)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('/') PORT_CHAR('?') PORT_CODE(KEYCODE_SLASH)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Shift (Right)") PORT_CODE(KEYCODE_RSHIFT)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(' ') PORT_CODE(KEYCODE_SPACE)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("IN5")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('j') PORT_CHAR('J') PORT_CODE(KEYCODE_J)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('k') PORT_CHAR('K') PORT_CODE(KEYCODE_K)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('l') PORT_CHAR('L') PORT_CODE(KEYCODE_L)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(';') PORT_CHAR('+') PORT_CODE(KEYCODE_COLON)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('[') PORT_CHAR('{') PORT_CODE(KEYCODE_OPENBRACE)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(']') PORT_CHAR('}') PORT_CODE(KEYCODE_CLOSEBRACE)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x1f (shifted: 0x8a) (Page New Line?)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x94 (Line Ins?)
PORT_START("IN6")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('i') PORT_CHAR('I') PORT_CODE(KEYCODE_I)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('o') PORT_CHAR('O') PORT_CODE(KEYCODE_O)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('p') PORT_CHAR('P') PORT_CODE(KEYCODE_P)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('^') PORT_CHAR('~') PORT_CODE(KEYCODE_QUOTE)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(0x0a) PORT_CODE(KEYCODE_RALT) PORT_NAME("Line Feed")
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xd4 (shifted: 0xf4)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xd9 (shifted: 0xf9)
PORT_START("IN7")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('8') PORT_CHAR('(') PORT_CODE(KEYCODE_8)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('9') PORT_CHAR(')') PORT_CODE(KEYCODE_9)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('0') PORT_CHAR('_') PORT_CODE(KEYCODE_0)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(':') PORT_CHAR('*') PORT_CODE(KEYCODE_MINUS)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('=') PORT_CODE(KEYCODE_EQUALS)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR('@') PORT_CHAR('`') PORT_CODE(KEYCODE_BACKSLASH)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(0x09) PORT_CODE(KEYCODE_BACKSPACE)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x90 (shifted: 0x84)
PORT_START("IN8")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_CODE(KEYCODE_ENTER_PAD)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_CODE(KEYCODE_DEL_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_CODE(KEYCODE_0_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) PORT_CODE(KEYCODE_COMMA_PAD)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x97 (Char Del?)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_CODE(KEYCODE_DOWN)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x96 (Char Ins?)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("IN9")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x0d (top half of keypad Enter?)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) PORT_CODE(KEYCODE_3_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_CODE(KEYCODE_2_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) PORT_CODE(KEYCODE_1_PAD)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_CODE(KEYCODE_RIGHT)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(HOME)) PORT_CODE(KEYCODE_HOME)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Del") PORT_CODE(KEYCODE_RCONTROL) // 0x7f
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("INA")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(TAB_PAD)) PORT_CODE(KEYCODE_TAB_PAD)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_CODE(KEYCODE_6_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) PORT_CODE(KEYCODE_5_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_CODE(KEYCODE_4_PAD)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x95 (Line Del?)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_CODE(KEYCODE_UP)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_CODE(KEYCODE_LEFT)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("INB")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_CODE(KEYCODE_MINUS_PAD)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_CODE(KEYCODE_9_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_CODE(KEYCODE_8_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_CODE(KEYCODE_7_PAD)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x8b (shifted: 0x8c) (Clear?)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xd0 (Page Erase?)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xb4 (shifted: 0xb6) (Line Erase?)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("INC")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x87 (shifted: 0x86)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x85 (shifted: 0x84)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x89 (shifted: 0x88)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x92 (shifted: 0x93)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0x91
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xb5 (shifted: 0xb7)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
INPUT_PORTS_END
void ampex_state::machine_start()

6
src/mame/drivers/bagman.cpp
View File

@ -829,7 +829,7 @@ ROM_START( bagmanj )
ROM_LOAD( "bf8_13.t9", 0x1000, 0x1000, CRC(b2120edd) SHA1(52b89dbcc749b084331fa82b13d0876e911fce52) ) // 2732
ROM_END
ROM_START( botanic2 ) // PCB has Valadon logo with 'bajo licencia Itisa (Palamos)'. Most likely just a bootleg Bagman PCB conversion.
ROM_START( botanic2 ) // PCB has Valadon logo with 'bajo licencia Itisa (Palamos)'.
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "5.9e", 0x0000, 0x1000, CRC(c5170449) SHA1(3f85f254f1a318a0b4d6e12d4df756c880751327) ) // 2732
ROM_LOAD( "6.9f", 0x1000, 0x1000, CRC(33b2df44) SHA1(9d3697bdf0d906b27374a1460cdac715ef10565d) ) // 2732
@ -1120,8 +1120,8 @@ GAME( 1984, sbagmans, sbagman, sbagman, sbagman, bagman_state, empty_init,
GAME( 1983, pickin, 0, pickin, pickin, bagman_state, empty_init, ROT270, "Valadon Automation", "Pickin'", MACHINE_SUPPORTS_SAVE )
GAME( 1983, botanic, 0, botanic, botanici, bagman_state, empty_init, ROT90, "Itisa", "Botanic (English / Spanish)", MACHINE_SUPPORTS_SAVE )
GAME( 1983, botanic2, botanic, bagman, botanici2, bagman_state, empty_init, ROT90, "Itisa", "Botanic (English / Spanish, bootleg conversion)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // At the title screen, Botanic in corrupted in the first loop, ok from the second on. Colors likely wrong, too. Has a leftover 5110.
GAME( 1983, botanic, 0, botanic, botanici, bagman_state, empty_init, ROT90, "Itisa", "Botanic (English / Spanish, set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1983, botanic2, botanic, bagman, botanici2, bagman_state, empty_init, ROT90, "Itisa", "Botanic (English / Spanish, set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // At the title screen, Botanic in corrupted in the first loop, ok from the second on. Colors likely wrong, too. Has a leftover 5110.
GAME( 1984, botanicf, botanic, botanic, botanicf, bagman_state, empty_init, ROT270, "Itisa (Valadon Automation license)", "Botanic (French)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, squaitsa, 0, botanic, squaitsa, squaitsa_state, empty_init, ROT0, "Itisa", "Squash (Itisa)", MACHINE_SUPPORTS_SAVE )

8
src/mame/drivers/cmi.cpp
View File

@ -1365,10 +1365,10 @@ READ8_MEMBER( cmi_state::fdc_r )
{
switch (m_fdc_addr)
{
case 0xc: { return m_wd1791->status_r() ^ 0xff; }
case 0xd: { return m_wd1791->track_r() ^ 0xff; }
case 0xe: { return m_wd1791->sector_r() ^ 0xff; }
case 0xf: { return m_wd1791->data_r() ^ 0xff; }
case 0xc: return m_wd1791->status_r() ^ 0xff;
case 0xd: return m_wd1791->track_r() ^ 0xff;
case 0xe: return m_wd1791->sector_r() ^ 0xff;
case 0xf: return m_wd1791->data_r() ^ 0xff;
default: return 0;
}
}

20
src/mame/drivers/coco3.cpp
View File

@ -112,7 +112,7 @@ static INPUT_PORTS_START( coco3_keyboard )
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP), '^')
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP))
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("DOWN") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN), 10)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("LEFT") PORT_CODE(KEYCODE_LEFT) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(UCHAR_MAMEKEY(LEFT), 8)
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT), 9)
@ -120,30 +120,30 @@ static INPUT_PORTS_START( coco3_keyboard )
PORT_START("row4")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_0) PORT_CHAR('0')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_CHAR('|')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"')
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') PORT_CHAR('^')
PORT_START("row5")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') PORT_CHAR('[')
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') PORT_CHAR(']')
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_MINUS) PORT_CHAR(':') PORT_CHAR('*')
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+')
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=')
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') PORT_CHAR('{')
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('-') PORT_CHAR('=') PORT_CHAR('_')
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') PORT_CHAR('}')
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') PORT_CHAR('\\')
PORT_START("row6")
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("CLEAR") PORT_CODE(KEYCODE_HOME) PORT_CHAR(12)
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("BREAK") PORT_CODE(KEYCODE_END) PORT_CODE(KEYCODE_ESC) PORT_CHAR(27)
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("ALT") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT))
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL), UCHAR_SHIFT_2)
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHANGED_MEMBER(DEVICE_SELF, coco3_state, coco_state::keyboard_changed, nullptr) PORT_NAME("SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)

2
src/mame/drivers/foodf.cpp
View File

@ -330,7 +330,7 @@ MACHINE_CONFIG_START(foodf_state::foodf)
X2212(config, "nvram").set_auto_save(true);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
MCFG_TIMER_DRIVER_ADD(m_scan_timer, foodf_state, scanline_update_timer)

6
src/mame/drivers/galaga.cpp
View File

@ -1650,7 +1650,7 @@ MACHINE_CONFIG_START(bosco_state::bosco)
//m_videolatch->q_out_cb<7>().set("50xx_2", FUNC(namco_50xx_device::reset_w));
//m_videolatch->q_out_cb<7>().append("52xx", FUNC(namco_52xx_device, reset_w));
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
@ -1722,7 +1722,7 @@ MACHINE_CONFIG_START(galaga_state::galaga)
// Q0-Q5 to 05XX for starfield control
m_videolatch->q_out_cb<7>().set(FUNC(galaga_state::flip_screen_w));
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
@ -1825,7 +1825,7 @@ MACHINE_CONFIG_START(xevious_state::xevious)
MCFG_NAMCO_06XX_WRITE_2_CB(WRITE8("50xx", namco_50xx_device, write))
MCFG_NAMCO_06XX_WRITE_3_CB(WRITE8("54xx", namco_54xx_device, write))
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
MCFG_QUANTUM_TIME(attotime::from_hz(60000)) /* 1000 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */

4
src/mame/drivers/gottlieb.cpp
View File

@ -1776,10 +1776,10 @@ MACHINE_CONFIG_START(gottlieb_state::gottlieb_core)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 16);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 16);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(SYSTEM_CLOCK/4, GOTTLIEB_VIDEO_HCOUNT, 0, GOTTLIEB_VIDEO_HBLANK, GOTTLIEB_VIDEO_VCOUNT, 0, GOTTLIEB_VIDEO_VBLANK)
MCFG_SCREEN_UPDATE_DRIVER(gottlieb_state, screen_update_gottlieb)

4
src/mame/drivers/grchamp.cpp
View File

@ -755,7 +755,7 @@ MACHINE_CONFIG_START(grchamp_state::grchamp)
MCFG_DEVICE_PROGRAM_MAP(sound_map)
MCFG_DEVICE_PERIODIC_INT_DRIVER(grchamp_state, irq0_line_hold, (double)SOUND_CLOCK/4/16/16/10/16)
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
/* video hardware */
@ -763,7 +763,7 @@ MACHINE_CONFIG_START(grchamp_state::grchamp)
MCFG_PALETTE_ADD("palette", 32)
MCFG_PALETTE_INIT_OWNER(grchamp_state, grchamp)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)
MCFG_SCREEN_UPDATE_DRIVER(grchamp_state, screen_update)

17
src/mame/drivers/m79152pc.cpp
View File

@ -30,6 +30,7 @@
#include "machine/z80sio.h"
#include "machine/clock.h"
#include "sound/beep.h"
#include "bus/centronics/ctronics.h"
#include "bus/rs232/rs232.h"
#include "emupal.h"
#include "screen.h"
@ -193,7 +194,7 @@ void m79152pc_state::screen_draw_line(bitmap_ind16 &bitmap, unsigned y)
for (u16 x = ma; x < ma + 80; x++)
{
// BIT(attr, 3) should probably be blinking
// BIT(attr, 1) may be used for high-intensity text (
// BIT(attr, 1) may be used for high-intensity text
u8 chr = m_videoram[x];
u8 attr = m_attributes[x];
u8 gfx = m_chargen[(chr << 4) | (BIT(attr, 2) && ra == 15 ? 3 : ra)];
@ -304,7 +305,19 @@ MACHINE_CONFIG_START(m79152pc_state::m79152pc)
mculatch.int_wr_callback().set(m_uart, FUNC(z80sio_device::ctsb_w)).invert();
mculatch.int_wr_callback().append(FUNC(m79152pc_state::latch_full_w));
I8255A(config, "ppi"); // NEC D8255AD-2
i8255_device &ppi(I8255A(config, "ppi")); // NEC D8255AD-2
ppi.out_pb_callback().set("printer", FUNC(centronics_device::write_data0)).bit(0);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data1)).bit(1);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data2)).bit(2);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data3)).bit(3);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data4)).bit(4);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data5)).bit(5);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data6)).bit(6);
ppi.out_pb_callback().append("printer", FUNC(centronics_device::write_data7)).bit(7);
ppi.out_pc_callback().set("printer", FUNC(centronics_device::write_strobe)).bit(1);
centronics_device &printer(CENTRONICS(config, "printer", centronics_devices, nullptr));
printer.ack_handler().set("ppi", FUNC(i8255_device::pc2_w));
z80ctc_device &ctc(Z80CTC(config, "ctc", 4'000'000));
ctc.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);

4
src/mame/drivers/mcr3.cpp
View File

@ -1092,7 +1092,7 @@ MACHINE_CONFIG_START(mcr3_state::mcrmono)
m_ctc->intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
m_ctc->zc_callback<0>().set(m_ctc, FUNC(z80ctc_device::trg1));
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 16);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 16);
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@ -1101,7 +1101,7 @@ MACHINE_CONFIG_START(mcr3_state::mcrmono)
SPEAKER(config, "rspeaker").front_right();
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
MCFG_SCREEN_REFRESH_RATE(30)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)

2
src/mame/drivers/meyc8080.cpp
View File

@ -591,7 +591,7 @@ INPUT_PORTS_END
MACHINE_CONFIG_START(meyc8080_state::meyc8080)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", I8080, XTAL(20'000'000) / 10) // divider guessed
MCFG_DEVICE_ADD("maincpu", I8080A, XTAL(20'000'000) / 10) // divider guessed
MCFG_DEVICE_PROGRAM_MAP(meyc8080_map)
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);

4
src/mame/drivers/missile.cpp
View File

@ -1157,12 +1157,12 @@ MACHINE_CONFIG_START(missile_state::missile)
MCFG_DEVICE_ADD("maincpu", M6502, MASTER_CLOCK/8)
MCFG_DEVICE_PROGRAM_MAP(main_map)
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_PALETTE_ADD("palette", 8)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)
MCFG_SCREEN_UPDATE_DRIVER(missile_state, screen_update_missile)
MCFG_SCREEN_PALETTE("palette")

27
src/mame/drivers/namcos2.cpp
View File

@ -1449,6 +1449,12 @@ static INPUT_PORTS_START( luckywld )
NAMCOS2_MCU_DIPSW_DEFAULT
NAMCOS2_MCU_DIAL_DEFAULT
PORT_MODIFY("DSW")
// this applies to both the World and Japan sets
PORT_DIPNAME( 0x40, 0x40, "Show Winners Don't Use Drugs")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
INPUT_PORTS_END
static INPUT_PORTS_START( sgunner )
@ -2055,6 +2061,9 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(namcos2_state::finalap3)
finallap_c68(config);
m_c123tmap->set_tile_callback(namco_c123tmap_device::c123_tilemap_delegate(&namcos2_state::TilemapCB_finalap2, this));
MCFG_VIDEO_START_OVERRIDE(namcos2_state, finalap2)
MACHINE_CONFIG_END
@ -3895,17 +3904,25 @@ ROM_START( fourtraxj )
ROM_LOAD( "fx_voi-1.3m", 0x000000, 0x080000, CRC(6173364f) SHA1(cc426f49b7e87b11f1f51e8e10db7cad87ffb44d) )
ROM_END
// this is a strange, it's based on the fx2 set, but with one of the 68k pair modified (21 bytes changed) and a unique GFX rom?
// changes seem to be related to the trackside advertising banners
/* This is a strange set, it's based on the fx2 set, but with one of the 68k pair modified (21 bytes changed) and a unique GFX ROM
Changes seem to be related to the trackside advertising banners. This was around the same time Super Monaco GP was forced to
remove 'real' advertising banners, so could be related.
The changed graphic ROM has tiles for an additional 'awaiting entry' screen, but it is unclear where they are used,
the same tiles in the fx2 set are blank, assuming that one isn't a bad dump.
Previous dumps of the program / sub CPUs were 0x00 filled instead of 0xff filled in the 2nd half due to a dumping error
*/
ROM_START( fourtraxa )
ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */
// the old dump of this set only differed in having a 0x00 fill in the 2nd half instead of a 0xff fill
ROM_LOAD16_BYTE( "fx4_mp0a.11d", 0x000000, 0x020000, CRC(f147cd6b) SHA1(7cdadd68d55dd8fa9b19cbee1434d9266ae1f4b9) ) // == fx2_mp0.11d
ROM_LOAD16_BYTE( "fx4_mp1a.13d", 0x000001, 0x020000, CRC(d1138c85) SHA1(32bf68ae36f72b84f3c3df28425147b6aaac1edf) )
ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */
ROM_LOAD16_BYTE( "fx1_sp0.11k", 0x000000, 0x020000, CRC(41687edd) SHA1(1e79dc9abe5614f836e89b376be1dc70deaac889) )
ROM_LOAD16_BYTE( "fx1_sp1.13k", 0x000001, 0x020000, CRC(dbbae326) SHA1(6743054f7796bd5b1d24fa9cf0095544420b2c76) )
ROM_LOAD16_BYTE( "fx1_sp0.11k", 0x000000, 0x020000, CRC(48548e78) SHA1(b3a9de8682fe63c1c3ecab3e3f9380a884efd4af) ) // same content as fx2 set, different label
ROM_LOAD16_BYTE( "fx1_sp1.13k", 0x000001, 0x020000, CRC(d2861383) SHA1(36be5a8c8a19f35f9a9bd3ef725a83c5e58ccbe0) ) // same content as fx2 set, different label
ROM_REGION( 0x020000, "audiocpu", 0 ) /* Sound CPU (Banked) */
ROM_LOAD( "fx1_sd0.7j", 0x000000, 0x020000, CRC(acccc934) SHA1(98f1a823ba7e3f258a73d5780953f9339d438e1a) )

4
src/mame/drivers/polepos.cpp
View File

@ -897,7 +897,7 @@ MACHINE_CONFIG_START(polepos_state::polepos)
MCFG_NAMCO_06XX_WRITE_2_CB(WRITE8("52xx", namco_52xx_device, write))
MCFG_NAMCO_06XX_WRITE_3_CB(WRITE8("54xx", namco_54xx_device, write))
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 16); // 128V clocks the same as VBLANK
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 16); // 128V clocks the same as VBLANK
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* some interleaving */
@ -1006,7 +1006,7 @@ MACHINE_CONFIG_START(polepos_state::topracern)
MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 16); // 128V clocks the same as VBLANK
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 16); // 128V clocks the same as VBLANK
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* some interleaving */

4
src/mame/drivers/rampart.cpp
View File

@ -347,7 +347,7 @@ MACHINE_CONFIG_START(rampart_state::rampart)
EEPROM_2816(config, "eeprom").lock_after_write(true);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_rampart)
@ -358,7 +358,7 @@ MACHINE_CONFIG_START(rampart_state::rampart)
MCFG_ATARI_MOTION_OBJECTS_ADD("mob", "screen", rampart_state::s_mob_config)
MCFG_ATARI_MOTION_OBJECTS_GFXDECODE("gfxdecode")
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
/* note: these parameters are from published specs, not derived */
/* the board uses an SOS-2 chip to generate video signals */

4
src/mame/drivers/sbrkout.cpp
View File

@ -573,12 +573,12 @@ MACHINE_CONFIG_START(sbrkout_state::sbrkout)
// coin counter activity as stated in Atari bulletin B-0054 (which recommends tying it to the
// CPU reset line instead).
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_sbrkout)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(MAIN_CLOCK/2, 384, 0, 256, 262, 0, 224)
MCFG_SCREEN_UPDATE_DRIVER(sbrkout_state, screen_update_sbrkout)
MCFG_SCREEN_PALETTE("palette")

4
src/mame/drivers/sprint2.cpp
View File

@ -497,10 +497,10 @@ MACHINE_CONFIG_START(sprint2_state::sprint2)
MCFG_DEVICE_PROGRAM_MAP(sprint2_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", sprint2_state, sprint2)
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(12.096_MHz_XTAL, 768, 0, 512, 262, 0, 224)
MCFG_SCREEN_UPDATE_DRIVER(sprint2_state, screen_update_sprint2)
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, sprint2_state, screen_vblank_sprint2))

4
src/mame/drivers/sprint4.cpp
View File

@ -385,10 +385,10 @@ MACHINE_CONFIG_START(sprint4_state::sprint4)
MCFG_DEVICE_ADD("maincpu", M6502, PIXEL_CLOCK / 8)
MCFG_DEVICE_PROGRAM_MAP(sprint4_cpu_map)
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, 0, 256, VTOTAL, 0, 224)
MCFG_SCREEN_UPDATE_DRIVER(sprint4_state, screen_update)
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, sprint4_state, screen_vblank))

62
src/mame/drivers/sun4.cpp
View File

@ -580,9 +580,6 @@ private:
DECLARE_READ32_MEMBER( ram_r );
DECLARE_WRITE32_MEMBER( ram_w );
DECLARE_READ32_MEMBER( ss1_sl0_id );
DECLARE_READ32_MEMBER( ss1_sl1_id );
DECLARE_READ32_MEMBER( ss1_sl2_id );
DECLARE_READ32_MEMBER( ss1_sl3_id );
DECLARE_READ32_MEMBER( timer_r );
DECLARE_WRITE32_MEMBER( timer_w );
DECLARE_READ8_MEMBER( irq_r );
@ -620,7 +617,7 @@ private:
required_device<mb86901_device> m_maincpu;
required_device<mk48t12_device> m_timekpr;
required_device<m48t02_device> m_timekpr;
required_device<z80scc_device> m_scc1;
required_device<z80scc_device> m_scc2;
@ -710,6 +707,9 @@ uint32_t sun4_state::read_insn_data_4c(uint8_t asi, address_space &space, uint32
default:
printf("sun4c: access to memory type not defined in sun4c\n");
m_maincpu->set_mae();
m_buserr[0] = 0x20;
m_buserr[1] = offset << 2;
return 0;
}
}
@ -717,7 +717,7 @@ uint32_t sun4_state::read_insn_data_4c(uint8_t asi, address_space &space, uint32
{
if (!machine().side_effects_disabled())
{
//printf("sun4c: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
printf("sun4c: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
m_maincpu->set_mae();
m_buserr[0] |= 0x80; // invalid PTE
m_buserr[0] &= ~0x8000; // read
@ -778,12 +778,15 @@ void sun4_state::write_insn_data_4c(uint8_t asi, address_space &space, uint32_t
return;
default:
printf("sun4c: access to memory type not defined\n");
m_maincpu->set_mae();
m_buserr[0] = 0x8020;
m_buserr[1] = offset << 2;
return;
}
}
else
{
//printf("sun4c: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry, m_pagemap[entry], data, offset <<2, m_maincpu->pc());
printf("sun4c: INVALID PTE entry %d %08x accessed! data=%08x vaddr=%x PC=%x\n", entry, m_pagemap[entry], data, offset <<2, m_maincpu->pc());
m_maincpu->set_mae();
m_buserr[0] |= 0x8080; // write cycle, invalid PTE
m_buserr[1] = offset<<2;
@ -1043,7 +1046,7 @@ uint32_t sun4_state::read_insn_data(uint8_t asi, address_space &space, uint32_t
{
if (!machine().side_effects_disabled())
{
//printf("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
printf("sun4: INVALID PTE entry %d %08x accessed! vaddr=%x PC=%x\n", entry, m_pagemap[entry], offset <<2, m_maincpu->pc());
m_maincpu->set_mae();
m_buserr[0] |= 0x80; // invalid PTE
m_buserr[0] &= ~0x8000; // read
@ -1583,7 +1586,7 @@ READ8_MEMBER( sun4_state::irq_r )
WRITE8_MEMBER( sun4_state::irq_w )
{
//printf("%02x to IRQ\n", data);
printf("%02x to IRQ\n", data);
m_irq_reg = data;
@ -1594,6 +1597,7 @@ WRITE8_MEMBER( sun4_state::irq_w )
WRITE_LINE_MEMBER( sun4_state::scc1_int )
{
logerror("scc1\n");
m_scc1_int = state;
m_maincpu->set_input_line(SPARC_IRQ12, ((m_scc1_int || m_scc2_int) && (m_irq_reg & 0x01)) ? ASSERT_LINE : CLEAR_LINE);
@ -1601,6 +1605,7 @@ WRITE_LINE_MEMBER( sun4_state::scc1_int )
WRITE_LINE_MEMBER( sun4_state::scc2_int )
{
logerror("scc2\n");
m_scc2_int = state;
m_maincpu->set_input_line(SPARC_IRQ12, ((m_scc1_int || m_scc2_int) && (m_irq_reg & 0x01)) ? ASSERT_LINE : CLEAR_LINE);
@ -1618,6 +1623,7 @@ void sun4_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
start_timer(0);
if ((m_irq_reg & 0x21) == 0x21)
{
logerror("t0\n");
m_maincpu->set_input_line(SPARC_IRQ10, ASSERT_LINE);
//printf("Taking INT10\n");
}
@ -1631,6 +1637,7 @@ void sun4_state::device_timer(emu_timer &timer, device_timer_id id, int param, v
//m_c1_timer->adjust(attotime::never);
if ((m_irq_reg & 0x81) == 0x81)
{
logerror("t1\n");
m_maincpu->set_input_line(SPARC_IRQ14, ASSERT_LINE);
//printf("Taking INT14\n");
}
@ -1658,6 +1665,7 @@ READ32_MEMBER( sun4_state::timer_r )
//printf("Read timer limit 0 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask);
m_counter[0] &= ~0x80000000;
m_counter[1] &= ~0x80000000;
logerror("tc0\n");
m_maincpu->set_input_line(SPARC_IRQ10, CLEAR_LINE);
}
@ -1670,6 +1678,7 @@ READ32_MEMBER( sun4_state::timer_r )
//printf("Read timer limit 1 (%08x) @ %x, mask %08x\n", ret, m_maincpu->pc(), mem_mask);
m_counter[2] &= ~0x80000000;
m_counter[3] &= ~0x80000000;
logerror("tc1\n");
m_maincpu->set_input_line(SPARC_IRQ14, CLEAR_LINE);
}
return ret;
@ -1738,6 +1747,7 @@ void sun4_state::dma_check_interrupts()
if (old_irq != m_dma_irq)
{
//logerror("m_dma_irq %d because irq_or_err_pending:%d and irq_enabled:%d\n", m_dma_irq ? 1 : 0, irq_or_err_pending, irq_enabled);
logerror("dma\n");
m_maincpu->set_input_line(SPARC_IRQ3, m_dma_irq ? ASSERT_LINE : CLEAR_LINE);
}
}
@ -1964,32 +1974,6 @@ READ32_MEMBER( sun4_state::ss1_sl0_id )
return 0xfe810101;
}
// indicate 4/60 color video card exists
READ32_MEMBER( sun4_state::ss1_sl3_id )
{
return 0xfe010101;
}
// indicate no card exists
READ32_MEMBER( sun4_state::ss1_sl1_id )
{
m_maincpu->set_mae();
m_buserr[0] |= 0x20; // timeout
m_buserr[0] &= ~0x8000; // read
m_buserr[1] = 0xffa00000;
return 0;
}
// indicate no card exists
READ32_MEMBER( sun4_state::ss1_sl2_id )
{
m_maincpu->set_mae();
m_buserr[0] |= 0x20; // timeout
m_buserr[0] &= ~0x8000; // read
m_buserr[1] = 0xffc00000;
return 0;
}
FLOPPY_FORMATS_MEMBER( sun4_state::floppy_formats )
FLOPPY_PC_FORMAT
FLOPPY_FORMATS_END
@ -1999,11 +1983,17 @@ static void sun_floppies(device_slot_interface &device)
device.option_add("35hd", FLOPPY_35_HD);
}
static void sun4_cdrom(device_t *device)
{
downcast<nscsi_cdrom_device &>(*device).set_block_size(512);
}
static void sun_scsi_devices(device_slot_interface &device)
{
device.option_add("cdrom", NSCSI_CDROM);
device.option_add("harddisk", NSCSI_HARDDISK);
device.option_add_internal("ncr53c90a", NCR53C90A);
device.set_option_machine_config("cdrom", sun4_cdrom);
}
void sun4_state::ncr53c90a(device_t *device)
@ -2023,7 +2013,7 @@ MACHINE_CONFIG_START(sun4_state::sun4)
RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00);
MCFG_DEVICE_ADD(TIMEKEEPER_TAG, MK48T12, 0)
M48T02(config, TIMEKEEPER_TAG, 0);
MCFG_N82077AA_ADD(FDC_TAG, n82077aa_device::MODE_PS2)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", sun_floppies, "35hd", sun4_state::floppy_formats)
@ -2083,7 +2073,7 @@ MACHINE_CONFIG_START(sun4_state::sun4c)
RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00);
MCFG_DEVICE_ADD(TIMEKEEPER_TAG, MK48T12, 0)
M48T02(config, TIMEKEEPER_TAG, 0);
MCFG_N82077AA_ADD(FDC_TAG, n82077aa_device::MODE_PS2)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", sun_floppies, "35hd", sun4_state::floppy_formats)

7
src/mame/drivers/tecmosys.cpp
View File

@ -255,8 +255,7 @@ READ16_MEMBER(tecmosys_state::unk880000_r)
switch( offset )
{
case 0:
if ( m_screen->vpos() >= 240) return 0;
else return 1;
return (m_screen->vpos() >= 240) ? 0 : 1;
default:
return 0;
@ -459,7 +458,7 @@ MACHINE_CONFIG_START(tecmosys_state::tecmosys)
MCFG_DEVICE_PROGRAM_MAP(main_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", tecmosys_state, irq1_line_hold)
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count("screen", 400); // guess
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 400); // guess
MCFG_DEVICE_ADD("audiocpu", Z80, XTAL(16'000'000)/2 )
MCFG_DEVICE_PROGRAM_MAP(sound_map)
@ -469,7 +468,7 @@ MACHINE_CONFIG_START(tecmosys_state::tecmosys)
EEPROM_93C46_16BIT(config, "eeprom", eeprom_serial_streaming::ENABLE);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
MCFG_SCREEN_REFRESH_RATE(57.4458)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3000))

4
src/mame/drivers/toobin.cpp
View File

@ -211,7 +211,7 @@ MACHINE_CONFIG_START(toobin_state::toobin)
EEPROM_2804(config, "eeprom").lock_after_write(true);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_TILEMAP_ADD_STANDARD("playfield", "gfxdecode", 4, toobin_state, get_playfield_tile_info, 8,8, SCAN_ROWS, 128,64)
@ -219,7 +219,7 @@ MACHINE_CONFIG_START(toobin_state::toobin)
MCFG_ATARI_MOTION_OBJECTS_ADD("mob", "screen", toobin_state::s_mob_config)
MCFG_ATARI_MOTION_OBJECTS_GFXDECODE("gfxdecode")
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/2, 640, 0, 512, 416, 0, 384)
MCFG_SCREEN_UPDATE_DRIVER(toobin_state, screen_update)

4
src/mame/drivers/ultratnk.cpp
View File

@ -302,10 +302,10 @@ MACHINE_CONFIG_START(ultratnk_state::ultratnk)
latch.q_out_cb<6>().set("discrete", FUNC(discrete_device::write_line<ULTRATNK_FIRE_EN_2>));
latch.q_out_cb<7>().set("discrete", FUNC(discrete_device::write_line<ULTRATNK_FIRE_EN_1>));
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count("screen", 8);
WATCHDOG_TIMER(config, m_watchdog).set_vblank_count(m_screen, 8);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, 0, 256, VTOTAL, 0, 224)
MCFG_SCREEN_UPDATE_DRIVER(ultratnk_state, screen_update)
MCFG_SCREEN_VBLANK_CALLBACK(WRITELINE(*this, ultratnk_state, screen_vblank))

133
src/mame/drivers/videolich.cpp → src/mame/drivers/video21.cpp
View File

@ -4,20 +4,23 @@
2018-09-15
Unknown b&w gambling game.
Video 21 blackjack game. Thanks to hap who figured out the inputs and the name of the game.
VIDEO-GAMES - LICH/GERMANY 1017a
NEC D8080AFC (i8080), unknown xtal, bank of 7 dips. 10x 4-bit proms, type F93453 (=82S137)
Video Ram = 7 x 2102 (bit 7 omitted). Main Ram = 2x MCM145101 (=M5101L).
The game has sound (there's a LM380N visible), looks like there's a bunch of chips
The game has sound (there's a LM380N visible), looks like there's a bunch of TTL chips
involved, and a 555.
To Do:
- Sound
- Inputs / the correct dip settings
- CPU clock
- Name of the machine
- unknown status bits? eg. hopper
- color overlay as seen on flyer upright cabinet
When booted, press W to get it going.
*******************************************************************************************/
@ -27,17 +30,17 @@ To Do:
#include "emupal.h"
class videolich_state : public driver_device
class video21_state : public driver_device
{
public:
videolich_state(const machine_config &mconfig, device_type type, const char *tag)
video21_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this,"maincpu")
, m_p_videoram(*this, "videoram")
, m_p_chargen(*this, "chargen")
{ }
void videolich(machine_config &config);
void video21(machine_config &config);
private:
@ -50,7 +53,7 @@ private:
};
uint32_t videolich_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
uint32_t video21_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
uint8_t y,ra,chr,gfx;
uint16_t sy=0,ma=0,x;
@ -82,78 +85,84 @@ uint32_t videolich_state::screen_update(screen_device &screen, bitmap_ind16 &bit
return 0;
}
void videolich_state::mem_map(address_map &map) {
void video21_state::mem_map(address_map &map) {
map(0x0000,0x0fff).rom().mirror(0x3000);
map(0xe000,0xe3ff).ram().share("videoram");
map(0xff00,0xffff).ram();
}
void videolich_state::io_map(address_map &map) {
void video21_state::io_map(address_map &map) {
map(0x02,0x02).nopw(); // lots of unknown writes, might be some kind of dac
map(0x04,0x04); //.w unknown write
map(0x08,0x08); //.w unknown write
map(0x41,0x41).portr("IN41");
map(0x42,0x42).portr("IN42");
map(0x44,0x44); //.r in the code, but was never reached
map(0x44,0x44).portr("IN44");
}
static INPUT_PORTS_START( videolich )
PORT_START("IN41")
static INPUT_PORTS_START( video21 )
PORT_START("IN41") // dips and tilt
PORT_DIPNAME( 0x01, 0x01, "41b0" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "41b1" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "41b2" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, "41b3" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, "41b4" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "41b5" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "41b6" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "41b7" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT )
PORT_START("IN42")
PORT_DIPNAME( 0x01, 0x01, "42b0" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "42b1" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "42b2" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, "42b3" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, "42b4" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "42b5" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Stay")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Payout")
PORT_DIPNAME( 0x40, 0x40, "42b6" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "42b7" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )
PORT_START("IN44")
PORT_DIPNAME( 0x01, 0x01, "44b0" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "44b1" )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "44b2" )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BET )
PORT_DIPNAME( 0x20, 0x20, "44b5" )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, "44b6" )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "44b7" )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
static const gfx_layout videolich_charlayout =
static const gfx_layout video21_charlayout =
{
8, 8, // 8 x 8 characters
128, // 128 characters, but only the first 76 look useful
@ -166,13 +175,13 @@ static const gfx_layout videolich_charlayout =
8*8 /* every char takes 8 bytes */
};
static GFXDECODE_START( gfx_videolich )
GFXDECODE_ENTRY( "chargen", 0x0000, videolich_charlayout, 0, 1 )
static GFXDECODE_START( gfx_video21 )
GFXDECODE_ENTRY( "chargen", 0x0000, video21_charlayout, 0, 1 )
GFXDECODE_END
MACHINE_CONFIG_START( videolich_state::videolich )
MACHINE_CONFIG_START( video21_state::video21 )
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", I8080, 20.79_MHz_XTAL / 8) // crystal confirmed but divisor unknown
MCFG_DEVICE_ADD("maincpu", I8080A, 20.79_MHz_XTAL / 16) // crystal confirmed but divisor unknown
MCFG_DEVICE_PROGRAM_MAP(mem_map)
MCFG_DEVICE_IO_MAP(io_map)
@ -180,12 +189,12 @@ MACHINE_CONFIG_START( videolich_state::videolich )
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::white())
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(250))
MCFG_SCREEN_UPDATE_DRIVER(videolich_state, screen_update)
MCFG_SCREEN_UPDATE_DRIVER(video21_state, screen_update)
MCFG_SCREEN_SIZE(32*8, 28*8)
MCFG_SCREEN_VISIBLE_AREA(0, 32*8-1, 0, 28*8-1)
MCFG_SCREEN_PALETTE("palette")
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_videolich)
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_video21)
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* sound hardware */
@ -193,7 +202,7 @@ MACHINE_CONFIG_END
ROM_START( videolich )
ROM_START( video21 )
ROM_REGION( 0x1000, "maincpu", 0 )
ROM_LOAD_NIB_HIGH( "lich_prg.02", 0x0000, 0x0400, CRC(05585e39) SHA1(7eefb5d63b4499a303ecdcad6af5df9fe9c89205) )
ROM_LOAD_NIB_LOW ( "lich_prg.03", 0x0000, 0x0400, CRC(b9134e96) SHA1(e7a8ff71f735add608d3c9dcc287ca37414debcb) )
@ -209,5 +218,5 @@ ROM_START( videolich )
ROM_LOAD_NIB_LOW ( "lich_gfx.43", 0x0000, 0x0400, CRC(0ecb0aab) SHA1(7f3f1b93a5d38828ae3e97e5f8ef1a6a96dc798b) )
ROM_END
GAME(19??, videolich, 0, videolich, videolich, videolich_state, empty_init, ROT0, "Video Games GmbH", "unnamed gambling game", MACHINE_MECHANICAL | MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
GAME(1980, video21, 0, video21, video21, video21_state, empty_init, ROT0, "Video Games GmbH", "Video 21", MACHINE_NO_SOUND)

4
src/mame/drivers/vpoker.cpp
View File

@ -636,7 +636,7 @@ WRITE_LINE_MEMBER(vpoker_state::ptm_irq)
MACHINE_CONFIG_START(vpoker_state::vpoker)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu",M6809,XTAL(4'000'000))
MCFG_DEVICE_ADD("maincpu", MC6809, XTAL(4'000'000))
MCFG_DEVICE_PROGRAM_MAP(main_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", vpoker_state, irq0_line_hold) //irq0 valid too
@ -655,7 +655,7 @@ MACHINE_CONFIG_START(vpoker_state::vpoker)
MCFG_PALETTE_ADD_3BIT_GBR("palette")
/* 6840 PTM */
ptm6840_device &ptm(PTM6840(config, "6840ptm", XTAL(4'000'000)));
ptm6840_device &ptm(PTM6840(config, "6840ptm", XTAL(4'000'000) / 4));
ptm.set_external_clocks(0, 0, 0);
ptm.irq_callback().set(FUNC(vpoker_state::ptm_irq));

4
src/mame/mame.lst
View File

@ -38214,8 +38214,8 @@ victory // (c) 1982
@source:vidbrain.cpp
vidbrain //
@source:videolich.cpp
videolich // Videogames gmbh (unnamed)
@source:video21.cpp
video21 // Videogames gmbh 1980
@source:videopin.cpp
solarwar // 036154-036169 1979 [6502]