diff --git a/.gitattributes b/.gitattributes index 2409d079a2a..397e02d92c7 100644 --- a/.gitattributes +++ b/.gitattributes @@ -1446,6 +1446,7 @@ src/mame/drivers/cultures.c svneol=native#text/plain src/mame/drivers/cvs.c svneol=native#text/plain src/mame/drivers/cyberbal.c svneol=native#text/plain src/mame/drivers/cybertnk.c svneol=native#text/plain +src/mame/drivers/d9final.c svneol=native#text/plain src/mame/drivers/dacholer.c svneol=native#text/plain src/mame/drivers/dambustr.c svneol=native#text/plain src/mame/drivers/darius.c svneol=native#text/plain diff --git a/src/mame/drivers/d9final.c b/src/mame/drivers/d9final.c new file mode 100644 index 00000000000..3ddb97acd21 --- /dev/null +++ b/src/mame/drivers/d9final.c @@ -0,0 +1,308 @@ +/******************************************************************************************* + + Dream 9 Final (c) 1992 Excellent Systems + + driver by Angelo Salese & David Haywood + + TODO: + - Don't know where the ES8712 & RTC62421b chips routes; + - Inputs is bare-bones; + - A bunch of missing port outputs; + - screen disable? Start-up fading looks horrible; + - Game looks IGS-esque, is there any correlation? + +============================================================================================ + + PCB: ES-9112 + + Main Chips: Z80, ES8712, 24Mhz OSC, RTC62421B 9262, YM2413, 4x8DSW + +*******************************************************************************************/ + + +#include "driver.h" +#include "cpu/z80/z80.h" +#include "sound/2413intf.h" + +static UINT8 *lo_vram,*hi_vram,*cram; + +VIDEO_START(d9final) +{ + +} + +VIDEO_UPDATE(d9final) +{ + const gfx_element *gfx = screen->machine->gfx[0]; + int count = 0x00000; + int y,x; + + for (y=0;y<32;y++) + { + for (x=0;x<64;x++) + { + int tile = lo_vram[count] | ((hi_vram[count] & 0x3f)<<8); + int color = cram[count] & 0x3f; + + drawgfx_opaque(bitmap,cliprect,gfx,tile,color,0,0,x*8,y*8); + count++; + } + } + return 0; +} + +static WRITE8_HANDLER( d9final_bank_w ) +{ + UINT8 *ROM = memory_region(space->machine, "maincpu"); + UINT32 bankaddress; + + bankaddress = 0x10000+(0x4000 * (data & 0x7)); + memory_set_bankptr(space->machine, 1, &ROM[bankaddress]); +} + +static ADDRESS_MAP_START( d9final_map, ADDRESS_SPACE_PROGRAM, 8 ) + AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) + AM_RANGE(0xc000, 0xc7ff) AM_RAM + AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram) + AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2) + AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&lo_vram) + AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE(&hi_vram) + AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE(&cram) +ADDRESS_MAP_END + +static ADDRESS_MAP_START( d9final_io, ADDRESS_SPACE_IO, 8 ) + ADDRESS_MAP_GLOBAL_MASK(0xff) +// AM_RANGE(0x00, 0x00) AM_WRITENOP //bit 0: irq enable? + AM_RANGE(0x00, 0x00) AM_READ_PORT("DSWA") + AM_RANGE(0x20, 0x20) AM_READ_PORT("DSWB") + AM_RANGE(0x40, 0x40) AM_READ_PORT("DSWC") + AM_RANGE(0x40, 0x41) AM_DEVWRITE("ym",ym2413_w) + AM_RANGE(0x60, 0x60) AM_READ_PORT("DSWD") + AM_RANGE(0x80, 0x80) AM_READ_PORT("IN0") + AM_RANGE(0xa0, 0xa0) AM_READ_PORT("IN1") AM_WRITE(d9final_bank_w) + AM_RANGE(0xe0, 0xe0) AM_READ_PORT("IN2") +ADDRESS_MAP_END + +static INPUT_PORTS_START( d9final ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset") + PORT_DIPNAME( 0x02, 0x02, "IN0" ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Analyzer") + + PORT_START("IN1") + PORT_DIPNAME( 0x01, 0x01, "IN1" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) + + PORT_START("IN2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) //another reset button + PORT_DIPNAME( 0x02, 0x02, "IN2" ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) + + PORT_START("DSWA") //basic system stuff + PORT_DIPNAME( 0x01, 0x01, "DSWA" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSWB") //odd rates / difficulty stuff + PORT_DIPNAME( 0x01, 0x01, "DSWB" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSWC") //coinage A & B + PORT_DIPNAME( 0x01, 0x01, "DSWC" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSWD") //coinage C & D + PORT_DIPNAME( 0x01, 0x00, "SYSA" ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x01, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x02, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x04, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x08, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x10, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x20, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x80, DEF_STR( On ) ) +INPUT_PORTS_END + +static const gfx_layout tiles16x8_layout = +{ + 8,8, + RGN_FRAC(1,1), + 4, + { 0, 1, 2, 3 }, + { 8, 0, 12, 4, 24, 16, 28, 20 }, + { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, + 32*8 +}; + +static GFXDECODE_START( d9final ) + GFXDECODE_ENTRY( "gfx1", 0, tiles16x8_layout, 0, 16*4 ) +GFXDECODE_END + +static MACHINE_RESET( d9final ) +{ +// UINT8 *ROM = memory_region(machine, "maincpu"); + +// memory_set_bankptr(machine, 1, &ROM[0x10000]); +} + +static MACHINE_DRIVER_START( d9final ) + /* basic machine hardware */ + MDRV_CPU_ADD("maincpu", Z80,24000000/4)/* ? MHz */ + MDRV_CPU_PROGRAM_MAP(d9final_map) + MDRV_CPU_IO_MAP(d9final_io) + MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) + + MDRV_MACHINE_RESET( d9final ) + + /* video hardware */ + MDRV_SCREEN_ADD("screen", RASTER) + MDRV_SCREEN_REFRESH_RATE(60) + MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) + MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) + MDRV_SCREEN_SIZE(512, 256) + MDRV_SCREEN_VISIBLE_AREA(0, 512-1, 16, 256-16-1) + + MDRV_GFXDECODE(d9final) + MDRV_PALETTE_LENGTH(0x400) + MDRV_PALETTE_INIT(all_black) + + MDRV_VIDEO_START(d9final) + MDRV_VIDEO_UPDATE(d9final) + + MDRV_SPEAKER_STANDARD_MONO("mono") + + MDRV_SOUND_ADD("ym", YM2413, 24000000/8) // ? + MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5) +MACHINE_DRIVER_END + + +ROM_START( d9final ) + ROM_REGION( 0x30000, "maincpu", 0 ) + ROM_LOAD( "2.4h", 0x00000, 0x8000, CRC(a8d838c8) SHA1(85b2cd1b73569e0e4fc13bfff537cfc2b4d569a1) ) + ROM_CONTINUE( 0x10000, 0x08000 ) + ROM_COPY( "maincpu", 0x10000, 0x18000, 0x08000 ) //or just 0xff + ROM_LOAD( "1.2h", 0x20000, 0x10000, CRC(901281ec) SHA1(7b4cae343f1b025d988a507141c0fa8229a0fea1) ) + + ROM_REGION( 0x80000, "gfx1", 0 ) + ROM_LOAD16_BYTE( "3.13h", 0x00001, 0x40000, CRC(a2de0cce) SHA1(d510671b75417c10ce479663f6f21367121384b4) ) + ROM_LOAD16_BYTE( "4.15h", 0x00000, 0x40000, CRC(859b7105) SHA1(1b36f84706473afaa50b6546d7373a2ee6602b9a) ) +ROM_END + + + +GAME( 1992, d9final, 0, d9final, d9final, 0, ROT0, "Excellent System", "Dream 9 Final (v2.24)", 0 ) diff --git a/src/mame/mame.mak b/src/mame/mame.mak index 1d8d024a0a6..b368aa392c0 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -620,6 +620,7 @@ $(MAMEOBJ)/eolith.a: \ $(MAMEOBJ)/excelent.a: \ $(DRIVERS)/aquarium.o $(VIDEO)/aquarium.o \ + $(DRIVERS)/d9final.o \ $(DRIVERS)/gcpinbal.o $(VIDEO)/gcpinbal.o \ $(DRIVERS)/vmetal.o \ diff --git a/src/mame/mamedriv.c b/src/mame/mamedriv.c index f7229e35e8b..1e218ce4141 100644 --- a/src/mame/mamedriv.c +++ b/src/mame/mamedriv.c @@ -8580,6 +8580,7 @@ Other Sun games DRIVER( gfire2 ) /* (c) 1992 Topis Corp */ DRIVER( sprcros2 ) /* (c) 1986 GM Shoji */ DRIVER( sprcros2a ) /* (c) 1986 GM Shoji */ + DRIVER( d9final ) /* (c) 1992 Excellent System */ DRIVER( gcpinbal ) /* (c) 1994 Excellent System */ DRIVER( vmetal ) /* (c) 1995 Excellent System? */ DRIVER( vmetaln ) /* (c) 1995 Excellent System? */