mirror of
https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
New machines added as MACHINE_NOT_WORKING
----------------------------------------- Tinker Bell [Darksoft, Team Europe, R. Belmont] segam1.cpp: removed and games merged into the new segasm1.cpp. [R. Belmont]
This commit is contained in:
arbee
parent
fd82da23ef
commit
ce212a5e9a
@ -3569,7 +3569,7 @@ files {
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MAME_DIR .. "src/mame/drivers/segas24.cpp",
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MAME_DIR .. "src/mame/includes/segas24.h",
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MAME_DIR .. "src/mame/video/segas24.cpp",
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MAME_DIR .. "src/mame/drivers/segam1.cpp",
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MAME_DIR .. "src/mame/drivers/segasm1.cpp",
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MAME_DIR .. "src/mame/drivers/segas32.cpp",
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MAME_DIR .. "src/mame/includes/segas32.h",
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MAME_DIR .. "src/mame/machine/segas32.cpp",
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@ -1,445 +0,0 @@
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// license:BSD-3-Clause
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// copyright-holders:David Haywood
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/*
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Sega M1 hardware (837-7571) (PCB)
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Sega Bingo Multicart (837-10675) (Sticker on PCB)
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used for redemption / gambling style machines in a satellite setup
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based on Caribbean Boule the following hardware setup is used
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One X-Board (segaxbd.cpp) drives a large rear-projection monitor which all players view to see the main game progress.
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Multiple M1 boards ("satellite" board) for each player for them to view information privately.
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One 'link' board which connects everything together. The link board has audio hardware, a 68K, and a Z80 as
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well as a huge bank of UARTS and toslink connectors, but no video. It's possible the main game logic runs
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on the 'link' board.
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Unfortunately we don't have any dumps of anything other than an M1 board right now.
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---
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is this related to (or a component of?) bingoc.cpp, the EPR numbers are much lower there tho
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so it's probably an earlier version of the same thing or one of the 'link' boards?
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uses s24 style tilemaps (ram based?)
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*/
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/z80/z80.h"
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#include "machine/315_5296.h"
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#include "machine/gen_latch.h"
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#include "machine/i8251.h"
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#include "machine/mb8421.h"
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#include "sound/ymopn.h"
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#include "video/segaic24.h"
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#include "emupal.h"
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#include "screen.h"
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#include "speaker.h"
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class segam1_state : public driver_device
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{
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public:
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segam1_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_audiocpu(*this, "audiocpu")
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, m_m1comm(*this, "m1comm")
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, m_screen(*this, "screen")
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, m_palette(*this, "palette")
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, m_paletteram(*this, "paletteram")
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, m_tile(*this, "tile")
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, m_mixer(*this, "mixer")
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, m_ymsnd(*this, "ymsnd")
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{ }
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void unkm1(machine_config &config);
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void segam1(machine_config &config);
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private:
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void paletteram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
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void sound_a0_bank_w(uint8_t data);
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virtual void machine_start() override;
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virtual void video_start() override;
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uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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required_device<cpu_device> m_maincpu;
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required_device<z80_device> m_audiocpu;
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required_device<z80_device> m_m1comm;
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required_device<screen_device> m_screen;
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required_device<palette_device> m_palette;
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required_shared_ptr<u16> m_paletteram;
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required_device<segas24_tile_device> m_tile;
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required_device<segas24_mixer_device> m_mixer;
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required_device<ym3438_device> m_ymsnd;
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void segam1_comms_map(address_map &map);
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void segam1_map(address_map &map);
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void segam1_sound_io_map(address_map &map);
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void segam1_sound_map(address_map &map);
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void unkm1_sound_map(address_map &map);
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};
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void segam1_state::machine_start()
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{
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membank("soundbank")->configure_entries(0x00, 0x10, memregion("audiocpu")->base(), 0x2000);
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}
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void segam1_state::video_start()
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{
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}
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void segam1_state::sound_a0_bank_w(uint8_t data)
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{
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membank("soundbank")->set_entry(data & 0x0f);
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}
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// 315-5242
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void segam1_state::paletteram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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COMBINE_DATA(&m_paletteram[offset]);
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data = m_paletteram[offset];
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u16 r = (data & 0x00f) << 4;
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if(data & 0x1000)
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r |= 8;
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u16 g = data & 0x0f0;
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if(data & 0x2000)
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g |= 8;
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u16 b = (data & 0xf00) >> 4;
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if(data & 0x4000)
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b |= 8;
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r |= r >> 5;
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g |= g >> 5;
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b |= b >> 5;
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m_palette->set_pen_color(offset, rgb_t(r, g, b));
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if(data & 0x8000) {
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r = 255-0.6*(255-r);
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g = 255-0.6*(255-g);
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b = 255-0.6*(255-b);
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} else {
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r = 0.6*r;
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g = 0.6*g;
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b = 0.6*b;
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}
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m_palette->set_pen_color(offset+m_palette->entries()/2, rgb_t(r, g, b));
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}
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// copied from segas24.cpp
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namespace {
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struct layer_sort {
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layer_sort(segas24_mixer_device *_mixer) { mixer = _mixer; }
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bool operator()(int l1, int l2) {
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static const int default_pri[12] = { 0, 1, 2, 3, 4, 5, 6, 7, -4, -3, -2, -1 };
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int p1 = mixer->get_reg(l1) & 7;
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int p2 = mixer->get_reg(l2) & 7;
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if(p1 != p2)
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return p1 - p2 < 0;
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return default_pri[l2] - default_pri[l1] < 0;
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}
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segas24_mixer_device *mixer;
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};
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}
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// copied from segas24.cpp
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uint32_t segam1_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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if (m_mixer->get_reg(13) & 1)
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{
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bitmap.fill(m_palette->black_pen());
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return 0;
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}
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screen.priority().fill(0);
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bitmap.fill(0, cliprect);
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std::vector<int> order;
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order.resize(12);
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for(int i=0; i<12; i++)
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order[i] = i;
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std::sort(order.begin(), order.end(), layer_sort(m_mixer.target()));
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int level = 0;
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for(int i=0; i<12; i++)
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if(order[i] < 8)
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m_tile->draw(screen, bitmap, cliprect, order[i], level, 0);
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else
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level++;
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return 0;
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}
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void segam1_state::segam1_map(address_map &map)
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{
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map(0x000000, 0x07ffff).rom();
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map(0x340000, 0x340fff).rw("dpram", FUNC(mb8421_device::right_r), FUNC(mb8421_device::right_w)).umask16(0x00ff);
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map(0xb00000, 0xb0ffff).rw(m_tile, FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w));
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map(0xb20000, 0xb20001).nopw(); /* Horizontal split position (ABSEL) */
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map(0xb40000, 0xb40001).nopw(); /* Scanline trigger position (XHOUT) */
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map(0xb60000, 0xb60001).nopw(); /* Frame trigger position (XVOUT) */
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map(0xb70000, 0xb70001).nopw(); /* Synchronization mode */
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map(0xb80000, 0xbfffff).rw(m_tile, FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w));
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map(0xc00000, 0xc03fff).ram().w(FUNC(segam1_state::paletteram_w)).share("paletteram");
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map(0xc04000, 0xc0401f).rw(m_mixer, FUNC(segas24_mixer_device::read), FUNC(segas24_mixer_device::write));
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map(0xe00000, 0xe0001f).rw("io1", FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff);
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map(0xe40000, 0xe40001).portr("INX");
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map(0xe40002, 0xe40003).portr("INY");
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map(0xe40005, 0xe40005).w("soundlatch", FUNC(generic_latch_8_device::write));
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map(0xe40006, 0xe40007).nopw();
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map(0xe40008, 0xe40009).portr("INZ");
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map(0xe80000, 0xe8001f).rw("io2", FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff);
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map(0xf00000, 0xf03fff).mirror(0x0fc000).ram(); // NVRAM?
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}
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void segam1_state::segam1_sound_map(address_map &map)
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{
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map(0x0000, 0x7fff).rom();
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map(0xa000, 0xbfff).bankr("soundbank");
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map(0xf000, 0xffff).ram();
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}
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void segam1_state::unkm1_sound_map(address_map &map)
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{
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segam1_sound_map(map);
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map(0xe000, 0xefff).ram();
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}
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void segam1_state::segam1_sound_io_map(address_map &map)
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{
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map.global_mask(0xff);
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map(0x80, 0x83).rw(m_ymsnd, FUNC(ym3438_device::read), FUNC(ym3438_device::write));
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map(0xa0, 0xa0).w(FUNC(segam1_state::sound_a0_bank_w));
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map(0xc0, 0xc0).r("soundlatch", FUNC(generic_latch_8_device::read)).nopw();
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}
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void segam1_state::segam1_comms_map(address_map &map)
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{
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map(0x0000, 0x7fff).rom();
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map(0x8000, 0x9fff).ram();
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map(0xa000, 0xa7ff).rw("dpram", FUNC(mb8421_device::left_r), FUNC(mb8421_device::left_w));
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map(0xc000, 0xc001).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write));
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map(0xe003, 0xe003).nopw(); // ???
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}
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static INPUT_PORTS_START( segam1 )
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PORT_START("INA")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("INB")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("INC")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("IND")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("INE")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("INF")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("ING")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_START("INX")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED)
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PORT_START("INY")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED)
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PORT_START("INZ")
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PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNKNOWN)
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PORT_BIT(0xff00, IP_ACTIVE_LOW, IPT_UNUSED)
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INPUT_PORTS_END
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void segam1_state::segam1(machine_config &config)
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{
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M68000(config, m_maincpu, XTAL(20'000'000)/2);
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m_maincpu->set_addrmap(AS_PROGRAM, &segam1_state::segam1_map);
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m_maincpu->set_vblank_int("screen", FUNC(segam1_state::irq4_line_hold));
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Z80(config, m_audiocpu, 4000000); // unknown clock
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m_audiocpu->set_addrmap(AS_PROGRAM, &segam1_state::segam1_sound_map);
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m_audiocpu->set_addrmap(AS_IO, &segam1_state::segam1_sound_io_map);
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|
||||
Z80(config, m_m1comm, 4000000); // unknown clock
|
||||
m_m1comm->set_addrmap(AS_PROGRAM, &segam1_state::segam1_comms_map);
|
||||
|
||||
sega_315_5296_device &io1(SEGA_315_5296(config, "io1", 0)); // unknown clock
|
||||
io1.in_pa_callback().set_ioport("INA");
|
||||
io1.in_pb_callback().set_ioport("INB");
|
||||
io1.in_pc_callback().set_ioport("INC");
|
||||
io1.in_pd_callback().set_ioport("IND");
|
||||
io1.in_pe_callback().set_ioport("INE");
|
||||
io1.in_pf_callback().set_ioport("INF");
|
||||
|
||||
sega_315_5296_device &io2(SEGA_315_5296(config, "io2", 0)); // unknown clock
|
||||
io2.in_pg_callback().set_ioport("ING");
|
||||
|
||||
I8251(config, "uart", 4000000); // unknown clock
|
||||
|
||||
mb8421_device &dpram(MB8421(config, "dpram"));
|
||||
dpram.intl_callback().set_inputline("m1comm", 0);
|
||||
|
||||
S24TILE(config, m_tile, 0, 0x3fff).set_palette(m_palette);
|
||||
S24MIXER(config, m_mixer, 0);
|
||||
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_video_attributes(VIDEO_UPDATE_AFTER_VBLANK);
|
||||
m_screen->set_raw(16000000, 656, 0, 496, 424, 0, 384); // copied from segas24.cpp; may not be accurate
|
||||
m_screen->set_screen_update(FUNC(segam1_state::screen_update));
|
||||
m_screen->set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(8192*2);
|
||||
|
||||
// sound hardware
|
||||
SPEAKER(config, "mono").front_center();
|
||||
|
||||
GENERIC_LATCH_8(config, "soundlatch").data_pending_callback().set_inputline("audiocpu", INPUT_LINE_NMI);
|
||||
|
||||
YM3438(config, m_ymsnd, 8000000);
|
||||
m_ymsnd->add_route(ALL_OUTPUTS, "mono", 0.40);
|
||||
//m_ymsnd->irq_handler().set(FUNC(segam1_state::ym3438_irq_handler));
|
||||
}
|
||||
|
||||
void segam1_state::unkm1(machine_config &config)
|
||||
{
|
||||
segam1(config);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &segam1_state::unkm1_sound_map);
|
||||
|
||||
m_m1comm->set_disable(); // not dumped yet
|
||||
}
|
||||
|
||||
|
||||
ROM_START( bingpty ) // 1994/05/01 string
|
||||
ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
|
||||
ROM_LOAD16_BYTE( "epr-16648b.bin", 0x00000, 0x20000, CRC(e4fceb4c) SHA1(0a248bb328d2f6d72d540baefbe62838f4b76585) )
|
||||
ROM_LOAD16_BYTE( "epr-16649b.bin", 0x00001, 0x20000, CRC(736d8bbd) SHA1(c359ad513d4a7693cbb1a27ce26f89849e894d05) )
|
||||
|
||||
ROM_REGION( 0x20000, "audiocpu", 0 ) /* Z80 Code */
|
||||
ROM_LOAD( "epr-14845.bin", 0x00000, 0x20000, CRC(90d47101) SHA1(7bc002c104e3dbde1986aaec54112d5658eab523) )
|
||||
|
||||
ROM_REGION( 0x8000, "m1comm", 0 ) /* Z80 Code */
|
||||
ROM_LOAD( "epr-14221a.bin", 0x00000, 0x8000, CRC(a13e67a4) SHA1(4cd269c7f04a64ae7806c8784f86bf6553a25d85) )
|
||||
|
||||
// dumps of the X-Board part, and the LINK PCB are missing.
|
||||
ROM_END
|
||||
|
||||
ROM_START( unkm1 ) // 1992.01.31 string
|
||||
ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
|
||||
ROM_LOAD16_BYTE( "epr-14427.ic8", 0x00000, 0x40000, CRC(2d904fc6) SHA1(7062f47d77d09906420118c85e1cb565bec345a7) )
|
||||
ROM_LOAD16_BYTE( "epr-14428.ic7", 0x00001, 0x40000, CRC(97a317f4) SHA1(19bc4cf6b6c580caa44f36c929b445ed94b2d9eb) )
|
||||
|
||||
ROM_REGION( 0x20000, "audiocpu", 0 ) /* Z80 Code */
|
||||
ROM_LOAD( "epr-14429.ic104", 0x00000, 0x20000, CRC(1ff8262d) SHA1(fb90bd877b2dc65eb3e5495d6e21dee1f871fb44) )
|
||||
|
||||
ROM_REGION( 0x8000, "m1comm", 0 )
|
||||
ROM_LOAD( "epr-14426.ic2", 0x0000, 0x8000, NO_DUMP ) // on "SYSTEM M1 COM" board with Z80, MB8421 and TMP82C51AP
|
||||
|
||||
ROM_REGION( 0x100, "plds", 0 )
|
||||
ROM_LOAD( "315-5472-01.ic22", 0x000, 0x0eb, CRC(828ee6e2) SHA1(f32dd0f6297cc8bd3049be4bca502c0f8ec738cf) )
|
||||
// dumps of the X-Board part, and the LINK PCB are missing.
|
||||
ROM_END
|
||||
|
||||
GAME( 1994, bingpty, 0, segam1, segam1, segam1_state, empty_init, ROT0, "Sega", "Bingo Party Multicart (Rev B) (M1 Satellite board)", MACHINE_NOT_WORKING )
|
||||
GAME( 1992, unkm1, 0, unkm1, segam1, segam1_state, empty_init, ROT0, "Sega", "unknown Sega gambling game (M1 Satellite board)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
|
||||
702
src/mame/drivers/segasm1.cpp
Normal file
702
src/mame/drivers/segasm1.cpp
Normal file
@ -0,0 +1,702 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:R. Belmont, David Haywood
|
||||
/************************************************************************************************************
|
||||
|
||||
Sega System M1 medal games board (834-7795 standlone, 837-7571 networked)
|
||||
|
||||
68000 - main CPU
|
||||
Z80 - sound CPU
|
||||
YM3438 - sound generator
|
||||
315-5242 - color encoder
|
||||
315-5292 - System 24/Model 1/Model 2 tilemaps
|
||||
315-5294 - priority?
|
||||
315-5296 - I/O (x2)
|
||||
315-5388A - priority?
|
||||
|
||||
20 MHz and 32 MHz oscillators are present near the 68k, Z80, and YM3438.
|
||||
A 4.9152 MHz oscillator is near the video chips.
|
||||
|
||||
TODO:
|
||||
- Inputs (inserting a coin freezes some of the text on screen, what's next?)
|
||||
- Verify sound latch location on Tinker Bell vs. the comms games
|
||||
- Bingo Party puts up a message about ROM version mismatch with the RAM and says to press the reset switch.
|
||||
However, when this is done, the code simply locks up (BRA to itself) and doesn't initialize the RAM.
|
||||
|
||||
Network version notes:
|
||||
Based on Caribbean Boule the following hardware setup is used:
|
||||
- One X-Board (segaxbd.cpp) drives a large rear-projection monitor which all players view to see the main game progress.
|
||||
- Multiple M1 boards ("satellite" board) for each player for them to view information privately.
|
||||
- One 'link' board which connects everything together. The link board has audio hardware, a 68K, and a Z80 as
|
||||
well as a huge bank of UARTS and toslink connectors, but no video. It's possible the main game logic runs
|
||||
on the 'link' board.
|
||||
|
||||
Unfortunately we don't have any dumps of anything other than an M1 board right now.
|
||||
|
||||
Is this related to (or a component of?) bingoc.cpp, the EPR numbers are much lower there tho
|
||||
so it's probably an earlier version of the same thing or one of the 'link' boards?
|
||||
|
||||
************************************************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/m68000/m68000.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "video/segaic24.h"
|
||||
#include "machine/315_5296.h"
|
||||
#include "machine/gen_latch.h"
|
||||
#include "machine/i8251.h"
|
||||
#include "machine/mb8421.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "machine/timer.h"
|
||||
#include "sound/ymopn.h"
|
||||
#include "emupal.h"
|
||||
#include "screen.h"
|
||||
#include "speaker.h"
|
||||
|
||||
namespace {
|
||||
|
||||
class systemm1_state : public driver_device
|
||||
{
|
||||
public:
|
||||
systemm1_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_soundcpu(*this, "soundcpu")
|
||||
, m_commcpu(*this, "m1comm")
|
||||
, m_screen(*this, "screen")
|
||||
, m_tiles(*this, "tilemap")
|
||||
, m_mixer(*this, "mixer")
|
||||
, m_palette(*this, "palette")
|
||||
, m_ym(*this, "ym3438")
|
||||
, m_io1(*this, "io1")
|
||||
, m_io2(*this, "io2")
|
||||
, m_soundlatch(*this, "soundlatch")
|
||||
{
|
||||
}
|
||||
|
||||
void m1base(machine_config &config);
|
||||
void m1comm(machine_config &config);
|
||||
|
||||
private:
|
||||
u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void mem_map(address_map &map);
|
||||
void mem_comm_map(address_map &map);
|
||||
void z80_map(address_map &map);
|
||||
void z80_io_map(address_map &map);
|
||||
void comm_map(address_map &map);
|
||||
|
||||
required_device<m68000_device> m_maincpu;
|
||||
required_device<z80_device> m_soundcpu;
|
||||
optional_device<z80_device> m_commcpu;
|
||||
required_device<screen_device> m_screen;
|
||||
required_device<segas24_tile_device> m_tiles;
|
||||
required_device<segas24_mixer_device> m_mixer;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<ym3438_device> m_ym;
|
||||
required_device<sega_315_5296_device> m_io1, m_io2;
|
||||
required_device<generic_latch_8_device> m_soundlatch;
|
||||
|
||||
void machine_start() override;
|
||||
|
||||
u16 m_paletteram[0x4000 / sizeof(u16)];
|
||||
|
||||
u16 paletteram_r(offs_t offset);
|
||||
void paletteram_w(offs_t offset, u16 data, u16 mem_mask);
|
||||
|
||||
void sound_bank_w(u8 data);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(scan_irq);
|
||||
|
||||
struct layer_sort
|
||||
{
|
||||
layer_sort(segas24_mixer_device *_mixer) { mixer = _mixer; }
|
||||
|
||||
bool operator()(int l1, int l2)
|
||||
{
|
||||
static const int default_pri[12] = {0, 1, 2, 3, 4, 5, 6, 7, -4, -3, -2, -1};
|
||||
int p1 = mixer->get_reg(l1) & 7;
|
||||
int p2 = mixer->get_reg(l2) & 7;
|
||||
if (p1 != p2)
|
||||
{
|
||||
return p1 - p2 < 0;
|
||||
}
|
||||
|
||||
return default_pri[l2] - default_pri[l1] < 0;
|
||||
}
|
||||
|
||||
segas24_mixer_device *mixer;
|
||||
};
|
||||
};
|
||||
|
||||
u32 systemm1_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
if (m_mixer->get_reg(13) & 1)
|
||||
{
|
||||
bitmap.fill(m_palette->black_pen());
|
||||
return 0;
|
||||
}
|
||||
|
||||
screen.priority().fill(0);
|
||||
bitmap.fill(0, cliprect);
|
||||
|
||||
std::vector<int> order;
|
||||
order.resize(12);
|
||||
for (int i = 0; i < 12; i++)
|
||||
{
|
||||
order[i] = i;
|
||||
}
|
||||
|
||||
std::sort(order.begin(), order.end(), layer_sort(m_mixer.target()));
|
||||
|
||||
int level = 0;
|
||||
for (int i = 0; i < 12; i++)
|
||||
{
|
||||
if (order[i] < 8)
|
||||
{
|
||||
m_tiles->draw(screen, bitmap, cliprect, order[i], level, 0);
|
||||
}
|
||||
else
|
||||
{
|
||||
level++;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(systemm1_state::scan_irq)
|
||||
{
|
||||
const int scanline = param;
|
||||
|
||||
if (scanline == 384)
|
||||
{
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, ASSERT_LINE);
|
||||
}
|
||||
else if (scanline == 0)
|
||||
{
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
u16 systemm1_state::paletteram_r(offs_t offset)
|
||||
{
|
||||
return m_paletteram[offset];
|
||||
}
|
||||
|
||||
void systemm1_state::paletteram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
int r, g, b;
|
||||
COMBINE_DATA(m_paletteram + offset);
|
||||
data = m_paletteram[offset];
|
||||
|
||||
r = (data & 0x00f) << 4;
|
||||
if (data & 0x1000)
|
||||
r |= 8;
|
||||
|
||||
g = data & 0x0f0;
|
||||
if (data & 0x2000)
|
||||
g |= 8;
|
||||
|
||||
b = (data & 0xf00) >> 4;
|
||||
if (data & 0x4000)
|
||||
b |= 8;
|
||||
|
||||
r |= r >> 5;
|
||||
g |= g >> 5;
|
||||
b |= b >> 5;
|
||||
|
||||
m_palette->set_pen_color(offset, rgb_t(r, g, b));
|
||||
|
||||
if (data & 0x8000)
|
||||
{
|
||||
r = 255 - 0.6 * (255 - r);
|
||||
g = 255 - 0.6 * (255 - g);
|
||||
b = 255 - 0.6 * (255 - b);
|
||||
}
|
||||
else
|
||||
{
|
||||
r = 0.6 * r;
|
||||
g = 0.6 * g;
|
||||
b = 0.6 * b;
|
||||
}
|
||||
m_palette->set_pen_color(offset + m_palette->entries() / 2, rgb_t(r, g, b));
|
||||
}
|
||||
|
||||
void systemm1_state::mem_map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x07ffff).rom().region("maincpu", 0);
|
||||
map(0x100000, 0x17ffff).rom().region("maincpu", 0x80000);
|
||||
|
||||
map(0xb00000, 0xb0ffff).rw(m_tiles, FUNC(segas24_tile_device::tile_r), FUNC(segas24_tile_device::tile_w));
|
||||
map(0xb20000, 0xb20001).nopw(); // Horizontal split position (ABSEL)
|
||||
map(0xb40000, 0xb40001).nopw(); // Scanline trigger position (XHOUT)
|
||||
map(0xb60000, 0xb60001).nopw(); // Frame trigger position (XVOUT)
|
||||
map(0xb70000, 0xb70001).nopw(); // Synchronization mode
|
||||
map(0xb80000, 0xbfffff).rw(m_tiles, FUNC(segas24_tile_device::char_r), FUNC(segas24_tile_device::char_w));
|
||||
map(0xc00000, 0xc01fff).rw(FUNC(systemm1_state::paletteram_r), FUNC(systemm1_state::paletteram_w)).share("paletteram");
|
||||
|
||||
map(0xc04000, 0xc0401f).rw(m_mixer, FUNC(segas24_mixer_device::read), FUNC(segas24_mixer_device::write));
|
||||
|
||||
map(0xe00000, 0xe0003f).rw(m_io1, FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff);
|
||||
map(0xe40000, 0xe40001).portr("DIP1");
|
||||
map(0xe40005, 0xe40005).w(m_soundlatch, FUNC(generic_latch_8_device::write));
|
||||
map(0xe80000, 0xe8003f).rw(m_io2, FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff);
|
||||
|
||||
map(0xf00000, 0xf03fff).mirror(0x0fc000).ram().share("nvram");
|
||||
}
|
||||
|
||||
void systemm1_state::mem_comm_map(address_map &map)
|
||||
{
|
||||
mem_map(map);
|
||||
|
||||
map(0x340000, 0x340fff).rw("dpram", FUNC(mb8421_device::right_r), FUNC(mb8421_device::right_w)).umask16(0x00ff);
|
||||
|
||||
map(0xe40000, 0xe40001).portr("INX");
|
||||
map(0xe40002, 0xe40003).portr("INY");
|
||||
map(0xe40008, 0xe40009).portr("INZ");
|
||||
}
|
||||
|
||||
// Sound system is based on System 32, minus the 5C68, the second YM, and YM IRQs
|
||||
void systemm1_state::z80_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x9fff).rom().region("soundcpu", 0);
|
||||
map(0xa000, 0xbfff).bankr("soundbank");
|
||||
map(0xe000, 0xffff).ram();
|
||||
}
|
||||
|
||||
void systemm1_state::z80_io_map(address_map &map)
|
||||
{
|
||||
map.global_mask(0xff);
|
||||
map(0x80, 0x83).mirror(0x0c).rw(m_ym, FUNC(ym3438_device::read), FUNC(ym3438_device::write));
|
||||
map(0xa0, 0xa0).w(FUNC(systemm1_state::sound_bank_w));
|
||||
map(0xc0, 0xc0).r(m_soundlatch, FUNC(generic_latch_8_device::read));
|
||||
}
|
||||
|
||||
void systemm1_state::machine_start()
|
||||
{
|
||||
membank("soundbank")->configure_entries(0x00, 0x10, memregion("soundcpu")->base(), 0x2000);
|
||||
}
|
||||
|
||||
void systemm1_state::sound_bank_w(u8 data)
|
||||
{
|
||||
membank("soundbank")->set_entry(data & 0x0f);
|
||||
}
|
||||
|
||||
void systemm1_state::comm_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x7fff).rom();
|
||||
map(0x8000, 0x9fff).ram();
|
||||
map(0xa000, 0xa7ff).rw("dpram", FUNC(mb8421_device::left_r), FUNC(mb8421_device::left_w));
|
||||
map(0xc000, 0xc001).rw("uart", FUNC(i8251_device::read), FUNC(i8251_device::write));
|
||||
map(0xe003, 0xe003).nopw(); // ???
|
||||
}
|
||||
|
||||
static INPUT_PORTS_START(tinkerbl)
|
||||
PORT_START("PC")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Reset Switch") PORT_CODE(KEYCODE_F1)
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPC1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPC2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPC3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPC4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPC5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPC7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPC8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PB")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPB1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPB2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPB3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPB4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPB5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPB6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPB7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPB8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PD")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPD1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPD2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPD3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPD4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPD5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPD6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
|
||||
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPD8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PE")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPE1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPE2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPE3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPE4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPE5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPE6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPE7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPE8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PF")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPF1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPF2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPF3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPF4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPF5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPF6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPF7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPF8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DIP1")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIP1-1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIP1-2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIP1-3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIP1-4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIP1-5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIP1-6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIP1-7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIP1-8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START(bingpty)
|
||||
PORT_START("PC")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPC1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPC2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPC3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPC4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPC5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPC6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPC7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPC8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PB")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPB1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPB2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPB3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPB4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPB5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPB6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPB7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPB8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PD")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPD1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPD2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPD3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPD4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPD5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPD6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPD8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PE")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPE1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPE2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "DIPE3" )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPE4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPE5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPE6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPE7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPE8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("PF")
|
||||
PORT_DIPNAME( 0x01, 0x01, "DIPF1" )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "DIPF2" )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Reset Switch") PORT_CODE(KEYCODE_F1)
|
||||
PORT_DIPNAME( 0x08, 0x08, "DIPF4" )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "DIPF5" )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "DIPF6" )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "DIPF7" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIPF8" )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("INX")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("INY")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START("INZ")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
void systemm1_state::m1base(machine_config &config)
|
||||
{
|
||||
M68000(config, m_maincpu, 10'000'000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &systemm1_state::mem_map);
|
||||
|
||||
Z80(config, m_soundcpu, 4'000'000);
|
||||
m_soundcpu->set_addrmap(AS_PROGRAM, &systemm1_state::z80_map);
|
||||
m_soundcpu->set_addrmap(AS_IO, &systemm1_state::z80_io_map);
|
||||
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_video_attributes(VIDEO_UPDATE_AFTER_VBLANK);
|
||||
// TODO: from System 24, might not be accurate for System M1
|
||||
m_screen->set_raw(XTAL(16'000'000), 656, 0 /*+69*/, 496 /*+69*/, 424, 0 /*+25*/, 384 /*+25*/);
|
||||
m_screen->set_screen_update(FUNC(systemm1_state::screen_update));
|
||||
|
||||
TIMER(config, "scantimer").configure_scanline(FUNC(systemm1_state::scan_irq), m_screen, 0, 1);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(8192);
|
||||
|
||||
S24TILE(config, m_tiles, 0, 0x3fff);
|
||||
m_tiles->set_palette(m_palette);
|
||||
|
||||
S24MIXER(config, m_mixer, 0);
|
||||
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
SPEAKER(config, "lspeaker").front_left();
|
||||
SPEAKER(config, "rspeaker").front_right();
|
||||
|
||||
YM3438(config, m_ym, XTAL(8'000'000));
|
||||
m_ym->add_route(0, "lspeaker", 0.40);
|
||||
m_ym->add_route(1, "rspeaker", 0.40);
|
||||
|
||||
SEGA_315_5296(config, m_io1, XTAL(16'000'000));
|
||||
m_io1->in_pb_callback().set_ioport("PB");
|
||||
m_io1->in_pc_callback().set_ioport("PC");
|
||||
m_io1->in_pd_callback().set_ioport("PD");
|
||||
m_io1->in_pe_callback().set_ioport("PE");
|
||||
m_io1->in_pf_callback().set_ioport("PF");
|
||||
|
||||
SEGA_315_5296(config, m_io2, XTAL(16'000'000));
|
||||
|
||||
GENERIC_LATCH_8(config, m_soundlatch);
|
||||
m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI);
|
||||
m_soundlatch->set_separate_acknowledge(false);
|
||||
}
|
||||
|
||||
void systemm1_state::m1comm(machine_config &config)
|
||||
{
|
||||
m1base(config);
|
||||
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &systemm1_state::mem_comm_map);
|
||||
|
||||
Z80(config, m_commcpu, 4'000'000); // unknown clock
|
||||
m_commcpu->set_addrmap(AS_PROGRAM, &systemm1_state::comm_map);
|
||||
|
||||
I8251(config, "uart", 4000000); // unknown clock
|
||||
|
||||
mb8421_device &dpram(MB8421(config, "dpram"));
|
||||
dpram.intl_callback().set_inputline("m1comm", 0);
|
||||
}
|
||||
|
||||
ROM_START(tinkerbl)
|
||||
ROM_REGION(0x100000, "maincpu", 0)
|
||||
ROM_LOAD16_BYTE("epr-a13637.ic8", 0x000000, 0x040000, CRC(de270e16) SHA1(e77fedbd11a698b1f7ed03feec64204f712c3cad))
|
||||
ROM_LOAD16_BYTE("epr-a13639.ic7", 0x000001, 0x040000, CRC(56ade038) SHA1(c807b63e1ff7cc9577dc45689ebc67ede396f7b6))
|
||||
ROM_LOAD16_BYTE("epr-13638.ic10", 0x080000, 0x040000, CRC(5fb6b19e) SHA1(795bd5e31c3261f981b2fb0fce38d9b04d2031c2))
|
||||
ROM_LOAD16_BYTE("epr-13640.ic9", 0x080001, 0x040000, CRC(afce4c2a) SHA1(b37e2e11c240d9679216410d8f004d566e053f52))
|
||||
|
||||
ROM_REGION(0x20000, "soundcpu", 0)
|
||||
ROM_LOAD("epr-13641.ic104", 0x000000, 0x020000, CRC(13142c1b) SHA1(b24535a4ac75780d9a3e0bcbecf673a5701c8be8))
|
||||
|
||||
ROM_REGION(0x40000, "gals", 0)
|
||||
ROM_LOAD("gal18v8a_315-5391.ic103", 0x000000, 0x040000, CRC(29480530) SHA1(d3d629fb4c2a4ae851f14b1d9e5b72b37b567f0b))
|
||||
ROM_END
|
||||
|
||||
ROM_START( bingpty ) // 1994/05/01 string
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
|
||||
ROM_LOAD16_BYTE( "epr-16648b.bin", 0x00000, 0x20000, CRC(e4fceb4c) SHA1(0a248bb328d2f6d72d540baefbe62838f4b76585) )
|
||||
ROM_LOAD16_BYTE( "epr-16649b.bin", 0x00001, 0x20000, CRC(736d8bbd) SHA1(c359ad513d4a7693cbb1a27ce26f89849e894d05) )
|
||||
|
||||
ROM_REGION( 0x20000, "soundcpu", 0 ) /* Z80 Code */
|
||||
ROM_LOAD( "epr-14845.bin", 0x00000, 0x20000, CRC(90d47101) SHA1(7bc002c104e3dbde1986aaec54112d5658eab523) )
|
||||
|
||||
ROM_REGION( 0x8000, "m1comm", 0 ) /* Z80 Code */
|
||||
ROM_LOAD( "epr-14221a.bin", 0x00000, 0x8000, CRC(a13e67a4) SHA1(4cd269c7f04a64ae7806c8784f86bf6553a25d85) )
|
||||
|
||||
// dumps of the X-Board part, and the LINK PCB are missing.
|
||||
ROM_END
|
||||
|
||||
ROM_START( unkm1 ) // 1992.01.31 string
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
|
||||
ROM_LOAD16_BYTE( "epr-14427.ic8", 0x00000, 0x40000, CRC(2d904fc6) SHA1(7062f47d77d09906420118c85e1cb565bec345a7) )
|
||||
ROM_LOAD16_BYTE( "epr-14428.ic7", 0x00001, 0x40000, CRC(97a317f4) SHA1(19bc4cf6b6c580caa44f36c929b445ed94b2d9eb) )
|
||||
|
||||
ROM_REGION( 0x20000, "soundcpu", 0 ) /* Z80 Code */
|
||||
ROM_LOAD( "epr-14429.ic104", 0x00000, 0x20000, CRC(1ff8262d) SHA1(fb90bd877b2dc65eb3e5495d6e21dee1f871fb44) )
|
||||
|
||||
ROM_REGION( 0x8000, "m1comm", 0 )
|
||||
ROM_LOAD( "epr-14426.ic2", 0x0000, 0x8000, NO_DUMP ) // on "SYSTEM M1 COM" board with Z80, MB8421 and TMP82C51AP
|
||||
|
||||
ROM_REGION( 0x100, "plds", 0 )
|
||||
ROM_LOAD( "315-5472-01.ic22", 0x000, 0x0eb, CRC(828ee6e2) SHA1(f32dd0f6297cc8bd3049be4bca502c0f8ec738cf) )
|
||||
// dumps of the X-Board part, and the LINK PCB are missing.
|
||||
ROM_END
|
||||
|
||||
} // anonymous namespace
|
||||
|
||||
// Standalone M1 games
|
||||
GAME(1990, tinkerbl, 0, m1base, tinkerbl, systemm1_state, empty_init, ROT0, "Sega", "Tinker Bell", MACHINE_NOT_WORKING)
|
||||
|
||||
// M1 comm multi-board games
|
||||
GAME(1994, bingpty, 0, m1comm, bingpty, systemm1_state, empty_init, ROT0, "Sega", "Bingo Party Multicart (Rev B) (M1 Satellite board)", MACHINE_NOT_WORKING)
|
||||
GAME(1992, unkm1, 0, m1comm, bingpty, systemm1_state, empty_init, ROT0, "Sega", "unknown Sega gambling game (M1 Satellite board)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND)
|
||||
@ -37872,10 +37872,6 @@ galaxyr // (c) 1983
|
||||
galaxyrp // (c) 1983
|
||||
sblazerp // (c) 1983
|
||||
|
||||
@source:segam1.cpp
|
||||
bingpty // ?
|
||||
unkm1 // ?
|
||||
|
||||
@source:segaorun.cpp
|
||||
outrun // Revision B
|
||||
outrunb // 1986 (protected beta bootleg)
|
||||
@ -38248,6 +38244,11 @@ titlef // 1993.?? Title Fight (World)
|
||||
titlefj // 1993.03 Title Fight (Japan)
|
||||
titlefu // 1993.04 Title Fight (US)
|
||||
|
||||
@source:segasm1.cpp
|
||||
tinkerbl // (c) 1990 Sega
|
||||
unkm1 // (c) 1992 Sega
|
||||
bingpty // (c) 1994 Sega
|
||||
|
||||
@source:segasp.cpp
|
||||
aminosan // 2010.?? Aminosan (satellite)
|
||||
bingogal // 2009.05 Bingo Galaxy (main)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user