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https://github.com/holub/mame
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r9751: PDC floppy read support
This commit is contained in:
Brandon Munger
parent
fbaf2f4358
commit
ce577865e7
@ -67,6 +67,7 @@ static ADDRESS_MAP_START( pdc_io, AS_IO, 8, pdc_device )
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AM_RANGE(0x39, 0x39) AM_READ(p39_r) AM_MIRROR(0xFF00) // HDD related
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AM_RANGE(0x40, 0x41) AM_DEVREADWRITE(HDC_TAG, hdc9224_device,read,write) AM_MIRROR(0xFF00)
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AM_RANGE(0x42, 0x43) AM_DEVICE(FDC_TAG, upd765a_device, map) AM_MIRROR(0xFF00)
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AM_RANGE(0x50, 0x53) AM_WRITE(p50_53_w) AM_MIRROR(0xFF00)
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AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE(FDCDMA_TAG,am9517a_device,read,write) AM_MIRROR(0xFF00)
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ADDRESS_MAP_END
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@ -111,10 +112,11 @@ static MACHINE_CONFIG_FRAGMENT( pdc )
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/* Floppy Disk Controller - uPD765a - NEC D765AC-2 */
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MCFG_UPD765A_ADD(FDC_TAG, true, true)
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MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(pdc_device, fdc_irq))
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MCFG_UPD765_DRQ_CALLBACK(DEVWRITELINE(FDCDMA_TAG, am9517a_device, dreq0_w)) MCFG_DEVCB_INVERT
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MCFG_UPD765_DRQ_CALLBACK(DEVWRITELINE(FDCDMA_TAG, am9517a_device, dreq0_w)) //MCFG_DEVCB_INVERT
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// Floppy disk drive
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MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats)
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//MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", pdc_floppies, "35hd", floppy_image_device::default_floppy_formats)
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/* DMA Controller - Intel P8237A-5 */
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/* Channel 0: uPD765a Floppy Disk Controller */
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@ -158,7 +160,8 @@ pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t
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m_pdccpu(*this, Z80_TAG),
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m_dma8237(*this, FDCDMA_TAG),
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m_fdc(*this, FDC_TAG),
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m_floppy(*this, FDC_TAG ":0"),
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//m_floppy(*this, FDC_TAG ":0"),
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//m_floppy(*this, FDC_TAG ":0:35hd"),
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m_hdc9224(*this, HDC_TAG),
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m_pdc_ram(*this, "pdc_ram"),
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m_m68k_r_cb(*this),
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@ -172,6 +175,10 @@ pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t
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void pdc_device::device_start()
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{
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// m_fdc->set_floppy(m_floppy);
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// floppy_image_device *m_floppy;
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// m_floppy = machine().device<floppy_connector>("fdc:0")->get_device();
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}
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//-------------------------------------------------
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@ -184,14 +191,22 @@ void pdc_device::device_reset()
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reg_p38 = 0;
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reg_p38 |= 4; /* ready for 68k ram DMA */
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//reg_p38 |= 0x20; // no idea at all - bit 5 (32)
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m_fdc->set_ready_line_connected(false);
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m_fdc->ready_w(true);
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//m_fdc->ready_w(true);
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//m_floppy->mon_w(0);
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//m_fdc->set_floppy(m_floppy);
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//m_fdc->tc_w(1);
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//m_floppy->ready_w(true);
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/* Reset CPU */
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m_pdccpu->reset();
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/* Resolve callbacks */
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m_m68k_r_cb.resolve_safe(0);
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m_m68k_w_cb.resolve_safe();
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//machine().device<floppy_connector>(FDC_TAG":0")->get_device()->mon_w(false);
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//subdevice<floppy_connector>("fdc:0")->get_device()->mon_w(true);
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m_fdc->set_rate(500000) ;
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}
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//-------------------------------------------------
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@ -239,7 +254,7 @@ READ8_MEMBER(pdc_device::m68k_dma_r)
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UINT32 address;
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UINT8 data;
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address = fdd_68k_dma_address++;
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address = fdd_68k_dma_r_address++;
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data = m_m68k_r_cb(address);
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logerror("PDC: 8237 DMA CHANNEL 1 READ ADDRESS: %08X, DATA: %02X\n", address, data );
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return data;
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@ -247,9 +262,9 @@ READ8_MEMBER(pdc_device::m68k_dma_r)
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WRITE8_MEMBER(pdc_device::m68k_dma_w)
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{
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UINT32 address = fdd_68k_dma_address++;
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logerror("PDC: 8237 DMA CHANNEL 1 WRITE ADDRESS: %08X, DATA: %02X\n", address, data );
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logerror("PDC: 8237 DMA CHANNEL 1 WRITE ADDRESS: %08X, DATA: %02X\n", fdd_68k_dma_w_address, data );
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m_m68k_w_cb(data);
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fdd_68k_dma_w_address++;
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}
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WRITE_LINE_MEMBER(pdc_device::hdd_irq)
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@ -273,9 +288,11 @@ READ8_MEMBER(pdc_device::p0_7_r)
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return reg_p1;
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case 2: /* Port 2: FDD command address low byte [0x5FF0C0B0][0x5FF0C1B0] */
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logerror("PDC: Port 0x02 READ: %02X\n", reg_p2);
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fdd_68k_dma_r_address = (fdd_68k_dma_r_address & (0xFF<<9)) | (reg_p2 << 1);
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return reg_p2;
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case 3: /* Port 3: FDD command address high byte [0x5FF0C0B0][0x5FF0C1B0] */
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logerror("PDC: Port 0x03 READ: %02X\n", reg_p3);
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fdd_68k_dma_r_address = (fdd_68k_dma_r_address & (0xFF<<1)) | (reg_p3 << 9);
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return reg_p3;
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case 6: /* Port 6: FDD data destination address low byte [0x5FF080B0] */
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logerror("PDC: Port 0x06 READ: %02X\n", reg_p6);
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@ -328,14 +345,14 @@ WRITE8_MEMBER(pdc_device::fdd_68k_w)
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reg_p38 &= ~2; // Clear bit 1
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reg_p21 = data;
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break;
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case 0x23: /* Port 23: FDD 68k DMA low byte */
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case 0x23: /* Port 23: FDD 68k DMA high byte */
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/* The address is << 1 on the 68k side */
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fdd_68k_dma_address = (fdd_68k_dma_address & (0xFF<<1)) | (data << 9);
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fdd_68k_dma_w_address = (fdd_68k_dma_w_address & (0xFF<<1)) | (data << 9);
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logerror("PDC: Port %02X WRITE: %02X\n", address, data);
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break;
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case 0x24: /* Port 24: FDD 68k DMA high byte */
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case 0x24: /* Port 24: FDD 68k DMA low byte */
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/* The address is << 1 on the 68k side */
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fdd_68k_dma_address = (fdd_68k_dma_address & (0xFF<<9)) | (data << 1);
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fdd_68k_dma_w_address = (fdd_68k_dma_w_address & (0xFF<<9)) | (data << 1);
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logerror("PDC: Port %02X WRITE: %02X\n", address, data);
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break;
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case 0x26:
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@ -388,3 +405,24 @@ READ8_MEMBER(pdc_device::p39_r)
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logerror("PDC: Port 0x39 READ: %02X, PC: %X\n", data, space.device().safe_pc());
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return data;
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}
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WRITE8_MEMBER(pdc_device::p50_53_w)
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{
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UINT8 address = 0x50 + offset;
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switch(address)
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{
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case 0x53: /* Port 53: Almost certainly not FDD motor control, but seems to work */
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switch(data)
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{
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case 0x80:
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logerror("PDC: FDD Motor on.\n");
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m_fdc->subdevice<floppy_connector>("0")->get_device()->mon_w(0);
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break;
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default:
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logerror("PDC: Port 0x53 WRITE: %x\n", data);
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}
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break;
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default:
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logerror("PDC: Port %02x WRITE: %x\n", address, data);
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}
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}
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@ -62,6 +62,7 @@ public:
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DECLARE_WRITE8_MEMBER(p38_w);
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DECLARE_READ8_MEMBER(p38_r);
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DECLARE_READ8_MEMBER(p39_r);
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DECLARE_WRITE8_MEMBER(p50_53_w);
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DECLARE_READ8_MEMBER(m68k_dma_r);
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DECLARE_WRITE8_MEMBER(m68k_dma_w);
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@ -80,7 +81,8 @@ public:
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UINT8 reg_p7;
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UINT8 reg_p21;
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UINT8 reg_p38;
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UINT32 fdd_68k_dma_address;
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UINT32 fdd_68k_dma_r_address; /* m68k -> FDD DMA read address */
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UINT32 fdd_68k_dma_w_address; /* FDD -> m68k DMA write address */
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protected:
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/* Device-level overrides */
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virtual void device_start();
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@ -94,7 +96,8 @@ protected:
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required_device<cpu_device> m_pdccpu;
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required_device<am9517a_device> m_dma8237;
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required_device<upd765a_device> m_fdc;
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required_device<floppy_connector> m_floppy;
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//required_device<floppy_connector> m_floppy;
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//required_device<floppy_image_device> m_floppy;
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optional_device<hdc9224_device> m_hdc9224;
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mfm_harddisk_device* m_harddisk;
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required_shared_ptr<UINT8> m_pdc_ram;
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@ -2,7 +2,7 @@
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// copyright-holders:Brandon Munger
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/******************************************************************************
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*
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* Rolm CBX 9751 Release 9005 Driver
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* Rolm CBX 9751 Driver
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*
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* This driver attempts to emulate the following models:
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* * Model 10
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@ -11,6 +11,10 @@
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* * Model 50
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* * Model 70
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*
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* The following software releases are known:
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* * 9004
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* * 9005
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*
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* The basis of this driver was influenced by the zexall.c driver by
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* Jonathan Gevaryahu and Robbbert.
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*
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@ -65,7 +69,7 @@ public:
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DECLARE_DRIVER_INIT(r9751);
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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//DECLARE_FLOPPY_FORMATS( floppy_formats );
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private:
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required_device<cpu_device> m_maincpu;
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required_device<pdc_device> m_pdc;
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@ -105,7 +109,8 @@ READ8_MEMBER(r9751_state::pdc_dma_r)
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WRITE8_MEMBER(r9751_state::pdc_dma_w)
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{
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m_maincpu->space(AS_PROGRAM).write_byte(m_pdc->fdd_68k_dma_address,data);
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/* NOTE: This needs to be changed to a function that accepts an address and data */
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m_maincpu->space(AS_PROGRAM).write_byte(m_pdc->fdd_68k_dma_w_address,data);
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}
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DRIVER_INIT_MEMBER(r9751_state,r9751)
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@ -437,4 +442,4 @@ ROM_END
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******************************************************************************/
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/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
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COMP( 1988, r9751, 0, 0, r9751, r9751, r9751_state, r9751, "ROLM Systems, Inc.", "ROLM 9751 Release 9005 Model 10", MACHINE_NO_SOUND | MACHINE_NOT_WORKING )
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COMP( 1988, r9751, 0, 0, r9751, r9751, r9751_state, r9751, "ROLM Systems, Inc.", "ROLM 9751 Model 10", MACHINE_NO_SOUND | MACHINE_NOT_WORKING )
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