(nw)

src/emu/machine/i6300esb.c

@@ -86,7 +86,8 @@ ADDRESS_MAP_END
 
 i6300esb_lpc_device::i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
 	: pci_device(mconfig, I6300ESB_LPC, "i6300ESB southbridge ISA/LPC bridge", tag, owner, clock, "i6300esb_lpc", __FILE__),
-	  acpi(*this, "acpi")
+	  acpi(*this, "acpi"),
+	  rtc (*this, "rtc")
 {
 }
 
@@ -104,7 +105,6 @@ void i6300esb_lpc_device::device_reset()
 	d31_err_cfg = 0x00;
 	d31_err_sts = 0x00;
 	pci_dma_cfg = 0x0000;
-	rtc_conf = 0x00;
 	func_dis = 0x0080;
 	etr1 = 0x00000000;
 	siu_config_port = 0;
@@ -140,6 +140,7 @@ void i6300esb_lpc_device::reset_all_mappings()
 	lpc_en = 0x0000;
 	fwh_sel1 = 0x00112233;
 	gen_cntl = 0x00000080;
+	rtc_conf = 0x00;
 }
 
 READ32_MEMBER (i6300esb_lpc_device::pmbase_r)
@@ -433,6 +434,7 @@ WRITE8_MEMBER (i6300esb_lpc_device::rtc_conf_w)
 {
 	rtc_conf = data;
 	logerror("%s: rtc_conf = %02x\n", tag(), rtc_conf);
+	remap_cb();
 }
 
 READ8_MEMBER  (i6300esb_lpc_device::lpc_if_com_range_r)
@@ -743,6 +745,10 @@ void i6300esb_lpc_device::map_extra(UINT64 memory_window_start, UINT64 memory_wi
 		UINT16 coma = com_pos[lpc_if_com_range & 7];
 		logerror("%s: Warning: coma at %04x-%04x\n", tag(), coma, coma+7);
 	}
+
+	rtc->map_device(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, 0, io_space);
+	if(rtc_conf & 4)
+		rtc->map_extdevice(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, 0, io_space);
 }
 
 

src/emu/machine/i6300esb.h

@@ -5,6 +5,7 @@
 
 #include "pci.h"
 #include "lpc-acpi.h"
+#include "lpc-rtc.h"
 
 #define MCFG_I6300ESB_LPC_ADD(_tag) \
 	MCFG_PCI_DEVICE_ADD(_tag, I6300ESB_LPC, 0x808625a1, 0x02, 0x060100, 0x00000000)
@@ -29,6 +30,7 @@ protected:
 
 private:
 	required_device<lpc_acpi_device> acpi;
+	required_device<lpc_rtc_device> rtc;
 
 	DECLARE_ADDRESS_MAP(internal_io_map, 32);
 

src/emu/machine/lpc-rtc.c

@@ -0,0 +1,81 @@
+#include "lpc-rtc.h"
+
+const device_type LPC_RTC = &device_creator<lpc_rtc_device>;
+
+DEVICE_ADDRESS_MAP_START(map, 32, lpc_rtc_device)
+	AM_RANGE(0x70, 0x77) AM_READWRITE8(index_r,     index_w,     0x00ff00ff)
+	AM_RANGE(0x70, 0x77) AM_READWRITE8(target_r,    target_w,    0xff00ff00)
+ADDRESS_MAP_END
+
+DEVICE_ADDRESS_MAP_START(extmap, 32, lpc_rtc_device)
+	AM_RANGE(0x70, 0x77) AM_READWRITE8(extindex_r,  extindex_w,  0x00ff0000)
+	AM_RANGE(0x70, 0x77) AM_READWRITE8(exttarget_r, exttarget_w, 0xff000000)
+ADDRESS_MAP_END
+
+lpc_rtc_device::lpc_rtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+	: lpc_device(mconfig, LPC_RTC, "LPC RTC", tag, owner, clock, "lpc_rtc", __FILE__)
+{
+}
+
+void lpc_rtc_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
+								 UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
+{
+	io_space->install_device(io_offset, io_window_end, *this, &lpc_rtc_device::map);
+}
+
+void lpc_rtc_device::map_extdevice(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
+								 UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
+{
+	io_space->install_device(io_offset, io_window_end, *this, &lpc_rtc_device::extmap);
+}
+
+void lpc_rtc_device::device_start()
+{
+	memset(ram, 0, 256);
+}
+
+void lpc_rtc_device::device_reset()
+{
+}
+
+READ8_MEMBER(  lpc_rtc_device::index_r)
+{
+	return cur_index;
+}
+
+WRITE8_MEMBER( lpc_rtc_device::index_w)
+{
+	cur_index = data & 0x7f;
+}
+
+READ8_MEMBER(  lpc_rtc_device::target_r)
+{
+	return ram[cur_index];
+}
+
+WRITE8_MEMBER( lpc_rtc_device::target_w)
+{
+	ram[cur_index] = data;
+	logerror("%s: ram[%02x] = %02x\n", tag(), cur_index, data);
+}
+
+READ8_MEMBER(  lpc_rtc_device::extindex_r)
+{
+	return cur_extindex;
+}
+
+WRITE8_MEMBER( lpc_rtc_device::extindex_w)
+{
+	cur_extindex = data & 0x7f;
+}
+
+READ8_MEMBER(  lpc_rtc_device::exttarget_r)
+{
+	return ram[cur_extindex|128];
+}
+
+WRITE8_MEMBER( lpc_rtc_device::exttarget_w)
+{
+	ram[cur_extindex|128] = data;
+	logerror("%s: ram[%02x] = %02x\n", tag(), cur_extindex|128, data);
+}

src/emu/machine/lpc-rtc.h

@@ -0,0 +1,42 @@
+#ifndef LPC_RTC_H
+#define LPC_RTC_H
+
+#include "lpc.h"
+
+#define MCFG_LPC_RTC_ADD(_tag) \
+	MCFG_DEVICE_ADD(_tag, LPC_RTC, 0)
+
+class lpc_rtc_device : public lpc_device {
+public:
+	lpc_rtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+	virtual void map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
+							UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
+
+	virtual void map_extdevice(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
+								  UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
+
+	DECLARE_READ8_MEMBER(  index_r);
+	DECLARE_WRITE8_MEMBER( index_w);
+	DECLARE_READ8_MEMBER(  target_r);
+	DECLARE_WRITE8_MEMBER( target_w);
+	DECLARE_READ8_MEMBER(  extindex_r);
+	DECLARE_WRITE8_MEMBER( extindex_w);
+	DECLARE_READ8_MEMBER(  exttarget_r);
+	DECLARE_WRITE8_MEMBER( exttarget_w);
+
+protected:
+	void device_start();
+	void device_reset();
+
+private:
+	DECLARE_ADDRESS_MAP(map, 32);
+	DECLARE_ADDRESS_MAP(extmap, 32);
+
+	UINT8 cur_index, cur_extindex;
+	UINT8 ram[256];
+};
+
+extern const device_type LPC_RTC;
+
+#endif

src/emu/machine/machine.mak

@@ -1262,6 +1262,7 @@ MACHINEOBJS += $(MACHINEOBJ)/i82875p.o
 MACHINEOBJS += $(MACHINEOBJ)/i6300esb.o
 MACHINEOBJS += $(MACHINEOBJ)/lpc.o
 MACHINEOBJS += $(MACHINEOBJ)/lpc-acpi.o
+MACHINEOBJS += $(MACHINEOBJ)/lpc-rtc.o
 endif
 
 #-------------------------------------------------

src/mame/drivers/lindbergh.c

@@ -302,6 +302,7 @@ static MACHINE_CONFIG_START(lindbergh, lindbergh_state)
 	MCFG_SEGA_LINDBERGH_BASEBOARD_ADD(":pci:1e.0:03.0")
 	MCFG_I6300ESB_LPC_ADD(            ":pci:1f.0")
 	MCFG_LPC_ACPI_ADD(                ":pci:1f.0:acpi")
+	MCFG_LPC_RTC_ADD(                 ":pci:1f.0:rtc")
 	MCFG_SATA_ADD(                    ":pci:1f.2",      0x808625a3, 0x02, 0x103382c0)
 	MCFG_SMBUS_ADD(                   ":pci:1f.3",      0x808625a4, 0x02, 0x103382c0)
 	MCFG_AC97_ADD(                    ":pci:1f.5",      0x808625a6, 0x02, 0x103382c0)