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https://github.com/holub/mame
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@ -86,7 +86,8 @@ ADDRESS_MAP_END
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i6300esb_lpc_device::i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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i6300esb_lpc_device::i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pci_device(mconfig, I6300ESB_LPC, "i6300ESB southbridge ISA/LPC bridge", tag, owner, clock, "i6300esb_lpc", __FILE__),
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: pci_device(mconfig, I6300ESB_LPC, "i6300ESB southbridge ISA/LPC bridge", tag, owner, clock, "i6300esb_lpc", __FILE__),
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acpi(*this, "acpi")
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acpi(*this, "acpi"),
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rtc (*this, "rtc")
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{
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{
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}
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}
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@ -104,7 +105,6 @@ void i6300esb_lpc_device::device_reset()
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d31_err_cfg = 0x00;
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d31_err_cfg = 0x00;
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d31_err_sts = 0x00;
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d31_err_sts = 0x00;
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pci_dma_cfg = 0x0000;
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pci_dma_cfg = 0x0000;
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rtc_conf = 0x00;
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func_dis = 0x0080;
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func_dis = 0x0080;
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etr1 = 0x00000000;
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etr1 = 0x00000000;
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siu_config_port = 0;
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siu_config_port = 0;
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@ -140,6 +140,7 @@ void i6300esb_lpc_device::reset_all_mappings()
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lpc_en = 0x0000;
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lpc_en = 0x0000;
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fwh_sel1 = 0x00112233;
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fwh_sel1 = 0x00112233;
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gen_cntl = 0x00000080;
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gen_cntl = 0x00000080;
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rtc_conf = 0x00;
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}
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}
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READ32_MEMBER (i6300esb_lpc_device::pmbase_r)
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READ32_MEMBER (i6300esb_lpc_device::pmbase_r)
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@ -433,6 +434,7 @@ WRITE8_MEMBER (i6300esb_lpc_device::rtc_conf_w)
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{
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{
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rtc_conf = data;
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rtc_conf = data;
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logerror("%s: rtc_conf = %02x\n", tag(), rtc_conf);
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logerror("%s: rtc_conf = %02x\n", tag(), rtc_conf);
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remap_cb();
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}
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}
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READ8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_r)
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READ8_MEMBER (i6300esb_lpc_device::lpc_if_com_range_r)
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@ -743,6 +745,10 @@ void i6300esb_lpc_device::map_extra(UINT64 memory_window_start, UINT64 memory_wi
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UINT16 coma = com_pos[lpc_if_com_range & 7];
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UINT16 coma = com_pos[lpc_if_com_range & 7];
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logerror("%s: Warning: coma at %04x-%04x\n", tag(), coma, coma+7);
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logerror("%s: Warning: coma at %04x-%04x\n", tag(), coma, coma+7);
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}
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}
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rtc->map_device(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, 0, io_space);
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if(rtc_conf & 4)
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rtc->map_extdevice(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, 0, io_space);
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}
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}
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@ -5,6 +5,7 @@
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#include "pci.h"
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#include "pci.h"
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#include "lpc-acpi.h"
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#include "lpc-acpi.h"
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#include "lpc-rtc.h"
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#define MCFG_I6300ESB_LPC_ADD(_tag) \
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#define MCFG_I6300ESB_LPC_ADD(_tag) \
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MCFG_PCI_DEVICE_ADD(_tag, I6300ESB_LPC, 0x808625a1, 0x02, 0x060100, 0x00000000)
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MCFG_PCI_DEVICE_ADD(_tag, I6300ESB_LPC, 0x808625a1, 0x02, 0x060100, 0x00000000)
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@ -29,6 +30,7 @@ protected:
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private:
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private:
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required_device<lpc_acpi_device> acpi;
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required_device<lpc_acpi_device> acpi;
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required_device<lpc_rtc_device> rtc;
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DECLARE_ADDRESS_MAP(internal_io_map, 32);
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DECLARE_ADDRESS_MAP(internal_io_map, 32);
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81
src/emu/machine/lpc-rtc.c
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81
src/emu/machine/lpc-rtc.c
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@ -0,0 +1,81 @@
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#include "lpc-rtc.h"
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const device_type LPC_RTC = &device_creator<lpc_rtc_device>;
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DEVICE_ADDRESS_MAP_START(map, 32, lpc_rtc_device)
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AM_RANGE(0x70, 0x77) AM_READWRITE8(index_r, index_w, 0x00ff00ff)
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AM_RANGE(0x70, 0x77) AM_READWRITE8(target_r, target_w, 0xff00ff00)
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ADDRESS_MAP_END
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DEVICE_ADDRESS_MAP_START(extmap, 32, lpc_rtc_device)
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AM_RANGE(0x70, 0x77) AM_READWRITE8(extindex_r, extindex_w, 0x00ff0000)
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AM_RANGE(0x70, 0x77) AM_READWRITE8(exttarget_r, exttarget_w, 0xff000000)
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ADDRESS_MAP_END
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lpc_rtc_device::lpc_rtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: lpc_device(mconfig, LPC_RTC, "LPC RTC", tag, owner, clock, "lpc_rtc", __FILE__)
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{
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}
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void lpc_rtc_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
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{
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io_space->install_device(io_offset, io_window_end, *this, &lpc_rtc_device::map);
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}
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void lpc_rtc_device::map_extdevice(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
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{
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io_space->install_device(io_offset, io_window_end, *this, &lpc_rtc_device::extmap);
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}
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void lpc_rtc_device::device_start()
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{
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memset(ram, 0, 256);
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}
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void lpc_rtc_device::device_reset()
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{
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}
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READ8_MEMBER( lpc_rtc_device::index_r)
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{
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return cur_index;
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}
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WRITE8_MEMBER( lpc_rtc_device::index_w)
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{
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cur_index = data & 0x7f;
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}
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READ8_MEMBER( lpc_rtc_device::target_r)
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{
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return ram[cur_index];
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}
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WRITE8_MEMBER( lpc_rtc_device::target_w)
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{
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ram[cur_index] = data;
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logerror("%s: ram[%02x] = %02x\n", tag(), cur_index, data);
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}
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READ8_MEMBER( lpc_rtc_device::extindex_r)
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{
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return cur_extindex;
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}
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WRITE8_MEMBER( lpc_rtc_device::extindex_w)
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{
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cur_extindex = data & 0x7f;
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}
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READ8_MEMBER( lpc_rtc_device::exttarget_r)
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{
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return ram[cur_extindex|128];
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}
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WRITE8_MEMBER( lpc_rtc_device::exttarget_w)
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{
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ram[cur_extindex|128] = data;
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logerror("%s: ram[%02x] = %02x\n", tag(), cur_extindex|128, data);
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}
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42
src/emu/machine/lpc-rtc.h
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42
src/emu/machine/lpc-rtc.h
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@ -0,0 +1,42 @@
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#ifndef LPC_RTC_H
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#define LPC_RTC_H
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#include "lpc.h"
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#define MCFG_LPC_RTC_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, LPC_RTC, 0)
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class lpc_rtc_device : public lpc_device {
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public:
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lpc_rtc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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virtual void map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
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virtual void map_extdevice(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
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DECLARE_READ8_MEMBER( index_r);
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DECLARE_WRITE8_MEMBER( index_w);
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DECLARE_READ8_MEMBER( target_r);
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DECLARE_WRITE8_MEMBER( target_w);
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DECLARE_READ8_MEMBER( extindex_r);
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DECLARE_WRITE8_MEMBER( extindex_w);
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DECLARE_READ8_MEMBER( exttarget_r);
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DECLARE_WRITE8_MEMBER( exttarget_w);
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protected:
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void device_start();
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void device_reset();
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private:
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DECLARE_ADDRESS_MAP(map, 32);
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DECLARE_ADDRESS_MAP(extmap, 32);
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UINT8 cur_index, cur_extindex;
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UINT8 ram[256];
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};
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extern const device_type LPC_RTC;
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#endif
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@ -1262,6 +1262,7 @@ MACHINEOBJS += $(MACHINEOBJ)/i82875p.o
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MACHINEOBJS += $(MACHINEOBJ)/i6300esb.o
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MACHINEOBJS += $(MACHINEOBJ)/i6300esb.o
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MACHINEOBJS += $(MACHINEOBJ)/lpc.o
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MACHINEOBJS += $(MACHINEOBJ)/lpc.o
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MACHINEOBJS += $(MACHINEOBJ)/lpc-acpi.o
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MACHINEOBJS += $(MACHINEOBJ)/lpc-acpi.o
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MACHINEOBJS += $(MACHINEOBJ)/lpc-rtc.o
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endif
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endif
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#-------------------------------------------------
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#-------------------------------------------------
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@ -302,6 +302,7 @@ static MACHINE_CONFIG_START(lindbergh, lindbergh_state)
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MCFG_SEGA_LINDBERGH_BASEBOARD_ADD(":pci:1e.0:03.0")
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MCFG_SEGA_LINDBERGH_BASEBOARD_ADD(":pci:1e.0:03.0")
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MCFG_I6300ESB_LPC_ADD( ":pci:1f.0")
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MCFG_I6300ESB_LPC_ADD( ":pci:1f.0")
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MCFG_LPC_ACPI_ADD( ":pci:1f.0:acpi")
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MCFG_LPC_ACPI_ADD( ":pci:1f.0:acpi")
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MCFG_LPC_RTC_ADD( ":pci:1f.0:rtc")
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MCFG_SATA_ADD( ":pci:1f.2", 0x808625a3, 0x02, 0x103382c0)
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MCFG_SATA_ADD( ":pci:1f.2", 0x808625a3, 0x02, 0x103382c0)
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MCFG_SMBUS_ADD( ":pci:1f.3", 0x808625a4, 0x02, 0x103382c0)
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MCFG_SMBUS_ADD( ":pci:1f.3", 0x808625a4, 0x02, 0x103382c0)
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MCFG_AC97_ADD( ":pci:1f.5", 0x808625a6, 0x02, 0x103382c0)
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MCFG_AC97_ADD( ":pci:1f.5", 0x808625a6, 0x02, 0x103382c0)
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