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Disabled DRC versions of certain vector load/store operations in the
RSP core in order to avoid geometry issues. [Harmony]
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@ -41,16 +41,16 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
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#define SINGLE_INSTRUCTION_MODE (0)
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#define DRC_LSV (1)
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#define DRC_LLV (1)
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#define DRC_LDV (1)
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#define DRC_LQV (1)
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#define DRC_LPV (1)
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#define DRC_LSV (0)
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#define DRC_LLV (0)
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#define DRC_LDV (0)
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#define DRC_LQV (0)
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#define DRC_LPV (0)
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#define DRC_LUV (0)
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#define DRC_SSV (1)
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#define DRC_SLV (1)
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#define DRC_SDV (1)
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#define DRC_SSV (0)
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#define DRC_SLV (0)
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#define DRC_SDV (0)
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#define DRC_SQV (0)
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#define DRC_SPV (0) // Todo
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@ -1265,11 +1265,11 @@ static void cfunc_rsp_ltv(void *param)
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static int generate_lwc2(rsp_state *rsp, drcuml_block *block, compiler_state *compiler, const opcode_desc *desc)
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{
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int loopdest;
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//int loopdest;
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UINT32 op = desc->opptr.l[0];
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int dest = (op >> 16) & 0x1f;
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//int dest = (op >> 16) & 0x1f;
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//int base = (op >> 21) & 0x1f;
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int index = (op >> 7) & 0xf;
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//int index = (op >> 7) & 0xf;
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int offset = (op & 0x7f);
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//int skip;
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if (offset & 0x40)
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@ -1979,9 +1979,9 @@ static int generate_swc2(rsp_state *rsp, drcuml_block *block, compiler_state *co
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{
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// int loopdest;
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UINT32 op = desc->opptr.l[0];
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int dest = (op >> 16) & 0x1f;
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//int dest = (op >> 16) & 0x1f;
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//int base = (op >> 21) & 0x1f;
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int index = (op >> 7) & 0xf;
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//int index = (op >> 7) & 0xf;
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int offset = (op & 0x7f);
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//int skip;
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if (offset & 0x40)
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