diff --git a/src/mame/drivers/naomi.c b/src/mame/drivers/naomi.c index 6f15eaddced..f5c98f0119c 100644 --- a/src/mame/drivers/naomi.c +++ b/src/mame/drivers/naomi.c @@ -1119,13 +1119,23 @@ static ADDRESS_MAP_START( naomi_base_map, ADDRESS_SPACE_PROGRAM, 64 ) AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE( dc_rtc_r, dc_rtc_w ) AM_RANGE(0x00800000, 0x00ffffff) AM_READWRITE( naomi_arm_r, naomi_arm_w ) // sound RAM (8 MB) AM_RANGE(0x0103ff00, 0x0103ffff) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known +#if (IVY_ENABLE) + AM_RANGE(0x04000000, 0x04ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access + AM_RANGE(0x05000000, 0x05ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // mirror of texture RAM 32 bit access +#else AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_SHARE(2) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_SHARE(2) // mirror of texture RAM 32 bit access +#endif AM_RANGE(0x0c000000, 0x0dffffff) AM_RAM AM_BASE(&naomi_ram64) AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w ) AM_RANGE(0x10800000, 0x10ffffff) AM_WRITE( ta_fifo_yuv_w ) +#if (IVY_ENABLE) + AM_RANGE(0x11000000, 0x11ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // another mirror of texture memory + AM_RANGE(0x13000000, 0x13ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // another mirror of texture memory +#else AM_RANGE(0x11000000, 0x11ffffff) AM_RAM AM_SHARE(2) // another mirror of texture memory AM_RANGE(0x13000000, 0x13ffffff) AM_RAM AM_SHARE(2) // another mirror of texture memory +#endif AM_RANGE(0xa0000000, 0xa01fffff) AM_ROM AM_REGION("maincpu", 0) ADDRESS_MAP_END @@ -1155,8 +1165,13 @@ static ADDRESS_MAP_START( naomi_map, ADDRESS_SPACE_PROGRAM, 64 ) AM_RANGE(0x0103ff00, 0x0103ffff) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known /* Area 1 */ +#if (IVY_ENABLE) + AM_RANGE(0x04000000, 0x04ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access + AM_RANGE(0x05000000, 0x05ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // mirror of texture RAM 32 bit access +#else AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_SHARE(2) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_SHARE(2) // mirror of texture RAM 32 bit access +#endif /* Area 2*/ AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned' @@ -1170,11 +1185,22 @@ static ADDRESS_MAP_START( naomi_map, ADDRESS_SPACE_PROGRAM, 64 ) /* Area 4 */ AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w ) AM_RANGE(0x10800000, 0x10ffffff) AM_WRITE( ta_fifo_yuv_w ) + +#if (IVY_ENABLE) + AM_RANGE(0x11000000, 0x11ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // another mirror of texture memory +#else AM_RANGE(0x11000000, 0x11ffffff) AM_RAM AM_SHARE(2) +#endif + /* 0x12000000 -0x13ffffff Mirror area of 0x10000000 -0x11ffffff */ AM_RANGE(0x12000000, 0x127fffff) AM_WRITE( ta_fifo_poly_w ) AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE( ta_fifo_yuv_w ) + +#if (IVY_ENABLE) + AM_RANGE(0x13000000, 0x13ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // another mirror of texture memory +#else AM_RANGE(0x13000000, 0x13ffffff) AM_RAM AM_SHARE(2) +#endif /* Area 5 */ //AM_RANGE(0x14000000, 0x17ffffff) AM_NOP // MPX Ext. @@ -1218,8 +1244,13 @@ static ADDRESS_MAP_START( aw_map, ADDRESS_SPACE_PROGRAM, 64 ) AM_RANGE(0x0103ff00, 0x0103ffff) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known /* Area 1 */ +#if (IVY_ENABLE) + AM_RANGE(0x04000000, 0x04ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access + AM_RANGE(0x05000000, 0x05ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // mirror of texture RAM 32 bit access +#else AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_SHARE(2) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_SHARE(2) // mirror of texture RAM 32 bit access +#endif /* Area 2*/ AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned' @@ -1236,11 +1267,22 @@ static ADDRESS_MAP_START( aw_map, ADDRESS_SPACE_PROGRAM, 64 ) /* Area 4 */ AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w ) AM_RANGE(0x10800000, 0x10ffffff) AM_WRITE( ta_fifo_yuv_w ) + +#if (IVY_ENABLE) + AM_RANGE(0x11000000, 0x11ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // another mirror of texture memory +#else AM_RANGE(0x11000000, 0x11ffffff) AM_RAM AM_SHARE(2) +#endif + /* 0x12000000 -0x13ffffff Mirror area of 0x10000000 -0x11ffffff */ AM_RANGE(0x12000000, 0x127fffff) AM_WRITE( ta_fifo_poly_w ) AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE( ta_fifo_yuv_w ) + +#if (IVY_ENABLE) + AM_RANGE(0x13000000, 0x13ffffff) AM_RAM_WRITE( ivy_texture_w ) AM_SHARE(2) // another mirror of texture memory +#else AM_RANGE(0x13000000, 0x13ffffff) AM_RAM AM_SHARE(2) +#endif /* Area 5 */ //AM_RANGE(0x14000000, 0x17ffffff) AM_NOP // MPX Ext. @@ -1284,7 +1326,12 @@ ADDRESS_MAP_END PORT_START("MAMEDEBUG") \ PORT_DIPNAME( 0x01, 0x00, "Bilinear Filtering" ) \ PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) \ - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) \ + PORT_DIPSETTING( 0x01, DEF_STR( On ) ) + +#define NAOMI_MAME_DEBUG_BUTTON(btn) \ + PORT_START("IVY") \ + PORT_BIT( 0x8000, IP_ACTIVE_HIGH, btn ) PORT_PLAYER(1) PORT_NAME("IVY Capture") \ + PORT_BIT( 0x7fff, IP_ACTIVE_HIGH, IPT_UNUSED ) /* for now we hardwire a joystick + 6 buttons for every game.*/ @@ -1324,6 +1371,8 @@ static INPUT_PORTS_START( naomi ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_CHANGED(dc_coin_slots_callback, &dc_coin_counts[1]) NAOMI_MAME_DEBUG_DIP + + NAOMI_MAME_DEBUG_BUTTON( IPT_BUTTON7 ) INPUT_PORTS_END /* JVS mahjong panel */ @@ -1437,6 +1486,8 @@ static INPUT_PORTS_START( naomi_mp ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_CHANGED(dc_coin_slots_callback, &dc_coin_counts[1]) NAOMI_MAME_DEBUG_DIP + + NAOMI_MAME_DEBUG_BUTTON( IPT_BUTTON1 ) INPUT_PORTS_END static MACHINE_RESET( naomi ) diff --git a/src/mame/includes/dc.h b/src/mame/includes/dc.h index d746d4cbde0..8adb492bef4 100644 --- a/src/mame/includes/dc.h +++ b/src/mame/includes/dc.h @@ -200,6 +200,17 @@ extern UINT32 dc_coin_counts[2]; /*----------- defined in video/dc.c -----------*/ +#define IVY_ENABLE (1) + +enum +{ + IVY_PVR_CTRL = 0, + IVY_PVR_TA, + IVY_TA_FIFO_POLY, + IVY_TA_FIFO_YUV, + IVY_TEXTURE, +}; + extern UINT64 *dc_texture_ram; void dc_vblank( running_machine *machine ); @@ -213,6 +224,12 @@ WRITE64_HANDLER( ta_fifo_yuv_w ); VIDEO_START(dc); VIDEO_UPDATE(dc); +#if (IVY_ENABLE) + +WRITE64_HANDLER( ivy_texture_w ); + +#endif // (IVY_ENABLE) + /*--------------- CORE registers --------------*/ #define PVRID ((0x005f8000-0x005f8000)/4) #define REVISION ((0x005f8004-0x005f8000)/4) diff --git a/src/mame/video/dc.c b/src/mame/video/dc.c index a8632279213..3f1f3ffacea 100644 --- a/src/mame/video/dc.c +++ b/src/mame/video/dc.c @@ -108,6 +108,61 @@ enum static pvrta_state state_ta; +#if (IVY_ENABLE) + +int ivy_capture = 0; +static FILE* ivy_log = NULL; + +static int ivy_capture_index = 0; + +void ivy_update(running_machine *machine) +{ + static int ivy_button_ignore = 0; + + char ivy_capture_name[64]; + + if( ivy_capture == 1 ) + { + ivy_capture = 0; + fclose( ivy_log ); + } + if( ( input_port_read(machine, "IVY") & 0x8000 ) != 0 && ivy_capture == 0 && ivy_button_ignore == 0 ) + { + ivy_capture = 1; + sprintf( ivy_capture_name, "ivy_%04d.cap", ivy_capture_index++ ); + ivy_log = fopen( ivy_capture_name, "rb" ); + while( ivy_log != NULL ) + { + fclose( ivy_log ); + sprintf( ivy_capture_name, "ivy_%04d.cap", ivy_capture_index++ ); + ivy_log = fopen( ivy_capture_name, "rb" ); + } + ivy_log = fopen( ivy_capture_name, "wb" ); + + fwrite( (UINT8*)dc_texture_ram, 16777216, 1, ivy_log ); + + ivy_button_ignore = 1; + } + if( ( input_port_read(machine, "IVY") & 0x8000 ) == 0 ) + { + ivy_button_ignore = 0; + } +} + +WRITE64_HANDLER( ivy_texture_w ) +{ + if( ivy_capture == 1 && ivy_log != NULL ) + { + UINT8 type = IVY_TEXTURE; + fwrite( &type, 1, 1, ivy_log ); + fwrite( &offset, 8, 1, ivy_log ); + fwrite( &mem_mask, 8, 1, ivy_log ); + fwrite( &data, 8, 1, ivy_log ); + } +} + +#endif + // Perform a standard bilinear filter across four pixels INLINE INT32 clamp(INT32 in, INT32 min, INT32 max) { @@ -908,6 +963,17 @@ WRITE64_HANDLER( pvr_ctrl_w ) UINT8 start; }pvr_dma; +#if (IVY_ENABLE) + if( ivy_capture == 1 && ivy_log != NULL ) + { + UINT8 type = IVY_PVR_CTRL; + fwrite( &type, 1, 1, ivy_log ); + fwrite( &offset, 8, 1, ivy_log ); + fwrite( &mem_mask, 8, 1, ivy_log ); + fwrite( &data, 8, 1, ivy_log ); + } +#endif + reg = decode_reg_64(offset, mem_mask, &shift); dat = (UINT32)(data >> shift); @@ -1005,6 +1071,17 @@ WRITE64_HANDLER( pvr_ta_w ) #endif int a; +#if (IVY_ENABLE) + if( ivy_capture == 1 && ivy_log != NULL ) + { + UINT8 type = IVY_PVR_TA; + fwrite( &type, 1, 1, ivy_log ); + fwrite( &offset, 8, 1, ivy_log ); + fwrite( &mem_mask, 8, 1, ivy_log ); + fwrite( &data, 8, 1, ivy_log ); + } +#endif + reg = decode_reg_64(offset, mem_mask, &shift); dat = (UINT32)(data >> shift); old = pvrta_regs[reg]; @@ -1113,7 +1190,10 @@ WRITE64_HANDLER( pvr_ta_w ) } } if (a != NUM_BUFFERS) + { + ivy_update(space->machine); break; + } assert_always(0, "TA grabber error A!\n"); break; case TA_LIST_INIT: @@ -1516,6 +1596,17 @@ static void process_ta_fifo(running_machine* machine) WRITE64_HANDLER( ta_fifo_poly_w ) { +#if (IVY_ENABLE) + if( ivy_capture == 1 && ivy_log != NULL ) + { + UINT8 type = IVY_TA_FIFO_POLY; + fwrite( &type, 1, 1, ivy_log ); + fwrite( &offset, 8, 1, ivy_log ); + fwrite( &mem_mask, 8, 1, ivy_log ); + fwrite( &data, 8, 1, ivy_log ); + } +#endif + if (mem_mask == U64(0xffffffffffffffff)) // 64 bit { tafifo_buff[state_ta.tafifo_pos]=(UINT32)data; @@ -1544,6 +1635,17 @@ WRITE64_HANDLER( ta_fifo_yuv_w ) UINT64 shift; UINT32 dat; +#if (IVY_ENABLE) + if( ivy_capture == 1 && ivy_log != NULL ) + { + UINT8 type = IVY_TA_FIFO_YUV; + fwrite( &type, 1, 1, ivy_log ); + fwrite( &offset, 8, 1, ivy_log ); + fwrite( &mem_mask, 8, 1, ivy_log ); + fwrite( &data, 8, 1, ivy_log ); + } +#endif + reg = decode_reg_64(offset, mem_mask, &shift); dat = (UINT32)(data >> shift);