mirror of
https://github.com/holub/mame
synced 2025-05-28 08:33:05 +03:00
go back to a fake memmap for now
This commit is contained in:
Michaël Banaan Ananas
parent
52a3ee1fde
commit
ceeb8ee0a5
@ -55,6 +55,12 @@ const device_type TMS70C00 = &device_creator<tms70c00_device>;
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const device_type TMS70C20 = &device_creator<tms70c20_device>;
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const device_type TMS70C40 = &device_creator<tms70c40_device>;
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static ADDRESS_MAP_START(tms7000_io, AS_IO, 8, tms7000_device)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_WRITENOP
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AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_READNOP
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, tms7000_device )
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AM_RANGE(0x0000, 0x007f) AM_RAM // 128 bytes internal RAM
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AM_RANGE(0x0100, 0x010f) AM_READWRITE(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */
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@ -72,28 +78,18 @@ ADDRESS_MAP_END
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tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__),
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m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem)),
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m_opcode(s_opfn),
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m_inportsa(*this),
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m_inportsc(*this),
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m_inportsd(*this),
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m_outportsb(*this),
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m_outportsc(*this),
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m_outportsd(*this)
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: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__)
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, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem))
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, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io))
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, m_opcode(s_opfn)
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{
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}
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tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source)
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
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m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal),
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m_opcode(opcode),
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m_inportsa(*this),
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m_inportsc(*this),
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m_inportsd(*this),
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m_outportsb(*this),
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m_outportsc(*this),
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m_outportsd(*this)
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: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
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, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal)
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, m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io))
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, m_opcode(opcode)
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{
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}
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@ -195,15 +191,7 @@ void tms7000_device::device_start()
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{
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m_program = &space(AS_PROGRAM);
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m_direct = &m_program->direct();
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// resolve callbacks
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m_inportsa.resolve_safe(0xff);
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m_inportsc.resolve_safe(0xff);
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m_inportsd.resolve_safe(0xff);
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m_outportsb.resolve_safe();
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m_outportsc.resolve_safe();
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m_outportsd.resolve_safe();
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m_io = &space(AS_IO);
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memset(m_pf, 0, 0x100);
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m_cycles_per_INT2 = 0;
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@ -492,19 +480,19 @@ WRITE8_MEMBER( tms7000_device::tms70x0_pf_w ) /* Perpherial file write */
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break;
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case 0x06: /* Port B write */
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m_outportsb(data);
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m_io->write_byte( TMS7000_PORTB, data );
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m_pf[ 0x06 ] = data;
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break;
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case 0x08: /* Port C write */
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temp1 = data & m_pf[ 0x09 ]; /* Mask off input bits */
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m_outportsc(temp1);
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m_io->write_byte( TMS7000_PORTC, temp1 );
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m_pf[ 0x08 ] = temp1;
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break;
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case 0x0a: /* Port D write */
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temp1 = data & m_pf[ 0x0b ]; /* Mask off input bits */
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m_outportsd(temp1);
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m_io->write_byte( TMS7000_PORTD, temp1 );
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m_pf[ 0x0a ] = temp1;
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break;
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@ -539,7 +527,7 @@ READ8_MEMBER( tms7000_device::tms70x0_pf_r ) /* Perpherial file read */
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break;
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case 0x04: /* Port A read */
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result = m_inportsa();
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result = m_io->read_byte( TMS7000_PORTA );
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break;
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@ -550,14 +538,14 @@ READ8_MEMBER( tms7000_device::tms70x0_pf_r ) /* Perpherial file read */
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case 0x08: /* Port C read */
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temp1 = m_pf[ 0x08 ] & m_pf[ 0x09 ]; /* Get previous output bits */
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temp2 = m_inportsc(); /* Read port */
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temp2 = m_io->read_byte( TMS7000_PORTC ); /* Read port */
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temp3 = temp2 & (~m_pf[ 0x09 ]); /* Mask off output bits */
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result = temp1 | temp3; /* OR together */
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break;
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case 0x0a: /* Port D read */
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temp1 = m_pf[ 0x0a ] & m_pf[ 0x0b ]; /* Get previous output bits */
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temp2 = m_inportsd(); /* Read port */
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temp2 = m_io->read_byte( TMS7000_PORTD ); /* Read port */
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temp3 = temp2 & (~m_pf[ 0x0b ]); /* Mask off output bits */
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result = temp1 | temp3; /* OR together */
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break;
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@ -24,6 +24,7 @@
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#include "emu.h"
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enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST, TMS7000_IDLE, TMS7000_T1_CL, TMS7000_T1_PS, TMS7000_T1_DEC };
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enum
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@ -34,37 +35,14 @@ enum
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TMS7000_IRQNONE = 255
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};
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enum
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{
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TMS7000_PORTA = 0, /* read-only */
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TMS7000_PORTB, /* write-only */
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TMS7000_PORTC,
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TMS7000_PORTD
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};
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/***************************************************************************
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DEVICE CONFIGURATION MACROS
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***************************************************************************/
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// I/O callbacks
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// (port A is read-only)
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#define MCFG_TMS7000_PORTA_READ_CB(_devcb) \
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devcb = &tms7000_device::set_inportsa_cb(*device, DEVCB_##_devcb);
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#define MCFG_TMS7000_PORTC_READ_CB(_devcb) \
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devcb = &tms7000_device::set_inportsc_cb(*device, DEVCB_##_devcb);
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#define MCFG_TMS7000_PORTD_READ_CB(_devcb) \
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devcb = &tms7000_device::set_inportsd_cb(*device, DEVCB_##_devcb);
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// (port B is write-only)
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#define MCFG_TMS7000_PORTB_WRITE_CB(_devcb) \
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devcb = &tms7000_device::set_outportsb_cb(*device, DEVCB_##_devcb);
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#define MCFG_TMS7000_PORTC_WRITE_CB(_devcb) \
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devcb = &tms7000_device::set_outportsc_cb(*device, DEVCB_##_devcb);
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#define MCFG_TMS7000_PORTD_WRITE_CB(_devcb) \
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devcb = &tms7000_device::set_outportsd_cb(*device, DEVCB_##_devcb);
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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class tms7000_device : public cpu_device
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{
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@ -77,15 +55,6 @@ public:
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tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source);
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// static configuration helpers
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template<class _Object> static devcb_base & set_inportsa_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsa.set_callback(object); }
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template<class _Object> static devcb_base & set_inportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsc.set_callback(object); }
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template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsd.set_callback(object); }
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template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsb.set_callback(object); }
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template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsc.set_callback(object); }
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template<class _Object> static devcb_base & set_outportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsd.set_callback(object); }
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DECLARE_WRITE8_MEMBER( tms70x0_pf_w );
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DECLARE_READ8_MEMBER( tms70x0_pf_r );
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@ -102,7 +71,7 @@ protected:
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virtual void execute_set_input(int inputnum, int state);
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, astring &string);
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@ -114,6 +83,7 @@ protected:
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private:
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address_space_config m_program_config;
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address_space_config m_io_config;
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const opcode_func *m_opcode;
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@ -136,17 +106,7 @@ private:
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address_space *m_program;
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direct_read_data *m_direct;
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// callbacks
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devcb_read8 m_inportsa;
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devcb_read8 m_inportsc;
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devcb_read8 m_inportsd;
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devcb_write8 m_outportsb;
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devcb_write8 m_outportsc;
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devcb_write8 m_outportsd;
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/////////////////////////////////////////////////////////
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address_space *m_io;
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inline UINT16 RM16( UINT32 mAddr );
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inline UINT16 RRF16( UINT32 mAddr );
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@ -429,11 +429,23 @@ static ADDRESS_MAP_START(tms7020_mem, AS_PROGRAM, 8, exelv_state)
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AM_RANGE(0xc800, 0xf7ff) AM_NOP
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(tms7020_port, AS_IO, 8, exelv_state)
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AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7020_porta_r)
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AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7020_portb_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(tms7041_map, AS_PROGRAM, 8, exelv_state)
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AM_RANGE(0x0080, 0x00ff) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(tms7041_port, AS_IO, 8, exelv_state)
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AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7041_porta_r)
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AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7041_portb_w)
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AM_RANGE(TMS7000_PORTC, TMS7000_PORTC) AM_READWRITE(tms7041_portc_r, tms7041_portc_w)
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AM_RANGE(TMS7000_PORTD, TMS7000_PORTD) AM_READWRITE(tms7041_portd_r, tms7041_portd_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(tms7040_mem, AS_PROGRAM, 8, exelv_state)
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AM_RANGE(0x0080, 0x00ff) AM_NOP
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@ -500,18 +512,12 @@ static MACHINE_CONFIG_START( exl100, exelv_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", TMS7020_EXL, XTAL_4_9152MHz)
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MCFG_CPU_PROGRAM_MAP(tms7020_mem)
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MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r))
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MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
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MCFG_CPU_IO_MAP(tms7020_port)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
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MCFG_CPU_ADD("tms7041", TMS7040, XTAL_4_9152MHz) // should be TMS7041
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MCFG_CPU_PROGRAM_MAP(tms7041_map)
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MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r))
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MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
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MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
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MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
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MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
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MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
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MCFG_CPU_IO_MAP(tms7041_port)
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MCFG_QUANTUM_PERFECT_CPU("maincpu")
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@ -558,18 +564,12 @@ static MACHINE_CONFIG_START( exeltel, exelv_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", TMS7040, XTAL_4_9152MHz)
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MCFG_CPU_PROGRAM_MAP(tms7040_mem)
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MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r))
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MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
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MCFG_CPU_IO_MAP(tms7020_port)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
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MCFG_CPU_ADD("tms7042", TMS7040, XTAL_4_9152MHz) // should be TMS7042
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MCFG_CPU_PROGRAM_MAP(tms7042_map)
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MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r))
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MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
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MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
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MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
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MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
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MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
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MCFG_CPU_IO_MAP(tms7041_port)
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MCFG_QUANTUM_PERFECT_CPU("maincpu")
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