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go back to a fake memmap for now

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This commit is contained in:
Michaël Banaan Ananas 2014-07-03 19:04:50 +00:00
parent 52a3ee1fde
commit ceeb8ee0a5
3 changed files with 48 additions and 100 deletions
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54
src/emu/cpu/tms7000/tms7000.c
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@ -55,6 +55,12 @@ const device_type TMS70C00 = &device_creator<tms70c00_device>;
const device_type TMS70C20 = &device_creator<tms70c20_device>; const device_type TMS70C20 = &device_creator<tms70c20_device>;
const device_type TMS70C40 = &device_creator<tms70c40_device>; const device_type TMS70C40 = &device_creator<tms70c40_device>;
static ADDRESS_MAP_START(tms7000_io, AS_IO, 8, tms7000_device)
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_WRITENOP
AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_READNOP
ADDRESS_MAP_END
static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, tms7000_device ) static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, tms7000_device )
AM_RANGE(0x0000, 0x007f) AM_RAM // 128 bytes internal RAM AM_RANGE(0x0000, 0x007f) AM_RAM // 128 bytes internal RAM
AM_RANGE(0x0100, 0x010f) AM_READWRITE(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */ AM_RANGE(0x0100, 0x010f) AM_READWRITE(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */
@ -72,28 +78,18 @@ ADDRESS_MAP_END
tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) tms7000_device::tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__), : cpu_device(mconfig, TMS7000, "TMS7000", tag, owner, clock, "tms7000", __FILE__)
m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem)), , m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, ADDRESS_MAP_NAME(tms7000_mem))
m_opcode(s_opfn), , m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io))
m_inportsa(*this), , m_opcode(s_opfn)
m_inportsc(*this),
m_inportsd(*this),
m_outportsb(*this),
m_outportsc(*this),
m_outportsd(*this)
{ {
} }
tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source) tms7000_device::tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source), : cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal), , m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal)
m_opcode(opcode), , m_io_config("io", ENDIANNESS_BIG, 8, 8, 0, ADDRESS_MAP_NAME(tms7000_io))
m_inportsa(*this), , m_opcode(opcode)
m_inportsc(*this),
m_inportsd(*this),
m_outportsb(*this),
m_outportsc(*this),
m_outportsd(*this)
{ {
} }
@ -195,15 +191,7 @@ void tms7000_device::device_start()
{ {
m_program = &space(AS_PROGRAM); m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct(); m_direct = &m_program->direct();
m_io = &space(AS_IO);
// resolve callbacks
m_inportsa.resolve_safe(0xff);
m_inportsc.resolve_safe(0xff);
m_inportsd.resolve_safe(0xff);
m_outportsb.resolve_safe();
m_outportsc.resolve_safe();
m_outportsd.resolve_safe();
memset(m_pf, 0, 0x100); memset(m_pf, 0, 0x100);
m_cycles_per_INT2 = 0; m_cycles_per_INT2 = 0;
@ -492,19 +480,19 @@ WRITE8_MEMBER( tms7000_device::tms70x0_pf_w ) /* Perpherial file write */
break; break;
case 0x06: /* Port B write */ case 0x06: /* Port B write */
m_outportsb(data); m_io->write_byte( TMS7000_PORTB, data );
m_pf[ 0x06 ] = data; m_pf[ 0x06 ] = data;
break; break;
case 0x08: /* Port C write */ case 0x08: /* Port C write */
temp1 = data & m_pf[ 0x09 ]; /* Mask off input bits */ temp1 = data & m_pf[ 0x09 ]; /* Mask off input bits */
m_outportsc(temp1); m_io->write_byte( TMS7000_PORTC, temp1 );
m_pf[ 0x08 ] = temp1; m_pf[ 0x08 ] = temp1;
break; break;
case 0x0a: /* Port D write */ case 0x0a: /* Port D write */
temp1 = data & m_pf[ 0x0b ]; /* Mask off input bits */ temp1 = data & m_pf[ 0x0b ]; /* Mask off input bits */
m_outportsd(temp1); m_io->write_byte( TMS7000_PORTD, temp1 );
m_pf[ 0x0a ] = temp1; m_pf[ 0x0a ] = temp1;
break; break;
@ -539,7 +527,7 @@ READ8_MEMBER( tms7000_device::tms70x0_pf_r ) /* Perpherial file read */
break; break;
case 0x04: /* Port A read */ case 0x04: /* Port A read */
result = m_inportsa(); result = m_io->read_byte( TMS7000_PORTA );
break; break;
@ -550,14 +538,14 @@ READ8_MEMBER( tms7000_device::tms70x0_pf_r ) /* Perpherial file read */
case 0x08: /* Port C read */ case 0x08: /* Port C read */
temp1 = m_pf[ 0x08 ] & m_pf[ 0x09 ]; /* Get previous output bits */ temp1 = m_pf[ 0x08 ] & m_pf[ 0x09 ]; /* Get previous output bits */
temp2 = m_inportsc(); /* Read port */ temp2 = m_io->read_byte( TMS7000_PORTC ); /* Read port */
temp3 = temp2 & (~m_pf[ 0x09 ]); /* Mask off output bits */ temp3 = temp2 & (~m_pf[ 0x09 ]); /* Mask off output bits */
result = temp1 | temp3; /* OR together */ result = temp1 | temp3; /* OR together */
break; break;
case 0x0a: /* Port D read */ case 0x0a: /* Port D read */
temp1 = m_pf[ 0x0a ] & m_pf[ 0x0b ]; /* Get previous output bits */ temp1 = m_pf[ 0x0a ] & m_pf[ 0x0b ]; /* Get previous output bits */
temp2 = m_inportsd(); /* Read port */ temp2 = m_io->read_byte( TMS7000_PORTD ); /* Read port */
temp3 = temp2 & (~m_pf[ 0x0b ]); /* Mask off output bits */ temp3 = temp2 & (~m_pf[ 0x0b ]); /* Mask off output bits */
result = temp1 | temp3; /* OR together */ result = temp1 | temp3; /* OR together */
break; break;

62
src/emu/cpu/tms7000/tms7000.h
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@ -24,6 +24,7 @@
#include "emu.h" #include "emu.h"
enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST, TMS7000_IDLE, TMS7000_T1_CL, TMS7000_T1_PS, TMS7000_T1_DEC }; enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST, TMS7000_IDLE, TMS7000_T1_CL, TMS7000_T1_PS, TMS7000_T1_DEC };
enum enum
@ -34,37 +35,14 @@ enum
TMS7000_IRQNONE = 255 TMS7000_IRQNONE = 255
}; };
enum
{
TMS7000_PORTA = 0, /* read-only */
TMS7000_PORTB, /* write-only */
TMS7000_PORTC,
TMS7000_PORTD
};
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
// I/O callbacks
// (port A is read-only)
#define MCFG_TMS7000_PORTA_READ_CB(_devcb) \
devcb = &tms7000_device::set_inportsa_cb(*device, DEVCB_##_devcb);
#define MCFG_TMS7000_PORTC_READ_CB(_devcb) \
devcb = &tms7000_device::set_inportsc_cb(*device, DEVCB_##_devcb);
#define MCFG_TMS7000_PORTD_READ_CB(_devcb) \
devcb = &tms7000_device::set_inportsd_cb(*device, DEVCB_##_devcb);
// (port B is write-only)
#define MCFG_TMS7000_PORTB_WRITE_CB(_devcb) \
devcb = &tms7000_device::set_outportsb_cb(*device, DEVCB_##_devcb);
#define MCFG_TMS7000_PORTC_WRITE_CB(_devcb) \
devcb = &tms7000_device::set_outportsc_cb(*device, DEVCB_##_devcb);
#define MCFG_TMS7000_PORTD_WRITE_CB(_devcb) \
devcb = &tms7000_device::set_outportsd_cb(*device, DEVCB_##_devcb);
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
class tms7000_device : public cpu_device class tms7000_device : public cpu_device
{ {
@ -77,15 +55,6 @@ public:
tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source); tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source);
// static configuration helpers
template<class _Object> static devcb_base & set_inportsa_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsa.set_callback(object); }
template<class _Object> static devcb_base & set_inportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsc.set_callback(object); }
template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_inportsd.set_callback(object); }
template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsb.set_callback(object); }
template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsc.set_callback(object); }
template<class _Object> static devcb_base & set_outportsd_cb(device_t &device, _Object object) { return downcast<tms7000_device &>(device).m_outportsd.set_callback(object); }
DECLARE_WRITE8_MEMBER( tms70x0_pf_w ); DECLARE_WRITE8_MEMBER( tms70x0_pf_w );
DECLARE_READ8_MEMBER( tms70x0_pf_r ); DECLARE_READ8_MEMBER( tms70x0_pf_r );
@ -102,7 +71,7 @@ protected:
virtual void execute_set_input(int inputnum, int state); virtual void execute_set_input(int inputnum, int state);
// device_memory_interface overrides // device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; } virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_state_interface overrides // device_state_interface overrides
void state_string_export(const device_state_entry &entry, astring &string); void state_string_export(const device_state_entry &entry, astring &string);
@ -114,6 +83,7 @@ protected:
private: private:
address_space_config m_program_config; address_space_config m_program_config;
address_space_config m_io_config;
const opcode_func *m_opcode; const opcode_func *m_opcode;
@ -136,17 +106,7 @@ private:
address_space *m_program; address_space *m_program;
direct_read_data *m_direct; direct_read_data *m_direct;
address_space *m_io;
// callbacks
devcb_read8 m_inportsa;
devcb_read8 m_inportsc;
devcb_read8 m_inportsd;
devcb_write8 m_outportsb;
devcb_write8 m_outportsc;
devcb_write8 m_outportsd;
/////////////////////////////////////////////////////////
inline UINT16 RM16( UINT32 mAddr ); inline UINT16 RM16( UINT32 mAddr );
inline UINT16 RRF16( UINT32 mAddr ); inline UINT16 RRF16( UINT32 mAddr );

32
src/mess/drivers/exelv.c
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@ -429,11 +429,23 @@ static ADDRESS_MAP_START(tms7020_mem, AS_PROGRAM, 8, exelv_state)
AM_RANGE(0xc800, 0xf7ff) AM_NOP AM_RANGE(0xc800, 0xf7ff) AM_NOP
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START(tms7020_port, AS_IO, 8, exelv_state)
AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7020_porta_r)
AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7020_portb_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START(tms7041_map, AS_PROGRAM, 8, exelv_state) static ADDRESS_MAP_START(tms7041_map, AS_PROGRAM, 8, exelv_state)
AM_RANGE(0x0080, 0x00ff) AM_RAM AM_RANGE(0x0080, 0x00ff) AM_RAM
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START(tms7041_port, AS_IO, 8, exelv_state)
AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7041_porta_r)
AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7041_portb_w)
AM_RANGE(TMS7000_PORTC, TMS7000_PORTC) AM_READWRITE(tms7041_portc_r, tms7041_portc_w)
AM_RANGE(TMS7000_PORTD, TMS7000_PORTD) AM_READWRITE(tms7041_portd_r, tms7041_portd_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START(tms7040_mem, AS_PROGRAM, 8, exelv_state) static ADDRESS_MAP_START(tms7040_mem, AS_PROGRAM, 8, exelv_state)
AM_RANGE(0x0080, 0x00ff) AM_NOP AM_RANGE(0x0080, 0x00ff) AM_NOP
@ -500,18 +512,12 @@ static MACHINE_CONFIG_START( exl100, exelv_state )
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD("maincpu", TMS7020_EXL, XTAL_4_9152MHz) MCFG_CPU_ADD("maincpu", TMS7020_EXL, XTAL_4_9152MHz)
MCFG_CPU_PROGRAM_MAP(tms7020_mem) MCFG_CPU_PROGRAM_MAP(tms7020_mem)
MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r)) MCFG_CPU_IO_MAP(tms7020_port)
MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
MCFG_CPU_ADD("tms7041", TMS7040, XTAL_4_9152MHz) // should be TMS7041 MCFG_CPU_ADD("tms7041", TMS7040, XTAL_4_9152MHz) // should be TMS7041
MCFG_CPU_PROGRAM_MAP(tms7041_map) MCFG_CPU_PROGRAM_MAP(tms7041_map)
MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r)) MCFG_CPU_IO_MAP(tms7041_port)
MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
MCFG_QUANTUM_PERFECT_CPU("maincpu") MCFG_QUANTUM_PERFECT_CPU("maincpu")
@ -558,18 +564,12 @@ static MACHINE_CONFIG_START( exeltel, exelv_state )
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD("maincpu", TMS7040, XTAL_4_9152MHz) MCFG_CPU_ADD("maincpu", TMS7040, XTAL_4_9152MHz)
MCFG_CPU_PROGRAM_MAP(tms7040_mem) MCFG_CPU_PROGRAM_MAP(tms7040_mem)
MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7020_porta_r)) MCFG_CPU_IO_MAP(tms7020_port)
MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7020_portb_w))
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
MCFG_CPU_ADD("tms7042", TMS7040, XTAL_4_9152MHz) // should be TMS7042 MCFG_CPU_ADD("tms7042", TMS7040, XTAL_4_9152MHz) // should be TMS7042
MCFG_CPU_PROGRAM_MAP(tms7042_map) MCFG_CPU_PROGRAM_MAP(tms7042_map)
MCFG_TMS7000_PORTA_READ_CB(READ8(exelv_state, tms7041_porta_r)) MCFG_CPU_IO_MAP(tms7041_port)
MCFG_TMS7000_PORTB_WRITE_CB(WRITE8(exelv_state, tms7041_portb_w))
MCFG_TMS7000_PORTC_READ_CB(READ8(exelv_state, tms7041_portc_r))
MCFG_TMS7000_PORTC_WRITE_CB(WRITE8(exelv_state, tms7041_portc_w))
MCFG_TMS7000_PORTD_READ_CB(READ8(exelv_state, tms7041_portd_r))
MCFG_TMS7000_PORTD_WRITE_CB(WRITE8(exelv_state, tms7041_portd_w))
MCFG_QUANTUM_PERFECT_CPU("maincpu") MCFG_QUANTUM_PERFECT_CPU("maincpu")