Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-06-29 23:48:56 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

taitowlf.cpp: fix compile when ENABLE_VGA is 1 (nw)

Browse Source
This commit is contained in:
angelosa 2018-06-12 03:19:09 +02:00
parent 59ac361b69
commit cf29e4c121
1 changed files with 11 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
src/mame/drivers/taitowlf.cpp
View File

@ -23,6 +23,9 @@ ICS GENDAC ICS5342-3
some logic some logic
clocks 50MHz (near 3DFX) and 14.31818MHz (near RAMDAC) clocks 50MHz (near 3DFX) and 14.31818MHz (near RAMDAC)
TODO:
- program ROM is read via parallel port (for offset write, encrypted) and game port!?
*/ */
#include "emu.h" #include "emu.h"
@ -47,13 +50,9 @@ public:
m_bank1(*this, "bank1"), m_bank1(*this, "bank1"),
m_palette(*this, "palette") { } m_palette(*this, "palette") { }
std::unique_ptr<uint32_t[]> m_bios_ram;
uint8_t m_mtxc_config_reg[256];
uint8_t m_piix4_config_reg[4][256];
required_region_ptr<uint8_t> m_bootscreen_rom; required_region_ptr<uint8_t> m_bootscreen_rom;
required_memory_bank m_bank1; required_memory_bank m_bank1;
required_device<palette_device> m_palette; optional_device<palette_device> m_palette;
DECLARE_WRITE32_MEMBER(pnp_config_w); DECLARE_WRITE32_MEMBER(pnp_config_w);
DECLARE_WRITE32_MEMBER(pnp_data_w); DECLARE_WRITE32_MEMBER(pnp_data_w);
DECLARE_WRITE32_MEMBER(bios_ram_w); DECLARE_WRITE32_MEMBER(bios_ram_w);
@ -77,6 +76,11 @@ public:
void piix4_config_w(int function, int reg, uint8_t data); void piix4_config_w(int function, int reg, uint8_t data);
uint32_t intel82371ab_pci_r(int function, int reg, uint32_t mem_mask); uint32_t intel82371ab_pci_r(int function, int reg, uint32_t mem_mask);
void intel82371ab_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask); void intel82371ab_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask);
private:
std::unique_ptr<uint32_t[]> m_bios_ram;
uint8_t m_mtxc_config_reg[256];
uint8_t m_piix4_config_reg[4][256];
}; };
#if !ENABLE_VGA #if !ENABLE_VGA
@ -303,12 +307,13 @@ void taitowlf_state::taitowlf_io(address_map &map)
map(0x00e8, 0x00eb).noprw(); map(0x00e8, 0x00eb).noprw();
map(0x0300, 0x03af).noprw(); map(0x0300, 0x03af).noprw();
map(0x03b0, 0x03df).noprw();
map(0x0278, 0x027b).w(FUNC(taitowlf_state::pnp_config_w)); map(0x0278, 0x027b).w(FUNC(taitowlf_state::pnp_config_w));
#if ENABLE_VGA #if ENABLE_VGA
map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w)); map(0x03b0, 0x03bf).rw("vga", FUNC(vga_device::port_03b0_r), FUNC(vga_device::port_03b0_w));
map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w)); map(0x03c0, 0x03cf).rw("vga", FUNC(vga_device::port_03c0_r), FUNC(vga_device::port_03c0_w));
map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w)); map(0x03d0, 0x03df).rw("vga", FUNC(vga_device::port_03d0_r), FUNC(vga_device::port_03d0_w));
#else
map(0x03b0, 0x03df).noprw();
#endif #endif
map(0x0a78, 0x0a7b).w(FUNC(taitowlf_state::pnp_data_w)); map(0x0a78, 0x0a7b).w(FUNC(taitowlf_state::pnp_data_w));
map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_legacy_device::read), FUNC(pci_bus_legacy_device::write)); map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_legacy_device::read), FUNC(pci_bus_legacy_device::write));