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https://github.com/holub/mame
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s14001a_new: small cleanup
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@ -33,7 +33,6 @@ void s14001a_new_device::device_start()
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m_bsy_handler.resolve();
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m_uOutputP1 = m_uOutputP2 = 7;
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//m_uPrintLevel = 10;
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}
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@ -46,38 +45,40 @@ void s14001a_new_device::sound_stream_update(sound_stream &stream, stream_sample
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for (int i = 0; i < samples; i++)
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{
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Clock();
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outputs[0][i] = ((((INT16)GetOutput())-7)<<10)*15;
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INT16 sample = INT16(m_uOutputP2) - 7;
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outputs[0][i] = sample * 0x4000;
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}
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}
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UINT8 s14001a_new_device::readmem(UINT16 offset, bool phase)
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{
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offset &= 0xfff; // 11-bit internal
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return ((m_ext_read_handler.isnull()) ? m_SpeechRom[offset & (m_SpeechRom.bytes() - 1)] : m_ext_read_handler(offset));
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}
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void s14001a_new_device::force_update()
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{
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m_stream->update();
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}
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int s14001a_new_device::bsy_r()
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READ_LINE_MEMBER(s14001a_new_device::romclock_r)
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{
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m_stream->update();
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return (GetBusy()) ? 1 : 0;
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return (m_bPhase1) ? 1 : 0;
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}
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void s14001a_new_device::reg_w(int data)
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READ_LINE_MEMBER(s14001a_new_device::busy_r)
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{
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m_stream->update();
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SetWord(data);
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return (m_bBusyP1) ? 1 : 0;
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}
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void s14001a_new_device::rst_w(int data)
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WRITE8_MEMBER(s14001a_new_device::data_w)
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{
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m_stream->update();
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SetStart(data != 0);
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m_uWord = data & 0x3f; // C0-C5
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}
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WRITE_LINE_MEMBER(s14001a_new_device::start_w)
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{
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m_stream->update();
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m_bStart = (state != 0);
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if (m_bStart) m_uStateP1 = WORDWAIT;
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}
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@ -90,6 +91,11 @@ void s14001a_new_device::set_clock(int clock)
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UINT8 s14001a_new_device::readmem(UINT16 offset, bool phase)
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{
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offset &= 0xfff; // 11-bit internal
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return ((m_ext_read_handler.isnull()) ? m_SpeechRom[offset & (m_SpeechRom.bytes() - 1)] : m_ext_read_handler(offset));
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}
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bool s14001a_new_device::Clock()
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{
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@ -136,27 +142,30 @@ bool s14001a_new_device::Clock()
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// logic done during phase 1
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switch (m_uStateP1)
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{
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// 0
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case IDLE:
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m_bBusyP1 = false;
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m_uOutputP1 = 7;
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if (m_bStart) m_uStateP1 = WORDWAIT;
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if (m_bBusyP1 && !m_bsy_handler.isnull())
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m_bsy_handler(0);
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m_bBusyP1 = false;
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break;
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// 1
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case WORDWAIT:
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// the delta address register latches the word number into bits 03 to 08
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// all other bits forced to 0. 04 to 08 makes a multiply by two.
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m_uDAR13To05P1 = (m_uWord&0x3C)>>2;
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m_uDAR04To00P1 = (m_uWord&0x03)<<3;
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m_RomAddrP1 = (m_uDAR13To05P1<<3)|(m_uDAR04To00P1>>2); // remove lower two bits
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m_bBusyP1 = true;
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m_uOutputP1 = 7;
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if (m_bStart) m_uStateP1 = WORDWAIT;
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else m_uStateP1 = CWARMSB;
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if (!m_bBusyP1 && !m_bsy_handler.isnull())
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m_bsy_handler(1);
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m_bBusyP1 = true;
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break;
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// 2
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case CWARMSB:
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if (m_uPrintLevel >= 1)
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printf("\n speaking word %02x",m_uWord);
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@ -173,7 +182,6 @@ bool s14001a_new_device::Clock()
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else m_uStateP1 = CWARLSB;
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break;
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// 3
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case CWARLSB:
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m_uCWARP1 = m_uCWARP2|(readmem(m_uRomAddrP2,m_bPhase1)>>4); // setup in previous state
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m_RomAddrP1 = m_uCWARP1;
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@ -183,7 +191,6 @@ bool s14001a_new_device::Clock()
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else m_uStateP1 = DARMSB;
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break;
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// 4
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case DARMSB:
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m_uDAR13To05P1 = readmem(m_uRomAddrP2,m_bPhase1)<<1; // 9 bit counter, 8 MSBs from ROM, lsb zeroed
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m_uDAR04To00P1 = 0;
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@ -196,7 +203,6 @@ bool s14001a_new_device::Clock()
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else m_uStateP1 = CTRLBITS;
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break;
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// 5
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case CTRLBITS:
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m_bStopP1 = readmem(m_uRomAddrP2,m_bPhase1)&0x80? true: false;
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m_bVoicedP1 = readmem(m_uRomAddrP2,m_bPhase1)&0x40? true: false;
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@ -216,7 +222,6 @@ bool s14001a_new_device::Clock()
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break;
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// 6
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case PLAY:
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{
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// statistics
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@ -306,7 +311,6 @@ bool s14001a_new_device::Clock()
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break;
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}
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// 7
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case DELAY:
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m_uOutputP1 = 7;
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if (m_bStart) m_uStateP1 = WORDWAIT;
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@ -351,7 +355,7 @@ void s14001a_new_device::CalculateIncrement(bool bVoicedP2, UINT8 uPPQtrP2, bool
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{
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uDeltaOldP2 = 0x02;
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}
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static UINT8 uIncrements[4][4] =
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static const UINT8 uIncrements[4][4] =
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{
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// 00 01 10 11
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{ 3, 3, 1, 1,}, // 00
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@ -22,30 +22,11 @@ public:
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template<class _Object> static devcb_base &set_bsy_handler(device_t &device, _Object object) { return downcast<s14001a_new_device &>(device).m_bsy_handler.set_callback(object); }
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template<class _Object> static devcb_base &set_ext_read_handler(device_t &device, _Object object) { return downcast<s14001a_new_device &>(device).m_ext_read_handler.set_callback(object); }
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bool Clock(); // called once to toggle external clock twice
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// output pin data
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UINT16 GetRomAddr() { return m_uRomAddrP2; }
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UINT8 GetOutput() { return m_uOutputP2; }
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bool GetAddressRead() { return m_bPhase1; }
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bool GetBusy() { return m_bBusyP1; }
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// input pin data
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void SetStart(bool bStart) { m_bStart = bStart; }
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void SetWord(UINT8 uWord) { m_uWord = uWord; }
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// emulator helper functions
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UINT8 Mux8To2(bool bVoicedP2, UINT8 uPPQtrP2, UINT8 uDeltaAdrP2, UINT8 uRomDataP2);
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void CalculateIncrement(bool bVoicedP2, UINT8 uPPQtrP2, bool bPPQStartP2, UINT8 uDeltaP2, UINT8 uDeltaOldP2, UINT8 &uDeltaOldP1, UINT8 &uIncrementP2, bool &bAddP2);
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UINT8 CalculateOutput(bool bVoicedP2, bool bXSilenceP2, UINT8 uPPQtrP2, bool bPPQStartP2, UINT8 uLOutputP2, UINT8 uIncrementP2, bool bAddP2);
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void ClearStatistics();
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void GetStatistics(UINT32 &uNPitchPeriods, UINT32 &uNVoiced, UINT32 uNControlWords);
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void SetPrintLevel(UINT32 uPrintLevel) { m_uPrintLevel = uPrintLevel; }
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int bsy_r(); /* read BUSY pin */
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void reg_w(int data); /* write to input latch */
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void rst_w(int data); /* write to RESET pin */
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DECLARE_READ_LINE_MEMBER(busy_r);
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DECLARE_READ_LINE_MEMBER(romclock_r);
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DECLARE_WRITE_LINE_MEMBER(start_w);
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DECLARE_WRITE8_MEMBER(data_w);
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void set_clock(int clock); /* set VSU-1000 clock */
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// void set_volume(int volume); /* set VSU-1000 volume control */
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void force_update();
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@ -58,7 +39,6 @@ protected:
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virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
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private:
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// internal state
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required_region_ptr<UINT8> m_SpeechRom;
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sound_stream * m_stream;
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@ -66,7 +46,17 @@ private:
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devcb_read8 m_ext_read_handler;
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UINT8 readmem(UINT16 offset, bool phase);
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bool Clock(); // called once to toggle external clock twice
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// emulator helper functions
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UINT8 Mux8To2(bool bVoicedP2, UINT8 uPPQtrP2, UINT8 uDeltaAdrP2, UINT8 uRomDataP2);
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void CalculateIncrement(bool bVoicedP2, UINT8 uPPQtrP2, bool bPPQStartP2, UINT8 uDeltaP2, UINT8 uDeltaOldP2, UINT8 &uDeltaOldP1, UINT8 &uIncrementP2, bool &bAddP2);
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UINT8 CalculateOutput(bool bVoicedP2, bool bXSilenceP2, UINT8 uPPQtrP2, bool bPPQStartP2, UINT8 uLOutputP2, UINT8 uIncrementP2, bool bAddP2);
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void ClearStatistics();
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void GetStatistics(UINT32 &uNPitchPeriods, UINT32 &uNVoiced, UINT32 uNControlWords);
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void SetPrintLevel(UINT32 uPrintLevel) { m_uPrintLevel = uPrintLevel; }
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// internal state
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bool m_bPhase1; // 1 bit internal clock
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enum states
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@ -92,7 +92,7 @@ WRITE8_MEMBER( csc_state::pia0_pa_w )
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break;
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}
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// m_speech->reg_w(data & 0x3f);
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// m_speech->data_w(space, 0, data & 0x3f);
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// for avoid the digit flashing
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m_selector |= 0x80;
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@ -100,15 +100,14 @@ WRITE8_MEMBER( csc_state::pia0_pa_w )
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WRITE8_MEMBER( csc_state::pia0_pb_w )
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{
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// m_speech->set_volume(15); // hack, s14001a core should assume a volume of 15 unless otherwise stated...
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// m_speech->rst_w(BIT(data, 1));
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// m_speech->start_w(BIT(data, 1));
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}
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READ8_MEMBER( csc_state::pia0_pb_r )
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{
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UINT8 data = 0x04;
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if(m_speech->bsy_r())
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if(m_speech->busy_r())
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data |= 0x08;
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if (m_selector<9)
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@ -817,8 +817,8 @@ WRITE8_MEMBER(fidelz80_state::vcc_ppi_porta_w)
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// d0-d5: TSI A0-A5
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// d7: TSI START line
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m_speech->reg_w(data & 0x3f);
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m_speech->rst_w(data >> 7 & 1);
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m_speech->data_w(space, 0, data & 0x3f);
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m_speech->start_w(data >> 7 & 1);
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// d6: language latch data
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// d7: language latch clock (latch on high)
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@ -832,7 +832,7 @@ WRITE8_MEMBER(fidelz80_state::vcc_ppi_porta_w)
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READ8_MEMBER(fidelz80_state::vcc_ppi_portb_r)
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{
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// d7: TSI BSY line
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return (m_speech->bsy_r()) ? 0x80 : 0x00;
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return (m_speech->busy_r()) ? 0x80 : 0x00;
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}
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WRITE8_MEMBER(fidelz80_state::vcc_ppi_portb_w)
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@ -893,7 +893,7 @@ void fidelz80_state::vsc_prepare_display()
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WRITE8_MEMBER(fidelz80_state::vsc_ppi_porta_w)
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{
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// d0-d5: TSI A0-A5
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m_speech->reg_w(data & 0x3f);
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m_speech->data_w(space, 0, data & 0x3f);
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// d0-d7: data for the 4 7seg leds, bits are HGCBAFED (H is extra led)
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m_7seg_data = BITSWAP8(data,7,6,2,1,0,5,4,3);
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@ -932,7 +932,7 @@ READ8_MEMBER(fidelz80_state::vsc_pio_portb_r)
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UINT8 ret = 0;
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// d4: TSI BSY line
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ret |= (m_speech->bsy_r()) ? 0 : 0x10;
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ret |= (m_speech->busy_r()) ? 0 : 0x10;
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return ret;
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}
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@ -946,7 +946,7 @@ WRITE8_MEMBER(fidelz80_state::vsc_pio_portb_w)
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m_speaker->level_w(data >> 2 & 1);
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// d6: TSI START line
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m_speech->rst_w(data >> 6 & 1);
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m_speech->start_w(data >> 6 & 1);
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}
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@ -1073,11 +1073,11 @@ WRITE8_MEMBER(fidelz80_state::vbrc_speech_w)
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//printf("%X ",data);
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// todo: HALT THE z80 here, and set up a callback to poll the s14001a BSY line to resume z80
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m_speech->reg_w(data & 0x1f);
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m_speech->rst_w(1);
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m_speech->rst_w(0);
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m_speech->data_w(space, 0, data & 0x3f);
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m_speech->start_w(1);
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m_speech->start_w(0);
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//m_speech->rst_w(BIT(data, 7));
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//m_speech->start_w(BIT(data, 7));
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}
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static ADDRESS_MAP_START( vbrc_main_map, AS_PROGRAM, 8, fidelz80_state )
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