From cfb3aa493cf4b18cc71ec9a6e106f2573eacb80a Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Sun, 20 Apr 2014 19:18:46 +0000 Subject: [PATCH] modernized cage, dcs and midwayic (nw) removed mcfglgcy.h and nvram legacy support in machine and mconfig also updated adsp2100 so I can do dcs changes this require clean build --- .gitattributes | 1 - src/emu/cpu/adsp2100/2100ops.inc | 12 +- src/emu/cpu/adsp2100/adsp2100.c | 8 +- src/emu/cpu/adsp2100/adsp2100.h | 18 +- src/emu/machine.c | 26 - src/emu/mcfglgcy.h | 20 - src/emu/mconfig.c | 1 - src/emu/mconfig.h | 18 - src/mame/audio/cage.c | 421 ++++----- src/mame/audio/cage.h | 105 ++- src/mame/audio/dcs.c | 1499 +++++++++++++++--------------- src/mame/audio/dcs.h | 350 ++++++- src/mame/drivers/atarigt.c | 79 +- src/mame/drivers/atlantis.c | 12 +- src/mame/drivers/gaelco3d.c | 52 +- src/mame/drivers/harddriv.c | 12 +- src/mame/drivers/kinst.c | 17 +- src/mame/drivers/magictg.c | 6 +- src/mame/drivers/metalmx.c | 23 +- src/mame/drivers/midtunit.c | 2 +- src/mame/drivers/midvunit.c | 104 ++- src/mame/drivers/midwunit.c | 5 +- src/mame/drivers/midxunit.c | 6 +- src/mame/drivers/midzeus.c | 65 +- src/mame/drivers/seattle.c | 266 ++++-- src/mame/drivers/stv.c | 6 +- src/mame/drivers/vegas.c | 268 ++++-- src/mame/drivers/wpc_dcs.c | 13 +- src/mame/includes/atarigt.h | 11 +- src/mame/includes/gaelco3d.h | 4 +- src/mame/includes/harddriv.h | 18 +- src/mame/includes/metalmx.h | 5 +- src/mame/includes/midtunit.h | 4 +- src/mame/includes/midvunit.h | 13 +- src/mame/includes/midwunit.h | 6 +- src/mame/includes/midxunit.h | 7 +- src/mame/includes/wpc_pin.h | 7 +- src/mame/machine/harddriv.c | 64 +- src/mame/machine/midtunit.c | 21 +- src/mame/machine/midwayic.c | 901 +++++++++--------- src/mame/machine/midwayic.h | 209 ++++- src/mame/machine/midwunit.c | 34 +- src/mame/machine/midxunit.c | 42 +- src/mame/mame.mak | 2 +- 44 files changed, 2748 insertions(+), 2015 deletions(-) delete mode 100644 src/emu/mcfglgcy.h diff --git a/.gitattributes b/.gitattributes index 2c3770a2d88..bf4072c1142 100644 --- a/.gitattributes +++ b/.gitattributes @@ -2701,7 +2701,6 @@ src/emu/machine/z8536.c svneol=native#text/plain src/emu/machine/z8536.h svneol=native#text/plain src/emu/mame.c svneol=native#text/plain src/emu/mame.h svneol=native#text/plain -src/emu/mcfglgcy.h svneol=native#text/plain src/emu/mconfig.c svneol=native#text/plain src/emu/mconfig.h svneol=native#text/plain src/emu/memarray.c svneol=native#text/plain diff --git a/src/emu/cpu/adsp2100/2100ops.inc b/src/emu/cpu/adsp2100/2100ops.inc index c44d9bb6445..b0c40ee91be 100644 --- a/src/emu/cpu/adsp2100/2100ops.inc +++ b/src/emu/cpu/adsp2100/2100ops.inc @@ -80,8 +80,8 @@ inline void adsp21xx_device::update_mstat() m_alt = temp; } if ((m_mstat ^ m_mstat_prev) & MSTAT_TIMER) - if (m_timer_fired != NULL) - (*m_timer_fired)(*this, (m_mstat & MSTAT_TIMER) != 0); + if (!m_timer_fired_func.isnull()) + m_timer_fired_func((m_mstat & MSTAT_TIMER) != 0); if (m_mstat & MSTAT_STICKYV) m_astat_clear = ~(CFLAG | NFLAG | ZFLAG); else @@ -419,8 +419,8 @@ void adsp21xx_device::write_reg3(int regnum, INT32 val) case 0x05: cntr_stack_push(); m_cntr = val & 0x3fff; break; case 0x06: m_core.sb.s = (INT32)(val << 27) >> 27; break; case 0x07: m_px = val; break; - case 0x09: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 0, val); break; - case 0x0b: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 1, val); break; + case 0x09: if (!m_sport_tx_func.isnull()) m_sport_tx_func(0, val); break; + case 0x0b: if (!m_sport_tx_func.isnull()) m_sport_tx_func(1, val); break; case 0x0c: m_ifc = val; if (m_chip_type >= CHIP_TYPE_ADSP2181) @@ -500,8 +500,8 @@ INT32 adsp21xx_device::read_reg3(int regnum) case 0x05: return m_cntr; case 0x06: return m_core.sb.s; case 0x07: return m_px; - case 0x08: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 0); else return 0; - case 0x0a: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 1); else return 0; + case 0x08: if (!m_sport_rx_func.isnull()) return m_sport_rx_func(0); else return 0; + case 0x0a: if (!m_sport_rx_func.isnull()) return m_sport_rx_func(1); else return 0; case 0x0f: return pc_stack_pop_val(); default: logerror("ADSP %04x: Reading from an invalid register!\n", m_ppc); return 0; } diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c index 99ec57bdc18..e3a530fe89f 100644 --- a/src/emu/cpu/adsp2100/adsp2100.c +++ b/src/emu/cpu/adsp2100/adsp2100.c @@ -171,10 +171,6 @@ adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type memset(&m_irq_state, 0, sizeof(m_irq_state)); memset(&m_irq_latch, 0, sizeof(m_irq_latch)); - m_sport_rx_callback = NULL; - m_sport_tx_callback = NULL; - m_timer_fired = NULL; - // create the tables create_tables(); @@ -415,6 +411,10 @@ UINT16 adsp2181_device::idma_data_r() void adsp21xx_device::device_start() { + m_sport_rx_func.resolve(m_sport_rx_callback, *this); + m_sport_tx_func.resolve(m_sport_tx_callback, *this); + m_timer_fired_func.resolve(m_timer_fired, *this); + // get our address spaces m_program = &space(AS_PROGRAM); m_direct = &m_program->direct(); diff --git a/src/emu/cpu/adsp2100/adsp2100.h b/src/emu/cpu/adsp2100/adsp2100.h index 2471dd96ec5..019cffeb9bf 100644 --- a/src/emu/cpu/adsp2100/adsp2100.h +++ b/src/emu/cpu/adsp2100/adsp2100.h @@ -193,23 +193,15 @@ enum class adsp21xx_device; -// transmit and receive data callbacks types -typedef INT32 (*adsp21xx_rx_func)(adsp21xx_device &device, int port); -typedef void (*adsp21xx_tx_func)(adsp21xx_device &device, int port, INT32 data); -typedef void (*adsp21xx_timer_func)(adsp21xx_device &device, int enable); - - // ======================> adsp21xx_config struct adsp21xx_config { - adsp21xx_rx_func m_sport_rx_callback; // callback for serial receive - adsp21xx_tx_func m_sport_tx_callback; // callback for serial transmit - adsp21xx_timer_func m_timer_fired; // callback for timer fired + devcb_read32 m_sport_rx_callback; // callback for serial receive + devcb_write32 m_sport_tx_callback; // callback for serial transmit + devcb_write_line m_timer_fired; // callback for timer fired }; - - // ======================> adsp21xx_device class adsp21xx_device : public cpu_device, @@ -469,6 +461,10 @@ protected: UINT16 m_mask_table[0x4000]; UINT16 m_reverse_table[0x4000]; + devcb_resolved_read32 m_sport_rx_func; + devcb_resolved_write32 m_sport_tx_func; + devcb_resolved_write_line m_timer_fired_func; + // debugging #if ADSP_TRACK_HOTSPOTS UINT32 m_pcbucket[0x4000]; diff --git a/src/emu/machine.c b/src/emu/machine.c index 481625eb410..fb5de58bef5 100644 --- a/src/emu/machine.c +++ b/src/emu/machine.c @@ -1208,21 +1208,6 @@ astring &running_machine::nvram_filename(astring &result, device_t &device) void running_machine::nvram_load() { - if (config().m_nvram_handler != NULL) - { - astring filename; - emu_file file(options().nvram_directory(), OPEN_FLAG_READ); - if (file.open(nvram_filename(filename, root_device()), ".nv") == FILERR_NONE) - { - (*config().m_nvram_handler)(*this, &file, FALSE); - file.close(); - } - else - { - (*config().m_nvram_handler)(*this, NULL, FALSE); - } - } - nvram_interface_iterator iter(root_device()); for (device_nvram_interface *nvram = iter.first(); nvram != NULL; nvram = iter.next()) { @@ -1245,17 +1230,6 @@ void running_machine::nvram_load() void running_machine::nvram_save() { - if (config().m_nvram_handler != NULL) - { - astring filename; - emu_file file(options().nvram_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS); - if (file.open(nvram_filename(filename, root_device()), ".nv") == FILERR_NONE) - { - (*config().m_nvram_handler)(*this, &file, TRUE); - file.close(); - } - } - nvram_interface_iterator iter(root_device()); for (device_nvram_interface *nvram = iter.first(); nvram != NULL; nvram = iter.next()) { diff --git a/src/emu/mcfglgcy.h b/src/emu/mcfglgcy.h deleted file mode 100644 index ca9cb2e6309..00000000000 --- a/src/emu/mcfglgcy.h +++ /dev/null @@ -1,20 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Aaron Giles -/*************************************************************************** - - mcfglgcy.h - - Legacy machine configuration helpers. - -***************************************************************************/ - -#pragma once - -#ifndef __MCFGLGCY_H__ -#define __MCFGLGCY_H__ - -// core functions -#define MCFG_NVRAM_HANDLER(_func) \ - config.m_nvram_handler = NVRAM_HANDLER_NAME(_func); - -#endif /* __MCFGLGCY_H__ */ diff --git a/src/emu/mconfig.c b/src/emu/mconfig.c index f5b0b261d04..66563827b45 100644 --- a/src/emu/mconfig.c +++ b/src/emu/mconfig.c @@ -25,7 +25,6 @@ machine_config::machine_config(const game_driver &gamedrv, emu_options &options) : m_minimum_quantum(attotime::zero), m_watchdog_vblank_count(0), m_watchdog_time(attotime::zero), - m_nvram_handler(NULL), m_default_layout(NULL), m_gamedrv(gamedrv), m_options(options) diff --git a/src/emu/mconfig.h b/src/emu/mconfig.h index 299ff081687..ea3f6e494fe 100644 --- a/src/emu/mconfig.h +++ b/src/emu/mconfig.h @@ -26,15 +26,6 @@ #define MIN_TAG_LENGTH 1 #define MAX_TAG_LENGTH 15 -#define NVRAM_HANDLER_NAME(name) nvram_handler_##name -#define NVRAM_HANDLER(name) void NVRAM_HANDLER_NAME(name)(running_machine &machine, emu_file *file, int read_or_write) -#define NVRAM_HANDLER_CALL(name) NVRAM_HANDLER_NAME(name)(machine, file, read_or_write) - -// NULL versions -#define nvram_handler_0 NULL - - - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -44,12 +35,6 @@ struct gfx_decode_entry; class driver_device; class screen_device; - - -// various callback functions -typedef void (*nvram_handler_func)(running_machine &machine, emu_file *file, int read_or_write); - - // ======================> machine_config // machine configuration definition @@ -78,9 +63,6 @@ public: INT32 m_watchdog_vblank_count; // number of VBLANKs until the watchdog kills us attotime m_watchdog_time; // length of time until the watchdog kills us - // legacy callbacks - nvram_handler_func m_nvram_handler; // NVRAM save/load callback - // other parameters const char * m_default_layout; // default layout for this machine diff --git a/src/mame/audio/cage.c b/src/mame/audio/cage.c index 3a84bacf132..004360a138d 100644 --- a/src/mame/audio/cage.c +++ b/src/mame/audio/cage.c @@ -13,7 +13,6 @@ #include "emu.h" #include "cpu/tms32031/tms32031.h" -#include "sound/dmadac.h" #include "cage.h" @@ -27,46 +26,6 @@ #define DAC_BUFFER_CHANNELS 4 #define STACK_SOUND_BUFSIZE (1024) - - -/************************************* - * - * Statics - * - *************************************/ - - -struct cage_t -{ - cpu_device *cpu; - attotime cpu_h1_clock_period; - - UINT8 cpu_to_cage_ready; - UINT8 cage_to_cpu_ready; - - void (*irqhandler)(running_machine &, int); - - attotime serial_period_per_word; - - UINT8 dma_enabled; - UINT8 dma_timer_enabled; - timer_device *dma_timer; - - UINT8 timer_enabled[2]; - timer_device *timer[2]; - - UINT32 tms32031_io_regs[0x100]; - UINT16 from_main; - UINT16 control; - - UINT32 *speedup_ram; - dmadac_sound_device *dmadac[DAC_BUFFER_CHANNELS]; -}; - -static cage_t cage; - - - /************************************* * * I/O port definitions @@ -140,78 +99,80 @@ static const char *const register_names[] = -/************************************* - * - * Prototypes - * - *************************************/ - -static TIMER_DEVICE_CALLBACK( dma_timer_callback ); -static TIMER_DEVICE_CALLBACK( cage_timer_callback ); -static void update_timer(int which); -static DECLARE_WRITE32_HANDLER( speedup_w ); - - - /************************************* * * Initialization * *************************************/ + +const device_type ATARI_CAGE = &device_creator; -void cage_init(running_machine &machine, offs_t speedup) + +//------------------------------------------------- +// atari_cage_device - constructor +//------------------------------------------------- + +atari_cage_device::atari_cage_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + device_t(mconfig, ATARI_CAGE, "Atari CAGE", tag, owner, clock, "atari_cage", __FILE__), + m_irqhandler(*this) +{ +} + +atari_cage_device::atari_cage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + m_irqhandler(*this) +{ +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void atari_cage_device::device_start() { - cage_t *state = &cage; attotime cage_cpu_clock_period; int chan; - state->irqhandler = NULL; + // resolve callbacks + m_irqhandler.resolve_safe(); - machine.root_device().membank("bank10")->set_base(machine.root_device().memregion("cageboot")->base()); - machine.root_device().membank("bank11")->set_base(machine.root_device().memregion("cage")->base()); + membank("bank10")->set_base(machine().root_device().memregion("cageboot")->base()); + membank("bank11")->set_base(machine().root_device().memregion("cage")->base()); - state->cpu = machine.device("cage"); - cage_cpu_clock_period = attotime::from_hz(state->cpu->clock()); - state->cpu_h1_clock_period = cage_cpu_clock_period * 2; + m_cpu = subdevice("cage"); + cage_cpu_clock_period = attotime::from_hz(m_cpu->clock()); + m_cpu_h1_clock_period = cage_cpu_clock_period * 2; - state->dma_timer = machine.device("cage_dma_timer"); - state->timer[0] = machine.device("cage_timer0"); - state->timer[1] = machine.device("cage_timer1"); + m_dma_timer = subdevice("cage_dma_timer"); + m_timer[0] = subdevice("cage_timer0"); + m_timer[1] = subdevice("cage_timer1"); - if (speedup) - state->speedup_ram = state->cpu->space(AS_PROGRAM).install_legacy_write_handler(speedup, speedup, FUNC(speedup_w)); + if (m_speedup) + m_speedup_ram = m_cpu->space(AS_PROGRAM).install_write_handler(m_speedup, m_speedup, write32_delegate(FUNC(atari_cage_device::speedup_w),this)); for (chan = 0; chan < DAC_BUFFER_CHANNELS; chan++) { char buffer[10]; sprintf(buffer, "dac%d", chan + 1); - state->dmadac[chan] = machine.device(buffer); + m_dmadac[chan] = subdevice(buffer); } - machine.save().save_item(NAME(cage.cpu_to_cage_ready)); - machine.save().save_item(NAME(cage.cage_to_cpu_ready)); - machine.save().save_item(NAME(cage.serial_period_per_word)); - machine.save().save_item(NAME(cage.dma_enabled)); - machine.save().save_item(NAME(cage.dma_timer_enabled)); - machine.save().save_item(NAME(cage.timer_enabled)); - machine.save().save_item(NAME(cage.from_main)); - machine.save().save_item(NAME(cage.control)); + save_item(NAME(m_cpu_to_cage_ready)); + save_item(NAME(m_cage_to_cpu_ready)); + save_item(NAME(m_serial_period_per_word)); + save_item(NAME(m_dma_enabled)); + save_item(NAME(m_dma_timer_enabled)); + save_item(NAME(m_timer_enabled)); + save_item(NAME(m_from_main)); + save_item(NAME(m_control)); } -void cage_set_irq_handler(void (*irqhandler)(running_machine &, int)) +void atari_cage_device::reset_w(int state) { - cage_t *state = &cage; - state->irqhandler = irqhandler; -} - - -void cage_reset_w(address_space &space, int state) -{ - cage_t *sndstate = &cage; if (state) - cage_control_w(space.machine(), 0); - sndstate->cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE); + control_w(0); + m_cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE); } @@ -222,18 +183,17 @@ void cage_reset_w(address_space &space, int state) * *************************************/ -static TIMER_DEVICE_CALLBACK( dma_timer_callback ) +TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::dma_timer_callback ) { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; /* if we weren't enabled, don't do anything, just shut ourself off */ - if (!state->dma_enabled) + if (!m_dma_enabled) { - if (state->dma_timer_enabled) + if (m_dma_timer_enabled) { timer.adjust(attotime::never); - state->dma_timer_enabled = 0; + m_dma_timer_enabled = 0; } return; } @@ -243,21 +203,20 @@ static TIMER_DEVICE_CALLBACK( dma_timer_callback ) tms32031_io_regs[DMA_SOURCE_ADDR] = param; /* set the interrupt */ - state->cpu->set_input_line(TMS3203X_DINT, ASSERT_LINE); - state->dma_enabled = 0; + m_cpu->set_input_line(TMS3203X_DINT, ASSERT_LINE); + m_dma_enabled = 0; } -static void update_dma_state(address_space &space) +void atari_cage_device::update_dma_state(address_space &space) { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; /* determine the new enabled state */ int enabled = ((tms32031_io_regs[DMA_GLOBAL_CTL] & 3) == 3) && (tms32031_io_regs[DMA_TRANSFER_COUNT] != 0); /* see if we turned on */ - if (enabled && !state->dma_enabled) + if (enabled && !m_dma_enabled) { INT16 sound_data[STACK_SOUND_BUFSIZE]; UINT32 addr, inc; @@ -277,29 +236,29 @@ static void update_dma_state(address_space &space) sound_data[i % STACK_SOUND_BUFSIZE] = space.read_dword(addr * 4); addr += inc; if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1) - dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data); + dmadac_transfer(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data); } if (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE != 0) - dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data); + dmadac_transfer(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data); /* compute the time of the interrupt and set the timer */ - if (!state->dma_timer_enabled) + if (!m_dma_timer_enabled) { - attotime period = state->serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT]; - state->dma_timer->adjust(period, addr, period); - state->dma_timer_enabled = 1; + attotime period = m_serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT]; + m_dma_timer->adjust(period, addr, period); + m_dma_timer_enabled = 1; } } /* see if we turned off */ - else if (!enabled && state->dma_enabled) + else if (!enabled && m_dma_enabled) { - state->dma_timer->reset(); - state->dma_timer_enabled = 0; + m_dma_timer->reset(); + m_dma_timer_enabled = 0; } /* set the new state */ - state->dma_enabled = enabled; + m_dma_enabled = enabled; } @@ -310,47 +269,44 @@ static void update_dma_state(address_space &space) * *************************************/ -static TIMER_DEVICE_CALLBACK( cage_timer_callback ) +TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::cage_timer_callback ) { - cage_t *state = &cage; int which = param; - /* set the interrupt */ - state->cpu->set_input_line(TMS3203X_TINT0 + which, ASSERT_LINE); - state->timer_enabled[which] = 0; + m_cpu->set_input_line(TMS3203X_TINT0 + which, ASSERT_LINE); + m_timer_enabled[which] = 0; update_timer(which); } -static void update_timer(int which) +void atari_cage_device::update_timer(int which) { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; /* determine the new enabled state */ int base = 0x10 * which; int enabled = ((tms32031_io_regs[base + TIMER0_GLOBAL_CTL] & 0xc0) == 0xc0); /* see if we turned on */ - if (enabled && !state->timer_enabled[which]) + if (enabled && !m_timer_enabled[which]) { - attotime period = state->cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]); + attotime period = m_cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]); /* make sure our assumptions are correct */ if (tms32031_io_regs[base + TIMER0_GLOBAL_CTL] != 0x2c1) logerror("CAGE TIMER%d: unexpected timer config %08X!\n", which, tms32031_io_regs[base + TIMER0_GLOBAL_CTL]); - state->timer[which]->adjust(period, which); + m_timer[which]->adjust(period, which); } /* see if we turned off */ - else if (!enabled && state->timer_enabled[which]) + else if (!enabled && m_timer_enabled[which]) { - state->timer[which]->adjust(attotime::never, which); + m_timer[which]->adjust(attotime::never, which); } /* set the new state */ - state->timer_enabled[which] = enabled; + m_timer_enabled[which] = enabled; } @@ -361,15 +317,14 @@ static void update_timer(int which) * *************************************/ -static void update_serial(running_machine &machine) +void atari_cage_device::update_serial() { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; attotime serial_clock_period, bit_clock_period; UINT32 freq; /* we start out at half the H1 frequency (or 2x the H1 period) */ - serial_clock_period = state->cpu_h1_clock_period * 2; + serial_clock_period = m_cpu_h1_clock_period * 2; /* if we're in clock mode, muliply by another factor of 2 */ if (tms32031_io_regs[SPORT_GLOBAL_CTL] & 4) @@ -379,14 +334,14 @@ static void update_serial(running_machine &machine) bit_clock_period = serial_clock_period * (tms32031_io_regs[SPORT_TIMER_PERIOD] & 0xffff); /* and times the number of bits per sample */ - state->serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1)); + m_serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1)); /* compute the step value to stretch this to the sample_rate */ - freq = ATTOSECONDS_TO_HZ(state->serial_period_per_word.attoseconds) / DAC_BUFFER_CHANNELS; + freq = ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds) / DAC_BUFFER_CHANNELS; if (freq > 0 && freq < 100000) { - dmadac_set_frequency(&state->dmadac[0], DAC_BUFFER_CHANNELS, freq); - dmadac_enable(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1); + dmadac_set_frequency(&m_dmadac[0], DAC_BUFFER_CHANNELS, freq); + dmadac_enable(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1); } } @@ -398,16 +353,15 @@ static void update_serial(running_machine &machine) * *************************************/ -static READ32_HANDLER( tms32031_io_r ) +READ32_MEMBER( atari_cage_device::tms32031_io_r ) { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; UINT16 result = tms32031_io_regs[offset]; switch (offset) { case DMA_GLOBAL_CTL: - result = (result & ~0xc) | (state->dma_enabled ? 0xc : 0x0); + result = (result & ~0xc) | (m_dma_enabled ? 0xc : 0x0); break; } @@ -417,10 +371,9 @@ static READ32_HANDLER( tms32031_io_r ) } -static WRITE32_HANDLER( tms32031_io_w ) +WRITE32_MEMBER( atari_cage_device::tms32031_io_w ) { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; COMBINE_DATA(&tms32031_io_regs[offset]); @@ -456,7 +409,7 @@ static WRITE32_HANDLER( tms32031_io_w ) case SPORT_DATA_TX: #if (DAC_BUFFER_CHANNELS == 4) - if ((int)ATTOSECONDS_TO_HZ(state->serial_period_per_word.attoseconds) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62) + if ((int)ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62) tms32031_io_regs[SPORT_RX_CTL] ^= 0x800; #endif break; @@ -464,7 +417,7 @@ static WRITE32_HANDLER( tms32031_io_w ) case SPORT_GLOBAL_CTL: case SPORT_TIMER_CTL: case SPORT_TIMER_PERIOD: - update_serial(space.machine()); + update_serial(); break; } } @@ -477,158 +430,145 @@ static WRITE32_HANDLER( tms32031_io_w ) * *************************************/ -static void update_control_lines(running_machine &machine) +void atari_cage_device::update_control_lines() { - cage_t *state = &cage; int val; /* set the IRQ to the main CPU */ - if (state->irqhandler) - { - int reason = 0; + int reason = 0; - if ((state->control & 3) == 3 && !state->cpu_to_cage_ready) - reason |= CAGE_IRQ_REASON_BUFFER_EMPTY; - if ((state->control & 2) && state->cage_to_cpu_ready) - reason |= CAGE_IRQ_REASON_DATA_READY; - - (*state->irqhandler)(machine, reason); - } + if ((m_control & 3) == 3 && !m_cpu_to_cage_ready) + reason |= CAGE_IRQ_REASON_BUFFER_EMPTY; + if ((m_control & 2) && m_cage_to_cpu_ready) + reason |= CAGE_IRQ_REASON_DATA_READY; + m_irqhandler(machine().driver_data()->generic_space(), 0, reason); /* set the IOF input lines */ - val = state->cpu->state_int(TMS3203X_IOF); + val = m_cpu->state_int(TMS3203X_IOF); val &= ~0x88; - if (state->cpu_to_cage_ready) val |= 0x08; - if (state->cage_to_cpu_ready) val |= 0x80; - state->cpu->set_state_int(TMS3203X_IOF, val); + if (m_cpu_to_cage_ready) val |= 0x08; + if (m_cage_to_cpu_ready) val |= 0x80; + m_cpu->set_state_int(TMS3203X_IOF, val); } -static READ32_HANDLER( cage_from_main_r ) +READ32_MEMBER( atari_cage_device::cage_from_main_r ) { - cage_t *state = &cage; if (LOG_COMM) - logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), state->from_main); - state->cpu_to_cage_ready = 0; - update_control_lines(space.machine()); - state->cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE); - return state->from_main; + logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), m_from_main); + m_cpu_to_cage_ready = 0; + update_control_lines(); + m_cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE); + return m_from_main; } -static WRITE32_HANDLER( cage_from_main_ack_w ) +WRITE32_MEMBER( atari_cage_device::cage_from_main_ack_w ) { if (LOG_COMM) { - cage_t *state = &cage; - logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), state->from_main); + logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), m_from_main); } } -static WRITE32_HANDLER( cage_to_main_w ) +WRITE32_MEMBER( atari_cage_device::cage_to_main_w ) { - cage_t *state = &cage; if (LOG_COMM) logerror("%06X:Data from CAGE = %04X\n", space.device().safe_pc(), data); driver_device *drvstate = space.machine().driver_data(); drvstate->soundlatch_word_w(space, 0, data, mem_mask); - state->cage_to_cpu_ready = 1; - update_control_lines(space.machine()); + m_cage_to_cpu_ready = 1; + update_control_lines(); } -static READ32_HANDLER( cage_io_status_r ) +READ32_MEMBER( atari_cage_device::cage_io_status_r ) { - cage_t *state = &cage; int result = 0; - if (state->cpu_to_cage_ready) + if (m_cpu_to_cage_ready) result |= 0x80; - if (!state->cage_to_cpu_ready) + if (!m_cage_to_cpu_ready) result |= 0x40; return result; } -UINT16 cage_main_r(address_space &space) +UINT16 atari_cage_device::main_r() { - cage_t *state = &cage; - driver_device *drvstate = space.machine().driver_data(); + driver_device *drvstate = machine().driver_data(); if (LOG_COMM) - logerror("%s:main read data = %04X\n", space.machine().describe_context(), drvstate->soundlatch_word_r(space, 0, 0)); - state->cage_to_cpu_ready = 0; - update_control_lines(space.machine()); - return drvstate->soundlatch_word_r(space, 0, 0xffff); + logerror("%s:main read data = %04X\n", machine().describe_context(), drvstate->soundlatch_word_r(drvstate->generic_space(), 0, 0)); + m_cage_to_cpu_ready = 0; + update_control_lines(); + return drvstate->soundlatch_word_r(drvstate->generic_space(), 0, 0xffff); } -static TIMER_CALLBACK( cage_deferred_w ) +TIMER_CALLBACK_MEMBER( atari_cage_device::cage_deferred_w ) { - cage_t *state = &cage; - state->from_main = param; - state->cpu_to_cage_ready = 1; - update_control_lines(machine); - state->cpu->set_input_line(TMS3203X_IRQ0, ASSERT_LINE); + m_from_main = param; + m_cpu_to_cage_ready = 1; + update_control_lines(); + m_cpu->set_input_line(TMS3203X_IRQ0, ASSERT_LINE); } -void cage_main_w(address_space &space, UINT16 data) +void atari_cage_device::main_w(UINT16 data) { if (LOG_COMM) - logerror("%s:Command to CAGE = %04X\n", space.machine().describe_context(), data); - space.machine().scheduler().synchronize(FUNC(cage_deferred_w), data); + logerror("%s:Command to CAGE = %04X\n", machine().describe_context(), data); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(atari_cage_device::cage_deferred_w),this), data); } -UINT16 cage_control_r(running_machine &machine) +UINT16 atari_cage_device::control_r() { - cage_t *state = &cage; UINT16 result = 0; - if (state->cpu_to_cage_ready) + if (m_cpu_to_cage_ready) result |= 2; - if (state->cage_to_cpu_ready) + if (m_cage_to_cpu_ready) result |= 1; return result; } -void cage_control_w(running_machine &machine, UINT16 data) +void atari_cage_device::control_w(UINT16 data) { - cage_t *state = &cage; - UINT32 *tms32031_io_regs = state->tms32031_io_regs; + UINT32 *tms32031_io_regs = m_tms32031_io_regs; - state->control = data; + m_control = data; /* CPU is reset if both control lines are 0 */ - if (!(state->control & 3)) + if (!(m_control & 3)) { - state->cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); - state->cpu->set_input_line(TMS3203X_IRQ1, ASSERT_LINE); + m_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + m_cpu->set_input_line(TMS3203X_IRQ1, ASSERT_LINE); - state->dma_enabled = 0; - state->dma_timer_enabled = 0; - state->dma_timer->reset(); + m_dma_enabled = 0; + m_dma_timer_enabled = 0; + m_dma_timer->reset(); - state->timer_enabled[0] = 0; - state->timer_enabled[1] = 0; - state->timer[0]->reset(); - state->timer[1]->reset(); + m_timer_enabled[0] = 0; + m_timer_enabled[1] = 0; + m_timer[0]->reset(); + m_timer[1]->reset(); memset(tms32031_io_regs, 0, 0x60 * 4); - state->cpu_to_cage_ready = 0; - state->cage_to_cpu_ready = 0; + m_cpu_to_cage_ready = 0; + m_cage_to_cpu_ready = 0; } else { - state->cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); - state->cpu->set_input_line(TMS3203X_IRQ1, CLEAR_LINE); + m_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_cpu->set_input_line(TMS3203X_IRQ1, CLEAR_LINE); } /* update the control state */ - update_control_lines(machine); + update_control_lines(); } @@ -639,12 +579,11 @@ void cage_control_w(running_machine &machine, UINT16 data) * *************************************/ -static WRITE32_HANDLER( speedup_w ) +WRITE32_MEMBER( atari_cage_device::speedup_w ) { - cage_t *state = &cage; space.device().execute().eat_cycles(100); - COMBINE_DATA(&state->speedup_ram[offset]); + COMBINE_DATA(&m_speedup_ram[offset]); } @@ -661,26 +600,26 @@ static const tms3203x_config cage_config = }; -static ADDRESS_MAP_START( cage_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( cage_map, AS_PROGRAM, 32, atari_cage_device ) AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_RANGE(0x200000, 0x200000) AM_WRITENOP AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10") - AM_RANGE(0x808000, 0x8080ff) AM_READWRITE_LEGACY(tms32031_io_r, tms32031_io_w) + AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_RANGE(0x809800, 0x809fff) AM_RAM - AM_RANGE(0xa00000, 0xa00000) AM_READWRITE_LEGACY(cage_from_main_r, cage_to_main_w) + AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_to_main_w) AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11") ADDRESS_MAP_END -static ADDRESS_MAP_START( cage_map_seattle, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( cage_map_seattle, AS_PROGRAM, 32, atari_cage_seattle_device ) AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_RANGE(0x200000, 0x200000) AM_WRITENOP AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10") - AM_RANGE(0x808000, 0x8080ff) AM_READWRITE_LEGACY(tms32031_io_r, tms32031_io_w) + AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w) AM_RANGE(0x809800, 0x809fff) AM_RAM - AM_RANGE(0xa00000, 0xa00000) AM_READWRITE_LEGACY(cage_from_main_r, cage_from_main_ack_w) - AM_RANGE(0xa00001, 0xa00001) AM_WRITE_LEGACY(cage_to_main_w) - AM_RANGE(0xa00003, 0xa00003) AM_READ_LEGACY(cage_io_status_r) + AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_from_main_ack_w) + AM_RANGE(0xa00001, 0xa00001) AM_WRITE(cage_to_main_w) + AM_RANGE(0xa00003, 0xa00003) AM_READ(cage_io_status_r) AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11") ADDRESS_MAP_END @@ -699,9 +638,9 @@ MACHINE_CONFIG_FRAGMENT( cage ) MCFG_TMS3203X_CONFIG(cage_config) MCFG_CPU_PROGRAM_MAP(cage_map) - MCFG_TIMER_ADD("cage_dma_timer", dma_timer_callback) - MCFG_TIMER_ADD("cage_timer0", cage_timer_callback) - MCFG_TIMER_ADD("cage_timer1", cage_timer_callback) + MCFG_TIMER_DEVICE_ADD("cage_dma_timer", DEVICE_SELF, atari_cage_device, dma_timer_callback) + MCFG_TIMER_DEVICE_ADD("cage_timer0", DEVICE_SELF, atari_cage_device, cage_timer_callback) + MCFG_TIMER_DEVICE_ADD("cage_timer1", DEVICE_SELF, atari_cage_device, cage_timer_callback) /* sound hardware */ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -733,3 +672,31 @@ MACHINE_CONFIG_DERIVED( cage_seattle, cage ) MCFG_CPU_MODIFY("cage") MCFG_CPU_PROGRAM_MAP(cage_map_seattle) MACHINE_CONFIG_END + +//------------------------------------------------- +// machine_config_additions - device-specific +// machine configurations +//------------------------------------------------- + +machine_config_constructor atari_cage_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( cage ); +} + + +const device_type ATARI_CAGE_SEATTLE = &device_creator; + + +//------------------------------------------------- +// atari_cage_seattle_device - constructor +//------------------------------------------------- + +atari_cage_seattle_device::atari_cage_seattle_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + atari_cage_device(mconfig, ATARI_CAGE_SEATTLE, "Atari CAGE Seattle", tag, owner, clock, "atari_cage_seattle", __FILE__) +{ +} + +machine_config_constructor atari_cage_seattle_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( cage_seattle ); +} diff --git a/src/mame/audio/cage.h b/src/mame/audio/cage.h index db5295ef0d8..aa075967f0e 100644 --- a/src/mame/audio/cage.h +++ b/src/mame/audio/cage.h @@ -6,18 +6,105 @@ ****************************************************************************/ +#ifndef __ATARI_CAGE__ +#define __ATARI_CAGE__ + +#include "sound/dmadac.h" + #define CAGE_IRQ_REASON_DATA_READY (1) #define CAGE_IRQ_REASON_BUFFER_EMPTY (2) -MACHINE_CONFIG_EXTERN( cage ); -MACHINE_CONFIG_EXTERN( cage_seattle ); +#define MCFG_ATARI_CAGE_IRQ_CALLBACK(_write) \ + devcb = &atari_cage_device::set_irqhandler_callback(*device, DEVCB2_##_write); -void cage_init(running_machine &machine, offs_t speedup); -void cage_set_irq_handler(void (*irqhandler)(running_machine &, int)); -void cage_reset_w(address_space &space, int state); +#define MCFG_ATARI_CAGE_SPEEDUP(_speedup) \ + atari_cage_device::static_set_speedup(*device, _speedup); + +class atari_cage_device : public device_t +{ +public: + // construction/destruction + atari_cage_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + atari_cage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); -UINT16 cage_main_r(address_space &space); -void cage_main_w(address_space &space, UINT16 data); + static void static_set_speedup(device_t &device, offs_t speedup) { downcast(device).m_speedup = speedup; } + template static devcb2_base &set_irqhandler_callback(device_t &device, _Object object) { return downcast(device).m_irqhandler.set_callback(object); } -UINT16 cage_control_r(running_machine &machine); -void cage_control_w(running_machine &machine, UINT16 data); + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + + void reset_w(int state); + + UINT16 main_r(); + void main_w(UINT16 data); + + UINT16 control_r(); + void control_w(UINT16 data); + + TIMER_DEVICE_CALLBACK_MEMBER( dma_timer_callback ); + void update_dma_state(address_space &space); + TIMER_DEVICE_CALLBACK_MEMBER( cage_timer_callback ); + void update_timer(int which); + void update_serial(); + READ32_MEMBER( tms32031_io_r ); + WRITE32_MEMBER( tms32031_io_w ); + void update_control_lines(); + READ32_MEMBER( cage_from_main_r ); + WRITE32_MEMBER( cage_from_main_ack_w ); + WRITE32_MEMBER( cage_to_main_w ); + READ32_MEMBER( cage_io_status_r ); + TIMER_CALLBACK_MEMBER( cage_deferred_w ); + WRITE32_MEMBER( speedup_w ); + +protected: + // device-level overrides + virtual void device_start(); + +private: + cpu_device *m_cpu; + attotime m_cpu_h1_clock_period; + + UINT8 m_cpu_to_cage_ready; + UINT8 m_cage_to_cpu_ready; + + devcb2_write8 m_irqhandler; + + + attotime m_serial_period_per_word; + + UINT8 m_dma_enabled; + UINT8 m_dma_timer_enabled; + timer_device *m_dma_timer; + + UINT8 m_timer_enabled[2]; + timer_device *m_timer[2]; + + UINT32 m_tms32031_io_regs[0x100]; + UINT16 m_from_main; + UINT16 m_control; + + UINT32 *m_speedup_ram; + dmadac_sound_device *m_dmadac[4]; + + offs_t m_speedup; +}; + + +// device type definition +extern const device_type ATARI_CAGE; + +class atari_cage_seattle_device : public atari_cage_device +{ +public: + // construction/destruction + atari_cage_seattle_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type ATARI_CAGE_SEATTLE; + +#endif // __ATARI_CAGE__ diff --git a/src/mame/audio/dcs.c b/src/mame/audio/dcs.c index c31622f5bd5..68642fa9fbc 100644 --- a/src/mame/audio/dcs.c +++ b/src/mame/audio/dcs.c @@ -153,10 +153,7 @@ ****************************************************************************/ #include "emu.h" -#include "cpu/adsp2100/adsp2100.h" #include "dcs.h" -#include "sound/dmadac.h" -#include "machine/midwayic.h" #define LOG_DCS_TRANSFERS (0) @@ -176,15 +173,15 @@ #define LCTRL_OUTPUT_EMPTY 0x400 #define LCTRL_INPUT_EMPTY 0x800 -#define IS_OUTPUT_EMPTY() (dcs.latch_control & LCTRL_OUTPUT_EMPTY) -#define IS_OUTPUT_FULL() (!(dcs.latch_control & LCTRL_OUTPUT_EMPTY)) -#define SET_OUTPUT_EMPTY() (dcs.latch_control |= LCTRL_OUTPUT_EMPTY) -#define SET_OUTPUT_FULL() (dcs.latch_control &= ~LCTRL_OUTPUT_EMPTY) +#define IS_OUTPUT_EMPTY() (m_latch_control & LCTRL_OUTPUT_EMPTY) +#define IS_OUTPUT_FULL() (!(m_latch_control & LCTRL_OUTPUT_EMPTY)) +#define SET_OUTPUT_EMPTY() (m_latch_control |= LCTRL_OUTPUT_EMPTY) +#define SET_OUTPUT_FULL() (m_latch_control &= ~LCTRL_OUTPUT_EMPTY) -#define IS_INPUT_EMPTY() (dcs.latch_control & LCTRL_INPUT_EMPTY) -#define IS_INPUT_FULL() (!(dcs.latch_control & LCTRL_INPUT_EMPTY)) -#define SET_INPUT_EMPTY() (dcs.latch_control |= LCTRL_INPUT_EMPTY) -#define SET_INPUT_FULL() (dcs.latch_control &= ~LCTRL_INPUT_EMPTY) +#define IS_INPUT_EMPTY() (m_latch_control & LCTRL_INPUT_EMPTY) +#define IS_INPUT_FULL() (!(m_latch_control & LCTRL_INPUT_EMPTY)) +#define SET_INPUT_EMPTY() (m_latch_control |= LCTRL_INPUT_EMPTY) +#define SET_INPUT_FULL() (m_latch_control &= ~LCTRL_INPUT_EMPTY) /* These are the some of the control register, we dont use them all */ @@ -219,208 +216,45 @@ enum /* these macros are used to reference the SDRC ASIC */ -#define SDRC_ROM_ST ((dcs.sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */ -#define SDRC_ROM_SZ ((dcs.sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */ -#define SDRC_ROM_MS ((dcs.sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */ -#define SDRC_ROM_PG ((dcs.sdrc.reg[0] >> 7) & 7) -#define SDRC_SM_EN ((dcs.sdrc.reg[0] >> 11) & 1) -#define SDRC_SM_BK ((dcs.sdrc.reg[0] >> 12) & 1) -#define SDRC_SMODE ((dcs.sdrc.reg[0] >> 13) & 7) +#define SDRC_ROM_ST ((m_sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */ +#define SDRC_ROM_SZ ((m_sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */ +#define SDRC_ROM_MS ((m_sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */ +#define SDRC_ROM_PG ((m_sdrc.reg[0] >> 7) & 7) +#define SDRC_SM_EN ((m_sdrc.reg[0] >> 11) & 1) +#define SDRC_SM_BK ((m_sdrc.reg[0] >> 12) & 1) +#define SDRC_SMODE ((m_sdrc.reg[0] >> 13) & 7) -#define SDRC_DM_ST ((dcs.sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */ -#define SDRC_DM_REF ((dcs.sdrc.reg[1] >> 4) & 3) -#define SDRC_DM_3WS ((dcs.sdrc.reg[1] >> 7) & 1) -#define SDRC_TFS_INV ((dcs.sdrc.reg[1] >> 8) & 1) -#define SDRC_RES_TFS ((dcs.sdrc.reg[1] >> 10) & 3) -#define SDRC_LED ((dcs.sdrc.reg[1] >> 13) & 1) -#define SDRC_MUTE ((dcs.sdrc.reg[1] >> 14) & 1) -#define SDRC_AREF_ACT ((dcs.sdrc.reg[1] >> 15) & 1) +#define SDRC_DM_ST ((m_sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */ +#define SDRC_DM_REF ((m_sdrc.reg[1] >> 4) & 3) +#define SDRC_DM_3WS ((m_sdrc.reg[1] >> 7) & 1) +#define SDRC_TFS_INV ((m_sdrc.reg[1] >> 8) & 1) +#define SDRC_RES_TFS ((m_sdrc.reg[1] >> 10) & 3) +#define SDRC_LED ((m_sdrc.reg[1] >> 13) & 1) +#define SDRC_MUTE ((m_sdrc.reg[1] >> 14) & 1) +#define SDRC_AREF_ACT ((m_sdrc.reg[1] >> 15) & 1) -#define SDRC_DM_PG ((dcs.sdrc.reg[2] >> 0) & 0x7ff) -#define SDRC_EPM_PG ((dcs.sdrc.reg[2] >> 0) & 0x1fff) +#define SDRC_DM_PG ((m_sdrc.reg[2] >> 0) & 0x7ff) +#define SDRC_EPM_PG ((m_sdrc.reg[2] >> 0) & 0x1fff) /* these macros are used to reference the DSIO ASIC */ -#define DSIO_EMPTY_FIFO ((dcs.dsio.reg[1] >> 0) & 1) -#define DSIO_CUR_OUTPUT ((dcs.dsio.reg[1] >> 4) & 1) -#define DSIO_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1) -#define DSIO_LED ((dcs.dsio.reg[1] >> 13) & 1) -#define DSIO_MUTE ((dcs.dsio.reg[1] >> 14) & 1) +#define DSIO_EMPTY_FIFO ((m_dsio.reg[1] >> 0) & 1) +#define DSIO_CUR_OUTPUT ((m_dsio.reg[1] >> 4) & 1) +#define DSIO_RES_TFS ((m_dsio.reg[1] >> 10) & 1) +#define DSIO_LED ((m_dsio.reg[1] >> 13) & 1) +#define DSIO_MUTE ((m_dsio.reg[1] >> 14) & 1) -#define DSIO_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff) +#define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff) /* these macros are used to reference the DENVER ASIC */ -#define DENV_DSP_SPEED ((dcs.dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */ -#define DENV_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1) -#define DENV_CHANNELS ((dcs.dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */ -#define DENV_LED ((dcs.dsio.reg[1] >> 13) & 1) -#define DENV_MUTE ((dcs.dsio.reg[1] >> 14) & 1) - -#define DENV_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff) - - - -/************************************* - * - * Type definitions - * - *************************************/ - -struct sdrc_state -{ - UINT16 reg[4]; - UINT8 seed; -}; - - -struct dsio_state -{ - UINT16 reg[4]; - UINT8 start_on_next_write; - UINT16 channelbits; -}; - - -struct hle_transfer_state -{ - UINT8 hle_enabled; - INT32 dcs_state; - INT32 state; - INT32 start; - INT32 stop; - INT32 type; - INT32 temp; - INT32 writes_left; - UINT16 sum; - INT32 fifo_entries; - timer_device *watchdog; -}; - - -struct dcs_state -{ - adsp21xx_device *cpu; - address_space *program; - address_space *data; - UINT8 rev; - offs_t polling_offset; - UINT32 polling_count; - - /* sound output */ - UINT8 channels; - UINT16 size; - UINT16 incs; - dmadac_sound_device *dmadac[6]; - timer_device *reg_timer; - timer_device *sport_timer; - timer_device *internal_timer; - INT32 ireg; - UINT16 ireg_base; - UINT16 control_regs[32]; - - /* memory access/booting */ - UINT16 * bootrom; - UINT32 bootrom_words; - UINT16 * sounddata; - UINT32 sounddata_words; - UINT32 sounddata_banks; - UINT16 sounddata_bank; - - /* I/O with the host */ - UINT8 auto_ack; - UINT16 latch_control; - UINT16 input_data; - UINT16 output_data; - UINT16 output_control; - UINT64 output_control_cycles; - UINT8 last_output_full; - UINT8 last_input_empty; - UINT16 progflags; - void (*output_full_cb)(running_machine &, int); - void (*input_empty_cb)(running_machine &, int); - UINT16 (*fifo_data_r)(device_t *device); - UINT16 (*fifo_status_r)(device_t *device); - - /* timers */ - UINT8 timer_enable; - UINT8 timer_ignore; - UINT64 timer_start_cycles; - UINT32 timer_start_count; - UINT32 timer_scale; - UINT32 timer_period; - UINT32 timers_fired; - - UINT16 *sram; - UINT16 *polling_base; - UINT32 *internal_program_ram; - UINT32 *external_program_ram; - - sdrc_state sdrc; - dsio_state dsio; - hle_transfer_state transfer; -}; - - - -/************************************* - * - * Statics - * - *************************************/ - -static dcs_state dcs; - - - -/************************************* - * - * Prototypes - * - *************************************/ - -static DECLARE_READ16_HANDLER( dcs_dataram_r ); -static DECLARE_WRITE16_HANDLER( dcs_dataram_w ); -static DECLARE_WRITE16_HANDLER( dcs_data_bank_select_w ); - -static void sdrc_reset(running_machine &machine); -static DECLARE_READ16_HANDLER( sdrc_r ); -static DECLARE_WRITE16_HANDLER( sdrc_w ); - -static void dsio_reset(running_machine &machine); -static DECLARE_READ16_HANDLER( dsio_r ); -static DECLARE_WRITE16_HANDLER( dsio_w ); - -static void denver_reset(running_machine &machine); -static DECLARE_READ16_HANDLER( denver_r ); -static DECLARE_WRITE16_HANDLER( denver_w ); - -static DECLARE_READ16_HANDLER( adsp_control_r ); -static DECLARE_WRITE16_HANDLER( adsp_control_w ); - -static DECLARE_READ16_HANDLER( latch_status_r ); -static DECLARE_READ16_HANDLER( fifo_input_r ); -static DECLARE_READ16_HANDLER( input_latch_r ); -static DECLARE_WRITE16_HANDLER( input_latch_ack_w ); -static DECLARE_WRITE16_HANDLER( output_latch_w ); -static DECLARE_READ16_HANDLER( output_control_r ); -static DECLARE_WRITE16_HANDLER( output_control_w ); - -static void timer_enable_callback(adsp21xx_device &device, int enable); -static TIMER_DEVICE_CALLBACK( internal_timer_callback ); -static TIMER_DEVICE_CALLBACK( dcs_irq ); -static TIMER_DEVICE_CALLBACK( sport0_irq ); -static void recompute_sample_rate(running_machine &machine); -static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data); - -static DECLARE_READ16_HANDLER( dcs_polling_r ); -static DECLARE_WRITE16_HANDLER( dcs_polling_w ); - -static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback ); -static int preprocess_write(running_machine &machine, UINT16 data); - -static void sdrc_remap_memory(running_machine &machine); +#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */ +#define DENV_RES_TFS ((m_dsio.reg[1] >> 10) & 1) +#define DENV_CHANNELS ((m_dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */ +#define DENV_LED ((m_dsio.reg[1] >> 13) & 1) +#define DENV_MUTE ((m_dsio.reg[1] >> 14) & 1) +#define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff) /************************************* @@ -430,69 +264,66 @@ static void sdrc_remap_memory(running_machine &machine); *************************************/ /* DCS 2k memory map */ -static ADDRESS_MAP_START( dcs_2k_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( dcs_2k_program_map, AS_PROGRAM, 32, dcs_audio_device ) AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint") AM_RANGE(0x0800, 0x0fff) AM_RAM AM_SHARE("dcsext") AM_RANGE(0x1000, 0x17ff) AM_RAM AM_SHARE("dcsext") AM_RANGE(0x1800, 0x1fff) AM_RAM AM_SHARE("dcsext") ADDRESS_MAP_END -static ADDRESS_MAP_START( dcs_2k_data_map, AS_DATA, 16, driver_device ) - AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE_LEGACY(dcs_dataram_r, dcs_dataram_w) +static ADDRESS_MAP_START( dcs_2k_data_map, AS_DATA, 16, dcs_audio_device ) + AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("databank") - AM_RANGE(0x3000, 0x33ff) AM_WRITE_LEGACY(dcs_data_bank_select_w) - AM_RANGE(0x3400, 0x37ff) AM_READWRITE_LEGACY(input_latch_r, output_latch_w) + AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) + AM_RANGE(0x3400, 0x37ff) AM_READWRITE(input_latch_r, output_latch_w) AM_RANGE(0x3800, 0x39ff) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END /* DCS 2k with UART memory map */ -static ADDRESS_MAP_START( dcs_2k_uart_data_map, AS_DATA, 16, driver_device ) - AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE_LEGACY(dcs_dataram_r, dcs_dataram_w) +static ADDRESS_MAP_START( dcs_2k_uart_data_map, AS_DATA, 16, dcs_audio_device ) + AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("databank") - AM_RANGE(0x3000, 0x33ff) AM_WRITE_LEGACY(dcs_data_bank_select_w) + AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) AM_RANGE(0x3400, 0x3402) AM_NOP /* UART (ignored) */ - AM_RANGE(0x3403, 0x3403) AM_READWRITE_LEGACY(input_latch_r, output_latch_w) + AM_RANGE(0x3403, 0x3403) AM_READWRITE(input_latch_r, output_latch_w) AM_RANGE(0x3404, 0x3405) AM_NOP /* UART (ignored) */ AM_RANGE(0x3800, 0x39ff) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END /* DCS 8k memory map */ -static ADDRESS_MAP_START( dcs_8k_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( dcs_8k_program_map, AS_PROGRAM, 32, dcs_audio_device ) AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint") AM_RANGE(0x0800, 0x1fff) AM_RAM AM_SHARE("dcsext") ADDRESS_MAP_END -static ADDRESS_MAP_START( dcs_8k_data_map, AS_DATA, 16, driver_device ) +static ADDRESS_MAP_START( dcs_8k_data_map, AS_DATA, 16, dcs_audio_device ) AM_RANGE(0x0000, 0x07ff) AM_RAM - AM_RANGE(0x0800, 0x1fff) AM_READWRITE_LEGACY(dcs_dataram_r, dcs_dataram_w) + AM_RANGE(0x0800, 0x1fff) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("databank") - AM_RANGE(0x3000, 0x33ff) AM_WRITE_LEGACY(dcs_data_bank_select_w) - AM_RANGE(0x3400, 0x37ff) AM_READWRITE_LEGACY(input_latch_r, output_latch_w) + AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) + AM_RANGE(0x3400, 0x37ff) AM_READWRITE(input_latch_r, output_latch_w) AM_RANGE(0x3800, 0x39ff) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END -// to be removed once DCS is modernised -#define AM_READWRITE16_LEGACY(_rhandler, _whandler, _unitmask) \ - curentry->set_handler(_rhandler, #_rhandler, _whandler, #_whandler, _unitmask); /* Williams WPC DCS/Security Pinball */ -static ADDRESS_MAP_START( dcs_wpc_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( dcs_wpc_program_map, AS_PROGRAM, 32, dcs_audio_device ) AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("dcsint") AM_RANGE(0x0800, 0x2fff) AM_RAM AM_SHARE("dcsext") - AM_RANGE(0x3000, 0x3001) AM_READWRITE16_LEGACY(input_latch_r, output_latch_w,0xffff) + AM_RANGE(0x3000, 0x3001) AM_READWRITE16(input_latch_r, output_latch_w,0xffff) ADDRESS_MAP_END -static ADDRESS_MAP_START( dcs_wpc_data_map, AS_DATA, 16, driver_device ) - AM_RANGE(0x0000, 0x1fff) AM_READWRITE_LEGACY(dcs_dataram_r, dcs_dataram_w) +static ADDRESS_MAP_START( dcs_wpc_data_map, AS_DATA, 16, dcs_audio_device ) + AM_RANGE(0x0000, 0x1fff) AM_READWRITE(dcs_dataram_r, dcs_dataram_w) AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("databank") - AM_RANGE(0x3000, 0x33ff) AM_WRITE_LEGACY(dcs_data_bank_select_w) + AM_RANGE(0x3000, 0x33ff) AM_WRITE(dcs_data_bank_select_w) AM_RANGE(0x3800, 0x39ff) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END /************************************* @@ -501,39 +332,39 @@ ADDRESS_MAP_END * *************************************/ -static ADDRESS_MAP_START( dcs2_2115_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( dcs2_2115_program_map, AS_PROGRAM, 32, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint") ADDRESS_MAP_END -static ADDRESS_MAP_START( dcs2_2104_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( dcs2_2104_program_map, AS_PROGRAM, 32, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x01ff) AM_RAM AM_SHARE("dcsint") ADDRESS_MAP_END -static ADDRESS_MAP_START( dcs2_2115_data_map, AS_DATA, 16, driver_device ) +static ADDRESS_MAP_START( dcs2_2115_data_map, AS_DATA, 16, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0400, 0x0400) AM_READWRITE_LEGACY(input_latch_r, input_latch_ack_w) - AM_RANGE(0x0401, 0x0401) AM_WRITE_LEGACY(output_latch_w) - AM_RANGE(0x0402, 0x0402) AM_READWRITE_LEGACY(output_control_r, output_control_w) - AM_RANGE(0x0403, 0x0403) AM_READ_LEGACY(latch_status_r) - AM_RANGE(0x0404, 0x0407) AM_READ_LEGACY(fifo_input_r) - AM_RANGE(0x0480, 0x0483) AM_READWRITE_LEGACY(sdrc_r, sdrc_w) + AM_RANGE(0x0400, 0x0400) AM_READWRITE(input_latch_r, input_latch_ack_w) + AM_RANGE(0x0401, 0x0401) AM_WRITE(output_latch_w) + AM_RANGE(0x0402, 0x0402) AM_READWRITE(output_control_r, output_control_w) + AM_RANGE(0x0403, 0x0403) AM_READ(latch_status_r) + AM_RANGE(0x0404, 0x0407) AM_READ(fifo_input_r) + AM_RANGE(0x0480, 0x0483) AM_READWRITE(sdrc_r, sdrc_w) AM_RANGE(0x3800, 0x39ff) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END -static ADDRESS_MAP_START( dcs2_2104_data_map, AS_DATA, 16, driver_device ) +static ADDRESS_MAP_START( dcs2_2104_data_map, AS_DATA, 16, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0400, 0x0400) AM_READWRITE_LEGACY(input_latch_r, input_latch_ack_w) - AM_RANGE(0x0401, 0x0401) AM_WRITE_LEGACY(output_latch_w) - AM_RANGE(0x0402, 0x0402) AM_READWRITE_LEGACY(output_control_r, output_control_w) - AM_RANGE(0x0403, 0x0403) AM_READ_LEGACY(latch_status_r) - AM_RANGE(0x0404, 0x0407) AM_READ_LEGACY(fifo_input_r) - AM_RANGE(0x0480, 0x0483) AM_READWRITE_LEGACY(sdrc_r, sdrc_w) + AM_RANGE(0x0400, 0x0400) AM_READWRITE(input_latch_r, input_latch_ack_w) + AM_RANGE(0x0401, 0x0401) AM_WRITE(output_latch_w) + AM_RANGE(0x0402, 0x0402) AM_READWRITE(output_control_r, output_control_w) + AM_RANGE(0x0403, 0x0403) AM_READ(latch_status_r) + AM_RANGE(0x0404, 0x0407) AM_READ(fifo_input_r) + AM_RANGE(0x0480, 0x0483) AM_READWRITE(sdrc_r, sdrc_w) AM_RANGE(0x3800, 0x38ff) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END @@ -544,28 +375,28 @@ ADDRESS_MAP_END * *************************************/ -static ADDRESS_MAP_START( dsio_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( dsio_program_map, AS_PROGRAM, 32, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint") ADDRESS_MAP_END -static ADDRESS_MAP_START( dsio_data_map, AS_DATA, 16, driver_device ) +static ADDRESS_MAP_START( dsio_data_map, AS_DATA, 16, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x03ff) AM_RAMBANK("databank") AM_RANGE(0x0400, 0x3fdf) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END -static ADDRESS_MAP_START( dsio_io_map, AS_IO, 16, driver_device ) +static ADDRESS_MAP_START( dsio_io_map, AS_IO, 16, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0400, 0x0400) AM_READWRITE_LEGACY(input_latch_r, input_latch_ack_w) - AM_RANGE(0x0401, 0x0401) AM_WRITE_LEGACY(output_latch_w) - AM_RANGE(0x0402, 0x0402) AM_READWRITE_LEGACY(output_control_r, output_control_w) - AM_RANGE(0x0403, 0x0403) AM_READ_LEGACY(latch_status_r) - AM_RANGE(0x0404, 0x0407) AM_READ_LEGACY(fifo_input_r) - AM_RANGE(0x0480, 0x0483) AM_READWRITE_LEGACY(dsio_r, dsio_w) + AM_RANGE(0x0400, 0x0400) AM_READWRITE(input_latch_r, input_latch_ack_w) + AM_RANGE(0x0401, 0x0401) AM_WRITE(output_latch_w) + AM_RANGE(0x0402, 0x0402) AM_READWRITE(output_control_r, output_control_w) + AM_RANGE(0x0403, 0x0403) AM_READ(latch_status_r) + AM_RANGE(0x0404, 0x0407) AM_READ(fifo_input_r) + AM_RANGE(0x0480, 0x0483) AM_READWRITE(dsio_r, dsio_w) ADDRESS_MAP_END @@ -576,28 +407,28 @@ ADDRESS_MAP_END * *************************************/ -static ADDRESS_MAP_START( denver_program_map, AS_PROGRAM, 32, driver_device ) +static ADDRESS_MAP_START( denver_program_map, AS_PROGRAM, 32, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint") ADDRESS_MAP_END -static ADDRESS_MAP_START( denver_data_map, AS_DATA, 16, driver_device ) +static ADDRESS_MAP_START( denver_data_map, AS_DATA, 16, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("databank") AM_RANGE(0x0800, 0x3fdf) AM_RAM - AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w) + AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w) ADDRESS_MAP_END -static ADDRESS_MAP_START( denver_io_map, AS_IO, 16, driver_device ) +static ADDRESS_MAP_START( denver_io_map, AS_IO, 16, dcs_audio_device ) ADDRESS_MAP_UNMAP_HIGH - AM_RANGE(0x0400, 0x0400) AM_READWRITE_LEGACY(input_latch_r, input_latch_ack_w) - AM_RANGE(0x0401, 0x0401) AM_WRITE_LEGACY(output_latch_w) - AM_RANGE(0x0402, 0x0402) AM_READWRITE_LEGACY(output_control_r, output_control_w) - AM_RANGE(0x0403, 0x0403) AM_READ_LEGACY(latch_status_r) - AM_RANGE(0x0404, 0x0407) AM_READ_LEGACY(fifo_input_r) - AM_RANGE(0x0480, 0x0483) AM_READWRITE_LEGACY(denver_r, denver_w) + AM_RANGE(0x0400, 0x0400) AM_READWRITE(input_latch_r, input_latch_ack_w) + AM_RANGE(0x0401, 0x0401) AM_WRITE(output_latch_w) + AM_RANGE(0x0402, 0x0402) AM_READWRITE(output_control_r, output_control_w) + AM_RANGE(0x0403, 0x0403) AM_READ(latch_status_r) + AM_RANGE(0x0404, 0x0407) AM_READ(fifo_input_r) + AM_RANGE(0x0480, 0x0483) AM_READWRITE(denver_r, denver_w) ADDRESS_MAP_END @@ -610,9 +441,9 @@ ADDRESS_MAP_END static const adsp21xx_config adsp_config = { - NULL, /* callback for serial receive */ - sound_tx_callback, /* callback for serial transmit */ - timer_enable_callback /* callback for timer fired */ + DEVCB_NULL, /* callback for serial receive */ + DEVCB_DEVICE_MEMBER32(DEVICE_SELF_OWNER, dcs_audio_device, sound_tx_callback), /* callback for serial transmit */ + DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, dcs_audio_device,timer_enable_callback) /* callback for timer fired */ }; @@ -630,8 +461,8 @@ MACHINE_CONFIG_FRAGMENT( dcs_audio_2k ) MCFG_CPU_PROGRAM_MAP(dcs_2k_program_map) MCFG_CPU_DATA_MAP(dcs_2k_data_map) - MCFG_TIMER_ADD("dcs_reg_timer", dcs_irq) - MCFG_TIMER_ADD("dcs_int_timer", internal_timer_callback) + MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq) + MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback) MCFG_SPEAKER_STANDARD_MONO("mono") @@ -675,10 +506,10 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_2115 ) MCFG_CPU_PROGRAM_MAP(dcs2_2115_program_map) MCFG_CPU_DATA_MAP(dcs2_2115_data_map) - MCFG_TIMER_ADD("dcs_reg_timer", dcs_irq) - MCFG_TIMER_ADD("dcs_sport_timer", sport0_irq) - MCFG_TIMER_ADD("dcs_int_timer", internal_timer_callback) - MCFG_TIMER_ADD("dcs_hle_timer", transfer_watchdog_callback) + MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq) + MCFG_TIMER_DEVICE_ADD("dcs_sport_timer", DEVICE_SELF, dcs_audio_device, sport0_irq) + MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback) + MCFG_TIMER_DEVICE_ADD("dcs_hle_timer", DEVICE_SELF, dcs_audio_device, transfer_watchdog_callback) MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -712,8 +543,8 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_dsio ) MCFG_CPU_DATA_MAP(dsio_data_map) MCFG_CPU_IO_MAP(dsio_io_map) - MCFG_TIMER_ADD("dcs_reg_timer", dcs_irq) - MCFG_TIMER_ADD("dcs_int_timer", internal_timer_callback) + MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq) + MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback) MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -739,8 +570,8 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_denver ) MCFG_CPU_DATA_MAP(denver_data_map) MCFG_CPU_IO_MAP(denver_io_map) - MCFG_TIMER_ADD("dcs_reg_timer", dcs_irq) - MCFG_TIMER_ADD("dcs_int_timer", internal_timer_callback) + MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq) + MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback) MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") @@ -771,54 +602,54 @@ MACHINE_CONFIG_END * *************************************/ -static void dcs_boot(running_machine &machine) +void dcs_audio_device::dcs_boot() { UINT8 buffer[0x1000]; // UINT32 max_banks; UINT16 *base; int i; - switch (dcs.rev) + switch (m_rev) { /* rev 1: use the last set data bank to boot from */ case 1: /* determine the base */ -// max_banks = dcs.bootrom_words / 0x1000; - base = dcs.bootrom + ((dcs.sounddata_bank * 0x1000) % dcs.bootrom_words); +// max_banks = m_bootrom_words / 0x1000; + base = m_bootrom + ((m_sounddata_bank * 0x1000) % m_bootrom_words); /* convert from 16-bit data to 8-bit data and boot */ for (i = 0; i < 0x1000; i++) buffer[i] = base[i]; - dcs.cpu->load_boot_data(buffer, dcs.internal_program_ram); + m_cpu->load_boot_data(buffer, m_internal_program_ram); break; /* rev 2: use the ROM page in the SDRC to boot from */ case 2: /* determine the base */ - if (dcs.bootrom == dcs.sounddata) + if (m_bootrom == m_sounddata) { /* EPROM case: page is selected from the page register */ - base = dcs.bootrom + ((SDRC_EPM_PG * 0x1000) % dcs.bootrom_words); + base = m_bootrom + ((SDRC_EPM_PG * 0x1000) % m_bootrom_words); } else { /* DRAM case: page is selected from the ROM page register */ - base = dcs.bootrom + ((SDRC_ROM_PG * 0x1000) % dcs.bootrom_words); + base = m_bootrom + ((SDRC_ROM_PG * 0x1000) % m_bootrom_words); } /* convert from 16-bit data to 8-bit data and boot */ for (i = 0; i < 0x1000; i++) buffer[i] = base[i]; - dcs.cpu->load_boot_data(buffer, dcs.internal_program_ram); + m_cpu->load_boot_data(buffer, m_internal_program_ram); break; /* rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA */ case 3: case 4: - dcs.cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); - dcs.dsio.start_on_next_write = 0; + m_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); + m_dsio.start_on_next_write = 0; break; } } @@ -831,71 +662,69 @@ static void dcs_boot(running_machine &machine) * *************************************/ -static TIMER_CALLBACK( dcs_reset ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset ) { if (LOG_DCS_IO) logerror("dcs_reset\n"); /* reset the memory banking */ - switch (dcs.rev) + switch (m_rev) { /* rev 1: just reset the bank to 0 */ case 1: - dcs.sounddata_bank = 0; - machine.root_device().membank("databank")->set_entry(0); + m_sounddata_bank = 0; + membank("databank")->set_entry(0); break; /* rev 2: reset the SDRC ASIC */ case 2: - sdrc_reset(machine); + sdrc_reset(); break; /* rev 3: reset the DSIO ASIC */ case 3: - dsio_reset(machine); + dsio_reset(); break; /* rev 4: reset the Denver ASIC */ case 4: - denver_reset(machine); + denver_reset(); break; } - /* initialize our state structure and install the transmit callback */ - dcs.size = 0; - dcs.incs = 0; - dcs.ireg = 0; + m_size = 0; + m_incs = 0; + m_ireg = 0; /* initialize the ADSP control regs */ - memset(dcs.control_regs, 0, sizeof(dcs.control_regs)); - + memset(m_control_regs, 0, sizeof(m_control_regs)); /* clear all interrupts */ - dcs.cpu->set_input_line(ADSP2105_IRQ0, CLEAR_LINE); - dcs.cpu->set_input_line(ADSP2105_IRQ1, CLEAR_LINE); - dcs.cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE); + m_cpu->set_input_line(ADSP2105_IRQ0, CLEAR_LINE); + m_cpu->set_input_line(ADSP2105_IRQ1, CLEAR_LINE); + m_cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE); /* initialize the comm bits */ SET_INPUT_EMPTY(); SET_OUTPUT_EMPTY(); - if (!dcs.last_input_empty && dcs.input_empty_cb) - (*dcs.input_empty_cb)(machine, dcs.last_input_empty = 1); - if (dcs.last_output_full && dcs.output_full_cb) - (*dcs.output_full_cb)(machine, dcs.last_output_full = 0); + if (!m_last_input_empty && !m_input_empty_cb.isnull()) + m_input_empty_cb(m_last_input_empty = 1); + if (m_last_output_full && !m_output_full_cb.isnull()) + m_output_full_cb(m_last_output_full = 0); /* boot */ - dcs_boot(machine); + dcs_boot(); /* reset timers */ - dcs.timer_enable = 0; - dcs.timer_scale = 1; - dcs.internal_timer->reset(); + m_timer_enable = 0; + m_timer_scale = 1; + m_internal_timer->reset(); /* start the SPORT0 timer */ - if (dcs.sport_timer != NULL) - dcs.sport_timer->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000)); + if (m_sport_timer != NULL) + m_sport_timer->adjust(attotime::from_hz(1000), 0, attotime::from_hz(1000)); /* reset the HLE transfer states */ - dcs.transfer.dcs_state = dcs.transfer.state = 0; + m_transfer.dcs_state = m_transfer.state = 0; } @@ -906,179 +735,237 @@ static TIMER_CALLBACK( dcs_reset ) * *************************************/ -static void dcs_register_state(running_machine &machine) +void dcs_audio_device::dcs_register_state() { - machine.save().save_item(NAME(dcs.sdrc.reg)); - machine.save().save_item(NAME(dcs.sdrc.seed)); + save_item(NAME(m_sdrc.reg)); + save_item(NAME(m_sdrc.seed)); - machine.save().save_item(NAME(dcs.dsio.reg)); - machine.save().save_item(NAME(dcs.dsio.start_on_next_write)); - machine.save().save_item(NAME(dcs.dsio.channelbits)); + save_item(NAME(m_dsio.reg)); + save_item(NAME(m_dsio.start_on_next_write)); + save_item(NAME(m_dsio.channelbits)); - machine.save().save_item(NAME(dcs.channels)); - machine.save().save_item(NAME(dcs.size)); - machine.save().save_item(NAME(dcs.incs)); - machine.save().save_item(NAME(dcs.ireg)); - machine.save().save_item(NAME(dcs.ireg_base)); - machine.save().save_item(NAME(dcs.control_regs)); + save_item(NAME(m_channels)); + save_item(NAME(m_size)); + save_item(NAME(m_incs)); + save_item(NAME(m_ireg)); + save_item(NAME(m_ireg_base)); + save_item(NAME(m_control_regs)); - machine.save().save_item(NAME(dcs.sounddata_bank)); + save_item(NAME(m_sounddata_bank)); - machine.save().save_item(NAME(dcs.auto_ack)); - machine.save().save_item(NAME(dcs.latch_control)); - machine.save().save_item(NAME(dcs.input_data)); - machine.save().save_item(NAME(dcs.output_data)); - machine.save().save_item(NAME(dcs.output_control)); - machine.save().save_item(NAME(dcs.output_control_cycles)); - machine.save().save_item(NAME(dcs.last_output_full)); - machine.save().save_item(NAME(dcs.last_input_empty)); - machine.save().save_item(NAME(dcs.progflags)); + save_item(NAME(m_auto_ack)); + save_item(NAME(m_latch_control)); + save_item(NAME(m_input_data)); + save_item(NAME(m_output_data)); + save_item(NAME(m_output_control)); + save_item(NAME(m_output_control_cycles)); + save_item(NAME(m_last_output_full)); + save_item(NAME(m_last_input_empty)); + save_item(NAME(m_progflags)); - machine.save().save_item(NAME(dcs.timer_enable)); - machine.save().save_item(NAME(dcs.timer_ignore)); - machine.save().save_item(NAME(dcs.timer_start_cycles)); - machine.save().save_item(NAME(dcs.timer_start_count)); - machine.save().save_item(NAME(dcs.timer_scale)); - machine.save().save_item(NAME(dcs.timer_period)); - machine.save().save_item(NAME(dcs.timers_fired)); + save_item(NAME(m_timer_enable)); + save_item(NAME(m_timer_ignore)); + save_item(NAME(m_timer_start_cycles)); + save_item(NAME(m_timer_start_count)); + save_item(NAME(m_timer_scale)); + save_item(NAME(m_timer_period)); + save_item(NAME(m_timers_fired)); - machine.save().save_item(NAME(dcs.transfer.dcs_state)); - machine.save().save_item(NAME(dcs.transfer.state)); - machine.save().save_item(NAME(dcs.transfer.start)); - machine.save().save_item(NAME(dcs.transfer.stop)); - machine.save().save_item(NAME(dcs.transfer.type)); - machine.save().save_item(NAME(dcs.transfer.temp)); - machine.save().save_item(NAME(dcs.transfer.writes_left)); - machine.save().save_item(NAME(dcs.transfer.sum)); - machine.save().save_item(NAME(dcs.transfer.fifo_entries)); + save_item(NAME(m_transfer.dcs_state)); + save_item(NAME(m_transfer.state)); + save_item(NAME(m_transfer.start)); + save_item(NAME(m_transfer.stop)); + save_item(NAME(m_transfer.type)); + save_item(NAME(m_transfer.temp)); + save_item(NAME(m_transfer.writes_left)); + save_item(NAME(m_transfer.sum)); + save_item(NAME(m_transfer.fifo_entries)); - if (dcs.sram != NULL) - machine.save().save_pointer(NAME(dcs.sram), 0x8000*4 / sizeof(dcs.sram[0])); + if (m_sram != NULL) + save_pointer(NAME(m_sram), 0x8000*4 / sizeof(m_sram[0])); - if (dcs.rev == 2) - machine.save().register_postload(save_prepost_delegate(FUNC(sdrc_remap_memory), &machine)); + if (m_rev == 2) + machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::sdrc_remap_memory), this)); } -void dcs_init(running_machine &machine) -{ - memset(&dcs, 0, sizeof(dcs)); - dcs.sram = NULL; + +//------------------------------------------------- +// dcs_audio_device - constructor +//------------------------------------------------- - dcs.internal_program_ram = (UINT32 *)machine.root_device().memshare("dcsint")->ptr(); - dcs.external_program_ram = (UINT32 *)machine.root_device().memshare("dcsext")->ptr(); +dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + m_cpu(NULL), + m_program(NULL), + m_data(NULL), + m_rev(0), + m_polling_offset(0), + m_polling_count(0), + m_channels(0), + m_size(0), + m_incs(0), + m_reg_timer(NULL), + m_sport_timer(NULL), + m_internal_timer(NULL), + m_ireg(0), + m_ireg_base(0), + m_bootrom(NULL), + m_bootrom_words(0), + m_sounddata(NULL), + m_sounddata_words(0), + m_sounddata_banks(0), + m_sounddata_bank(0), + m_auto_ack(0), + m_latch_control(0), + m_input_data(0), + m_output_data(0), + m_output_control(0), + m_output_control_cycles(0), + m_last_output_full(0), + m_last_input_empty(0), + m_progflags(0), + m_timer_enable(0), + m_timer_ignore(0), + m_timer_start_cycles(0), + m_timer_start_count(0), + m_timer_scale(0), + m_timer_period(0), + m_timers_fired(0), + m_sram(NULL), + m_polling_base(NULL), + m_internal_program_ram(NULL), + m_external_program_ram(NULL), + m_dram_in_mb(0) +{ + m_dmadac[0] = m_dmadac[1] = m_dmadac[2] = m_dmadac[3] = m_dmadac[4] = m_dmadac[5] = NULL; + memset(m_control_regs, 0, sizeof(m_control_regs)); + memset(&m_sdrc, 0, sizeof(m_sdrc)); + memset(&m_dsio, 0, sizeof(m_dsio)); + memset(&m_transfer, 0, sizeof(m_transfer)); +} + + +void dcs_audio_device::device_start() +{ + m_sram = NULL; + + m_internal_program_ram = (UINT32 *)memshare("dcsint")->ptr(); + m_external_program_ram = (UINT32 *)memshare("dcsext")->ptr(); /* find the DCS CPU and the sound ROMs */ - dcs.cpu = machine.device("dcs"); - dcs.program = &dcs.cpu->space(AS_PROGRAM); - dcs.data = &dcs.cpu->space(AS_DATA); - dcs.rev = 1; - dcs.channels = 1; - dcs.dmadac[0] = machine.device("dac"); + m_cpu = subdevice("dcs"); + if (m_cpu != NULL && !m_cpu->started()) + throw device_missing_dependencies(); + + m_program = &m_cpu->space(AS_PROGRAM); + m_data = &m_cpu->space(AS_DATA); + m_rev = 1; + m_channels = 1; + m_dmadac[0] = subdevice("dac"); /* configure boot and sound ROMs */ - dcs.bootrom = (UINT16 *)machine.root_device().memregion("dcs")->base(); - dcs.bootrom_words = machine.root_device().memregion("dcs")->bytes() / 2; - dcs.sounddata = dcs.bootrom; - dcs.sounddata_words = dcs.bootrom_words; - dcs.sounddata_banks = dcs.sounddata_words / 0x1000; - machine.root_device().membank("databank")->configure_entries(0, dcs.sounddata_banks, dcs.sounddata, 0x1000*2); + m_bootrom = (UINT16 *)machine().root_device().memregion("dcs")->base(); + m_bootrom_words = machine().root_device().memregion("dcs")->bytes() / 2; + m_sounddata = m_bootrom; + m_sounddata_words = m_bootrom_words; + m_sounddata_banks = m_sounddata_words / 0x1000; + membank("databank")->configure_entries(0, m_sounddata_banks, m_sounddata, 0x1000*2); /* create the timers */ - dcs.internal_timer = machine.device("dcs_int_timer"); - dcs.reg_timer = machine.device("dcs_reg_timer"); + m_internal_timer = subdevice("dcs_int_timer"); + m_reg_timer = subdevice("dcs_reg_timer"); /* non-RAM based automatically acks */ - dcs.auto_ack = TRUE; - + m_auto_ack = TRUE; /* register for save states */ - dcs_register_state(machine); - + dcs_register_state(); /* reset the system */ - dcs_reset(machine, NULL, 0); + dcs_reset(NULL, 0); } -void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset) +void dcs2_audio_device::device_start() { int soundbank_words; - memset(&dcs, 0, sizeof(dcs)); - dcs.internal_program_ram = (UINT32 *)machine.root_device().memshare("dcsint")->ptr(); - dcs.external_program_ram = (UINT32 *)machine.root_device().memshare("dcsext")->ptr(); + m_internal_program_ram = (UINT32 *)memshare("dcsint")->ptr(); + m_external_program_ram = (UINT32 *)memshare("dcsext")->ptr(); /* find the DCS CPU and the sound ROMs */ - dcs.cpu = machine.device("dcs2"); - dcs.rev = 2; + m_cpu = subdevice("dcs2"); + m_rev = 2; soundbank_words = 0x1000; - if (dcs.cpu == NULL) + if (m_cpu == NULL) { - dcs.cpu = machine.device("dsio"); - dcs.rev = 3; + m_cpu = subdevice("dsio"); + m_rev = 3; soundbank_words = 0x400; } - if (dcs.cpu == NULL) + if (m_cpu == NULL) { - dcs.cpu = machine.device("denver"); - dcs.rev = 4; + m_cpu = subdevice("denver"); + m_rev = 4; soundbank_words = 0x800; } - dcs.program = &dcs.cpu->space(AS_PROGRAM); - dcs.data = &dcs.cpu->space(AS_DATA); - dcs.channels = 2; - dcs.dmadac[0] = machine.device("dac1"); - dcs.dmadac[1] = machine.device("dac2"); + if (m_cpu != NULL && !m_cpu->started()) + throw device_missing_dependencies(); + + m_program = &m_cpu->space(AS_PROGRAM); + m_data = &m_cpu->space(AS_DATA); + m_channels = 2; + m_dmadac[0] = subdevice("dac1"); + m_dmadac[1] = subdevice("dac2"); /* always boot from the base of "dcs" */ - dcs.bootrom = (UINT16 *)machine.root_device().memregion("dcs")->base(); - dcs.bootrom_words = machine.root_device().memregion("dcs")->bytes() / 2; + m_bootrom = (UINT16 *)machine().root_device().memregion("dcs")->base(); + m_bootrom_words = machine().root_device().memregion("dcs")->bytes() / 2; /* supports both RAM and ROM variants */ - if (dram_in_mb != 0) + if (m_dram_in_mb != 0) { - dcs.sounddata = auto_alloc_array(machine, UINT16, dram_in_mb << (20-1)); - dcs.sounddata_words = (dram_in_mb << 20) / 2; + m_sounddata = auto_alloc_array(machine(), UINT16, m_dram_in_mb << (20-1)); + m_sounddata_words = (m_dram_in_mb << 20) / 2; } else { - dcs.sounddata = dcs.bootrom; - dcs.sounddata_words = dcs.bootrom_words; + m_sounddata = m_bootrom; + m_sounddata_words = m_bootrom_words; } - dcs.sounddata_banks = dcs.sounddata_words / soundbank_words; - if (dcs.rev != 2) - machine.root_device().membank("databank")->configure_entries(0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2); + m_sounddata_banks = m_sounddata_words / soundbank_words; + if (m_rev != 2) + membank("databank")->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words*2); /* allocate memory for the SRAM */ - dcs.sram = auto_alloc_array(machine, UINT16, 0x8000*4/2); + m_sram = auto_alloc_array(machine(), UINT16, 0x8000*4/2); /* create the timers */ - dcs.internal_timer = machine.device("dcs_int_timer"); - dcs.reg_timer = machine.device("dcs_reg_timer"); - dcs.sport_timer = machine.device("dcs_sport_timer"); + m_internal_timer = subdevice("dcs_int_timer"); + m_reg_timer = subdevice("dcs_reg_timer"); + m_sport_timer = subdevice("dcs_sport_timer"); /* we don't do auto-ack by default */ - dcs.auto_ack = FALSE; + m_auto_ack = FALSE; /* install the speedup handler */ - dcs.polling_offset = polling_offset; - if (polling_offset) - dcs.polling_base = dcs.cpu->space(AS_DATA).install_legacy_readwrite_handler(dcs.polling_offset, dcs.polling_offset, FUNC(dcs_polling_r), FUNC(dcs_polling_w)); + if (m_polling_offset) + m_polling_base = m_cpu->space(AS_DATA).install_readwrite_handler(m_polling_offset, m_polling_offset, read16_delegate(FUNC(dcs_audio_device::dcs_polling_r),this), write16_delegate(FUNC(dcs_audio_device::dcs_polling_w),this)); /* allocate a watchdog timer for HLE transfers */ - dcs.transfer.hle_enabled = (ENABLE_HLE_TRANSFERS && dram_in_mb != 0); - if (dcs.transfer.hle_enabled) - dcs.transfer.watchdog = machine.device("dcs_hle_timer"); + m_transfer.hle_enabled = (ENABLE_HLE_TRANSFERS && m_dram_in_mb != 0); + if (m_transfer.hle_enabled) + m_transfer.watchdog = subdevice("dcs_hle_timer"); /* register for save states */ - dcs_register_state(machine); + dcs_register_state(); /* reset the system */ - dcs_reset(machine, NULL, 0); + dcs_reset(NULL, 0); } -void dcs_set_auto_ack(running_machine &machine, int state) +void dcs_audio_device::set_auto_ack(int state) { - dcs.auto_ack = state; + m_auto_ack = state; } @@ -1089,28 +976,28 @@ void dcs_set_auto_ack(running_machine &machine, int state) * *************************************/ -static READ16_HANDLER( dcs_dataram_r ) +READ16_MEMBER( dcs_audio_device::dcs_dataram_r ) { - return dcs.external_program_ram[offset] >> 8; + return m_external_program_ram[offset] >> 8; } -static WRITE16_HANDLER( dcs_dataram_w ) +WRITE16_MEMBER( dcs_audio_device::dcs_dataram_w ) { - UINT16 newdata = dcs.external_program_ram[offset] >> 8; + UINT16 newdata = m_external_program_ram[offset] >> 8; COMBINE_DATA(&newdata); - dcs.external_program_ram[offset] = (newdata << 8) | (dcs.external_program_ram[offset] & 0xff); + m_external_program_ram[offset] = (newdata << 8) | (m_external_program_ram[offset] & 0xff); } -static WRITE16_HANDLER( dcs_data_bank_select_w ) +WRITE16_MEMBER( dcs_audio_device::dcs_data_bank_select_w ) { - dcs.sounddata_bank = data & 0x7ff; - space.machine().root_device().membank("databank")->set_entry(dcs.sounddata_bank % dcs.sounddata_banks); + m_sounddata_bank = data & 0x7ff; + membank("databank")->set_entry(m_sounddata_bank % m_sounddata_banks); /* bit 11 = sound board led */ #if 0 - set_led_status(space.machine(), 2, data & 0x800); + set_led_status(machine(), 2, data & 0x800); #endif } @@ -1122,61 +1009,61 @@ static WRITE16_HANDLER( dcs_data_bank_select_w ) * *************************************/ -INLINE void sdrc_update_bank_pointers(running_machine &machine) +void dcs_audio_device::sdrc_update_bank_pointers() { if (SDRC_SM_EN != 0) { int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; /* update the bank pointer based on whether we are ROM-based or RAM-based */ - if (dcs.bootrom == dcs.sounddata) + if (m_bootrom == m_sounddata) { /* ROM-based; use the memory page to select from ROM */ if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) - machine.root_device().membank("rompage")->set_base(&dcs.sounddata[(SDRC_EPM_PG * pagesize) % dcs.sounddata_words]); + membank("rompage")->set_base(&m_sounddata[(SDRC_EPM_PG * pagesize) % m_sounddata_words]); } else { /* RAM-based; use the ROM page to select from ROM, and the memory page to select from RAM */ if (SDRC_ROM_MS == 1 && SDRC_ROM_ST != 3) - machine.root_device().membank("rompage")->set_base(&dcs.bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % dcs.bootrom_words]); + membank("rompage")->set_base(&m_bootrom[(SDRC_ROM_PG * 4096 /*pagesize*/) % m_bootrom_words]); if (SDRC_DM_ST != 0) - machine.root_device().membank("drampage")->set_base(&dcs.sounddata[(SDRC_DM_PG * 1024) % dcs.sounddata_words]); + membank("drampage")->set_base(&m_sounddata[(SDRC_DM_PG * 1024) % m_sounddata_words]); } } } -static void sdrc_remap_memory(running_machine &machine) +void dcs_audio_device::sdrc_remap_memory() { /* if SRAM disabled, clean it out */ if (SDRC_SM_EN == 0) { - dcs.program->unmap_readwrite(0x0800, 0x3fff); - dcs.data->unmap_readwrite(0x0800, 0x37ff); + m_program->unmap_readwrite(0x0800, 0x3fff); + m_data->unmap_readwrite(0x0800, 0x37ff); } /* otherwise, map the SRAM */ else { /* first start with a clean program map */ - dcs.program->install_ram(0x0800, 0x3fff, dcs.sram + 0x4800); + m_program->install_ram(0x0800, 0x3fff, m_sram + 0x4800); /* set up the data map based on the SRAM banking */ /* map 0: ram from 0800-37ff */ if (SDRC_SM_BK == 0) { - dcs.data->install_ram(0x0800, 0x17ff, dcs.sram + 0x0000); - dcs.data->install_ram(0x1800, 0x27ff, dcs.sram + 0x1000); - dcs.data->install_ram(0x2800, 0x37ff, dcs.sram + 0x2000); + m_data->install_ram(0x0800, 0x17ff, m_sram + 0x0000); + m_data->install_ram(0x1800, 0x27ff, m_sram + 0x1000); + m_data->install_ram(0x2800, 0x37ff, m_sram + 0x2000); } /* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */ else { - dcs.data->unmap_readwrite(0x0800, 0x17ff); - dcs.data->install_ram(0x1800, 0x27ff, dcs.sram + 0x3000); - dcs.data->install_ram(0x2800, 0x37ff, dcs.sram + 0x2000); + m_data->unmap_readwrite(0x0800, 0x17ff); + m_data->install_ram(0x1800, 0x27ff, m_sram + 0x3000); + m_data->install_ram(0x2800, 0x37ff, m_sram + 0x2000); } } @@ -1185,29 +1072,29 @@ static void sdrc_remap_memory(running_machine &machine) { int baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400; int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024; - dcs.data->install_read_bank(baseaddr, baseaddr + pagesize - 1, "rompage"); + m_data->install_read_bank(baseaddr, baseaddr + pagesize - 1, "rompage"); } /* map the DRAM page as bank 26 */ if (SDRC_DM_ST != 0) { int baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400; - dcs.data->install_readwrite_bank(baseaddr, baseaddr + 0x3ff, "drampage"); + m_data->install_readwrite_bank(baseaddr, baseaddr + 0x3ff, "drampage"); } /* update the bank pointers */ - sdrc_update_bank_pointers(machine); + sdrc_update_bank_pointers(); /* reinstall the polling hotspot */ - if (dcs.polling_offset) - dcs.polling_base = dcs.cpu->space(AS_DATA).install_legacy_readwrite_handler(dcs.polling_offset, dcs.polling_offset, FUNC(dcs_polling_r), FUNC(dcs_polling_w)); + if (m_polling_offset) + m_polling_base = m_cpu->space(AS_DATA).install_readwrite_handler(m_polling_offset, m_polling_offset, read16_delegate(FUNC(dcs_audio_device::dcs_polling_r),this), write16_delegate(FUNC(dcs_audio_device::dcs_polling_w),this)); } -static void sdrc_reset(running_machine &machine) +void dcs_audio_device::sdrc_reset() { - memset(dcs.sdrc.reg, 0, sizeof(dcs.sdrc.reg)); - sdrc_remap_memory(machine); + memset(m_sdrc.reg, 0, sizeof(m_sdrc.reg)); + sdrc_remap_memory(); } @@ -1218,9 +1105,9 @@ static void sdrc_reset(running_machine &machine) * *************************************/ -static READ16_HANDLER( sdrc_r ) +READ16_MEMBER( dcs_audio_device::sdrc_r ) { - sdrc_state &sdrc = dcs.sdrc; + sdrc_state &sdrc = m_sdrc; UINT16 result = sdrc.reg[offset]; /* offset 3 is for security */ @@ -1267,9 +1154,9 @@ static READ16_HANDLER( sdrc_r ) } -static WRITE16_HANDLER( sdrc_w ) +WRITE16_MEMBER( dcs_audio_device::sdrc_w ) { - sdrc_state &sdrc = dcs.sdrc; + sdrc_state &sdrc = m_sdrc; UINT16 diff = sdrc.reg[offset] ^ data; switch (offset) @@ -1278,24 +1165,24 @@ static WRITE16_HANDLER( sdrc_w ) case 0: sdrc.reg[0] = data; if (diff & 0x1833) - sdrc_remap_memory(space.machine()); + sdrc_remap_memory(); if (diff & 0x0380) - sdrc_update_bank_pointers(space.machine()); + sdrc_update_bank_pointers(); break; /* offset 1 controls RAM mapping */ case 1: sdrc.reg[1] = data; - //dmadac_enable(&dcs.dmadac[0], dcs.channels, SDRC_MUTE); + //dmadac_enable(&m_dmadac[0], m_channels, SDRC_MUTE); if (diff & 0x0003) - sdrc_remap_memory(space.machine()); + sdrc_remap_memory(); break; /* offset 2 controls paging */ case 2: sdrc.reg[2] = data; if (diff & 0x1fff) - sdrc_update_bank_pointers(space.machine()); + sdrc_update_bank_pointers(); break; /* offset 3 controls security */ @@ -1342,15 +1229,15 @@ static WRITE16_HANDLER( sdrc_w ) * *************************************/ -static void dsio_reset(running_machine &machine) +void dcs_audio_device::dsio_reset() { - memset(&dcs.dsio, 0, sizeof(dcs.dsio)); + memset(&m_dsio, 0, sizeof(m_dsio)); } -static READ16_HANDLER( dsio_r ) +READ16_MEMBER( dcs_audio_device::dsio_r ) { - dsio_state &dsio = dcs.dsio; + dsio_state &dsio = m_dsio; UINT16 result = dsio.reg[offset]; if (offset == 1) @@ -1363,9 +1250,9 @@ static READ16_HANDLER( dsio_r ) } -static WRITE16_HANDLER( dsio_w ) +WRITE16_MEMBER( dcs_audio_device::dsio_w ) { - dsio_state &dsio = dcs.dsio; + dsio_state &dsio = m_dsio; switch (offset) { @@ -1374,16 +1261,17 @@ static WRITE16_HANDLER( dsio_w ) dsio.reg[1] = data; /* determine /MUTE and number of channels */ - dmadac_enable(&dcs.dmadac[0], dcs.channels, DSIO_MUTE); + dmadac_enable(&m_dmadac[0], m_channels, DSIO_MUTE); /* bit 0 resets the FIFO */ - midway_ioasic_fifo_reset_w(space.machine(), DSIO_EMPTY_FIFO ^ 1); + if (!m_fifo_reset_w.isnull()) + m_fifo_reset_w(DSIO_EMPTY_FIFO ^ 1); break; /* offset 2 controls RAM pages */ case 2: dsio.reg[2] = data; - space.machine().root_device().membank("databank")->set_entry(DSIO_DM_PG % dcs.sounddata_banks); + membank("databank")->set_entry(DSIO_DM_PG % m_sounddata_banks); break; } } @@ -1396,15 +1284,15 @@ static WRITE16_HANDLER( dsio_w ) * *************************************/ -static void denver_reset(running_machine &machine) +void dcs_audio_device::denver_reset() { - memset(&dcs.dsio, 0, sizeof(dcs.dsio)); + memset(&m_dsio, 0, sizeof(m_dsio)); } -static READ16_HANDLER( denver_r ) +READ16_MEMBER( dcs_audio_device::denver_r ) { - UINT16 result = dcs.dsio.reg[offset]; + UINT16 result = m_dsio.reg[offset]; if (offset == 3) { @@ -1415,9 +1303,9 @@ static READ16_HANDLER( denver_r ) } -static WRITE16_HANDLER( denver_w ) +WRITE16_MEMBER( dcs_audio_device::denver_w ) { - dsio_state &dsio = dcs.dsio; + dsio_state &dsio = m_dsio; int enable, channels, chan; switch (offset) @@ -1431,31 +1319,32 @@ static WRITE16_HANDLER( denver_w ) channels = 2 + 2 * DENV_CHANNELS; /* if the number of channels has changed, adjust */ - if (channels != dcs.channels) + if (channels != m_channels) { - dcs.channels = channels; - for (chan = 0; chan < dcs.channels; chan++) + m_channels = channels; + for (chan = 0; chan < m_channels; chan++) { char buffer[10]; sprintf(buffer, "dac%d", chan + 1); - dcs.dmadac[chan] = space.machine().device(buffer); + m_dmadac[chan] = subdevice(buffer); } - dmadac_enable(&dcs.dmadac[0], dcs.channels, enable); - if (dcs.channels < 6) - dmadac_enable(&dcs.dmadac[dcs.channels], 6 - dcs.channels, FALSE); - recompute_sample_rate(space.machine()); + dmadac_enable(&m_dmadac[0], m_channels, enable); + if (m_channels < 6) + dmadac_enable(&m_dmadac[m_channels], 6 - m_channels, FALSE); + recompute_sample_rate(); } break; /* offset 2 controls RAM pages */ case 2: dsio.reg[2] = data; - space.machine().root_device().membank("databank")->set_entry(DENV_DM_PG % dcs.sounddata_banks); + membank("databank")->set_entry(DENV_DM_PG % m_sounddata_banks); break; /* offset 3 controls FIFO reset */ case 3: - midway_ioasic_fifo_reset_w(space.machine(), 1); + if (!m_fifo_reset_w.isnull()) + m_fifo_reset_w(1); break; } } @@ -1468,47 +1357,47 @@ static WRITE16_HANDLER( denver_w ) * *************************************/ -WRITE32_HANDLER( dsio_idma_addr_w ) +WRITE32_MEMBER( dcs_audio_device::dsio_idma_addr_w ) { - dsio_state &dsio = dcs.dsio; + dsio_state &dsio = m_dsio; if (LOG_DCS_TRANSFERS) logerror("%08X:IDMA_addr = %04X\n", space.device().safe_pc(), data); - downcast(dcs.cpu)->idma_addr_w(data); + downcast(m_cpu)->idma_addr_w(data); if (data == 0) dsio.start_on_next_write = 2; } -WRITE32_HANDLER( dsio_idma_data_w ) +WRITE32_MEMBER( dcs_audio_device::dsio_idma_data_w ) { - dsio_state &dsio = dcs.dsio; + dsio_state &dsio = m_dsio; UINT32 pc = space.device().safe_pc(); if (ACCESSING_BITS_0_15) { if (LOG_DCS_TRANSFERS) - logerror("%08X:IDMA_data_w(%04X) = %04X\n", pc, downcast(dcs.cpu)->idma_addr_r(), data & 0xffff); - downcast(dcs.cpu)->idma_data_w(data & 0xffff); + logerror("%08X:IDMA_data_w(%04X) = %04X\n", pc, downcast(m_cpu)->idma_addr_r(), data & 0xffff); + downcast(m_cpu)->idma_data_w(data & 0xffff); } if (ACCESSING_BITS_16_31) { if (LOG_DCS_TRANSFERS) - logerror("%08X:IDMA_data_w(%04X) = %04X\n", pc, downcast(dcs.cpu)->idma_addr_r(), data >> 16); - downcast(dcs.cpu)->idma_data_w(data >> 16); + logerror("%08X:IDMA_data_w(%04X) = %04X\n", pc, downcast(m_cpu)->idma_addr_r(), data >> 16); + downcast(m_cpu)->idma_data_w(data >> 16); } if (dsio.start_on_next_write && --dsio.start_on_next_write == 0) { logerror("Starting DSIO CPU\n"); - dcs.cpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + m_cpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); } } -READ32_HANDLER( dsio_idma_data_r ) +READ32_MEMBER( dcs_audio_device::dsio_idma_data_r ) { UINT32 result; - result = downcast(dcs.cpu)->idma_data_r(); + result = downcast(m_cpu)->idma_data_r(); if (LOG_DCS_TRANSFERS) - logerror("%08X:IDMA_data_r(%04X) = %04X\n", space.device().safe_pc(), downcast(dcs.cpu)->idma_addr_r(), result); + logerror("%08X:IDMA_data_r(%04X) = %04X\n", space.device().safe_pc(), downcast(m_cpu)->idma_addr_r(), result); return result; } @@ -1518,66 +1407,67 @@ READ32_HANDLER( dsio_idma_data_r ) DCS COMMUNICATIONS ****************************************************************************/ -void dcs_set_io_callbacks(void (*output_full_cb)(running_machine &, int), void (*input_empty_cb)(running_machine &, int)) +void dcs_audio_device::set_io_callbacks(write_line_delegate output_full_cb, write_line_delegate input_empty_cb) { - dcs.input_empty_cb = input_empty_cb; - dcs.output_full_cb = output_full_cb; + m_input_empty_cb = input_empty_cb; + m_output_full_cb = output_full_cb; } -void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(device_t *device), UINT16 (*fifo_status_r)(device_t *device)) +void dcs_audio_device::set_fifo_callbacks(read16_delegate fifo_data_r, read16_delegate fifo_status_r, write_line_delegate fifo_reset_w) { - dcs.fifo_data_r = fifo_data_r; - dcs.fifo_status_r = fifo_status_r; + m_fifo_data_r = fifo_data_r; + m_fifo_status_r = fifo_status_r; + m_fifo_reset_w = fifo_reset_w; } -int dcs_control_r(running_machine &machine) +int dcs_audio_device::control_r() { /* only boost for DCS2 boards */ - if (!dcs.auto_ack && !dcs.transfer.hle_enabled) - machine.scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5)); - return dcs.latch_control; + if (!m_auto_ack && !m_transfer.hle_enabled) + machine().scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5)); + return m_latch_control; } -void dcs_reset_w(running_machine &machine, int state) +void dcs_audio_device::reset_w(int state) { /* going high halts the CPU */ if (state) { - logerror("%s: DCS reset = %d\n", machine.describe_context(), state); + logerror("%s: DCS reset = %d\n", machine().describe_context(), state); /* just run through the init code again */ - machine.scheduler().synchronize(FUNC(dcs_reset)); - dcs.cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::dcs_reset),this)); + m_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); } /* going low resets and reactivates the CPU */ else - dcs.cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); + m_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); } -static READ16_HANDLER( latch_status_r ) +READ16_MEMBER( dcs_audio_device::latch_status_r ) { int result = 0; if (IS_INPUT_FULL()) result |= 0x80; if (IS_OUTPUT_EMPTY()) result |= 0x40; - if (dcs.fifo_status_r != NULL && (!dcs.transfer.hle_enabled || dcs.transfer.state == 0)) - result |= (*dcs.fifo_status_r)(dcs.cpu) & 0x38; - if (dcs.transfer.hle_enabled && dcs.transfer.state != 0) + if (!m_fifo_status_r.isnull() && (!m_transfer.hle_enabled || m_transfer.state == 0)) + result |= m_fifo_status_r(space, 0, 0xffff) & 0x38; + if (m_transfer.hle_enabled && m_transfer.state != 0) result |= 0x08; return result; } -static READ16_HANDLER( fifo_input_r ) +READ16_MEMBER( dcs_audio_device::fifo_input_r ) { - if (dcs.fifo_data_r) - return (*dcs.fifo_data_r)(dcs.cpu); + if (!m_fifo_data_r.isnull()) + return m_fifo_data_r(space,0, 0xffff); else return 0xffff; } @@ -1588,63 +1478,63 @@ static READ16_HANDLER( fifo_input_r ) INPUT LATCH (data from host to DCS) ****************************************************************************/ -static void dcs_delayed_data_w(running_machine &machine, int data) +void dcs_audio_device::dcs_delayed_data_w(int data) { if (LOG_DCS_IO) - logerror("%s:dcs_data_w(%04X)\n", machine.describe_context(), data); + logerror("%s:dcs_data_w(%04X)\n", machine().describe_context(), data); /* boost the interleave temporarily */ - machine.scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5)); + machine().scheduler().boost_interleave(attotime::from_nsec(500), attotime::from_usec(5)); /* set the IRQ line on the ADSP */ - dcs.cpu->set_input_line(ADSP2105_IRQ2, ASSERT_LINE); + m_cpu->set_input_line(ADSP2105_IRQ2, ASSERT_LINE); /* indicate we are no longer empty */ - if (dcs.last_input_empty && dcs.input_empty_cb) - (*dcs.input_empty_cb)(machine, dcs.last_input_empty = 0); + if (m_last_input_empty && !m_input_empty_cb.isnull()) + m_input_empty_cb(m_last_input_empty = 0); SET_INPUT_FULL(); /* set the data */ - dcs.input_data = data; + m_input_data = data; } -static TIMER_CALLBACK( dcs_delayed_data_w_callback ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_delayed_data_w_callback ) { - dcs_delayed_data_w(machine, param); + dcs_delayed_data_w(param); } -void dcs_data_w(running_machine &machine, int data) +void dcs_audio_device::data_w(int data) { /* preprocess the write */ - if (preprocess_write(machine, data)) + if (preprocess_write(data)) return; /* if we are DCS1, set a timer to latch the data */ - if (dcs.sport_timer == NULL) - machine.scheduler().synchronize(FUNC(dcs_delayed_data_w_callback), data); + if (m_sport_timer == NULL) + machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::dcs_delayed_data_w_callback),this), data); else - dcs_delayed_data_w(machine, data); + dcs_delayed_data_w(data); } -static WRITE16_HANDLER( input_latch_ack_w ) +WRITE16_MEMBER( dcs_audio_device::input_latch_ack_w ) { - if (!dcs.last_input_empty && dcs.input_empty_cb) - (*dcs.input_empty_cb)(space.machine(), dcs.last_input_empty = 1); + if (!m_last_input_empty && !m_input_empty_cb.isnull()) + m_input_empty_cb(m_last_input_empty = 1); SET_INPUT_EMPTY(); - dcs.cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE); + m_cpu->set_input_line(ADSP2105_IRQ2, CLEAR_LINE); } -static READ16_HANDLER( input_latch_r ) +READ16_MEMBER( dcs_audio_device::input_latch_r ) { - if (dcs.auto_ack) + if (m_auto_ack) input_latch_ack_w(space,0,0,0xffff); if (LOG_DCS_IO) - logerror("%08X:input_latch_r(%04X)\n", space.device().safe_pc(), dcs.input_data); - return dcs.input_data; + logerror("%08X:input_latch_r(%04X)\n", space.device().safe_pc(), m_input_data); + return m_input_data; } @@ -1653,52 +1543,52 @@ static READ16_HANDLER( input_latch_r ) OUTPUT LATCH (data from DCS to host) ****************************************************************************/ -static TIMER_CALLBACK( latch_delayed_w ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::latch_delayed_w ) { - if (!dcs.last_output_full && dcs.output_full_cb) - (*dcs.output_full_cb)(machine, dcs.last_output_full = 1); + if (!m_last_output_full && !m_output_full_cb.isnull()) + m_output_full_cb(m_last_output_full = 1); SET_OUTPUT_FULL(); - dcs.output_data = param; + m_output_data = param; } -static WRITE16_HANDLER( output_latch_w ) +WRITE16_MEMBER( dcs_audio_device::output_latch_w ) { if (LOG_DCS_IO) logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space.device().safe_pc(), data, IS_OUTPUT_EMPTY()); - space.machine().scheduler().synchronize(FUNC(latch_delayed_w), data); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::latch_delayed_w),this), data); } -static void delayed_ack_w(running_machine &machine) +void dcs_audio_device::delayed_ack_w() { SET_OUTPUT_EMPTY(); } -static TIMER_CALLBACK( delayed_ack_w_callback ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::delayed_ack_w_callback ) { - delayed_ack_w(machine); + delayed_ack_w(); } -void dcs_ack_w(running_machine &machine) +void dcs_audio_device::ack_w() { - machine.scheduler().synchronize(FUNC(delayed_ack_w_callback)); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::delayed_ack_w_callback),this)); } -int dcs_data_r(running_machine &machine) +int dcs_audio_device::data_r() { /* data is actually only 8 bit (read from d8-d15) */ - if (dcs.last_output_full && dcs.output_full_cb) - (*dcs.output_full_cb)(machine, dcs.last_output_full = 0); - if (dcs.auto_ack) - delayed_ack_w(machine); + if (m_last_output_full && !m_output_full_cb.isnull()) + m_output_full_cb(m_last_output_full = 0); + if (m_auto_ack) + delayed_ack_w(); if (LOG_DCS_IO) - logerror("%s:dcs_data_r(%04X)\n", machine.describe_context(), dcs.output_data); - return dcs.output_data; + logerror("%s:dcs_data_r(%04X)\n", machine().describe_context(), m_output_data); + return m_output_data; } @@ -1707,33 +1597,33 @@ int dcs_data_r(running_machine &machine) OUTPUT CONTROL BITS (has 3 additional lines to the host) ****************************************************************************/ -static TIMER_CALLBACK( output_control_delayed_w ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::output_control_delayed_w ) { if (LOG_DCS_IO) logerror("output_control = %04X\n", param); - dcs.output_control = param; - dcs.output_control_cycles = 0; + m_output_control = param; + m_output_control_cycles = 0; } -static WRITE16_HANDLER( output_control_w ) +WRITE16_MEMBER( dcs_audio_device::output_control_w ) { if (LOG_DCS_IO) logerror("%04X:output_control = %04X\n", space.device().safe_pc(), data); - space.machine().scheduler().synchronize(FUNC(output_control_delayed_w), data); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(dcs_audio_device::output_control_delayed_w),this), data); } -static READ16_HANDLER( output_control_r ) +READ16_MEMBER( dcs_audio_device::output_control_r ) { - dcs.output_control_cycles = dcs.cpu->total_cycles(); - return dcs.output_control; + m_output_control_cycles = m_cpu->total_cycles(); + return m_output_control; } -int dcs_data2_r(running_machine &machine) +int dcs_audio_device::data2_r() { - return dcs.output_control; + return m_output_control; } @@ -1744,100 +1634,100 @@ int dcs_data2_r(running_machine &machine) * *************************************/ -static void update_timer_count(running_machine &machine) +void dcs_audio_device::update_timer_count() { UINT64 periods_since_start; UINT64 elapsed_cycles; UINT64 elapsed_clocks; /* if not enabled, skip */ - if (!dcs.timer_enable) + if (!m_timer_enable) return; /* count cycles */ - elapsed_cycles = dcs.cpu->total_cycles() - dcs.timer_start_cycles; - elapsed_clocks = elapsed_cycles / dcs.timer_scale; + elapsed_cycles = m_cpu->total_cycles() - m_timer_start_cycles; + elapsed_clocks = elapsed_cycles / m_timer_scale; /* if we haven't counted past the initial count yet, just do that */ - if (elapsed_clocks < dcs.timer_start_count + 1) - dcs.control_regs[TIMER_COUNT_REG] = dcs.timer_start_count - elapsed_clocks; + if (elapsed_clocks < m_timer_start_count + 1) + m_control_regs[TIMER_COUNT_REG] = m_timer_start_count - elapsed_clocks; /* otherwise, count how many periods */ else { - elapsed_clocks -= dcs.timer_start_count + 1; - periods_since_start = elapsed_clocks / (dcs.timer_period + 1); - elapsed_clocks -= periods_since_start * (dcs.timer_period + 1); - dcs.control_regs[TIMER_COUNT_REG] = dcs.timer_period - elapsed_clocks; + elapsed_clocks -= m_timer_start_count + 1; + periods_since_start = elapsed_clocks / (m_timer_period + 1); + elapsed_clocks -= periods_since_start * (m_timer_period + 1); + m_control_regs[TIMER_COUNT_REG] = m_timer_period - elapsed_clocks; } } -static TIMER_DEVICE_CALLBACK( internal_timer_callback ) +TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::internal_timer_callback ) { INT64 target_cycles; /* compute the absolute cycle when the next one should fire */ /* we do this to avoid drifting */ - dcs.timers_fired++; - target_cycles = dcs.timer_start_cycles + dcs.timer_scale * (dcs.timer_start_count + 1 + dcs.timers_fired * (UINT64)(dcs.timer_period + 1)); - target_cycles -= dcs.cpu->total_cycles(); + m_timers_fired++; + target_cycles = m_timer_start_cycles + m_timer_scale * (m_timer_start_count + 1 + m_timers_fired * (UINT64)(m_timer_period + 1)); + target_cycles -= m_cpu->total_cycles(); /* set the next timer, but only if it's for a reasonable number */ - if (!dcs.timer_ignore && (dcs.timer_period > 10 || dcs.timer_scale > 1)) - timer.adjust(dcs.cpu->cycles_to_attotime(target_cycles)); + if (!m_timer_ignore && (m_timer_period > 10 || m_timer_scale > 1)) + timer.adjust(m_cpu->cycles_to_attotime(target_cycles)); /* the IRQ line is edge triggered */ - dcs.cpu->set_input_line(ADSP2105_TIMER, ASSERT_LINE); - dcs.cpu->set_input_line(ADSP2105_TIMER, CLEAR_LINE); + m_cpu->set_input_line(ADSP2105_TIMER, ASSERT_LINE); + m_cpu->set_input_line(ADSP2105_TIMER, CLEAR_LINE); } -static void reset_timer(running_machine &machine) +void dcs_audio_device::reset_timer() { /* if not enabled, skip */ - if (!dcs.timer_enable) + if (!m_timer_enable) return; /* compute the time until the first firing */ - dcs.timer_start_cycles = dcs.cpu->total_cycles(); - dcs.timers_fired = 0; + m_timer_start_cycles = m_cpu->total_cycles(); + m_timers_fired = 0; /* if this is the first timer, check the IRQ routine for the DRAM refresh stub */ /* if that's all the timer does, we don't really need to fire */ - if (!dcs.timer_ignore) + if (!m_timer_ignore) { /* Road Burners: @ 28: JMP $0032 18032F, same code at $32 */ - if (dcs.program->read_dword(0x18*4) == 0x0c0030 && /* ENA SEC_REG */ - dcs.program->read_dword(0x19*4) == 0x804828 && /* SI = DM($0482) */ - dcs.program->read_dword(0x1a*4) == 0x904828 && /* DM($0482) = SI */ - dcs.program->read_dword(0x1b*4) == 0x0C0020 && /* DIS SEC_REG */ - dcs.program->read_dword(0x1c*4) == 0x0A001F) /* RTI */ + if (m_program->read_dword(0x18*4) == 0x0c0030 && /* ENA SEC_REG */ + m_program->read_dword(0x19*4) == 0x804828 && /* SI = DM($0482) */ + m_program->read_dword(0x1a*4) == 0x904828 && /* DM($0482) = SI */ + m_program->read_dword(0x1b*4) == 0x0C0020 && /* DIS SEC_REG */ + m_program->read_dword(0x1c*4) == 0x0A001F) /* RTI */ { - dcs.timer_ignore = TRUE; + m_timer_ignore = TRUE; } } /* adjust the timer if not optimized */ - if (!dcs.timer_ignore) - dcs.internal_timer->adjust(dcs.cpu->cycles_to_attotime(dcs.timer_scale * (dcs.timer_start_count + 1))); + if (!m_timer_ignore) + m_internal_timer->adjust(m_cpu->cycles_to_attotime(m_timer_scale * (m_timer_start_count + 1))); } -static void timer_enable_callback(adsp21xx_device &device, int enable) +WRITE_LINE_MEMBER(dcs_audio_device::timer_enable_callback) { - dcs.timer_enable = enable; - dcs.timer_ignore = 0; - if (enable) + m_timer_enable = state; + m_timer_ignore = 0; + if (state) { - //osd_printf_debug("Timer enabled @ %d cycles/int, or %f Hz\n", dcs.timer_scale * (dcs.timer_period + 1), 1.0 / dcs.cpu->cycles_to_attotime(dcs.timer_scale * (dcs.timer_period + 1))); - reset_timer(device.machine()); + //osd_printf_debug("Timer enabled @ %d cycles/int, or %f Hz\n", m_timer_scale * (m_timer_period + 1), 1.0 / m_cpu->cycles_to_attotime(m_timer_scale * (m_timer_period + 1))); + reset_timer(); } else { //osd_printf_debug("Timer disabled\n"); - dcs.internal_timer->reset(); + m_internal_timer->reset(); } } @@ -1866,7 +1756,7 @@ static void timer_enable_callback(adsp21xx_device &device, int enable) 0x3c00-0x3fff = Memory Mapped control registers & reserved. */ -static READ16_HANDLER( adsp_control_r ) +READ16_MEMBER( dcs_audio_device::adsp_control_r ) { UINT16 result = 0xffff; @@ -1875,29 +1765,29 @@ static READ16_HANDLER( adsp_control_r ) case PROG_FLAG_DATA_REG: /* Denver waits for this & 0x000e == 0x0000 */ /* Denver waits for this & 0x000e == 0x0006 */ - result = dcs.progflags ^= 0x0006; + result = m_progflags ^= 0x0006; break; case IDMA_CONTROL_REG: - result = downcast(dcs.cpu)->idma_addr_r(); + result = downcast(m_cpu)->idma_addr_r(); break; case TIMER_COUNT_REG: - update_timer_count(space.machine()); - result = dcs.control_regs[offset]; + update_timer_count(); + result = m_control_regs[offset]; break; default: - result = dcs.control_regs[offset]; + result = m_control_regs[offset]; break; } return result; } -static WRITE16_HANDLER( adsp_control_w ) +WRITE16_MEMBER(dcs_audio_device:: adsp_control_w ) { - dcs.control_regs[offset] = data; + m_control_regs[offset] = data; switch (offset) { @@ -1906,16 +1796,16 @@ static WRITE16_HANDLER( adsp_control_w ) if (data & 0x0200) { logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space.device().safe_pc()); - dcs.cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE); - dcs_boot(space.machine()); - dcs.control_regs[SYSCONTROL_REG] = 0; + m_cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE); + dcs_boot(); + m_control_regs[SYSCONTROL_REG] = 0; } /* see if SPORT1 got disabled */ if ((data & 0x0800) == 0) { - dmadac_enable(&dcs.dmadac[0], dcs.channels, 0); - dcs.reg_timer->reset(); + dmadac_enable(&m_dmadac[0], m_channels, 0); + m_reg_timer->reset(); } break; @@ -1923,8 +1813,8 @@ static WRITE16_HANDLER( adsp_control_w ) /* autobuffer off: nuke the timer, and disable the DAC */ if ((data & 0x0002) == 0) { - dmadac_enable(&dcs.dmadac[0], dcs.channels, 0); - dcs.reg_timer->reset(); + dmadac_enable(&m_dmadac[0], m_channels, 0); + m_reg_timer->reset(); } break; @@ -1937,30 +1827,30 @@ static WRITE16_HANDLER( adsp_control_w ) case TIMER_SCALE_REG: data = (data & 0xff) + 1; - if (data != dcs.timer_scale) + if (data != m_timer_scale) { - update_timer_count(space.machine()); - dcs.timer_scale = data; - reset_timer(space.machine()); + update_timer_count(); + m_timer_scale = data; + reset_timer(); } break; case TIMER_COUNT_REG: - dcs.timer_start_count = data; - reset_timer(space.machine()); + m_timer_start_count = data; + reset_timer(); break; case TIMER_PERIOD_REG: - if (data != dcs.timer_period) + if (data != m_timer_period) { - update_timer_count(space.machine()); - dcs.timer_period = data; - reset_timer(space.machine()); + update_timer_count(); + m_timer_period = data; + reset_timer(); } break; case IDMA_CONTROL_REG: - downcast(dcs.cpu)->idma_addr_w(data); + downcast(m_cpu)->idma_addr_w(data); break; } } @@ -1970,115 +1860,115 @@ static WRITE16_HANDLER( adsp_control_w ) DCS IRQ GENERATION CALLBACKS ****************************************************************************/ -static TIMER_DEVICE_CALLBACK( dcs_irq ) +TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::dcs_irq ) { /* get the index register */ - int reg = dcs.cpu->state_int(ADSP2100_I0 + dcs.ireg); + int reg = m_cpu->state_int(ADSP2100_I0 + m_ireg); /* copy the current data into the buffer */ { - int count = dcs.size / 2; + int count = m_size / 2; INT16 buffer[0x400]; int i; for (i = 0; i < count; i++) { - buffer[i] = dcs.data->read_word(reg * 2); - reg += dcs.incs; + buffer[i] = m_data->read_word(reg * 2); + reg += m_incs; } - if (dcs.channels) - dmadac_transfer(&dcs.dmadac[0], dcs.channels, 1, dcs.channels, (dcs.size / 2) / dcs.channels, buffer); + if (m_channels) + dmadac_transfer(&m_dmadac[0], m_channels, 1, m_channels, (m_size / 2) / m_channels, buffer); } /* check for wrapping */ - if (reg >= dcs.ireg_base + dcs.size) + if (reg >= m_ireg_base + m_size) { /* reset the base pointer */ - reg = dcs.ireg_base; + reg = m_ireg_base; /* generate the (internal, thats why the pulse) irq */ - dcs.cpu->machine().driver_data()->generic_pulse_irq_line(*dcs.cpu, ADSP2105_IRQ1, 1); + m_cpu->machine().driver_data()->generic_pulse_irq_line(*m_cpu, ADSP2105_IRQ1, 1); } /* store it */ - dcs.cpu->set_state_int(ADSP2100_I0 + dcs.ireg, reg); + m_cpu->set_state_int(ADSP2100_I0 + m_ireg, reg); } -static TIMER_DEVICE_CALLBACK( sport0_irq ) +TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::sport0_irq ) { /* this latches internally, so we just pulse */ /* note that there is non-interrupt code that reads/modifies/writes the output_control */ /* register; if we don't interlock it, we will eventually lose sound (see CarnEvil) */ /* so we skip the SPORT interrupt if we read with output_control within the last 5 cycles */ - if ((dcs.cpu->total_cycles() - dcs.output_control_cycles) > 5) + if ((m_cpu->total_cycles() - m_output_control_cycles) > 5) { - dcs.cpu->set_input_line(ADSP2115_SPORT0_RX, ASSERT_LINE); - dcs.cpu->set_input_line(ADSP2115_SPORT0_RX, CLEAR_LINE); + m_cpu->set_input_line(ADSP2115_SPORT0_RX, ASSERT_LINE); + m_cpu->set_input_line(ADSP2115_SPORT0_RX, CLEAR_LINE); } } -static void recompute_sample_rate(running_machine &machine) +void dcs_audio_device::recompute_sample_rate() { /* calculate how long until we generate an interrupt */ /* frequency the time per each bit sent */ - attotime sample_period = attotime::from_hz(dcs.cpu->unscaled_clock()) * (2 * (dcs.control_regs[S1_SCLKDIV_REG] + 1)); + attotime sample_period = attotime::from_hz(m_cpu->unscaled_clock()) * (2 * (m_control_regs[S1_SCLKDIV_REG] + 1)); /* now put it down to samples, so we know what the channel frequency has to be */ - sample_period = sample_period * (16 * dcs.channels); - dmadac_set_frequency(&dcs.dmadac[0], dcs.channels, ATTOSECONDS_TO_HZ(sample_period.attoseconds)); - dmadac_enable(&dcs.dmadac[0], dcs.channels, 1); + sample_period = sample_period * (16 * m_channels); + dmadac_set_frequency(&m_dmadac[0], m_channels, ATTOSECONDS_TO_HZ(sample_period.attoseconds)); + dmadac_enable(&m_dmadac[0], m_channels, 1); /* fire off a timer wich will hit every half-buffer */ - if (dcs.incs) + if (m_incs) { - attotime period = (sample_period * dcs.size) / (2 * dcs.channels * dcs.incs); - dcs.reg_timer->adjust(period, 0, period); + attotime period = (sample_period * m_size) / (2 * m_channels * m_incs); + m_reg_timer->adjust(period, 0, period); } } -static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data) +WRITE32_MEMBER(dcs_audio_device::sound_tx_callback) { /* check if it's for SPORT1 */ - if (port != 1) + if (offset != 1) return; /* check if SPORT1 is enabled */ - if (dcs.control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */ + if (m_control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */ { /* we only support autobuffer here (wich is what this thing uses), bail if not enabled */ - if (dcs.control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */ + if (m_control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */ { /* get the autobuffer registers */ int mreg, lreg; UINT16 source; - dcs.ireg = (dcs.control_regs[S1_AUTOBUF_REG] >> 9) & 7; - mreg = (dcs.control_regs[S1_AUTOBUF_REG] >> 7) & 3; - mreg |= dcs.ireg & 0x04; /* msb comes from ireg */ - lreg = dcs.ireg; + m_ireg = (m_control_regs[S1_AUTOBUF_REG] >> 9) & 7; + mreg = (m_control_regs[S1_AUTOBUF_REG] >> 7) & 3; + mreg |= m_ireg & 0x04; /* msb comes from ireg */ + lreg = m_ireg; /* now get the register contents in a more legible format */ /* we depend on register indexes to be continuous (wich is the case in our core) */ - source = device.state_int(ADSP2100_I0 + dcs.ireg); - dcs.incs = device.state_int(ADSP2100_M0 + mreg); - dcs.size = device.state_int(ADSP2100_L0 + lreg); + source = m_cpu->state_int(ADSP2100_I0 + m_ireg); + m_incs = m_cpu->state_int(ADSP2100_M0 + mreg); + m_size = m_cpu->state_int(ADSP2100_L0 + lreg); /* get the base value, since we need to keep it around for wrapping */ - source -= dcs.incs; + source -= m_incs; /* make it go back one so we dont lose the first sample */ - device.set_state_int(ADSP2100_I0 + dcs.ireg, source); + m_cpu->set_state_int(ADSP2100_I0 + m_ireg, source); /* save it as it is now */ - dcs.ireg_base = source; + m_ireg_base = source; /* recompute the sample rate and timer */ - recompute_sample_rate(device.machine()); + recompute_sample_rate(); return; } else @@ -2086,10 +1976,10 @@ static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data) } /* if we get there, something went wrong. Disable playing */ - dmadac_enable(&dcs.dmadac[0], dcs.channels, 0); + dmadac_enable(&m_dmadac[0], m_channels, 0); /* remove timer */ - dcs.reg_timer->reset(); + m_reg_timer->reset(); } @@ -2098,18 +1988,18 @@ static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data) VERY BASIC & SAFE OPTIMIZATIONS ****************************************************************************/ -static READ16_HANDLER( dcs_polling_r ) +READ16_MEMBER( dcs_audio_device::dcs_polling_r ) { - if (dcs.polling_count++ > 5) + if (m_polling_count++ > 5) space.device().execute().eat_cycles(10000); - return *dcs.polling_base; + return *m_polling_base; } -static WRITE16_HANDLER( dcs_polling_w ) +WRITE16_MEMBER( dcs_audio_device::dcs_polling_w ) { - dcs.polling_count = 0; - COMBINE_DATA(dcs.polling_base); + m_polling_count = 0; + COMBINE_DATA(m_polling_base); } @@ -2118,12 +2008,12 @@ static WRITE16_HANDLER( dcs_polling_w ) DATA TRANSFER HLE MECHANISM ****************************************************************************/ -void dcs_fifo_notify(running_machine &machine, int count, int max) +void dcs_audio_device::fifo_notify(int count, int max) { - hle_transfer_state &transfer = dcs.transfer; + hle_transfer_state &transfer = m_transfer; /* skip if not in mid-transfer */ - if (!transfer.hle_enabled || transfer.state == 0 || !dcs.fifo_data_r) + if (!transfer.hle_enabled || transfer.state == 0 || m_fifo_data_r.isnull()) { transfer.fifo_entries = 0; return; @@ -2134,56 +2024,56 @@ void dcs_fifo_notify(running_machine &machine, int count, int max) if (transfer.state != 5 || transfer.fifo_entries == transfer.writes_left || transfer.fifo_entries >= 256) { for ( ; transfer.fifo_entries; transfer.fifo_entries--) - preprocess_write(machine, (*dcs.fifo_data_r)(dcs.cpu)); + preprocess_write(m_fifo_data_r(machine().driver_data()->generic_space(),0, 0xffff)); } } -static TIMER_DEVICE_CALLBACK( transfer_watchdog_callback ) +TIMER_DEVICE_CALLBACK_MEMBER( dcs_audio_device::transfer_watchdog_callback ) { - hle_transfer_state &transfer = dcs.transfer; + hle_transfer_state &transfer = m_transfer; int starting_writes_left = param; if (transfer.fifo_entries && starting_writes_left == transfer.writes_left) { for ( ; transfer.fifo_entries; transfer.fifo_entries--) - preprocess_write(timer.machine(), (*dcs.fifo_data_r)(dcs.cpu)); + preprocess_write(m_fifo_data_r(machine().driver_data()->generic_space(),0, 0xffff)); } if (transfer.watchdog != NULL) transfer.watchdog->adjust(attotime::from_msec(1), transfer.writes_left); } -static TIMER_CALLBACK( s1_ack_callback2 ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback2 ) { /* if the output is full, stall for a usec */ if (IS_OUTPUT_FULL()) { - machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback2), param); + machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback2),this), param); return; } - output_latch_w(dcs.cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff); + output_latch_w(m_cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff); } -static TIMER_CALLBACK( s1_ack_callback1 ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback1 ) { /* if the output is full, stall for a usec */ if (IS_OUTPUT_FULL()) { - machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback1), param); + machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback1),this), param); return; } - output_latch_w(dcs.cpu->space(AS_PROGRAM), 0, param, 0xffff); + output_latch_w(m_cpu->space(AS_PROGRAM), 0, param, 0xffff); /* chain to the next word we need to write back */ - machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback2)); + machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback2),this)); } -static int preprocess_stage_1(running_machine &machine, UINT16 data) +int dcs_audio_device::preprocess_stage_1(UINT16 data) { - hle_transfer_state &transfer = dcs.transfer; + hle_transfer_state &transfer = m_transfer; switch (transfer.state) { @@ -2192,7 +2082,7 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data) if (data == 0x001a) { if (LOG_DCS_TRANSFERS) - logerror("%s:DCS Transfer command %04X\n", machine.describe_context(), data); + logerror("%s:DCS Transfer command %04X\n", machine().describe_context(), data); transfer.state++; if (transfer.hle_enabled) return 1; @@ -2202,7 +2092,7 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data) else if (data == 0x002a) { if (LOG_DCS_TRANSFERS) - logerror("%s:DCS State change %04X\n", machine.describe_context(), data); + logerror("%s:DCS State change %04X\n", machine().describe_context(), data); transfer.dcs_state = 1; } @@ -2256,13 +2146,13 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data) { if (transfer.type == 1 && SDRC_SM_BK == 1) { - dcs.sdrc.reg[0] &= ~0x1000; - sdrc_remap_memory(machine); + m_sdrc.reg[0] &= ~0x1000; + sdrc_remap_memory(); } if (transfer.type == 2 && SDRC_SM_BK == 0) { - dcs.sdrc.reg[0] |= 0x1000; - sdrc_remap_memory(machine); + m_sdrc.reg[0] |= 0x1000; + sdrc_remap_memory(); } return 1; } @@ -2288,14 +2178,14 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data) if (transfer.writes_left & 1) transfer.temp = data; else - dcs.program->write_dword(transfer.start++ * 4, (transfer.temp << 8) | (data & 0xff)); + m_program->write_dword(transfer.start++ * 4, (transfer.temp << 8) | (data & 0xff)); } else - dcs.data->write_word(transfer.start++ * 2, data); + m_data->write_word(transfer.start++ * 2, data); /* if we're done, start a timer to send the response words */ if (transfer.state == 0) - machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s1_ack_callback1), transfer.sum); + machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback1),this), transfer.sum); return 1; } break; @@ -2304,24 +2194,24 @@ static int preprocess_stage_1(running_machine &machine, UINT16 data) } -static TIMER_CALLBACK( s2_ack_callback ) +TIMER_CALLBACK_MEMBER( dcs_audio_device::s2_ack_callback ) { - address_space &space = dcs.cpu->space(AS_PROGRAM); + address_space &space = m_cpu->space(AS_PROGRAM); /* if the output is full, stall for a usec */ if (IS_OUTPUT_FULL()) { - machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s2_ack_callback), param); + machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s2_ack_callback),this), param); return; } output_latch_w(space, 0, param, 0xffff); - output_control_w(space, 0, (dcs.output_control & ~0xff00) | 0x0300, 0xffff); + output_control_w(space, 0, (m_output_control & ~0xff00) | 0x0300, 0xffff); } -static int preprocess_stage_2(running_machine &machine, UINT16 data) +int dcs_audio_device::preprocess_stage_2(UINT16 data) { - hle_transfer_state &transfer = dcs.transfer; + hle_transfer_state &transfer = m_transfer; switch (transfer.state) { @@ -2330,7 +2220,7 @@ static int preprocess_stage_2(running_machine &machine, UINT16 data) if (data == 0x55d0 || data == 0x55d1) { if (LOG_DCS_TRANSFERS) - logerror("%s:DCS Transfer command %04X\n", machine.describe_context(), data); + logerror("%s:DCS Transfer command %04X\n", machine().describe_context(), data); transfer.state++; if (transfer.hle_enabled) return 1; @@ -2340,7 +2230,7 @@ static int preprocess_stage_2(running_machine &machine, UINT16 data) else { if (LOG_DCS_TRANSFERS) - logerror("%s:Command: %04X\n", machine.describe_context(), data); + logerror("%s:Command: %04X\n", machine().describe_context(), data); } break; @@ -2405,12 +2295,12 @@ static int preprocess_stage_2(running_machine &machine, UINT16 data) if (transfer.hle_enabled) { /* write the new data to memory */ - dcs.sounddata[transfer.start++] = data; + m_sounddata[transfer.start++] = data; /* if we're done, start a timer to send the response words */ if (transfer.state == 0) { - machine.scheduler().timer_set(attotime::from_usec(1), FUNC(s2_ack_callback), transfer.sum); + machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s2_ack_callback),this), transfer.sum); transfer.watchdog->reset(); } return 1; @@ -2421,28 +2311,171 @@ static int preprocess_stage_2(running_machine &machine, UINT16 data) } -static int preprocess_write(running_machine &machine, UINT16 data) +int dcs_audio_device::preprocess_write(UINT16 data) { - hle_transfer_state &transfer = dcs.transfer; + hle_transfer_state &transfer = m_transfer; int result; /* if we're not DCS2, skip */ - if (dcs.sport_timer == NULL) + if (m_sport_timer == NULL) return 0; /* state 0 - initialization phase */ if (transfer.dcs_state == 0) - result = preprocess_stage_1(machine, data); + result = preprocess_stage_1(data); else - result = preprocess_stage_2(machine, data); + result = preprocess_stage_2(data); /* if we did the write, toggle the full/not full state so interrupts are generated */ - if (result && dcs.input_empty_cb) + if (result && !m_input_empty_cb.isnull()) { - if (dcs.last_input_empty) - (*dcs.input_empty_cb)(machine, dcs.last_input_empty = 0); - if (!dcs.last_input_empty) - (*dcs.input_empty_cb)(machine, dcs.last_input_empty = 1); + if (m_last_input_empty) + m_input_empty_cb(m_last_input_empty = 0); + if (!m_last_input_empty) + m_input_empty_cb(m_last_input_empty = 1); } return result; } + +const device_type DCS_AUDIO_2K = &device_creator; + +//------------------------------------------------- +// dcs_audio_2k_device - constructor +//------------------------------------------------- + +dcs_audio_2k_device::dcs_audio_2k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs_audio_device(mconfig, DCS_AUDIO_2K, "DCS Audio 2K", tag, owner, clock, "dcs_audio_2k", __FILE__) +{ +} + +machine_config_constructor dcs_audio_2k_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs_audio_2k ); +} + +const device_type DCS_AUDIO_2K_UART = &device_creator; + +//------------------------------------------------- +// dcs_audio_2k_uart_device - constructor +//------------------------------------------------- + +dcs_audio_2k_uart_device::dcs_audio_2k_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs_audio_device(mconfig, DCS_AUDIO_2K_UART, "DCS Audio 2K UART", tag, owner, clock, "dcs_audio_2k_uart", __FILE__) +{ +} + +machine_config_constructor dcs_audio_2k_uart_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs_audio_2k_uart ); +} + +const device_type DCS_AUDIO_8K = &device_creator; + +//------------------------------------------------- +// dcs_audio_8k_device - constructor +//------------------------------------------------- + +dcs_audio_8k_device::dcs_audio_8k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs_audio_device(mconfig, DCS_AUDIO_8K, "DCS Audio 8K", tag, owner, clock, "dcs_audio_8k", __FILE__) +{ +} + +machine_config_constructor dcs_audio_8k_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs_audio_8k ); +} + +const device_type DCS_AUDIO_WPC = &device_creator; + +//------------------------------------------------- +// dcs_audio_wpc_device - constructor +//------------------------------------------------- + +dcs_audio_wpc_device::dcs_audio_wpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs_audio_device(mconfig, DCS_AUDIO_WPC, "DCS Audio WPC", tag, owner, clock, "dcs_audio_wpc", __FILE__) +{ +} + +machine_config_constructor dcs_audio_wpc_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs_audio_wpc ); +} + + + +//------------------------------------------------- +// dcs2_audio_device - constructor +//------------------------------------------------- + +dcs2_audio_device::dcs2_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : + dcs_audio_device(mconfig, type, name, tag, owner, clock, shortname, source) +{ +} + + +const device_type DCS2_AUDIO_2115 = &device_creator; + +//------------------------------------------------- +// dcs2_audio_2115_device - constructor +//------------------------------------------------- + +dcs2_audio_2115_device::dcs2_audio_2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs2_audio_device(mconfig, DCS2_AUDIO_2115, "DCS2 Audio 2115", tag, owner, clock, "dcs2_audio_2115", __FILE__) +{ +} + +machine_config_constructor dcs2_audio_2115_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs2_audio_2115 ); +} + +const device_type DCS2_AUDIO_2104 = &device_creator; + +//------------------------------------------------- +// dcs2_audio_2104_device - constructor +//------------------------------------------------- + +dcs2_audio_2104_device::dcs2_audio_2104_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs2_audio_device(mconfig, DCS2_AUDIO_2104, "DCS2 Audio 2104", tag, owner, clock, "dcs2_audio_2104", __FILE__) +{ +} + +machine_config_constructor dcs2_audio_2104_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs2_audio_2104 ); +} + + +const device_type DCS2_AUDIO_DSIO = &device_creator; + +//------------------------------------------------- +// dcs2_audio_dsio_device - constructor +//------------------------------------------------- + +dcs2_audio_dsio_device::dcs2_audio_dsio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs2_audio_device(mconfig, DCS2_AUDIO_DSIO, "DCS2 Audio DSIO", tag, owner, clock, "dcs2_audio_dsio", __FILE__) +{ +} + +machine_config_constructor dcs2_audio_dsio_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs2_audio_dsio ); +} + +const device_type DCS2_AUDIO_DENVER = &device_creator; + +//------------------------------------------------- +// dcs2_audio_denver_device - constructor +//------------------------------------------------- + +dcs2_audio_denver_device::dcs2_audio_denver_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + dcs2_audio_device(mconfig, DCS2_AUDIO_DENVER, "DCS2 Audio Denver", tag, owner, clock, "dcs2_audio_denver", __FILE__) +{ +} + +machine_config_constructor dcs2_audio_denver_device::device_mconfig_additions() const +{ + return MACHINE_CONFIG_NAME( dcs2_audio_denver ); +} + + diff --git a/src/mame/audio/dcs.h b/src/mame/audio/dcs.h index 3860adcba81..cc396dc07cd 100644 --- a/src/mame/audio/dcs.h +++ b/src/mame/audio/dcs.h @@ -9,34 +9,338 @@ #ifndef __DCS_H__ #define __DCS_H__ -MACHINE_CONFIG_EXTERN( dcs_audio_2k ); -MACHINE_CONFIG_EXTERN( dcs_audio_2k_uart ); -MACHINE_CONFIG_EXTERN( dcs_audio_8k ); -MACHINE_CONFIG_EXTERN( dcs_audio_wpc ); -MACHINE_CONFIG_EXTERN( dcs2_audio_2115 ); -MACHINE_CONFIG_EXTERN( dcs2_audio_2104 ); -MACHINE_CONFIG_EXTERN( dcs2_audio_dsio ); -MACHINE_CONFIG_EXTERN( dcs2_audio_denver ); +#include "cpu/adsp2100/adsp2100.h" +#include "sound/dmadac.h" -void dcs_init(running_machine &machine); -void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset); -void dcs_set_auto_ack(running_machine &machine, int state); +#define MCFG_DCS2_AUDIO_DRAM_IN_MB(_dram_in_mb) \ + dcs_audio_device::static_set_dram_in_mb(*device, _dram_in_mb); -void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(device_t *device), UINT16 (*fifo_status_r)(device_t *device)); -void dcs_set_io_callbacks(void (*output_full_cb)(running_machine &, int), void (*input_empty_cb)(running_machine &, int)); +#define MCFG_DCS2_AUDIO_POLLING_OFFSET(_polling_offset) \ + dcs_audio_device::static_set_polling_offset(*device, _polling_offset); -int dcs_data_r(running_machine &machine); -void dcs_ack_w(running_machine &machine); -int dcs_data2_r(running_machine &machine); -int dcs_control_r(running_machine &machine); + +class dcs_audio_device : public device_t +{ +public: + // construction/destruction + dcs_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); -void dcs_data_w(running_machine &machine, int data); -void dcs_reset_w(running_machine &machine, int state); + // for dcs2 (int dram_in_mb, offs_t polling_offset) + static void static_set_dram_in_mb(device_t &device, int dram_in_mb) { downcast(device).m_dram_in_mb = dram_in_mb; } + static void static_set_polling_offset(device_t &device, offs_t polling_offset) { downcast(device).m_polling_offset = polling_offset; } -void dcs_fifo_notify(running_machine &machine, int count, int max); + void set_auto_ack(int state); -DECLARE_WRITE32_HANDLER( dsio_idma_addr_w ); -DECLARE_WRITE32_HANDLER( dsio_idma_data_w ); -DECLARE_READ32_HANDLER( dsio_idma_data_r ); + void set_fifo_callbacks(read16_delegate fifo_data_r, read16_delegate fifo_status_r, write_line_delegate fifo_reset_w); + void set_io_callbacks(write_line_delegate output_full_cb, write_line_delegate input_empty_cb); + + int data_r(); + void ack_w(); + int data2_r(); + int control_r(); + + void data_w(int data); + void reset_w(int state); + + void fifo_notify(int count, int max); + + DECLARE_WRITE32_MEMBER( dsio_idma_addr_w ); + DECLARE_WRITE32_MEMBER( dsio_idma_data_w ); + DECLARE_READ32_MEMBER( dsio_idma_data_r ); + + // non public + void dcs_boot(); + TIMER_CALLBACK_MEMBER( dcs_reset ); + void dcs_register_state(); + DECLARE_READ16_MEMBER( dcs_dataram_r ); + DECLARE_WRITE16_MEMBER( dcs_dataram_w ); + DECLARE_WRITE16_MEMBER( dcs_data_bank_select_w ); + inline void sdrc_update_bank_pointers(); + void sdrc_remap_memory(); + void sdrc_reset(); + DECLARE_READ16_MEMBER( sdrc_r ); + DECLARE_WRITE16_MEMBER( sdrc_w ); + void dsio_reset(); + DECLARE_READ16_MEMBER( dsio_r ); + DECLARE_WRITE16_MEMBER( dsio_w ); + void denver_reset(); + DECLARE_READ16_MEMBER( denver_r ); + DECLARE_WRITE16_MEMBER( denver_w ); + DECLARE_READ16_MEMBER( latch_status_r ); + DECLARE_READ16_MEMBER( fifo_input_r ); + void dcs_delayed_data_w(int data); + TIMER_CALLBACK_MEMBER( dcs_delayed_data_w_callback ); + DECLARE_WRITE16_MEMBER( input_latch_ack_w ); + DECLARE_READ16_MEMBER( input_latch_r ); + TIMER_CALLBACK_MEMBER( latch_delayed_w ); + DECLARE_WRITE16_MEMBER( output_latch_w ); + void delayed_ack_w(); + TIMER_CALLBACK_MEMBER( delayed_ack_w_callback ); + TIMER_CALLBACK_MEMBER( output_control_delayed_w ); + DECLARE_WRITE16_MEMBER( output_control_w ); + DECLARE_READ16_MEMBER( output_control_r ); + void update_timer_count(); + TIMER_DEVICE_CALLBACK_MEMBER( internal_timer_callback ); + void reset_timer(); + DECLARE_WRITE_LINE_MEMBER(timer_enable_callback); + DECLARE_READ16_MEMBER( adsp_control_r ); + DECLARE_WRITE16_MEMBER( adsp_control_w ); + TIMER_DEVICE_CALLBACK_MEMBER( dcs_irq ); + TIMER_DEVICE_CALLBACK_MEMBER( sport0_irq ); + void recompute_sample_rate(); + WRITE32_MEMBER(sound_tx_callback); + DECLARE_READ16_MEMBER( dcs_polling_r ); + DECLARE_WRITE16_MEMBER( dcs_polling_w ); + TIMER_DEVICE_CALLBACK_MEMBER( transfer_watchdog_callback ); + TIMER_CALLBACK_MEMBER( s1_ack_callback2 ); + TIMER_CALLBACK_MEMBER( s1_ack_callback1 ); + int preprocess_stage_1(UINT16 data); + TIMER_CALLBACK_MEMBER( s2_ack_callback ); + int preprocess_stage_2(UINT16 data); + int preprocess_write(UINT16 data); + +protected: + // device-level overrides + virtual void device_start(); + +protected: + struct sdrc_state + { + UINT16 reg[4]; + UINT8 seed; + }; + + + struct dsio_state + { + UINT16 reg[4]; + UINT8 start_on_next_write; + UINT16 channelbits; + }; + + + struct hle_transfer_state + { + UINT8 hle_enabled; + INT32 dcs_state; + INT32 state; + INT32 start; + INT32 stop; + INT32 type; + INT32 temp; + INT32 writes_left; + UINT16 sum; + INT32 fifo_entries; + timer_device *watchdog; + }; + + adsp21xx_device *m_cpu; + address_space *m_program; + address_space *m_data; + UINT8 m_rev; + offs_t m_polling_offset; + UINT32 m_polling_count; + + /* sound output */ + UINT8 m_channels; + UINT16 m_size; + UINT16 m_incs; + dmadac_sound_device *m_dmadac[6]; + timer_device *m_reg_timer; + timer_device *m_sport_timer; + timer_device *m_internal_timer; + INT32 m_ireg; + UINT16 m_ireg_base; + UINT16 m_control_regs[32]; + + /* memory access/booting */ + UINT16 * m_bootrom; + UINT32 m_bootrom_words; + UINT16 * m_sounddata; + UINT32 m_sounddata_words; + UINT32 m_sounddata_banks; + UINT16 m_sounddata_bank; + + /* I/O with the host */ + UINT8 m_auto_ack; + UINT16 m_latch_control; + UINT16 m_input_data; + UINT16 m_output_data; + UINT16 m_output_control; + UINT64 m_output_control_cycles; + UINT8 m_last_output_full; + UINT8 m_last_input_empty; + UINT16 m_progflags; + + write_line_delegate m_output_full_cb; + write_line_delegate m_input_empty_cb; + + read16_delegate m_fifo_data_r; + read16_delegate m_fifo_status_r; + write_line_delegate m_fifo_reset_w; + + /* timers */ + UINT8 m_timer_enable; + UINT8 m_timer_ignore; + UINT64 m_timer_start_cycles; + UINT32 m_timer_start_count; + UINT32 m_timer_scale; + UINT32 m_timer_period; + UINT32 m_timers_fired; + + UINT16 *m_sram; + UINT16 *m_polling_base; + UINT32 *m_internal_program_ram; + UINT32 *m_external_program_ram; + + sdrc_state m_sdrc; + dsio_state m_dsio; + hle_transfer_state m_transfer; + + int m_dram_in_mb; +}; + + +// dcs_audio_2k_device + +class dcs_audio_2k_device : public dcs_audio_device +{ +public: + // construction/destruction + dcs_audio_2k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS_AUDIO_2K; + +// dcs_audio_2k_uart_device + +class dcs_audio_2k_uart_device : public dcs_audio_device +{ +public: + // construction/destruction + dcs_audio_2k_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS_AUDIO_2K_UART; + +// dcs_audio_8k_device + +class dcs_audio_8k_device : public dcs_audio_device +{ +public: + // construction/destruction + dcs_audio_8k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS_AUDIO_8K; + +// dcs_audio_wpc_device + +class dcs_audio_wpc_device : public dcs_audio_device +{ +public: + // construction/destruction + dcs_audio_wpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS_AUDIO_WPC; + + +// dcs2_audio_device + +class dcs2_audio_device : public dcs_audio_device +{ +public: + // construction/destruction + dcs2_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); + +protected: + // device-level overrides + virtual void device_start(); +}; + +// dcs2_audio_2115_device + +class dcs2_audio_2115_device : public dcs2_audio_device +{ +public: + // construction/destruction + dcs2_audio_2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS2_AUDIO_2115; + +// dcs2_audio_2104_device + +class dcs2_audio_2104_device : public dcs2_audio_device +{ +public: + // construction/destruction + dcs2_audio_2104_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS2_AUDIO_2104; + +// dcs2_audio_dsio_device + +class dcs2_audio_dsio_device : public dcs2_audio_device +{ +public: + // construction/destruction + dcs2_audio_dsio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS2_AUDIO_DSIO; + +// dcs2_audio_denver_device + +class dcs2_audio_denver_device : public dcs2_audio_device +{ +public: + // construction/destruction + dcs2_audio_denver_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // optional information overrides + virtual machine_config_constructor device_mconfig_additions() const; + +}; + +// device type definition +extern const device_type DCS2_AUDIO_DENVER; #endif diff --git a/src/mame/drivers/atarigt.c b/src/mame/drivers/atarigt.c index 6f7565e5f8f..503e0966169 100644 --- a/src/mame/drivers/atarigt.c +++ b/src/mame/drivers/atarigt.c @@ -56,7 +56,6 @@ #include "machine/atarigen.h" #include "video/atarirle.h" #include "cpu/m68000/m68000.h" -#include "audio/cage.h" #include "includes/atarigt.h" @@ -64,17 +63,6 @@ #define HACK_TMEK_CONTROLS (0) - -/************************************* - * - * Statics - * - *************************************/ - -static void cage_irq_callback(running_machine &machine, int reason); - - - /************************************* * * Initialization @@ -103,19 +91,14 @@ MACHINE_RESET_MEMBER(atarigt_state,atarigt) * *************************************/ -static void cage_irq_callback(running_machine &machine, int reason) +WRITE8_MEMBER(atarigt_state::cage_irq_callback) { - atarigen_state *atarigen = machine.driver_data(); - address_space &space = atarigen->m_maincpu->space(AS_PROGRAM); - - if (reason) - atarigen->sound_int_gen(atarigen->m_maincpu); + if (data) + sound_int_gen(m_maincpu); else - atarigen->sound_int_ack_w(space,0,0); + sound_int_ack_w(space,0,0); } - - /************************************* * * Input ports @@ -259,9 +242,9 @@ READ32_MEMBER(atarigt_state::sound_data_r) UINT32 result = 0; if (ACCESSING_BITS_0_15) - result |= cage_control_r(machine()); + result |= m_cage->control_r(); if (ACCESSING_BITS_16_31) - result |= cage_main_r(space) << 16; + result |= m_cage->main_r() << 16; return result; } @@ -269,9 +252,9 @@ READ32_MEMBER(atarigt_state::sound_data_r) WRITE32_MEMBER(atarigt_state::sound_data_w) { if (ACCESSING_BITS_0_15) - cage_control_w(machine(), data); + m_cage->control_w(data); if (ACCESSING_BITS_16_31) - cage_main_w(space, data >> 16); + m_cage->main_w(data >> 16); } @@ -847,11 +830,28 @@ static MACHINE_CONFIG_START( atarigt, atarigt_state ) MCFG_ATARIRLE_ADD("rle", modesc) - /* sound hardware */ - MCFG_FRAGMENT_ADD(cage) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( tmek, atarigt ) + /* sound hardware */ + MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0) + MCFG_ATARI_CAGE_SPEEDUP(0x4fad) + MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(atarigt_state,cage_irq_callback)) +MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( primrage, atarigt ) + /* sound hardware */ + MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0) + MCFG_ATARI_CAGE_SPEEDUP(0x42f2) + MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(atarigt_state,cage_irq_callback)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( primrage20, atarigt ) + /* sound hardware */ + MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0) + MCFG_ATARI_CAGE_SPEEDUP(0x48a4) + MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(atarigt_state,cage_irq_callback)) +MACHINE_CONFIG_END /************************************* * @@ -1307,9 +1307,6 @@ DRIVER_INIT_MEMBER(atarigt_state,tmek) { m_is_primrage = 0; - cage_init(machine(), 0x4fad); - cage_set_irq_handler(cage_irq_callback); - /* setup protection */ m_protection_r = &atarigt_state::tmek_protection_r; m_protection_w = &atarigt_state::tmek_protection_w; @@ -1319,31 +1316,25 @@ DRIVER_INIT_MEMBER(atarigt_state,tmek) } -void atarigt_state::primrage_init_common(offs_t cage_speedup) +DRIVER_INIT_MEMBER(atarigt_state,primrage) { m_is_primrage = 1; - cage_init(machine(), cage_speedup); - cage_set_irq_handler(cage_irq_callback); - /* install protection */ m_protection_r = &atarigt_state::primrage_protection_r; m_protection_w = &atarigt_state::primrage_protection_w; } -DRIVER_INIT_MEMBER(atarigt_state,primrage) { primrage_init_common(0x42f2); } -DRIVER_INIT_MEMBER(atarigt_state,primrage20) { primrage_init_common(0x48a4); } - /************************************* * * Game driver(s) * *************************************/ -GAME( 1994, tmek, 0, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, The Warlords)", GAME_UNEMULATED_PROTECTION ) -GAME( 1994, tmek51p, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, prototype)", GAME_UNEMULATED_PROTECTION ) -GAME( 1994, tmek45, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.5)", GAME_UNEMULATED_PROTECTION ) -GAME( 1994, tmek44, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.4)", GAME_UNEMULATED_PROTECTION ) -GAME( 1994, tmek20, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v2.0, prototype)", 0 ) -GAME( 1994, primrage, 0, atarigt, primrage, atarigt_state, primrage, ROT0, "Atari Games", "Primal Rage (version 2.3)", GAME_UNEMULATED_PROTECTION ) -GAME( 1994, primrage20, primrage, atarigt, primrage, atarigt_state, primrage20, ROT0, "Atari Games", "Primal Rage (version 2.0)", GAME_UNEMULATED_PROTECTION ) +GAME( 1994, tmek, 0, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, The Warlords)", GAME_UNEMULATED_PROTECTION ) +GAME( 1994, tmek51p, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, prototype)", GAME_UNEMULATED_PROTECTION ) +GAME( 1994, tmek45, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.5)", GAME_UNEMULATED_PROTECTION ) +GAME( 1994, tmek44, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.4)", GAME_UNEMULATED_PROTECTION ) +GAME( 1994, tmek20, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v2.0, prototype)", 0 ) +GAME( 1994, primrage, 0, primrage, primrage, atarigt_state, primrage, ROT0, "Atari Games", "Primal Rage (version 2.3)", GAME_UNEMULATED_PROTECTION ) +GAME( 1994, primrage20, primrage, primrage20,primrage, atarigt_state, primrage, ROT0, "Atari Games", "Primal Rage (version 2.0)", GAME_UNEMULATED_PROTECTION ) diff --git a/src/mame/drivers/atlantis.c b/src/mame/drivers/atlantis.c index 5f975416f28..8da50e43c25 100644 --- a/src/mame/drivers/atlantis.c +++ b/src/mame/drivers/atlantis.c @@ -45,12 +45,14 @@ class atlantis_state : public driver_device public: atlantis_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu") { } + m_maincpu(*this, "maincpu"), + m_dcs(*this, "dcs") { } DECLARE_DRIVER_INIT(mwskins); virtual void machine_start(); virtual void machine_reset(); UINT32 screen_update_mwskins(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); required_device m_maincpu; + required_device m_dcs; }; @@ -76,8 +78,8 @@ void atlantis_state::machine_start() void atlantis_state::machine_reset() { - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); } @@ -157,7 +159,8 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state ) MCFG_PALETTE_ADD_BBBBBGGGGGRRRRR("palette") /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs2_audio_denver) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(8) MACHINE_CONFIG_END @@ -200,7 +203,6 @@ ROM_END DRIVER_INIT_MEMBER(atlantis_state,mwskins) { - dcs2_init(machine(), 8, 0); } /************************************* diff --git a/src/mame/drivers/gaelco3d.c b/src/mame/drivers/gaelco3d.c index 10e6a64597a..c4572d5b6f0 100644 --- a/src/mame/drivers/gaelco3d.c +++ b/src/mame/drivers/gaelco3d.c @@ -157,8 +157,6 @@ REF. 970429 -static void adsp_tx_callback(adsp21xx_device &device, int port, INT32 data); - WRITE_LINE_MEMBER(gaelco3d_state::ser_irq) { if (state) @@ -634,60 +632,58 @@ TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq) m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, reg); } - -static void adsp_tx_callback(adsp21xx_device &device, int port, INT32 data) +WRITE32_MEMBER(gaelco3d_state::adsp_tx_callback) { - gaelco3d_state *state = device.machine().driver_data(); /* check if it's for SPORT1 */ - if (port != 1) + if (offset != 1) return; /* check if SPORT1 is enabled */ - if (state->m_adsp_control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */ + if (m_adsp_control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */ { /* we only support autobuffer here (wich is what this thing uses), bail if not enabled */ - if (state->m_adsp_control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */ + if (m_adsp_control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */ { /* get the autobuffer registers */ int mreg, lreg; UINT16 source; attotime sample_period; - state->m_adsp_ireg = (state->m_adsp_control_regs[S1_AUTOBUF_REG] >> 9) & 7; - mreg = (state->m_adsp_control_regs[S1_AUTOBUF_REG] >> 7) & 3; - mreg |= state->m_adsp_ireg & 0x04; /* msb comes from ireg */ - lreg = state->m_adsp_ireg; + m_adsp_ireg = (m_adsp_control_regs[S1_AUTOBUF_REG] >> 9) & 7; + mreg = (m_adsp_control_regs[S1_AUTOBUF_REG] >> 7) & 3; + mreg |= m_adsp_ireg & 0x04; /* msb comes from ireg */ + lreg = m_adsp_ireg; /* now get the register contents in a more legible format */ /* we depend on register indexes to be continuous (wich is the case in our core) */ - source = device.state_int(ADSP2100_I0 + state->m_adsp_ireg); - state->m_adsp_incs = device.state_int(ADSP2100_M0 + mreg); - state->m_adsp_size = device.state_int(ADSP2100_L0 + lreg); + source = m_adsp->state_int(ADSP2100_I0 + m_adsp_ireg); + m_adsp_incs = m_adsp->state_int(ADSP2100_M0 + mreg); + m_adsp_size = m_adsp->state_int(ADSP2100_L0 + lreg); /* get the base value, since we need to keep it around for wrapping */ - source -= state->m_adsp_incs; + source -= m_adsp_incs; /* make it go back one so we dont lose the first sample */ - device.set_state_int(ADSP2100_I0 + state->m_adsp_ireg, source); + m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source); /* save it as it is now */ - state->m_adsp_ireg_base = source; + m_adsp_ireg_base = source; /* calculate how long until we generate an interrupt */ /* period per each bit sent */ - sample_period = attotime::from_hz(device.clock()) * (2 * (state->m_adsp_control_regs[S1_SCLKDIV_REG] + 1)); + sample_period = attotime::from_hz(m_adsp->clock()) * (2 * (m_adsp_control_regs[S1_SCLKDIV_REG] + 1)); /* now put it down to samples, so we know what the channel frequency has to be */ sample_period *= 16 * SOUND_CHANNELS; - dmadac_set_frequency(&state->m_dmadac[0], SOUND_CHANNELS, ATTOSECONDS_TO_HZ(sample_period.attoseconds)); - dmadac_enable(&state->m_dmadac[0], SOUND_CHANNELS, 1); + dmadac_set_frequency(&m_dmadac[0], SOUND_CHANNELS, ATTOSECONDS_TO_HZ(sample_period.attoseconds)); + dmadac_enable(&m_dmadac[0], SOUND_CHANNELS, 1); /* fire off a timer wich will hit every half-buffer */ - sample_period = (sample_period * state->m_adsp_size) / (SOUND_CHANNELS * state->m_adsp_incs); + sample_period = (sample_period * m_adsp_size) / (SOUND_CHANNELS * m_adsp_incs); - state->m_adsp_autobuffer_timer->adjust(sample_period, 0, sample_period); + m_adsp_autobuffer_timer->adjust(sample_period, 0, sample_period); return; } @@ -696,10 +692,10 @@ static void adsp_tx_callback(adsp21xx_device &device, int port, INT32 data) } /* if we get there, something went wrong. Disable playing */ - dmadac_enable(&state->m_dmadac[0], SOUND_CHANNELS, 0); + dmadac_enable(&m_dmadac[0], SOUND_CHANNELS, 0); /* remove timer */ - state->m_adsp_autobuffer_timer->reset(); + m_adsp_autobuffer_timer->reset(); } @@ -955,9 +951,9 @@ INPUT_PORTS_END static const adsp21xx_config adsp_config = { - NULL, /* callback for serial receive */ - adsp_tx_callback, /* callback for serial transmit */ - NULL /* callback for timer fired */ + DEVCB_NULL, /* callback for serial receive */ + DEVCB_DRIVER_MEMBER32(gaelco3d_state, adsp_tx_callback), /* callback for serial transmit */ + DEVCB_NULL /* callback for timer fired */ }; static const tms3203x_config tms_config = diff --git a/src/mame/drivers/harddriv.c b/src/mame/drivers/harddriv.c index 5c17451b894..aca4e67d932 100644 --- a/src/mame/drivers/harddriv.c +++ b/src/mame/drivers/harddriv.c @@ -1288,16 +1288,16 @@ INPUT_PORTS_END static const adsp21xx_config ds3sdsp_config = { - hdds3sdsp_serial_rx_callback, /* callback for serial receive */ - hdds3sdsp_serial_tx_callback, /* callback for serial transmit */ - hdds3sdsp_timer_enable_callback /* callback for timer fired */ + DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3sdsp_serial_rx_callback), /* callback for serial receive */ + DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3sdsp_serial_tx_callback), /* callback for serial transmit */ + DEVCB_DRIVER_LINE_MEMBER(harddriv_state, hdds3sdsp_timer_enable_callback) /* callback for timer fired */ }; static const adsp21xx_config ds3xdsp_config = { - hdds3xdsp_serial_rx_callback, /* callback for serial receive */ - hdds3xdsp_serial_tx_callback, /* callback for serial transmit */ - hdds3xdsp_timer_enable_callback /* callback for timer fired */ + DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3xdsp_serial_rx_callback), /* callback for serial receive */ + DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3xdsp_serial_tx_callback), /* callback for serial transmit */ + DEVCB_DRIVER_LINE_MEMBER(harddriv_state, hdds3xdsp_timer_enable_callback) /* callback for timer fired */ }; diff --git a/src/mame/drivers/kinst.c b/src/mame/drivers/kinst.c index 467b47b464a..1d4e5e228c6 100644 --- a/src/mame/drivers/kinst.c +++ b/src/mame/drivers/kinst.c @@ -135,7 +135,6 @@ Notes: #include "cpu/adsp2100/adsp2100.h" #include "machine/ataintf.h" #include "machine/idehd.h" -#include "machine/midwayic.h" #include "audio/dcs.h" @@ -154,7 +153,8 @@ public: m_control(*this, "control"), m_rombase(*this, "rombase"), m_maincpu(*this, "maincpu"), - m_ata(*this, "ata" ) + m_ata(*this, "ata"), + m_dcs(*this, "dcs") { } @@ -179,6 +179,7 @@ public: INTERRUPT_GEN_MEMBER(irq0_start); required_device m_maincpu; required_device m_ata; + required_device m_dcs; protected: virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); @@ -362,7 +363,7 @@ READ32_MEMBER(kinst_state::kinst_control_r) case 2: /* $90 -- sound return */ result = ioport(portnames[offset])->read(); result &= ~0x0002; - if (dcs_control_r(machine()) & 0x800) + if (m_dcs->control_r() & 0x800) result |= 0x0002; break; @@ -402,12 +403,12 @@ WRITE32_MEMBER(kinst_state::kinst_control_w) break; case 1: /* $88 - sound reset */ - dcs_reset_w(machine(), ~data & 0x01); + m_dcs->reset_w(~data & 0x01); break; case 2: /* $90 - sound control */ if (!(olddata & 0x02) && (m_control[offset] & 0x02)) - dcs_data_w(machine(), m_control[3]); + m_dcs->data_w(m_control[3]); break; case 3: /* $98 - sound data */ @@ -699,7 +700,7 @@ static MACHINE_CONFIG_START( kinst, kinst_state ) MCFG_PALETTE_ADD_BBBBBGGGGGRRRRR("palette") /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs_audio_2k) + MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K, 0) MACHINE_CONFIG_END @@ -911,8 +912,6 @@ DRIVER_INIT_MEMBER(kinst_state,kinst) { static const UINT8 kinst_control_map[8] = { 0,1,2,3,4,5,6,7 }; - dcs_init(machine()); - /* set up the control register mapping */ m_control_map = kinst_control_map; } @@ -929,8 +928,6 @@ DRIVER_INIT_MEMBER(kinst_state,kinst2) // write: $98 on ki2 = $80 on ki // write: $a0 on ki2 = $98 on ki - dcs_init(machine()); - /* set up the control register mapping */ m_control_map = kinst2_control_map; } diff --git a/src/mame/drivers/magictg.c b/src/mame/drivers/magictg.c index fdcf41ac161..c16a3cc99dd 100644 --- a/src/mame/drivers/magictg.c +++ b/src/mame/drivers/magictg.c @@ -890,9 +890,9 @@ static const mips3_config config = static const adsp21xx_config adsp_config = { - NULL, /* callback for serial receive */ - 0,//sound_tx_callback, /* callback for serial transmit */ - 0,//timer_enable_callback /* callback for timer fired */ + DEVCB_NULL, /* callback for serial receive */ + DEVCB_NULL,//sound_tx_callback, /* callback for serial transmit */ + DEVCB_NULL,//timer_enable_callback /* callback for timer fired */ }; static const voodoo_config voodoo_1_intf = diff --git a/src/mame/drivers/metalmx.c b/src/mame/drivers/metalmx.c index 6241e3fac74..60863b78a50 100644 --- a/src/mame/drivers/metalmx.c +++ b/src/mame/drivers/metalmx.c @@ -345,21 +345,21 @@ READ32_MEMBER(metalmx_state::sound_data_r) UINT32 result = 0; if (ACCESSING_BITS_0_15) - result |= cage_control_r(machine()); + result |= m_cage->control_r(); if (ACCESSING_BITS_16_31) - result |= cage_main_r(space) << 16; + result |= m_cage->main_r() << 16; return result; } WRITE32_MEMBER(metalmx_state::sound_data_w) { if (ACCESSING_BITS_0_15) - cage_control_w(machine(), data); + m_cage->control_w(data); if (ACCESSING_BITS_16_31) - cage_main_w(space, data >> 16); + m_cage->main_w(data >> 16); } -static void cage_irq_callback(running_machine &machine, int reason) +WRITE8_MEMBER(metalmx_state::cage_irq_callback) { /* TODO */ } @@ -690,9 +690,9 @@ INPUT_PORTS_END static const adsp21xx_config adsp_config = { - NULL, /* callback for serial receive */ - NULL, /* callback for serial transmit */ - NULL, /* callback for timer fired */ + DEVCB_NULL, /* callback for serial receive */ + DEVCB_NULL, /* callback for serial transmit */ + DEVCB_NULL, /* callback for timer fired */ }; static const tms34010_config gsp_config = @@ -743,7 +743,9 @@ static MACHINE_CONFIG_START( metalmx, metalmx_state ) MCFG_PALETTE_ADD_RRRRRGGGGGGBBBBB("palette") - MCFG_FRAGMENT_ADD(cage) + MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0) + MCFG_ATARI_CAGE_SPEEDUP(0) // TODO: speedup address + MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(metalmx_state,cage_irq_callback)) MACHINE_CONFIG_END @@ -752,9 +754,6 @@ DRIVER_INIT_MEMBER(metalmx_state,metalmx) UINT8 *adsp_boot = (UINT8*)memregion("adsp")->base(); m_adsp->load_boot_data(adsp_boot, m_adsp_internal_program_ram); - - cage_init(machine(), 0); // TODO: speedup address - cage_set_irq_handler(cage_irq_callback); } void metalmx_state::machine_reset() diff --git a/src/mame/drivers/midtunit.c b/src/mame/drivers/midtunit.c index d4f724d95c0..d68852f0c36 100644 --- a/src/mame/drivers/midtunit.c +++ b/src/mame/drivers/midtunit.c @@ -634,7 +634,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( tunit_dcs, tunit_core ) /* basic machine hardware */ - MCFG_FRAGMENT_ADD(dcs_audio_2k) + MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K, 0) MACHINE_CONFIG_END diff --git a/src/mame/drivers/midvunit.c b/src/mame/drivers/midvunit.c index 4ee0c75083d..cd8c2a16efc 100644 --- a/src/mame/drivers/midvunit.c +++ b/src/mame/drivers/midvunit.c @@ -32,10 +32,8 @@ Known to exist but not dumped: #include "cpu/adsp2100/adsp2100.h" #include "audio/dcs.h" #include "machine/ataintf.h" -#include "machine/midwayic.h" #include "machine/nvram.h" #include "includes/midvunit.h" -#include "mcfglgcy.h" #define CPU_CLOCK 50000000 @@ -61,8 +59,8 @@ void midvunit_state::machine_start() void midvunit_state::machine_reset() { - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); memcpy(m_ram_base, memregion("user1")->base(), 0x20000*4); m_maincpu->reset(); @@ -74,8 +72,8 @@ void midvunit_state::machine_reset() MACHINE_RESET_MEMBER(midvunit_state,midvplus) { - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); memcpy(m_ram_base, memregion("user1")->base(), 0x20000*4); m_maincpu->reset(); @@ -197,7 +195,7 @@ WRITE32_MEMBER(midvunit_state::midvunit_control_w) watchdog_reset_w(space, 0, 0); /* bit 1 is the DCS sound reset */ - dcs_reset_w(machine(), (~m_control_data >> 1) & 1); + m_dcs->reset_w((~m_control_data >> 1) & 1); /* log anything unusual */ if ((olddata ^ m_control_data) & ~0x00e8) @@ -211,7 +209,7 @@ WRITE32_MEMBER(midvunit_state::crusnwld_control_w) COMBINE_DATA(&m_control_data); /* bit 11 is the DCS sound reset */ - dcs_reset_w(machine(), (~m_control_data >> 11) & 1); + m_dcs->reset_w((~m_control_data >> 11) & 1); /* bit 9 is the watchdog */ if ((olddata ^ m_control_data) & 0x0200) @@ -228,7 +226,7 @@ WRITE32_MEMBER(midvunit_state::crusnwld_control_w) WRITE32_MEMBER(midvunit_state::midvunit_sound_w) { logerror("Sound W = %02X\n", data); - dcs_data_w(machine(), data & 0xff); + m_dcs->data_w(data & 0xff); } @@ -293,17 +291,16 @@ WRITE32_MEMBER(midvunit_state::tms32031_control_w) * *************************************/ -#if 0 READ32_MEMBER(midvunit_state::crusnwld_serial_status_r) { - int status = midway_serial_pic_status_r(); + int status = m_midway_serial_pic->status_r(space,0); return (ioport("991030")->read() & 0x7fff7fff) | (status << 31) | (status << 15); } READ32_MEMBER(midvunit_state::crusnwld_serial_data_r) { - return midway_serial_pic_r() << 16; + return m_midway_serial_pic->read(space,0) << 16; } @@ -311,12 +308,11 @@ WRITE32_MEMBER(midvunit_state::crusnwld_serial_data_w) { if ((data & 0xf0000) == 0x10000) { - midway_serial_pic_reset_w(1); - midway_serial_pic_reset_w(0); + m_midway_serial_pic->reset_w(1); + m_midway_serial_pic->reset_w(0); } - midway_serial_pic_w(data >> 16); + m_midway_serial_pic->write(space,0,data >> 16); } -#endif /************************************* @@ -359,20 +355,20 @@ WRITE32_MEMBER(midvunit_state::bit_reset_w) READ32_MEMBER(midvunit_state::offroadc_serial_status_r) { - int status = midway_serial_pic2_status_r(space); + int status = m_midway_serial_pic2->status_r(space,0); return (ioport("991030")->read() & 0x7fff7fff) | (status << 31) | (status << 15); } READ32_MEMBER(midvunit_state::offroadc_serial_data_r) { - return midway_serial_pic2_r(space) << 16; + return m_midway_serial_pic2->read(space, 0) << 16; } WRITE32_MEMBER(midvunit_state::offroadc_serial_data_w) { - midway_serial_pic2_w(space, data >> 16); + m_midway_serial_pic2->write(space, 0, data >> 16); } @@ -508,7 +504,7 @@ static ADDRESS_MAP_START( midvplus_map, AS_PROGRAM, 32, midvunit_state ) AM_RANGE(0x980040, 0x980040) AM_READWRITE(midvunit_page_control_r, midvunit_page_control_w) AM_RANGE(0x980080, 0x980080) AM_NOP AM_RANGE(0x980082, 0x980083) AM_READ(midvunit_dma_trigger_r) - AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w) + AM_RANGE(0x990000, 0x99000f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write) AM_RANGE(0x994000, 0x994000) AM_WRITE(midvunit_control_w) AM_RANGE(0x995020, 0x995020) AM_WRITE(midvunit_cmos_protect_w) AM_RANGE(0x9a0000, 0x9a0007) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0x0000ffff) @@ -1032,9 +1028,24 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( midvunit, midvcommon ) /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs_audio_2k) + MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K, 0) MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( crusnwld, midvunit ) + /* valid values are 450 or 460 */ + MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0) + MCFG_MIDWAY_SERIAL_PIC_UPPER(450) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( offroadc, midvunit ) + /* valid values are 230 or 234 */ + MCFG_DEVICE_ADD("serial_pic2", MIDWAY_SERIAL_PIC2, 0) + MCFG_MIDWAY_SERIAL_PIC2_UPPER(230) + MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(94) +MACHINE_CONFIG_END + + static MACHINE_CONFIG_DERIVED( midvplus, midvcommon ) /* basic machine hardware */ @@ -1044,12 +1055,18 @@ static MACHINE_CONFIG_DERIVED( midvplus, midvcommon ) MCFG_MACHINE_RESET_OVERRIDE(midvunit_state,midvplus) MCFG_DEVICE_REMOVE("nvram") - MCFG_NVRAM_HANDLER(midway_serial_pic2) MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true) + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(0) + MCFG_MIDWAY_IOASIC_UPPER(452) /* no alternates */ + MCFG_MIDWAY_IOASIC_YEAR_OFFS(94) + /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs2_audio_2115) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3839) MACHINE_CONFIG_END @@ -1712,7 +1729,6 @@ READ32_MEMBER(midvunit_state::generic_speedup_r) void midvunit_state::init_crusnusa_common(offs_t speedup) { - dcs_init(machine()); m_adc_shift = 24; /* speedups */ @@ -1725,17 +1741,14 @@ DRIVER_INIT_MEMBER(midvunit_state,crusnu21) { init_crusnusa_common(0xc051); } void midvunit_state::init_crusnwld_common(offs_t speedup) { - dcs_init(machine()); m_adc_shift = 16; /* control register is different */ m_maincpu->space(AS_PROGRAM).install_write_handler(0x994000, 0x994000, write32_delegate(FUNC(midvunit_state::crusnwld_control_w),this)); - /* valid values are 450 or 460 */ - midway_serial_pic_init(machine(), 450); - m_maincpu->space(AS_PROGRAM).install_read_handler(0x991030, 0x991030, read32_delegate(FUNC(midvunit_state::offroadc_serial_status_r),this)); - m_maincpu->space(AS_PROGRAM).install_read_handler(0x996000, 0x996000, read32_delegate(FUNC(midvunit_state::offroadc_serial_data_r),this)); - m_maincpu->space(AS_PROGRAM).install_write_handler(0x996000, 0x996000, write32_delegate(FUNC(midvunit_state::offroadc_serial_data_w),this)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x991030, 0x991030, read32_delegate(FUNC(midvunit_state::crusnwld_serial_status_r),this)); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x996000, 0x996000, read32_delegate(FUNC(midvunit_state::crusnwld_serial_data_r),this)); + m_maincpu->space(AS_PROGRAM).install_write_handler(0x996000, 0x996000, write32_delegate(FUNC(midvunit_state::crusnwld_serial_data_w),this)); /* install strange protection device */ m_maincpu->space(AS_PROGRAM).install_read_handler(0x9d0000, 0x9d1fff, read32_delegate(FUNC(midvunit_state::bit_data_r),this)); @@ -1753,14 +1766,11 @@ DRIVER_INIT_MEMBER(midvunit_state,crusnw13) { init_crusnwld_common(0); } DRIVER_INIT_MEMBER(midvunit_state,offroadc) { - dcs_init(machine()); m_adc_shift = 16; /* control register is different */ m_maincpu->space(AS_PROGRAM).install_write_handler(0x994000, 0x994000, write32_delegate(FUNC(midvunit_state::crusnwld_control_w),this)); - /* valid values are 230 or 234 */ - midway_serial_pic2_init(machine(), 230, 94); m_maincpu->space(AS_PROGRAM).install_read_handler(0x991030, 0x991030, read32_delegate(FUNC(midvunit_state::offroadc_serial_status_r),this)); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x996000, 0x996000, read32_delegate(FUNC(midvunit_state::offroadc_serial_data_r),this), write32_delegate(FUNC(midvunit_state::offroadc_serial_data_w),this)); @@ -1774,8 +1784,6 @@ DRIVER_INIT_MEMBER(midvunit_state,wargods) UINT8 default_nvram[256]; /* initialize the subsystems */ - dcs2_init(machine(), 2, 0x3839); - midway_ioasic_init(machine(), 0, 452/* no alternates */, 94, NULL); m_adc_shift = 16; /* we need proper VRAM */ @@ -1787,7 +1795,7 @@ DRIVER_INIT_MEMBER(midvunit_state,wargods) default_nvram[0x12] = default_nvram[0x32] = 0xaf; default_nvram[0x17] = default_nvram[0x37] = 0xd8; default_nvram[0x18] = default_nvram[0x38] = 0xe7; - midway_serial_pic2_set_default_nvram(default_nvram); + machine().device("ioasic")->set_default_nvram(default_nvram); /* speedups */ m_generic_speedup = m_maincpu->space(AS_PROGRAM).install_read_handler(0x2f4c, 0x2f4c, read32_delegate(FUNC(midvunit_state::generic_speedup_r),this)); @@ -1805,19 +1813,19 @@ GAME( 1994, crusnusa, 0, midvunit, crusnusa, midvunit_state, crusnusa, GAME( 1994, crusnusa40, crusnusa, midvunit, crusnusa, midvunit_state, crusnu40, ROT0, "Midway", "Cruis'n USA (rev L4.0)", GAME_SUPPORTS_SAVE ) GAME( 1994, crusnusa21, crusnusa, midvunit, crusnusa, midvunit_state, crusnu21, ROT0, "Midway", "Cruis'n USA (rev L2.1)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld, 0, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.5)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld24, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.4)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld23, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.3)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld20, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.0)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld19, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.9)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld17, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.7)", GAME_SUPPORTS_SAVE ) -GAME( 1996, crusnwld13, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.3)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld, 0, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.5)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld24, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.4)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld23, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.3)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld20, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.0)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld19, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.9)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld17, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.7)", GAME_SUPPORTS_SAVE ) +GAME( 1996, crusnwld13, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.3)", GAME_SUPPORTS_SAVE ) -GAME( 1997, offroadc, 0, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.63)", GAME_SUPPORTS_SAVE ) -GAME( 1997, offroadc5, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.50)", GAME_SUPPORTS_SAVE ) -GAME( 1997, offroadc4, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", GAME_SUPPORTS_SAVE ) -GAME( 1997, offroadc3, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", GAME_SUPPORTS_SAVE ) -GAME( 1997, offroadc1, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.10)", GAME_SUPPORTS_SAVE ) +GAME( 1997, offroadc, 0, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.63)", GAME_SUPPORTS_SAVE ) +GAME( 1997, offroadc5, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.50)", GAME_SUPPORTS_SAVE ) +GAME( 1997, offroadc4, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", GAME_SUPPORTS_SAVE ) +GAME( 1997, offroadc3, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", GAME_SUPPORTS_SAVE ) +GAME( 1997, offroadc1, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.10)", GAME_SUPPORTS_SAVE ) GAME( 1995, wargods, 0, midvplus, wargods, midvunit_state, wargods, ROT0, "Midway", "War Gods (HD 10/09/1996 - Dual Resolution)", GAME_SUPPORTS_SAVE ) GAME( 1995, wargodsa, wargods, midvplus, wargodsa, midvunit_state, wargods, ROT0, "Midway", "War Gods (HD 08/15/1996)", GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/midwunit.c b/src/mame/drivers/midwunit.c index 2e39ff4d4d4..575ec8b7fe6 100644 --- a/src/mame/drivers/midwunit.c +++ b/src/mame/drivers/midwunit.c @@ -655,8 +655,11 @@ static MACHINE_CONFIG_START( wunit, midwunit_state ) MCFG_VIDEO_START_OVERRIDE(midwunit_state,midwunit) + MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0) + MCFG_MIDWAY_SERIAL_PIC_UPPER(528); + /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs_audio_8k) + MCFG_DEVICE_ADD("dcs", DCS_AUDIO_8K, 0) MACHINE_CONFIG_END diff --git a/src/mame/drivers/midxunit.c b/src/mame/drivers/midxunit.c index a12e59324da..4188f96d42b 100644 --- a/src/mame/drivers/midxunit.c +++ b/src/mame/drivers/midxunit.c @@ -278,9 +278,13 @@ static MACHINE_CONFIG_START( midxunit, midxunit_state ) MCFG_SCREEN_UPDATE_DEVICE("maincpu", tms34010_device, tms340x0_ind16) MCFG_SCREEN_PALETTE("palette") MCFG_VIDEO_START_OVERRIDE(midxunit_state,midxunit) + + MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0) + /* serial prefixes 419, 420 */ + MCFG_MIDWAY_SERIAL_PIC_UPPER(419); /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs_audio_2k_uart) + MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K_UART, 0) MACHINE_CONFIG_END diff --git a/src/mame/drivers/midzeus.c b/src/mame/drivers/midzeus.c index ab81e37df2f..17c4509c1fb 100644 --- a/src/mame/drivers/midzeus.c +++ b/src/mame/drivers/midzeus.c @@ -563,7 +563,7 @@ static ADDRESS_MAP_START( zeus_map, AS_PROGRAM, 32, midzeus_state ) AM_RANGE(0x808000, 0x80807f) AM_READWRITE(tms32031_control_r, tms32031_control_w) AM_SHARE("tms32031_ctl") AM_RANGE(0x880000, 0x8803ff) AM_READWRITE(zeus_r, zeus_w) AM_SHARE("zeusbase") AM_RANGE(0x8d0000, 0x8d0004) AM_READWRITE(bitlatches_r, bitlatches_w) - AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w) + AM_RANGE(0x990000, 0x99000f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write) AM_RANGE(0x9e0000, 0x9e0000) AM_WRITENOP // watchdog? AM_RANGE(0x9f0000, 0x9f7fff) AM_READWRITE(cmos_r, cmos_w) AM_SHARE("nvram") AM_RANGE(0x9f8000, 0x9f8000) AM_WRITE(cmos_protect_w) @@ -580,7 +580,7 @@ static ADDRESS_MAP_START( zeus2_map, AS_PROGRAM, 32, midzeus2_state ) AM_RANGE(0x8a0000, 0x8a003f) AM_READWRITE(linkram_r, linkram_w) AM_SHARE("linkram") AM_RANGE(0x8d0000, 0x8d000a) AM_READWRITE(bitlatches_r, bitlatches_w) AM_RANGE(0x900000, 0x91ffff) AM_READWRITE(zpram_r, zpram_w) AM_SHARE("nvram") AM_MIRROR(0x020000) - AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w) + AM_RANGE(0x990000, 0x99000f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write) AM_RANGE(0x9c0000, 0x9c000f) AM_READWRITE(analog_r, analog_w) AM_RANGE(0x9e0000, 0x9e0000) AM_WRITENOP // watchdog? AM_RANGE(0x9f0000, 0x9f7fff) AM_READWRITE(zeus2_timekeeper_r, zeus2_timekeeper_w) @@ -1103,7 +1103,17 @@ static MACHINE_CONFIG_START( midzeus, midzeus_state ) MCFG_VIDEO_START_OVERRIDE(midzeus_state,midzeus) /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs2_audio_2104) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(94) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( mk4, midzeus ) + MCFG_DEVICE_MODIFY("ioasic") + MCFG_MIDWAY_IOASIC_UPPER(461/* or 474 */) + MCFG_MIDWAY_IOASIC_SHUFFLE_DEFAULT(1) MACHINE_CONFIG_END READ8_MEMBER(midzeus_state::PIC16C5X_T0_clk_r) @@ -1117,9 +1127,11 @@ ADDRESS_MAP_END static MACHINE_CONFIG_DERIVED( invasn, midzeus ) - MCFG_CPU_ADD("pic", PIC16C57, 8000000) /* ? */ MCFG_CPU_IO_MAP(pic_io_map) + + MCFG_DEVICE_MODIFY("ioasic") + MCFG_MIDWAY_IOASIC_UPPER(468/* or 488 */) MACHINE_CONFIG_END static MACHINE_CONFIG_START( midzeus2, midzeus2_state ) @@ -1142,11 +1154,25 @@ static MACHINE_CONFIG_START( midzeus2, midzeus2_state ) MCFG_VIDEO_START_OVERRIDE(midzeus2_state,midzeus2) /* sound hardware */ - MCFG_FRAGMENT_ADD(dcs2_audio_2104) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) MCFG_M48T35_ADD( "m48t35" ) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(99) + MCFG_MIDWAY_IOASIC_UPPER(474) MACHINE_CONFIG_END +static MACHINE_CONFIG_DERIVED( crusnexo, midzeus2 ) + MCFG_DEVICE_MODIFY("ioasic") + MCFG_MIDWAY_IOASIC_UPPER(472/* or 476,477,478,110 */) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( thegrid, midzeus2 ) + MCFG_DEVICE_MODIFY("ioasic") + MCFG_MIDWAY_IOASIC_UPPER(474/* or 491 */) +MACHINE_CONFIG_END /************************************* @@ -1471,24 +1497,17 @@ ROM_END DRIVER_INIT_MEMBER(midzeus_state,mk4) { - dcs2_init(machine(), 0, 0); - midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 461/* or 474 */, 94, NULL); - midway_ioasic_set_shuffle_state(1); } DRIVER_INIT_MEMBER(midzeus_state,invasn) { - dcs2_init(machine(), 0, 0); - midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 468/* or 488 */, 94, NULL); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x9c0000, 0x9c0000, read32_delegate(FUNC(midzeus_state::invasn_gun_r),this), write32_delegate(FUNC(midzeus_state::invasn_gun_w),this)); } DRIVER_INIT_MEMBER(midzeus_state,crusnexo) { - dcs2_init(machine(), 0, 0); - midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 472/* or 476,477,478,110 */, 99, NULL); membank("bank1")->configure_entries(0, 3, memregion("user2")->base(), 0x400000*4); m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x9b0004, 0x9b0007, read32_delegate(FUNC(midzeus_state::crusnexo_leds_r),this), write32_delegate(FUNC(midzeus_state::crusnexo_leds_w),this)); m_maincpu->space(AS_PROGRAM).install_write_handler (0x8d0009, 0x8d000a, write32_delegate(FUNC(midzeus_state::keypad_select_w),this)); @@ -1497,8 +1516,6 @@ DRIVER_INIT_MEMBER(midzeus_state,crusnexo) DRIVER_INIT_MEMBER(midzeus_state,thegrid) { - dcs2_init(machine(), 0, 0); - midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 474/* or 491 */, 99, NULL); membank("bank1")->configure_entries(0, 3, memregion("user2")->base(), 0x400000*4); } @@ -1510,16 +1527,16 @@ DRIVER_INIT_MEMBER(midzeus_state,thegrid) * *************************************/ -GAME( 1997, mk4, 0, midzeus, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) -GAME( 1997, mk4a, mk4, midzeus, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 2.1)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) -GAME( 1997, mk4b, mk4, midzeus, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 1.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) +GAME( 1997, mk4, 0, mk4, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) +GAME( 1997, mk4a, mk4, mk4, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 2.1)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) +GAME( 1997, mk4b, mk4, mk4, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 1.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) GAME( 1999, invasnab, 0, invasn, invasn, midzeus_state, invasn, ROT0, "Midway", "Invasion - The Abductors (version 5.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) GAME( 1999, invasnab4,invasnab, invasn, invasn, midzeus_state, invasn, ROT0, "Midway", "Invasion - The Abductors (version 4.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) GAME( 1999, invasnab3,invasnab, invasn, invasn, midzeus_state, invasn, ROT0, "Midway", "Invasion - The Abductors (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) -GAMEL( 1999, crusnexo, 0, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.4)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) -GAMEL( 1999, crusnexoa,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) -GAMEL( 1999, crusnexob,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.6)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) -GAMEL( 1999, crusnexoc,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.3)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) -GAMEL( 1999, crusnexod,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) -GAME( 2001, thegrid, 0, midzeus2, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.2)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) -GAME( 2001, thegrida, thegrid, midzeus2, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.1)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) +GAMEL( 1999, crusnexo, 0, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.4)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) +GAMEL( 1999, crusnexoa,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) +GAMEL( 1999, crusnexob,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.6)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) +GAMEL( 1999, crusnexoc,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.3)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) +GAMEL( 1999, crusnexod,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo ) +GAME( 2001, thegrid, 0, thegrid, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.2)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) +GAME( 2001, thegrida, thegrid, thegrid, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.1)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/seattle.c b/src/mame/drivers/seattle.c index 28a1b6ca1cf..5b862009f69 100644 --- a/src/mame/drivers/seattle.c +++ b/src/mame/drivers/seattle.c @@ -433,7 +433,10 @@ public: m_rombase(*this, "rombase"), m_maincpu(*this, "maincpu"), m_ide(*this, "ide"), - m_ethernet(*this, "ethernet") + m_ethernet(*this, "ethernet"), + m_cage(*this, "cage"), + m_dcs(*this, "dcs"), + m_ioasic(*this, "ioasic") { } @@ -446,6 +449,9 @@ public: required_device m_maincpu; required_device m_ide; optional_device m_ethernet; + optional_device m_cage; + optional_device m_dcs; + required_device m_ioasic; galileo_data m_galileo; widget_data m_widget; device_t *m_voodoo; @@ -509,6 +515,7 @@ public: UINT32 screen_update_seattle(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_CALLBACK_MEMBER(galileo_timer_callback); DECLARE_WRITE_LINE_MEMBER(ethernet_interrupt); + DECLARE_WRITE_LINE_MEMBER(ioasic_irq); void update_vblank_irq(); UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type); void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data); @@ -522,7 +529,7 @@ public: void galileo_reset(); void widget_reset(); void update_widget_irq(); - void init_common(int ioasic, int serialnum, int yearoffs, int config); + void init_common(int config); }; /************************************* @@ -604,15 +611,15 @@ void seattle_state::machine_reset() m_cpu_stalled_on_voodoo = FALSE; /* reset either the DCS2 board or the CAGE board */ - if (machine().device("dcs2") != NULL) + if (machine().device("dcs") != NULL) { - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); } else if (machine().device("cage") != NULL) { - cage_control_w(machine(), 0); - cage_control_w(machine(), 3); + m_cage->control_w(0); + m_cage->control_w(3); } /* reset the other devices */ @@ -662,14 +669,12 @@ WRITE_LINE_MEMBER(seattle_state::ethernet_interrupt) * *************************************/ -static void ioasic_irq(running_machine &machine, int state) +WRITE_LINE_MEMBER(seattle_state::ioasic_irq) { - seattle_state *drvstate = machine.driver_data(); - drvstate->m_maincpu->set_input_line(IOASIC_IRQ_NUM, state); + m_maincpu->set_input_line(IOASIC_IRQ_NUM, state); } - /************************************* * * Configurable interrupts @@ -1665,13 +1670,13 @@ WRITE32_MEMBER(seattle_state::asic_reset_w) { COMBINE_DATA(m_asic_reset); if (!(*m_asic_reset & 0x0002)) - midway_ioasic_reset(machine()); + m_ioasic->ioasic_reset(); } WRITE32_MEMBER(seattle_state::asic_fifo_w) { - midway_ioasic_fifo_w(machine(), data); + m_ioasic->fifo_w(data); } @@ -1784,7 +1789,7 @@ static ADDRESS_MAP_START( seattle_map, AS_PROGRAM, 32, seattle_state ) AM_RANGE(0x0a000f00, 0x0a000f07) AM_DEVREADWRITE("ide", bus_master_ide_controller_device, bmdma_r, bmdma_w) AM_RANGE(0x0c000000, 0x0c000fff) AM_READWRITE(galileo_r, galileo_w) AM_RANGE(0x13000000, 0x13000003) AM_WRITE(asic_fifo_w) - AM_RANGE(0x16000000, 0x1600003f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w) + AM_RANGE(0x16000000, 0x1600003f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write) AM_RANGE(0x16100000, 0x1611ffff) AM_READWRITE(cmos_r, cmos_w) AM_SHARE("nvram") AM_RANGE(0x17000000, 0x17000003) AM_READWRITE(cmos_protect_r, cmos_protect_w) AM_RANGE(0x17100000, 0x17100003) AM_WRITE(seattle_watchdog_w) @@ -2540,14 +2545,11 @@ static MACHINE_CONFIG_START( seattle_common, seattle_state ) MCFG_SCREEN_SIZE(640, 480) MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479) MCFG_SCREEN_UPDATE_DRIVER(seattle_state, screen_update_seattle) - /* sound hardware */ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( phoenixsa, seattle_common ) - MCFG_FRAGMENT_ADD(dcs2_audio_2115) - MCFG_CPU_REPLACE("maincpu", R4700LE, SYSTEM_CLOCK*2) MCFG_CPU_CONFIG(r5000_config) MCFG_CPU_PROGRAM_MAP(seattle_map) @@ -2555,8 +2557,6 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( seattle150, seattle_common ) - MCFG_FRAGMENT_ADD(dcs2_audio_2115) - MCFG_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*3) MCFG_CPU_CONFIG(r5000_config) MCFG_CPU_PROGRAM_MAP(seattle_map) @@ -2570,8 +2570,6 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( seattle200, seattle_common ) - MCFG_FRAGMENT_ADD(dcs2_audio_2115) - MCFG_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*4) MCFG_CPU_CONFIG(r5000_config) MCFG_CPU_PROGRAM_MAP(seattle_map) @@ -2595,8 +2593,6 @@ static const voodoo_config voodoo_2_intf = }; static MACHINE_CONFIG_DERIVED( flagstaff, seattle_common ) - MCFG_FRAGMENT_ADD(cage_seattle) - MCFG_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*4) MCFG_CPU_CONFIG(r5000_config) MCFG_CPU_PROGRAM_MAP(seattle_map) @@ -2608,7 +2604,153 @@ static MACHINE_CONFIG_DERIVED( flagstaff, seattle_common ) MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_2_intf) MACHINE_CONFIG_END +// Per game configurations +static MACHINE_CONFIG_DERIVED( wg3dh, phoenixsa ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3839) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_IOASIC_UPPER(310/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + + +static MACHINE_CONFIG_DERIVED( mace, seattle150 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3839) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE) + MCFG_MIDWAY_IOASIC_UPPER(319/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( sfrush, flagstaff ) + MCFG_DEVICE_ADD("cage", ATARI_CAGE_SEATTLE, 0) + MCFG_ATARI_CAGE_SPEEDUP(0x5236) + MCFG_ATARI_CAGE_IRQ_CALLBACK(DEVWRITE8("ioasic",midway_ioasic_device,cage_irq_handler)) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_IOASIC_UPPER(315/* no alternates */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(100) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( sfrushrk, flagstaff ) + MCFG_DEVICE_ADD("cage", ATARI_CAGE_SEATTLE, 0) + MCFG_ATARI_CAGE_SPEEDUP(0x5329) + MCFG_ATARI_CAGE_IRQ_CALLBACK(DEVWRITE8("ioasic",midway_ioasic_device,cage_irq_handler)) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK) + MCFG_MIDWAY_IOASIC_UPPER(331/* unknown */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(100) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( calspeed, seattle150_widget ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x39c0) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CALSPEED) + MCFG_MIDWAY_IOASIC_UPPER(328/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(100) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( vaportrx, seattle200_widget ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x39c2) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_VAPORTRX) + MCFG_MIDWAY_IOASIC_UPPER(324/* 334? unknown */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(100) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( biofreak, seattle150 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3835) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_IOASIC_UPPER(231/* no alternates */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( blitz, seattle150 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x39c2) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99) + MCFG_MIDWAY_IOASIC_UPPER(444/* or 528 */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( blitz99, seattle150 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99) + MCFG_MIDWAY_IOASIC_UPPER(481/* or 484 or 520 */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( blitz2k, seattle150 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99) + MCFG_MIDWAY_IOASIC_UPPER(494/* or 498 */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( carnevil, seattle150 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CARNEVIL) + MCFG_MIDWAY_IOASIC_UPPER(469/* 469 or 486 or 528 */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( hyprdriv, seattle200_widget ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(2) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_HYPRDRIV) + MCFG_MIDWAY_IOASIC_UPPER(469/* unknown */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq)) +MACHINE_CONFIG_END /************************************* * @@ -2839,11 +2981,8 @@ ROM_END * *************************************/ -void seattle_state::init_common(int ioasic, int serialnum, int yearoffs, int config) +void seattle_state::init_common(int config) { - /* initialize the subsystems */ - midway_ioasic_init(machine(),ioasic, serialnum, yearoffs, ioasic_irq); - /* switch off the configuration */ m_board_config = config; switch (config) @@ -2871,8 +3010,7 @@ void seattle_state::init_common(int ioasic, int serialnum, int yearoffs, int con DRIVER_INIT_MEMBER(seattle_state,wg3dh) { - dcs2_init(machine(), 2, 0x3839); - init_common(MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG); + init_common(PHOENIX_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x8004413C, 0x0C0054B4, 250); /* confirmed */ @@ -2883,8 +3021,7 @@ DRIVER_INIT_MEMBER(seattle_state,wg3dh) DRIVER_INIT_MEMBER(seattle_state,mace) { - dcs2_init(machine(), 2, 0x3839); - init_common(MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG); + init_common(SEATTLE_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x800108F8, 0x8C420000, 250); /* confirmed */ @@ -2893,8 +3030,7 @@ DRIVER_INIT_MEMBER(seattle_state,mace) DRIVER_INIT_MEMBER(seattle_state,sfrush) { - cage_init(machine(), 0x5236); - init_common(MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG); + init_common(FLAGSTAFF_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x80059F34, 0x3C028012, 250); /* confirmed */ @@ -2905,8 +3041,7 @@ DRIVER_INIT_MEMBER(seattle_state,sfrush) DRIVER_INIT_MEMBER(seattle_state,sfrushrk) { - cage_init(machine(), 0x5329); - init_common(MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG); + init_common(FLAGSTAFF_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x800343E8, 0x3C028012, 250); /* confirmed */ @@ -2918,9 +3053,7 @@ DRIVER_INIT_MEMBER(seattle_state,sfrushrk) DRIVER_INIT_MEMBER(seattle_state,calspeed) { - dcs2_init(machine(), 2, 0x39c0); - init_common(MIDWAY_IOASIC_CALSPEED, 328/* others? */, 100, SEATTLE_WIDGET_CONFIG); - midway_ioasic_set_auto_ack(1); + init_common(SEATTLE_WIDGET_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x80032534, 0x02221024, 250); /* confirmed */ @@ -2930,8 +3063,7 @@ DRIVER_INIT_MEMBER(seattle_state,calspeed) DRIVER_INIT_MEMBER(seattle_state,vaportrx) { - dcs2_init(machine(), 2, 0x39c2); - init_common(MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG); + init_common(SEATTLE_WIDGET_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x80049F14, 0x3C028020, 250); /* confirmed */ @@ -2942,17 +3074,13 @@ DRIVER_INIT_MEMBER(seattle_state,vaportrx) DRIVER_INIT_MEMBER(seattle_state,biofreak) { - dcs2_init(machine(), 2, 0x3835); - init_common(MIDWAY_IOASIC_STANDARD, 231/* no alternates */, 80, SEATTLE_CONFIG); - - /* speedups */ + init_common(SEATTLE_CONFIG); } DRIVER_INIT_MEMBER(seattle_state,blitz) { - dcs2_init(machine(), 2, 0x39c2); - init_common(MIDWAY_IOASIC_BLITZ99, 444/* or 528 */, 80, SEATTLE_CONFIG); + init_common(SEATTLE_CONFIG); /* for some reason, the code in the ROM appears buggy; this is a small patch to fix it */ m_rombase[0x934/4] += 4; @@ -2965,8 +3093,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz) DRIVER_INIT_MEMBER(seattle_state,blitz99) { - dcs2_init(machine(), 2, 0x0afb); - init_common(MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG); + init_common(SEATTLE_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x8014E41C, 0x3C038025, 250); /* confirmed */ @@ -2976,8 +3103,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz99) DRIVER_INIT_MEMBER(seattle_state,blitz2k) { - dcs2_init(machine(), 2, 0x0b5d); - init_common(MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG); + init_common(SEATTLE_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x8015773C, 0x3C038025, 250); /* confirmed */ @@ -2987,8 +3113,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz2k) DRIVER_INIT_MEMBER(seattle_state,carnevil) { - dcs2_init(machine(), 2, 0x0af7); - init_common(MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG); + init_common(SEATTLE_CONFIG); /* set up the gun */ m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x16800000, 0x1680001f, read32_delegate(FUNC(seattle_state::carnevil_gun_r),this), write32_delegate(FUNC(seattle_state::carnevil_gun_w),this)); @@ -3001,8 +3126,7 @@ DRIVER_INIT_MEMBER(seattle_state,carnevil) DRIVER_INIT_MEMBER(seattle_state,hyprdriv) { - dcs2_init(machine(), 2, 0x0af7); - init_common(MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG); + init_common(SEATTLE_WIDGET_CONFIG); /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x801643BC, 0x3C03801B, 250); /* confirmed */ @@ -3019,22 +3143,22 @@ DRIVER_INIT_MEMBER(seattle_state,hyprdriv) *************************************/ /* Atari */ -GAME( 1996, wg3dh, 0, phoenixsa, wg3dh, seattle_state, wg3dh, ROT0, "Atari Games", "Wayne Gretzky's 3D Hockey", GAME_SUPPORTS_SAVE ) -GAME( 1996, mace, 0, seattle150, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (boot ROM 1.0ce, HDD 1.0b)", GAME_SUPPORTS_SAVE ) -GAME( 1997, macea, mace, seattle150, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a)", GAME_SUPPORTS_SAVE ) -GAME( 1996, sfrush, 0, flagstaff, sfrush, seattle_state, sfrush, ROT0, "Atari Games", "San Francisco Rush", GAME_SUPPORTS_SAVE ) -GAME( 1996, sfrushrk, 0, flagstaff, sfrushrk, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) -GAME( 1998, calspeed, 0, seattle150_widget, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a, 4/17/98)", GAME_SUPPORTS_SAVE ) -GAME( 1998, calspeeda,calspeed, seattle150_widget, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 1.0r7a 3/4/98)", GAME_SUPPORTS_SAVE ) -GAME( 1998, vaportrx, 0, seattle200_widget, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX", GAME_SUPPORTS_SAVE ) -GAME( 1998, vaportrxp,vaportrx, seattle200_widget, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX (prototype)", GAME_SUPPORTS_SAVE ) +GAME( 1996, wg3dh, 0, wg3dh, wg3dh, seattle_state, wg3dh, ROT0, "Atari Games", "Wayne Gretzky's 3D Hockey", GAME_SUPPORTS_SAVE ) +GAME( 1996, mace, 0, mace, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (boot ROM 1.0ce, HDD 1.0b)", GAME_SUPPORTS_SAVE ) +GAME( 1997, macea, mace, mace, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a)", GAME_SUPPORTS_SAVE ) +GAME( 1996, sfrush, 0, sfrush, sfrush, seattle_state, sfrush, ROT0, "Atari Games", "San Francisco Rush", GAME_SUPPORTS_SAVE ) +GAME( 1996, sfrushrk, 0, sfrushrk, sfrushrk, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1998, calspeed, 0, calspeed, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a, 4/17/98)", GAME_SUPPORTS_SAVE ) +GAME( 1998, calspeeda,calspeed, calspeed, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 1.0r7a 3/4/98)", GAME_SUPPORTS_SAVE ) +GAME( 1998, vaportrx, 0, vaportrx, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX", GAME_SUPPORTS_SAVE ) +GAME( 1998, vaportrxp,vaportrx, vaportrx, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX (prototype)", GAME_SUPPORTS_SAVE ) /* Midway */ -GAME( 1997, biofreak, 0, seattle150, biofreak, seattle_state, biofreak, ROT0, "Midway Games", "BioFreaks (prototype)", GAME_SUPPORTS_SAVE ) -GAME( 1997, blitz, 0, seattle150, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.2)", GAME_SUPPORTS_SAVE ) -GAME( 1997, blitz11, blitz, seattle150, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.1)", GAME_SUPPORTS_SAVE ) -GAME( 1998, blitz99, 0, seattle150, blitz99, seattle_state, blitz99, ROT0, "Midway Games", "NFL Blitz '99", GAME_SUPPORTS_SAVE ) -GAME( 1999, blitz2k, 0, seattle150, blitz99, seattle_state, blitz2k, ROT0, "Midway Games", "NFL Blitz 2000 Gold Edition", GAME_SUPPORTS_SAVE ) -GAME( 1998, carnevil, 0, seattle150, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.3)", GAME_SUPPORTS_SAVE ) -GAME( 1998, carnevil1,carnevil, seattle150, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.1)", GAME_SUPPORTS_SAVE ) -GAME( 1998, hyprdriv, 0, seattle200_widget, hyprdriv, seattle_state, hyprdriv, ROT0, "Midway Games", "Hyperdrive", GAME_SUPPORTS_SAVE ) +GAME( 1997, biofreak, 0, biofreak, biofreak, seattle_state, biofreak, ROT0, "Midway Games", "BioFreaks (prototype)", GAME_SUPPORTS_SAVE ) +GAME( 1997, blitz, 0, blitz, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.2)", GAME_SUPPORTS_SAVE ) +GAME( 1997, blitz11, blitz, blitz, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.1)", GAME_SUPPORTS_SAVE ) +GAME( 1998, blitz99, 0, blitz99, blitz99, seattle_state, blitz99, ROT0, "Midway Games", "NFL Blitz '99", GAME_SUPPORTS_SAVE ) +GAME( 1999, blitz2k, 0, blitz2k, blitz99, seattle_state, blitz2k, ROT0, "Midway Games", "NFL Blitz 2000 Gold Edition", GAME_SUPPORTS_SAVE ) +GAME( 1998, carnevil, 0, carnevil, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.3)", GAME_SUPPORTS_SAVE ) +GAME( 1998, carnevil1,carnevil, carnevil, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.1)", GAME_SUPPORTS_SAVE ) +GAME( 1998, hyprdriv, 0, hyprdriv, hyprdriv, seattle_state, hyprdriv, ROT0, "Midway Games", "Hyperdrive", GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/stv.c b/src/mame/drivers/stv.c index 06ab6389a57..5c88c56058c 100644 --- a/src/mame/drivers/stv.c +++ b/src/mame/drivers/stv.c @@ -1148,9 +1148,9 @@ ADDRESS_MAP_END static const adsp21xx_config adsp_config = { - NULL, /* callback for serial receive */ - 0,//sound_tx_callback, /* callback for serial transmit */ - 0,//timer_enable_callback /* callback for timer fired */ + DEVCB_NULL, /* callback for serial receive */ + DEVCB_NULL,//sound_tx_callback, /* callback for serial transmit */ + DEVCB_NULL,//timer_enable_callback /* callback for timer fired */ }; MACHINE_RESET_MEMBER(stv_state,batmanfr) diff --git a/src/mame/drivers/vegas.c b/src/mame/drivers/vegas.c index 16632cf270a..799632c258f 100644 --- a/src/mame/drivers/vegas.c +++ b/src/mame/drivers/vegas.c @@ -475,7 +475,9 @@ public: m_ethernet(*this, "ethernet"), m_rambase(*this, "rambase"), m_nile_regs(*this, "nile_regs"), - m_rombase(*this, "rombase") { } + m_rombase(*this, "rombase"), + m_dcs(*this, "dcs"), + m_ioasic(*this, "ioasic") { } required_device m_maincpu; required_device m_timekeeper; @@ -484,6 +486,9 @@ public: required_shared_ptr m_rambase; required_shared_ptr m_nile_regs; required_shared_ptr m_rombase; + required_device m_dcs; + required_device m_ioasic; + UINT16 m_nile_irq_state; UINT16 m_ide_irq_state; UINT32 m_pci_bridge_regs[0x40]; @@ -526,10 +531,8 @@ public: void update_nile_irqs(); void update_sio_irqs(); inline void _add_dynamic_address(offs_t start, offs_t end, read32_delegate read, write32_delegate write); - inline void _add_legacy_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname); inline void _add_legacy_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname); - void init_common(int ioasic, int serialnum); DECLARE_WRITE32_MEMBER( cmos_unlock_w ); DECLARE_WRITE32_MEMBER(timekeeper_w); DECLARE_READ32_MEMBER(timekeeper_r); @@ -565,6 +568,7 @@ public: DECLARE_WRITE32_MEMBER( ethernet_w ); DECLARE_WRITE32_MEMBER( dcs3_fifo_full_w ); DECLARE_WRITE_LINE_MEMBER(ethernet_interrupt); + DECLARE_WRITE_LINE_MEMBER(ioasic_irq); }; @@ -637,10 +641,10 @@ void vegas_state::machine_reset() memset(m_pci_3dfx_regs, 0, sizeof(m_pci_3dfx_regs)); /* reset the DCS system if we have one */ - if (machine().device("dcs2") != NULL || machine().device("dsio") != NULL || machine().device("denver") != NULL) + if (machine().device("dcs") != NULL) { - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); } /* initialize IRQ states */ @@ -1313,17 +1317,15 @@ WRITE_LINE_MEMBER(vegas_state::vblank_assert) } -static void ioasic_irq(running_machine &machine, int state) +WRITE_LINE_MEMBER(vegas_state::ioasic_irq) { - vegas_state *drvstate = machine.driver_data(); if (state) - drvstate->m_sio_irq_state |= 0x04; + m_sio_irq_state |= 0x04; else - drvstate->m_sio_irq_state &= ~0x04; - drvstate->update_sio_irqs(); + m_sio_irq_state &= ~0x04; + update_sio_irqs(); } - WRITE_LINE_MEMBER(vegas_state::ethernet_interrupt) { if (state) @@ -1349,8 +1351,8 @@ WRITE32_MEMBER( vegas_state::sio_irq_clear_w ) /* bit 0x01 seems to be used to reset the IOASIC */ if (!(data & 0x01)) { - midway_ioasic_reset(space.machine()); - dcs_reset_w(space.machine(), data & 0x01); + m_ioasic->ioasic_reset(); + m_dcs->reset_w(data & 0x01); } /* they toggle bit 0x08 low to reset the VBLANK */ @@ -1479,7 +1481,7 @@ WRITE32_MEMBER( vegas_state::vegas_watchdog_w ) WRITE32_MEMBER( vegas_state::asic_fifo_w ) { - midway_ioasic_fifo_w(space.machine(), data); + m_ioasic->fifo_w(data); } @@ -1541,7 +1543,7 @@ WRITE32_MEMBER( vegas_state::ethernet_w ) WRITE32_MEMBER( vegas_state::dcs3_fifo_full_w ) { - midway_ioasic_fifo_full_w(space.machine(), data); + m_ioasic->fifo_full_w(data); } @@ -1554,7 +1556,6 @@ WRITE32_MEMBER( vegas_state::dcs3_fifo_full_w ) #define add_dynamic_address(s,e,r,w) _add_dynamic_address(s,e,r,w) -#define add_legacy_dynamic_address(s,e,r,w) _add_legacy_dynamic_address(s,e,r,w,#r,#w) #define add_legacy_dynamic_device_address(d,s,e,r,w) _add_legacy_dynamic_device_address(d,s,e,r,w,#r,#w) inline void vegas_state::_add_dynamic_address(offs_t start, offs_t end, read32_delegate read, write32_delegate write) @@ -1567,21 +1568,6 @@ inline void vegas_state::_add_dynamic_address(offs_t start, offs_t end, read32_d m_dynamic_count++; } -inline void vegas_state::_add_legacy_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname) -{ - legacy_dynamic_address *l_dynamic = m_legacy_dynamic; - l_dynamic[m_legacy_dynamic_count].start = start; - l_dynamic[m_legacy_dynamic_count].end = end; - l_dynamic[m_legacy_dynamic_count].mread = read; - l_dynamic[m_legacy_dynamic_count].mwrite = write; - l_dynamic[m_legacy_dynamic_count].dread = NULL; - l_dynamic[m_legacy_dynamic_count].dwrite = NULL; - l_dynamic[m_legacy_dynamic_count].device = NULL; - l_dynamic[m_legacy_dynamic_count].rdname = rdname; - l_dynamic[m_legacy_dynamic_count].wrname = wrname; - m_legacy_dynamic_count++; -} - inline void vegas_state::_add_legacy_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname) { legacy_dynamic_address *l_dynamic = m_legacy_dynamic; @@ -1651,14 +1637,14 @@ void vegas_state::remap_dynamic_addresses() base = m_nile_regs[NREG_DCS6] & 0x1fffff00; if (base >= m_rambase.bytes()) { - add_legacy_dynamic_address(base + 0x0000, base + 0x003f, midway_ioasic_packed_r, midway_ioasic_packed_w); + add_dynamic_address(base + 0x0000, base + 0x003f, read32_delegate(FUNC(midway_ioasic_device::packed_r),(midway_ioasic_device*)m_ioasic), write32_delegate(FUNC(midway_ioasic_device::packed_w),(midway_ioasic_device*)m_ioasic)); add_dynamic_address(base + 0x1000, base + 0x1003, read32_delegate(), write32_delegate(FUNC(vegas_state::asic_fifo_w), this)); if (m_dcs_idma_cs != 0) add_dynamic_address(base + 0x3000, base + 0x3003, read32_delegate(), write32_delegate(FUNC(vegas_state::dcs3_fifo_full_w), this)); if (m_dcs_idma_cs == 6) { - add_legacy_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w); - add_legacy_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w); + add_dynamic_address(base + 0x5000, base + 0x5003, read32_delegate(), write32_delegate(FUNC(dcs_audio_device::dsio_idma_addr_w),(dcs_audio_device*)m_dcs)); + add_dynamic_address(base + 0x7000, base + 0x7003, read32_delegate(FUNC(dcs_audio_device::dsio_idma_data_r),(dcs_audio_device*)m_dcs), write32_delegate(FUNC(dcs_audio_device::dsio_idma_data_w),(dcs_audio_device*)m_dcs)); } } @@ -1669,8 +1655,8 @@ void vegas_state::remap_dynamic_addresses() add_dynamic_address(base + 0x1000, base + 0x100f, read32_delegate(FUNC(vegas_state::ethernet_r), this), write32_delegate(FUNC(vegas_state::ethernet_w), this)); if (m_dcs_idma_cs == 7) { - add_legacy_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w); - add_legacy_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w); + add_dynamic_address(base + 0x5000, base + 0x5003, read32_delegate(), write32_delegate(FUNC(dcs_audio_device::dsio_idma_addr_w),(dcs_audio_device*)m_dcs)); + add_dynamic_address(base + 0x7000, base + 0x7003, read32_delegate(FUNC(dcs_audio_device::dsio_idma_data_r),(dcs_audio_device*)m_dcs), write32_delegate(FUNC(dcs_audio_device::dsio_idma_data_w),(dcs_audio_device*)m_dcs)); } } @@ -2318,21 +2304,16 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( vegas, vegascore ) - MCFG_FRAGMENT_ADD(dcs2_audio_2104) MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( vegas250, vegascore ) - MCFG_FRAGMENT_ADD(dcs2_audio_2104) - MCFG_CPU_MODIFY("maincpu") MCFG_CPU_CLOCK(SYSTEM_CLOCK*2.5) MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( vegas32m, vegascore ) - MCFG_FRAGMENT_ADD(dcs2_audio_dsio) - MCFG_CPU_MODIFY("maincpu") MCFG_CPU_PROGRAM_MAP(vegas_map_32mb) MACHINE_CONFIG_END @@ -2349,8 +2330,6 @@ static const voodoo_config vegasban_voodoo_intf = DEVCB_NULL// stall; }; static MACHINE_CONFIG_DERIVED( vegasban, vegascore ) - MCFG_FRAGMENT_ADD(dcs2_audio_2104) - MCFG_CPU_MODIFY("maincpu") MCFG_CPU_PROGRAM_MAP(vegas_map_32mb) @@ -2370,8 +2349,6 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( denver, vegascore ) - MCFG_FRAGMENT_ADD(dcs2_audio_denver) - MCFG_CPU_REPLACE("maincpu", RM7000LE, SYSTEM_CLOCK*2.5) MCFG_CPU_CONFIG(r5000_config) MCFG_CPU_PROGRAM_MAP(vegas_map_32mb) @@ -2380,6 +2357,144 @@ static MACHINE_CONFIG_DERIVED( denver, vegascore ) MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, vegasban_voodoo_intf) MACHINE_CONFIG_END +// Per driver configs + +static MACHINE_CONFIG_DERIVED( gauntleg, vegas ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CALSPEED) + MCFG_MIDWAY_IOASIC_UPPER(340/* 340=39", 322=27", others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( gauntdl, vegas ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_GAUNTDL) + MCFG_MIDWAY_IOASIC_UPPER(346/* 347, others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( warfa, vegas250 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE) + MCFG_MIDWAY_IOASIC_UPPER(337/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( tenthdeg, vegas ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_GAUNTDL) + MCFG_MIDWAY_IOASIC_UPPER(330/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( roadburn, vegas32m ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DSIO, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + MCFG_DCS2_AUDIO_POLLING_OFFSET(0) /* no place to hook :-( */ + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_IOASIC_UPPER(325/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( nbashowt, vegasban ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE) + MCFG_MIDWAY_IOASIC_UPPER(528/* or 478 or 487 */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( nbanfl, vegasban ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99) + MCFG_MIDWAY_IOASIC_UPPER(498/* or 478 or 487 */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( sf2049 , denver ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(8) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD) + MCFG_MIDWAY_IOASIC_UPPER(336/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( sf2049se, denver ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(8) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK) + MCFG_MIDWAY_IOASIC_UPPER(336/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( sf2049te, denver ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(8) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK) + MCFG_MIDWAY_IOASIC_UPPER(348/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END + +static MACHINE_CONFIG_DERIVED( cartfury, vegasv3 ) + MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0) + MCFG_DCS2_AUDIO_DRAM_IN_MB(4) + + MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0) + MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CARNEVIL) + MCFG_MIDWAY_IOASIC_UPPER(495/* others? */) + MCFG_MIDWAY_IOASIC_YEAR_OFFS(80) + MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq)) + MCFG_MIDWAY_IOASIC_AUTO_ACK(1) +MACHINE_CONFIG_END /************************************* @@ -2540,19 +2655,8 @@ ROM_END * *************************************/ -void vegas_state::init_common(int ioasic, int serialnum) -{ - /* initialize the subsystems */ - midway_ioasic_init(machine(), ioasic, serialnum, 80, ioasic_irq); - midway_ioasic_set_auto_ack(1); -} - - DRIVER_INIT_MEMBER(vegas_state,gauntleg) { - dcs2_init(machine(), 4, 0x0b5d); - init_common(MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */); - /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x80015430, 0x8CC38060, 250); /* confirmed */ mips3drc_add_hotspot(m_maincpu, 0x80015464, 0x3C09801E, 250); /* confirmed */ @@ -2563,9 +2667,6 @@ DRIVER_INIT_MEMBER(vegas_state,gauntleg) DRIVER_INIT_MEMBER(vegas_state,gauntdl) { - dcs2_init(machine(), 4, 0x0b5d); - init_common(MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */); - /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x800158B8, 0x8CC3CC40, 250); /* confirmed */ mips3drc_add_hotspot(m_maincpu, 0x800158EC, 0x3C0C8022, 250); /* confirmed */ @@ -2576,9 +2677,6 @@ DRIVER_INIT_MEMBER(vegas_state,gauntdl) DRIVER_INIT_MEMBER(vegas_state,warfa) { - dcs2_init(machine(), 4, 0x0b5d); - init_common(MIDWAY_IOASIC_MACE, 337/* others? */); - /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x8009436C, 0x0C031663, 250); /* confirmed */ } @@ -2586,9 +2684,6 @@ DRIVER_INIT_MEMBER(vegas_state,warfa) DRIVER_INIT_MEMBER(vegas_state,tenthdeg) { - dcs2_init(machine(), 4, 0x0afb); - init_common(MIDWAY_IOASIC_GAUNTDL, 330/* others? */); - /* speedups */ mips3drc_add_hotspot(m_maincpu, 0x80051CD8, 0x0C023C15, 250); /* confirmed */ mips3drc_add_hotspot(m_maincpu, 0x8005E674, 0x3C028017, 250); /* confirmed */ @@ -2599,51 +2694,36 @@ DRIVER_INIT_MEMBER(vegas_state,tenthdeg) DRIVER_INIT_MEMBER(vegas_state,roadburn) { - dcs2_init(machine(), 4, 0); /* no place to hook :-( */ - init_common(MIDWAY_IOASIC_STANDARD, 325/* others? */); } DRIVER_INIT_MEMBER(vegas_state,nbashowt) { - dcs2_init(machine(), 4, 0); - init_common(MIDWAY_IOASIC_MACE, 528/* or 478 or 487 */); } DRIVER_INIT_MEMBER(vegas_state,nbanfl) { - dcs2_init(machine(), 4, 0); - init_common(MIDWAY_IOASIC_BLITZ99, 498/* or 478 or 487 */); - /* NOT: MACE */ } DRIVER_INIT_MEMBER(vegas_state,sf2049) { - dcs2_init(machine(), 8, 0); - init_common(MIDWAY_IOASIC_STANDARD, 336/* others? */); } DRIVER_INIT_MEMBER(vegas_state,sf2049se) { - dcs2_init(machine(), 8, 0); - init_common(MIDWAY_IOASIC_SFRUSHRK, 336/* others? */); } DRIVER_INIT_MEMBER(vegas_state,sf2049te) { - dcs2_init(machine(), 8, 0); - init_common(MIDWAY_IOASIC_SFRUSHRK, 348/* others? */); } DRIVER_INIT_MEMBER(vegas_state,cartfury) { - dcs2_init(machine(), 4, 0); - init_common(MIDWAY_IOASIC_CARNEVIL, 495/* others? */); } @@ -2655,26 +2735,26 @@ DRIVER_INIT_MEMBER(vegas_state,cartfury) *************************************/ /* Vegas + Vegas SIO + Voodoo 2 */ -GAME( 1998, gauntleg, 0, vegas, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.6)", GAME_SUPPORTS_SAVE ) -GAME( 1998, gauntleg12, gauntleg, vegas, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.2)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE ) -GAME( 1998, tenthdeg, 0, vegas, tenthdeg, vegas_state, tenthdeg, ROT0, "Atari Games", "Tenth Degree (prototype)", GAME_SUPPORTS_SAVE ) +GAME( 1998, gauntleg, 0, gauntleg, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.6)", GAME_SUPPORTS_SAVE ) +GAME( 1998, gauntleg12, gauntleg, gauntleg, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.2)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE ) +GAME( 1998, tenthdeg, 0, tenthdeg, tenthdeg, vegas_state, tenthdeg, ROT0, "Atari Games", "Tenth Degree (prototype)", GAME_SUPPORTS_SAVE ) /* Durango + Vegas SIO + Voodoo 2 */ -GAME( 1999, gauntdl, 0, vegas, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.52)", GAME_SUPPORTS_SAVE ) -GAME( 1999, gauntdl24,gauntdl, vegas, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", GAME_SUPPORTS_SAVE ) -GAME( 1999, warfa, 0, vegas250, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1999, gauntdl, 0, gauntdl, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.52)", GAME_SUPPORTS_SAVE ) +GAME( 1999, gauntdl24,gauntdl, gauntdl, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", GAME_SUPPORTS_SAVE ) +GAME( 1999, warfa, 0, warfa, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* Durango + DSIO + Voodoo 2 */ -GAME( 1999, roadburn, 0, vegas32m, roadburn, vegas_state, roadburn, ROT0, "Atari Games", "Road Burners", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1999, roadburn, 0, roadburn, roadburn, vegas_state, roadburn, ROT0, "Atari Games", "Road Burners", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* Durango + DSIO? + Voodoo banshee */ -GAME( 1998, nbashowt, 0, vegasban, nbashowt, vegas_state, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) -GAME( 1999, nbanfl, 0, vegasban, nbashowt, vegas_state, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1998, nbashowt, 0, nbashowt, nbashowt, vegas_state, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1999, nbanfl, 0, nbanfl, nbashowt, vegas_state, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) /* Durango + Denver SIO + Voodoo 3 */ -GAME( 1998, sf2049, 0, denver, sf2049, vegas_state, sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) -GAME( 1998, sf2049se, sf2049, denver, sf2049se, vegas_state, sf2049se, ROT0, "Atari Games", "San Francisco Rush 2049: Special Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) -GAME( 1998, sf2049te, sf2049, denver, sf2049te, vegas_state, sf2049te, ROT0, "Atari Games", "San Francisco Rush 2049: Tournament Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE) +GAME( 1998, sf2049, 0, sf2049, sf2049, vegas_state, sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1998, sf2049se, sf2049, sf2049se, sf2049se, vegas_state, sf2049se, ROT0, "Atari Games", "San Francisco Rush 2049: Special Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 1998, sf2049te, sf2049, sf2049te, sf2049te, vegas_state, sf2049te, ROT0, "Atari Games", "San Francisco Rush 2049: Tournament Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE) /* Durango + Vegas SIO + Voodoo 3 */ -GAME( 2000, cartfury, 0, vegasv3, cartfury, vegas_state, cartfury, ROT0, "Midway Games", "Cart Fury", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) +GAME( 2000, cartfury, 0, cartfury, cartfury, vegas_state, cartfury, ROT0, "Midway Games", "Cart Fury", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/wpc_dcs.c b/src/mame/drivers/wpc_dcs.c index c77a4b9278b..2c8c4009652 100644 --- a/src/mame/drivers/wpc_dcs.c +++ b/src/mame/drivers/wpc_dcs.c @@ -150,30 +150,29 @@ INPUT_PORTS_END READ8_MEMBER(wpc_dcs_state::wpc_dcs_sound_ctrl_r) { - return dcs_control_r(machine()); + return m_dcs->control_r(); } WRITE8_MEMBER(wpc_dcs_state::wpc_dcs_sound_ctrl_w) { - dcs_reset_w(machine(),1); - dcs_reset_w(machine(),0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); } READ8_MEMBER(wpc_dcs_state::wpc_dcs_sound_data_r) { - return dcs_data_r(machine()); + return m_dcs->data_r(); } WRITE8_MEMBER(wpc_dcs_state::wpc_dcs_sound_data_w) { - dcs_data_w(machine(),data << 8); + m_dcs->data_w(data << 8); } DRIVER_INIT_MEMBER(wpc_dcs_state,wpc_dcs) { wpc_flip2_state::init_wpc_flip2(); - dcs_init(machine()); m_send = false; } @@ -192,7 +191,7 @@ static MACHINE_CONFIG_START( wpc_dcs, wpc_dcs_state ) MCFG_DEFAULT_LAYOUT(layout_lcd) - MCFG_FRAGMENT_ADD(dcs_audio_wpc) + MCFG_DEVICE_ADD("dcs", DCS_AUDIO_WPC, 0) MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_SIZE(128, 32) diff --git a/src/mame/includes/atarigt.h b/src/mame/includes/atarigt.h index 56ddec14438..bfbdd94e464 100644 --- a/src/mame/includes/atarigt.h +++ b/src/mame/includes/atarigt.h @@ -7,7 +7,7 @@ *************************************************************************/ #include "machine/atarigen.h" - +#include "audio/cage.h" #define CRAM_ENTRIES 0x4000 #define TRAM_ENTRIES 0x4000 @@ -24,7 +24,8 @@ public: m_playfield_tilemap(*this, "playfield"), m_alpha_tilemap(*this, "alpha"), m_rle(*this, "rle"), - m_mo_command(*this, "mo_command") { } + m_mo_command(*this, "mo_command"), + m_cage(*this, "cage") { } UINT8 m_is_primrage; required_shared_ptr m_colorram; @@ -46,6 +47,7 @@ public: UINT32 m_expanded_mram[MRAM_ENTRIES * 3]; required_shared_ptr m_mo_command; + optional_device m_cage; void (atarigt_state::*m_protection_w)(address_space &space, offs_t offset, UINT16 data); void (atarigt_state::*m_protection_r)(address_space &space, offs_t offset, UINT16 *data); @@ -70,9 +72,11 @@ public: DECLARE_READ32_MEMBER(colorram_protection_r); DECLARE_WRITE32_MEMBER(colorram_protection_w); DECLARE_WRITE32_MEMBER(tmek_pf_w); + + DECLARE_WRITE8_MEMBER(cage_irq_callback); + void atarigt_colorram_w(offs_t address, UINT16 data, UINT16 mem_mask); UINT16 atarigt_colorram_r(offs_t address); - DECLARE_DRIVER_INIT(primrage20); DECLARE_DRIVER_INIT(primrage); DECLARE_DRIVER_INIT(tmek); TILE_GET_INFO_MEMBER(get_alpha_tile_info); @@ -89,6 +93,5 @@ private: void primrage_update_mode(offs_t offset); void primrage_protection_w(address_space &space, offs_t offset, UINT16 data); void primrage_protection_r(address_space &space, offs_t offset, UINT16 *data); - void primrage_init_common(offs_t cage_speedup); void compute_fake_pots(int *pots); }; diff --git a/src/mame/includes/gaelco3d.h b/src/mame/includes/gaelco3d.h index 3692e02a043..7c7f2b6aefc 100644 --- a/src/mame/includes/gaelco3d.h +++ b/src/mame/includes/gaelco3d.h @@ -12,6 +12,7 @@ #include "video/poly.h" #include "machine/eepromser.h" #include "machine/gaelco3d.h" +#include "cpu/adsp2100/adsp2100.h" #define SOUND_CHANNELS 4 @@ -74,7 +75,7 @@ public: required_shared_ptr m_adsp_control_regs; required_shared_ptr m_adsp_fastram_base; required_device m_maincpu; - required_device m_adsp; + required_device m_adsp; required_device m_eeprom; required_device m_tms; required_device m_serial; @@ -137,4 +138,5 @@ public: TIMER_CALLBACK_MEMBER(delayed_sound_w); TIMER_DEVICE_CALLBACK_MEMBER(adsp_autobuffer_irq); void gaelco3d_render(screen_device &screen); + DECLARE_WRITE32_MEMBER(adsp_tx_callback); }; diff --git a/src/mame/includes/harddriv.h b/src/mame/includes/harddriv.h index fb522339be0..3d13520f5ee 100644 --- a/src/mame/includes/harddriv.h +++ b/src/mame/includes/harddriv.h @@ -424,6 +424,15 @@ public: DECLARE_READ16_MEMBER( hdadsp_speedup_r ); DECLARE_READ16_MEMBER( hdds3_speedup_r ); + + DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback); + DECLARE_WRITE32_MEMBER(hdds3sdsp_serial_tx_callback); + DECLARE_READ32_MEMBER(hdds3sdsp_serial_rx_callback); + + DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback); + DECLARE_WRITE32_MEMBER(hdds3xdsp_serial_tx_callback); + DECLARE_READ32_MEMBER(hdds3xdsp_serial_rx_callback); + /*----------- defined in video/harddriv.c -----------*/ DECLARE_READ16_MEMBER( hdgsp_control_lo_r ); DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w ); @@ -452,16 +461,7 @@ void hdmsp_irq_gen(device_t *device, int state); /* DS III/IV board */ TIMER_DEVICE_CALLBACK( ds3sdsp_internal_timer_callback ); -void hdds3sdsp_timer_enable_callback(adsp21xx_device &device, int enable); - -void hdds3sdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data); -INT32 hdds3sdsp_serial_rx_callback(adsp21xx_device &device, int port); - TIMER_DEVICE_CALLBACK( ds3xdsp_internal_timer_callback ); -void hdds3xdsp_timer_enable_callback(adsp21xx_device &device, int enable); - -void hdds3xdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data); -INT32 hdds3xdsp_serial_rx_callback(adsp21xx_device &device, int port); /*----------- defined in video/harddriv.c -----------*/ diff --git a/src/mame/includes/metalmx.h b/src/mame/includes/metalmx.h index 2ebb810c7b1..16cc3cfea78 100644 --- a/src/mame/includes/metalmx.h +++ b/src/mame/includes/metalmx.h @@ -12,7 +12,8 @@ public: m_gsp(*this, "gsp"), m_adsp(*this, "adsp"), m_dsp32c_1(*this, "dsp32c_1"), - m_dsp32c_2(*this, "dsp32c_2") , + m_dsp32c_2(*this, "dsp32c_2"), + m_cage(*this, "cage"), m_adsp_internal_program_ram(*this, "adsp_intprog"), m_gsp_dram(*this, "gsp_dram"), m_gsp_vram(*this, "gsp_vram"){ } @@ -22,6 +23,7 @@ public: required_device m_adsp; required_device m_dsp32c_1; required_device m_dsp32c_2; + required_device m_cage; required_shared_ptr m_adsp_internal_program_ram; required_shared_ptr m_gsp_dram; @@ -46,6 +48,7 @@ public: DECLARE_WRITE32_MEMBER(host_vram_w); DECLARE_WRITE32_MEMBER(timer_w); DECLARE_DRIVER_INIT(metalmx); + DECLARE_WRITE8_MEMBER(cage_irq_callback); virtual void machine_reset(); virtual void video_start(); UINT32 screen_update_metalmx(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); diff --git a/src/mame/includes/midtunit.h b/src/mame/includes/midtunit.h index 83c1a57413a..b0b5113e147 100644 --- a/src/mame/includes/midtunit.h +++ b/src/mame/includes/midtunit.h @@ -22,7 +22,8 @@ public: m_cvsd_sound(*this, "cvsd"), m_adpcm_sound(*this, "adpcm") , m_maincpu(*this, "maincpu"), - m_palette(*this, "palette") { } + m_palette(*this, "palette"), + m_dcs(*this, "dcs") { } required_shared_ptr m_nvram; required_memory_region m_gfxrom; @@ -74,6 +75,7 @@ public: DECLARE_VIDEO_START(midtunit); required_device m_maincpu; required_device m_palette; + optional_device m_dcs; void register_state_saving(); void init_tunit_generic(int sound); void init_nbajam_common(int te_protection); diff --git a/src/mame/includes/midvunit.h b/src/mame/includes/midvunit.h index d406338a53a..95b8a226e94 100644 --- a/src/mame/includes/midvunit.h +++ b/src/mame/includes/midvunit.h @@ -7,6 +7,8 @@ **************************************************************************/ #include "video/poly.h" +#include "audio/dcs.h" +#include "machine/midwayic.h" #define MIDVUNIT_VIDEO_CLOCK 33000000 @@ -56,7 +58,11 @@ public: m_textureram(*this, "textureram") , m_maincpu(*this, "maincpu"), m_screen(*this, "screen"), - m_palette(*this, "palette") { } + m_palette(*this, "palette"), + m_midway_serial_pic(*this, "serial_pic"), + m_midway_serial_pic2(*this, "serial_pic2"), + m_midway_ioasic(*this, "ioasic"), + m_dcs(*this, "dcs") { } optional_shared_ptr m_nvram; required_shared_ptr m_ram_base; @@ -135,7 +141,10 @@ public: required_device m_maincpu; required_device m_screen; required_device m_palette; - + optional_device m_midway_serial_pic; + optional_device m_midway_serial_pic2; + optional_device m_midway_ioasic; + required_device m_dcs; protected: virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); }; diff --git a/src/mame/includes/midwunit.h b/src/mame/includes/midwunit.h index 73e7516ea00..d24d006feef 100644 --- a/src/mame/includes/midwunit.h +++ b/src/mame/includes/midwunit.h @@ -6,14 +6,18 @@ **************************************************************************/ +#include "machine/midwayic.h" + class midwunit_state : public midtunit_state { public: midwunit_state(const machine_config &mconfig, device_type type, const char *tag) : midtunit_state(mconfig, type, tag), - m_nvram(*this, "nvram") { } + m_nvram(*this, "nvram"), + m_midway_serial_pic(*this, "serial_pic") { } required_shared_ptr m_nvram; + required_device m_midway_serial_pic; UINT8 m_cmos_write_enable; UINT16 m_iodata[8]; UINT8 m_ioshuffle[16]; diff --git a/src/mame/includes/midxunit.h b/src/mame/includes/midxunit.h index ce109d19610..e6e8b3bc9d4 100644 --- a/src/mame/includes/midxunit.h +++ b/src/mame/includes/midxunit.h @@ -6,14 +6,18 @@ **************************************************************************/ +#include "machine/midwayic.h" + class midxunit_state : public midtunit_state { public: midxunit_state(const machine_config &mconfig, device_type type, const char *tag) : midtunit_state(mconfig, type, tag), - m_nvram(*this, "nvram") { } + m_nvram(*this, "nvram"), + m_midway_serial_pic(*this, "serial_pic") { } required_shared_ptr m_nvram; + required_device m_midway_serial_pic; UINT8 m_cmos_write_enable; UINT16 m_iodata[8]; UINT8 m_ioshuffle[16]; @@ -36,6 +40,7 @@ public: DECLARE_READ16_MEMBER(midxunit_sound_r); DECLARE_READ16_MEMBER(midxunit_sound_state_r); DECLARE_WRITE16_MEMBER(midxunit_sound_w); + DECLARE_WRITE_LINE_MEMBER(midxunit_dcs_output_full); DECLARE_DRIVER_INIT(revx); DECLARE_MACHINE_RESET(midxunit); DECLARE_VIDEO_START(midxunit); diff --git a/src/mame/includes/wpc_pin.h b/src/mame/includes/wpc_pin.h index 7dbc0fa015b..9fe0e7f859c 100644 --- a/src/mame/includes/wpc_pin.h +++ b/src/mame/includes/wpc_pin.h @@ -11,6 +11,7 @@ #include "emu.h" #include "cpu/m6809/m6809.h" #include "audio/wpcsnd.h" +#include "audio/dcs.h" #include "machine/wpc.h" #include "rendlay.h" @@ -104,7 +105,8 @@ class wpc_dcs_state : public wpc_flip2_state { public: wpc_dcs_state(const machine_config &mconfig, device_type type, const char *tag) - : wpc_flip2_state(mconfig, type, tag) + : wpc_flip2_state(mconfig, type, tag), + m_dcs(*this, "dcs") { } public: @@ -113,7 +115,8 @@ public: DECLARE_WRITE8_MEMBER(wpc_dcs_sound_ctrl_w); DECLARE_READ8_MEMBER(wpc_dcs_sound_data_r); DECLARE_WRITE8_MEMBER(wpc_dcs_sound_data_w); - + + required_device m_dcs; private: bool m_send; // UINT8 m_prev_data; diff --git a/src/mame/machine/harddriv.c b/src/mame/machine/harddriv.c index 8bd36389e6b..7fe8e5605bc 100644 --- a/src/mame/machine/harddriv.c +++ b/src/mame/machine/harddriv.c @@ -1249,16 +1249,14 @@ void harddriv_state::hdds3sdsp_reset_timer() m_ds3sdsp_internal_timer->adjust(m_ds3sdsp->cycles_to_attotime(count * scale)); } -void hdds3sdsp_timer_enable_callback(adsp21xx_device &device, int enable) +WRITE_LINE_MEMBER(harddriv_state::hdds3sdsp_timer_enable_callback) { - harddriv_state *state = device.machine().driver_data(); + m_ds3sdsp_timer_en = state; - state->m_ds3sdsp_timer_en = enable; - - if (enable) - state->hdds3sdsp_reset_timer(); + if (state) + hdds3sdsp_reset_timer(); else - state->m_ds3sdsp_internal_timer->adjust(attotime::never); + m_ds3sdsp_internal_timer->adjust(attotime::never); } @@ -1289,16 +1287,14 @@ void harddriv_state::hdds3xdsp_reset_timer() } -void hdds3xdsp_timer_enable_callback(adsp21xx_device &device, int enable) +WRITE_LINE_MEMBER(harddriv_state::hdds3xdsp_timer_enable_callback) { - harddriv_state *state = device.machine().driver_data(); + m_ds3xdsp_timer_en = state; - state->m_ds3xdsp_timer_en = enable; - - if (enable) - state->hdds3xdsp_reset_timer(); + if (state) + hdds3xdsp_reset_timer(); else - state->m_ds3xdsp_internal_timer->adjust(attotime::never); + m_ds3xdsp_internal_timer->adjust(attotime::never); } @@ -1312,50 +1308,42 @@ static TIMER_CALLBACK( xsdp_sport1_irq_off_callback ) } -void hdds3sdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data) +WRITE32_MEMBER(harddriv_state::hdds3sdsp_serial_tx_callback) { - harddriv_state *state = device.machine().driver_data(); - - if ((state->m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00) + if ((m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00) return; - state->m_ds3sdsp_sdata = data; + m_ds3sdsp_sdata = data; - state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE); - device.machine().scheduler().timer_set(attotime::from_nsec(200), FUNC(xsdp_sport1_irq_off_callback)); + m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE); + machine().scheduler().timer_set(attotime::from_nsec(200), FUNC(xsdp_sport1_irq_off_callback)); } -INT32 hdds3sdsp_serial_rx_callback(adsp21xx_device &device, int port) +READ32_MEMBER(harddriv_state::hdds3sdsp_serial_rx_callback) { - harddriv_state *state = device.machine().driver_data(); - - if ((state->m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00) + if ((m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00) return 0xff; - return state->m_ds3xdsp_sdata; + return m_ds3xdsp_sdata; } -void hdds3xdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data) +WRITE32_MEMBER(harddriv_state::hdds3xdsp_serial_tx_callback) { - harddriv_state *state = device.machine().driver_data(); - - if ((state->m_ds3xdsp_regs[0x1f] & 0xc00) != 0xc00) + if ((m_ds3xdsp_regs[0x1f] & 0xc00) != 0xc00) return; - state->m_ds3xdsp_sdata = data; + m_ds3xdsp_sdata = data; } -INT32 hdds3xdsp_serial_rx_callback(adsp21xx_device &device, int port) +READ32_MEMBER(harddriv_state::hdds3xdsp_serial_rx_callback) { - harddriv_state *state = device.machine().driver_data(); - - state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE); - state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, CLEAR_LINE); - state->m_ds3xdsp->signal_interrupt_trigger(); - return state->m_ds3sdsp_sdata; + m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE); + m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, CLEAR_LINE); + m_ds3xdsp->signal_interrupt_trigger(); + return m_ds3sdsp_sdata; } diff --git a/src/mame/machine/midtunit.c b/src/mame/machine/midtunit.c index 0077805a508..7351841a533 100644 --- a/src/mame/machine/midtunit.c +++ b/src/mame/machine/midtunit.c @@ -393,16 +393,7 @@ void midtunit_state::init_tunit_generic(int sound) /* load sound ROMs and set up sound handlers */ chip_type = sound; - switch (sound) - { - case SOUND_ADPCM: - case SOUND_ADPCM_LARGE: - break; - case SOUND_DCS: - dcs_init(machine()); - break; - } /* default graphics functionality */ midtunit_gfx_rom_large = 0; @@ -541,8 +532,8 @@ MACHINE_RESET_MEMBER(midtunit_state,midtunit) break; case SOUND_DCS: - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); break; } } @@ -560,7 +551,7 @@ READ16_MEMBER(midtunit_state::midtunit_sound_state_r) /* logerror("%08X:Sound status read\n", space.device().safe_pc());*/ if (chip_type == SOUND_DCS) - return dcs_control_r(machine()) >> 4; + return m_dcs->control_r() >> 4; if (fake_sound_state) { @@ -575,7 +566,7 @@ READ16_MEMBER(midtunit_state::midtunit_sound_r) logerror("%08X:Sound data read\n", space.device().safe_pc()); if (chip_type == SOUND_DCS) - return dcs_data_r(machine()) & 0xff; + return m_dcs->data_r() & 0xff; return ~0; } @@ -604,8 +595,8 @@ WRITE16_MEMBER(midtunit_state::midtunit_sound_w) case SOUND_DCS: logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data); - dcs_reset_w(machine(), ~data & 0x100); - dcs_data_w(machine(), data & 0xff); + m_dcs->reset_w(~data & 0x100); + m_dcs->data_w(data & 0xff); /* the games seem to check for $82 loops, so this should be just barely enough */ fake_sound_state = 128; break; diff --git a/src/mame/machine/midwayic.c b/src/mame/machine/midwayic.c index f39cd06e226..aed4561aaaa 100644 --- a/src/mame/machine/midwayic.c +++ b/src/mame/machine/midwayic.c @@ -9,8 +9,6 @@ #include "emu.h" #include "debugger.h" #include "midwayic.h" -#include "audio/cage.h" -#include "audio/dcs.h" #define LOG_NVRAM (0) @@ -26,91 +24,17 @@ * *************************************/ -#define PIC_NVRAM_SIZE 0x100 #define FIFO_SIZE 512 - - -/************************************* - * - * Type definitions - * - *************************************/ - -struct serial_state -{ - UINT8 data[16]; - UINT8 buffer; - UINT8 index; - UINT8 status; - UINT8 bits; - UINT8 ormask; -}; - -struct pic_state -{ - UINT16 latch; - attotime latch_expire_time; - UINT8 state; - UINT8 index; - UINT8 total; - UINT8 nvram_addr; - UINT8 buffer[0x10]; - UINT8 nvram[PIC_NVRAM_SIZE]; - UINT8 default_nvram[PIC_NVRAM_SIZE]; - UINT8 time_buf[8]; - UINT8 time_index; - UINT8 time_just_written; - UINT16 yearoffs; - emu_timer *time_write_timer; -}; - -struct ioasic_state -{ - UINT32 reg[16]; - UINT8 has_dcs; - UINT8 has_cage; - device_t *dcs_cpu; - UINT8 shuffle_type; - UINT8 shuffle_active; - const UINT8 * shuffle_map; - void (*irq_callback)(running_machine &, int); - UINT8 irq_state; - UINT16 sound_irq_state; - UINT8 auto_ack; - UINT8 force_fifo_full; - - UINT16 fifo[FIFO_SIZE]; - UINT16 fifo_in; - UINT16 fifo_out; - UINT16 fifo_bytes; - offs_t fifo_force_buffer_empty_pc; -}; - - - -/************************************* - * - * Local variables - * - *************************************/ - -static struct serial_state serial; -static struct pic_state pic; -static struct ioasic_state ioasic; - - - - /************************************* * * Serial number encoding * *************************************/ -static void generate_serial_data(running_machine &machine, int upper) +void midway_serial_pic_device::generate_serial_data(int upper) { - int year = atoi(machine.system().year), month = 12, day = 11; + int year = atoi(machine().system().year), month = 12, day = 11; UINT32 serial_number, temp; UINT8 serial_digit[9]; @@ -127,39 +51,39 @@ static void generate_serial_data(running_machine &machine, int upper) serial_digit[7] = (serial_number / 10) % 10; serial_digit[8] = (serial_number / 1) % 10; - serial.data[12] = machine.rand() & 0xff; - serial.data[13] = machine.rand() & 0xff; + m_data[12] = machine().rand() & 0xff; + m_data[13] = machine().rand() & 0xff; - serial.data[14] = 0; /* ??? */ - serial.data[15] = 0; /* ??? */ + m_data[14] = 0; /* ??? */ + m_data[15] = 0; /* ??? */ temp = 0x174 * (year - 1980) + 0x1f * (month - 1) + day; - serial.data[10] = (temp >> 8) & 0xff; - serial.data[11] = temp & 0xff; + m_data[10] = (temp >> 8) & 0xff; + m_data[11] = temp & 0xff; temp = serial_digit[4] + serial_digit[7] * 10 + serial_digit[1] * 100; - temp = (temp + 5 * serial.data[13]) * 0x1bcd + 0x1f3f0; - serial.data[7] = temp & 0xff; - serial.data[8] = (temp >> 8) & 0xff; - serial.data[9] = (temp >> 16) & 0xff; + temp = (temp + 5 * m_data[13]) * 0x1bcd + 0x1f3f0; + m_data[7] = temp & 0xff; + m_data[8] = (temp >> 8) & 0xff; + m_data[9] = (temp >> 16) & 0xff; temp = serial_digit[6] + serial_digit[8] * 10 + serial_digit[0] * 100 + serial_digit[2] * 10000; - temp = (temp + 2 * serial.data[13] + serial.data[12]) * 0x107f + 0x71e259; - serial.data[3] = temp & 0xff; - serial.data[4] = (temp >> 8) & 0xff; - serial.data[5] = (temp >> 16) & 0xff; - serial.data[6] = (temp >> 24) & 0xff; + temp = (temp + 2 * m_data[13] + m_data[12]) * 0x107f + 0x71e259; + m_data[3] = temp & 0xff; + m_data[4] = (temp >> 8) & 0xff; + m_data[5] = (temp >> 16) & 0xff; + m_data[6] = (temp >> 24) & 0xff; temp = serial_digit[5] * 10 + serial_digit[3] * 100; - temp = (temp + serial.data[12]) * 0x245 + 0x3d74; - serial.data[0] = temp & 0xff; - serial.data[1] = (temp >> 8) & 0xff; - serial.data[2] = (temp >> 16) & 0xff; + temp = (temp + m_data[12]) * 0x245 + 0x3d74; + m_data[0] = temp & 0xff; + m_data[1] = (temp >> 8) & 0xff; + m_data[2] = (temp >> 16) & 0xff; /* special hack for RevX */ - serial.ormask = 0x80; + m_ormask = 0x80; if (upper == 419) - serial.ormask = 0x00; + m_ormask = 0x00; } @@ -171,65 +95,99 @@ static void generate_serial_data(running_machine &machine, int upper) * *************************************/ -static void serial_register_state(running_machine &machine) +void midway_serial_pic_device::serial_register_state() { - machine.save().save_item(NAME(serial.data)); - machine.save().save_item(NAME(serial.buffer)); - machine.save().save_item(NAME(serial.index)); - machine.save().save_item(NAME(serial.status)); - machine.save().save_item(NAME(serial.bits)); - machine.save().save_item(NAME(serial.ormask)); + save_item(NAME(m_data)); + save_item(NAME(m_buff)); + save_item(NAME(m_idx)); + save_item(NAME(m_status)); + save_item(NAME(m_bits)); + save_item(NAME(m_ormask)); +} + +const device_type MIDWAY_SERIAL_PIC = &device_creator; + + +//------------------------------------------------- +// midway_serial_pic2_device - constructor +//------------------------------------------------- + +midway_serial_pic_device::midway_serial_pic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + device_t(mconfig, MIDWAY_SERIAL_PIC2, "Midway Serial Pic", tag, owner, clock, "midway_serial_pic", __FILE__), + m_upper(0), + m_buff(0), + m_idx(0), + m_status(0), + m_bits(0), + m_ormask(0) +{ + memset(m_data,0,sizeof(m_data)); +} + +midway_serial_pic_device::midway_serial_pic_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + m_upper(0), + m_buff(0), + m_idx(0), + m_status(0), + m_bits(0), + m_ormask(0) +{ + memset(m_data,0,sizeof(m_data)); +} + +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void midway_serial_pic_device::device_start() +{ + serial_register_state(); + generate_serial_data(m_upper); } -void midway_serial_pic_init(running_machine &machine, int upper) -{ - serial_register_state(machine); - generate_serial_data(machine, upper); -} - - -void midway_serial_pic_reset_w(int state) +WRITE_LINE_MEMBER(midway_serial_pic_device::reset_w) { if (state) { - serial.index = 0; - serial.status = 0; - serial.buffer = 0; + m_idx = 0; + m_status = 0; + m_buff = 0; } } -UINT8 midway_serial_pic_status_r(void) +READ8_MEMBER(midway_serial_pic_device::status_r) { - return serial.status; + return m_status; } -UINT8 midway_serial_pic_r(address_space &space) +READ8_MEMBER(midway_serial_pic_device::read) { - logerror("%s:security R = %04X\n", space.machine().describe_context(), serial.buffer); - serial.status = 1; - return serial.buffer; + logerror("%s:security R = %04X\n", machine().describe_context(), m_buff); + m_status = 1; + return m_buff; } -void midway_serial_pic_w(address_space &space, UINT8 data) +WRITE8_MEMBER(midway_serial_pic_device::write) { - logerror("%s:security W = %04X\n", space.machine().describe_context(), data); + logerror("%s:security W = %04X\n", machine().describe_context(), data); /* status seems to reflect the clock bit */ - serial.status = (data >> 4) & 1; + m_status = (data >> 4) & 1; /* on the falling edge, clock the next data byte through */ - if (!serial.status) + if (!m_status) { /* the self-test writes 1F, 0F, and expects to read an F in the low 4 bits */ /* Cruis'n World expects the high bit to be set as well */ if (data & 0x0f) - serial.buffer = serial.ormask | data; + m_buff = m_ormask | data; else - serial.buffer = serial.data[serial.index++ % sizeof(serial.data)]; + m_buff = m_data[m_idx++ % sizeof(m_data)]; } } @@ -249,82 +207,133 @@ INLINE UINT8 make_bcd(UINT8 data) return ((data / 10) << 4) | (data % 10); } +const device_type MIDWAY_SERIAL_PIC2 = &device_creator; -static TIMER_CALLBACK( reset_timer ) + +//------------------------------------------------- +// midway_serial_pic2_device - constructor +//------------------------------------------------- + +midway_serial_pic2_device::midway_serial_pic2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + midway_serial_pic_device(mconfig, MIDWAY_SERIAL_PIC2, "Midway Serial Pic 2", tag, owner, clock, "midway_serial_pic2", __FILE__), + device_nvram_interface(mconfig, *this), + m_latch(0), + m_state(0), + m_index(0), + m_total(0), + m_nvram_addr(0), + m_time_index(0), + m_time_just_written(0), + m_yearoffs(0), + m_time_write_timer(NULL) { - pic.time_just_written = 0; + memset(m_buffer,0,sizeof(m_buffer)); + memset(m_time_buf,0,sizeof(m_time_buf)); + memset(m_nvram,0,sizeof(m_nvram)); + memset(m_default_nvram,0,sizeof(m_default_nvram)); + +} + +midway_serial_pic2_device::midway_serial_pic2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : + midway_serial_pic_device(mconfig, type, name, tag, owner, clock, shortname, source), + device_nvram_interface(mconfig, *this), + m_latch(0), + m_state(0), + m_index(0), + m_total(0), + m_nvram_addr(0), + m_time_index(0), + m_time_just_written(0), + m_yearoffs(0), + m_time_write_timer(NULL) +{ + memset(m_buffer,0,sizeof(m_buffer)); + memset(m_time_buf,0,sizeof(m_time_buf)); + memset(m_nvram,0,sizeof(m_nvram)); + memset(m_default_nvram,0,sizeof(m_default_nvram)); } -static void pic_register_state(running_machine &machine) +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void midway_serial_pic2_device::device_start() { - machine.save().save_item(NAME(pic.latch)); - machine.save().save_item(NAME(pic.latch_expire_time)); - machine.save().save_item(NAME(pic.state)); - machine.save().save_item(NAME(pic.index)); - machine.save().save_item(NAME(pic.total)); - machine.save().save_item(NAME(pic.nvram_addr)); - machine.save().save_item(NAME(pic.buffer)); - machine.save().save_item(NAME(pic.nvram)); - machine.save().save_item(NAME(pic.default_nvram)); - machine.save().save_item(NAME(pic.time_buf)); - machine.save().save_item(NAME(pic.time_index)); - machine.save().save_item(NAME(pic.time_just_written)); - machine.save().save_item(NAME(pic.yearoffs)); + midway_serial_pic_device::device_start(); + //void midway_serial_pic2_init(running_machine &machine, int upper, int yearoffs) + pic_register_state(); + + //m_yearoffs = yearoffs; + m_time_just_written = 0; + m_time_write_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(midway_serial_pic2_device::reset_timer),this)); + memset(m_default_nvram, 0xff, sizeof(m_default_nvram)); } -void midway_serial_pic2_init(running_machine &machine, int upper, int yearoffs) +TIMER_CALLBACK_MEMBER( midway_serial_pic2_device::reset_timer ) { - serial_register_state(machine); - pic_register_state(machine); - - pic.yearoffs = yearoffs; - pic.time_just_written = 0; - pic.time_write_timer = machine.scheduler().timer_alloc(FUNC(reset_timer)); - memset(pic.default_nvram, 0xff, sizeof(pic.default_nvram)); - generate_serial_data(machine, upper); + m_time_just_written = 0; } -void midway_serial_pic2_set_default_nvram(const UINT8 *nvram) +void midway_serial_pic2_device::pic_register_state() { - memcpy(pic.default_nvram, nvram, sizeof(pic.default_nvram)); + save_item(NAME(m_latch)); + save_item(NAME(m_latch_expire_time)); + save_item(NAME(m_state)); + save_item(NAME(m_index)); + save_item(NAME(m_total)); + save_item(NAME(m_nvram_addr)); + save_item(NAME(m_buffer)); + save_item(NAME(m_nvram)); + save_item(NAME(m_default_nvram)); + save_item(NAME(m_time_buf)); + save_item(NAME(m_time_index)); + save_item(NAME(m_time_just_written)); + save_item(NAME(m_yearoffs)); } -UINT8 midway_serial_pic2_status_r(address_space &space) + +void midway_serial_pic2_device::set_default_nvram(const UINT8 *nvram) +{ + memcpy(m_default_nvram, nvram, sizeof(m_default_nvram)); +} + + +READ8_MEMBER(midway_serial_pic2_device::status_r) { UINT8 result = 0; /* if we're still holding the data ready bit high, do it */ - if (pic.latch & 0xf00) + if (m_latch & 0xf00) { - if (space.machine().time() > pic.latch_expire_time) - pic.latch &= 0xff; + if (machine().time() > m_latch_expire_time) + m_latch &= 0xff; else - pic.latch -= 0x100; + m_latch -= 0x100; result = 1; } - logerror("%s:PIC status %d\n", space.machine().describe_context(), result); + logerror("%s:PIC status %d\n", machine().describe_context(), result); return result; } -UINT8 midway_serial_pic2_r(address_space &space) +READ8_MEMBER(midway_serial_pic2_device::read) { UINT8 result = 0; /* PIC data register */ - logerror("%s:PIC data read (index=%d total=%d latch=%03X) =", space.machine().describe_context(), pic.index, pic.total, pic.latch); + logerror("%s:PIC data read (index=%d total=%d latch=%03X) =", machine().describe_context(), m_index, m_total, m_latch); /* return the current result */ - if (pic.latch & 0xf00) - result = pic.latch & 0xff; + if (m_latch & 0xf00) + result = m_latch & 0xff; /* otherwise, return 0xff if we have data ready */ - else if (pic.index < pic.total) + else if (m_index < m_total) result = 0xff; logerror("%02X\n", result); @@ -332,44 +341,43 @@ UINT8 midway_serial_pic2_r(address_space &space) } -void midway_serial_pic2_w(address_space &space, UINT8 data) +WRITE8_MEMBER(midway_serial_pic2_device::write) { - running_machine &machine = space.machine(); static FILE *nvramlog; if (LOG_NVRAM && !nvramlog) nvramlog = fopen("nvram.log", "w"); /* PIC command register */ - if (pic.state == 0) - logerror("%s:PIC command %02X\n", machine.describe_context(), data); + if (m_state == 0) + logerror("%s:PIC command %02X\n", machine().describe_context(), data); else - logerror("%s:PIC data %02X\n", machine.describe_context(), data); + logerror("%s:PIC data %02X\n", machine().describe_context(), data); /* store in the latch, along with a bit to indicate we have data */ - pic.latch = (data & 0x00f) | 0x480; - pic.latch_expire_time = machine.time() + attotime::from_msec(1); + m_latch = (data & 0x00f) | 0x480; + m_latch_expire_time = machine().time() + attotime::from_msec(1); if (data & 0x10) { - int cmd = pic.state ? (pic.state & 0x0f) : (pic.latch & 0x0f); + int cmd = m_state ? (m_state & 0x0f) : (m_latch & 0x0f); switch (cmd) { /* written to latch the next byte of data */ case 0: - if (pic.index < pic.total) - pic.latch = 0x400 | pic.buffer[pic.index++]; + if (m_index < m_total) + m_latch = 0x400 | m_buffer[m_index++]; break; /* fetch the serial number */ case 1: /* note: Biofreaks assumes that it can latch the next byte this way */ - if (pic.index < pic.total) - pic.latch = 0x400 | pic.buffer[pic.index++]; + if (m_index < m_total) + m_latch = 0x400 | m_buffer[m_index++]; else { - memcpy(pic.buffer, serial.data, 16); - pic.total = 16; - pic.index = 0; - debugger_break(machine); + memcpy(m_buffer, m_data, 16); + m_total = 16; + m_index = 0; + debugger_break(machine()); } break; @@ -377,34 +385,34 @@ void midway_serial_pic2_w(address_space &space, UINT8 data) case 3: { /* stuff it into the data bytes */ - pic.index = 0; - pic.total = 0; + m_index = 0; + m_total = 0; /* if we haven't written a new time recently, use the real live time */ - if (!pic.time_just_written) + if (!m_time_just_written) { system_time systime; - machine.base_datetime(systime); + machine().base_datetime(systime); - pic.buffer[pic.total++] = make_bcd(systime.local_time.second); - pic.buffer[pic.total++] = make_bcd(systime.local_time.minute); - pic.buffer[pic.total++] = make_bcd(systime.local_time.hour); - pic.buffer[pic.total++] = make_bcd(systime.local_time.weekday + 1); - pic.buffer[pic.total++] = make_bcd(systime.local_time.mday); - pic.buffer[pic.total++] = make_bcd(systime.local_time.month + 1); - pic.buffer[pic.total++] = make_bcd(systime.local_time.year - 1900 - pic.yearoffs); + m_buffer[m_total++] = make_bcd(systime.local_time.second); + m_buffer[m_total++] = make_bcd(systime.local_time.minute); + m_buffer[m_total++] = make_bcd(systime.local_time.hour); + m_buffer[m_total++] = make_bcd(systime.local_time.weekday + 1); + m_buffer[m_total++] = make_bcd(systime.local_time.mday); + m_buffer[m_total++] = make_bcd(systime.local_time.month + 1); + m_buffer[m_total++] = make_bcd(systime.local_time.year - 1900 - m_yearoffs); } /* otherwise, just parrot back what was written to pass self tests */ else { - pic.buffer[pic.total++] = pic.time_buf[0]; - pic.buffer[pic.total++] = pic.time_buf[1]; - pic.buffer[pic.total++] = pic.time_buf[2]; - pic.buffer[pic.total++] = pic.time_buf[3]; - pic.buffer[pic.total++] = pic.time_buf[4]; - pic.buffer[pic.total++] = pic.time_buf[5]; - pic.buffer[pic.total++] = pic.time_buf[6]; + m_buffer[m_total++] = m_time_buf[0]; + m_buffer[m_total++] = m_time_buf[1]; + m_buffer[m_total++] = m_time_buf[2]; + m_buffer[m_total++] = m_time_buf[3]; + m_buffer[m_total++] = m_time_buf[4]; + m_buffer[m_total++] = m_time_buf[5]; + m_buffer[m_total++] = m_time_buf[6]; } break; } @@ -413,32 +421,32 @@ void midway_serial_pic2_w(address_space &space, UINT8 data) case 4: /* if coming from state 0, go to state 1 (this is just the command byte) */ - if (pic.state == 0) + if (m_state == 0) { - pic.state = 0x14; - pic.time_index = 0; + m_state = 0x14; + m_time_index = 0; } /* if in states 1-2 put data in the buffer until it's full */ - else if (pic.state == 0x14) + else if (m_state == 0x14) { - pic.time_buf[pic.time_index] = pic.latch & 0x0f; - pic.state = 0x24; + m_time_buf[m_time_index] = m_latch & 0x0f; + m_state = 0x24; } - else if (pic.state == 0x24) + else if (m_state == 0x24) { - pic.time_buf[pic.time_index++] |= pic.latch << 4; + m_time_buf[m_time_index++] |= m_latch << 4; /* if less than 7 bytes accumulated, go back to state 1 */ - if (pic.time_index < 7) - pic.state = 0x14; + if (m_time_index < 7) + m_state = 0x14; /* otherwise, flag the time as having just been written for 1/2 second */ else { - pic.time_write_timer->adjust(attotime::from_msec(500)); - pic.time_just_written = 1; - pic.state = 0; + m_time_write_timer->adjust(attotime::from_msec(500)); + m_time_just_written = 1; + m_state = 0; } } break; @@ -447,37 +455,37 @@ void midway_serial_pic2_w(address_space &space, UINT8 data) case 5: /* if coming from state 0, go to state 1 (this is just the command byte) */ - if (pic.state == 0) - pic.state = 0x15; + if (m_state == 0) + m_state = 0x15; /* coming from state 1, go to state 2 and latch the low 4 address bits */ - else if (pic.state == 0x15) + else if (m_state == 0x15) { - pic.nvram_addr = pic.latch & 0x0f; - pic.state = 0x25; + m_nvram_addr = m_latch & 0x0f; + m_state = 0x25; } /* coming from state 2, go to state 3 and latch the high 4 address bits */ - else if (pic.state == 0x25) + else if (m_state == 0x25) { - pic.state = 0x35; - pic.nvram_addr |= pic.latch << 4; + m_state = 0x35; + m_nvram_addr |= m_latch << 4; } /* coming from state 3, go to state 4 and write the low 4 bits */ - else if (pic.state == 0x35) + else if (m_state == 0x35) { - pic.state = 0x45; - pic.nvram[pic.nvram_addr] = pic.latch & 0x0f; + m_state = 0x45; + m_nvram[m_nvram_addr] = m_latch & 0x0f; } /* coming from state 4, reset the states and write the upper 4 bits */ - else if (pic.state == 0x45) + else if (m_state == 0x45) { - pic.state = 0; - pic.nvram[pic.nvram_addr] |= pic.latch << 4; + m_state = 0; + m_nvram[m_nvram_addr] |= m_latch << 4; if (nvramlog) - fprintf(nvramlog, "Write byte %02X = %02X\n", pic.nvram_addr, pic.nvram[pic.nvram_addr]); + fprintf(nvramlog, "Write byte %02X = %02X\n", m_nvram_addr, m_nvram[m_nvram_addr]); } break; @@ -485,49 +493,52 @@ void midway_serial_pic2_w(address_space &space, UINT8 data) case 6: /* if coming from state 0, go to state 1 (this is just the command byte) */ - if (pic.state == 0) - pic.state = 0x16; + if (m_state == 0) + m_state = 0x16; /* coming from state 1, go to state 2 and latch the low 4 address bits */ - else if (pic.state == 0x16) + else if (m_state == 0x16) { - pic.nvram_addr = pic.latch & 0x0f; - pic.state = 0x26; + m_nvram_addr = m_latch & 0x0f; + m_state = 0x26; } /* coming from state 2, reset the states and make the data available */ - else if (pic.state == 0x26) + else if (m_state == 0x26) { - pic.state = 0; - pic.nvram_addr |= pic.latch << 4; + m_state = 0; + m_nvram_addr |= m_latch << 4; - pic.total = 0; - pic.index = 0; - pic.buffer[pic.total++] = pic.nvram[pic.nvram_addr]; + m_total = 0; + m_index = 0; + m_buffer[m_total++] = m_nvram[m_nvram_addr]; if (nvramlog) - fprintf(nvramlog, "Read byte %02X = %02X\n", pic.nvram_addr, pic.nvram[pic.nvram_addr]); + fprintf(nvramlog, "Read byte %02X = %02X\n", m_nvram_addr, m_nvram[m_nvram_addr]); } break; /* reflect inverted? (Cruisin' Exotica) */ case 8: - pic.latch = 0x400 | (~cmd & 0xff); + m_latch = 0x400 | (~cmd & 0xff); break; } } } - -NVRAM_HANDLER( midway_serial_pic2 ) +void midway_serial_pic2_device::nvram_default() { - if (read_or_write) - file->write(pic.nvram, sizeof(pic.nvram)); - else if (file) - file->read(pic.nvram, sizeof(pic.nvram)); - else - memcpy(pic.nvram, pic.default_nvram, sizeof(pic.nvram)); + memcpy(m_nvram, m_default_nvram, sizeof(m_nvram)); } +void midway_serial_pic2_device::nvram_read(emu_file &file) +{ + file.read(m_nvram, sizeof(m_nvram)); +} + +void midway_serial_pic2_device::nvram_write(emu_file &file) +{ + file.write(m_nvram, sizeof(m_nvram)); +} /************************************* @@ -558,31 +569,60 @@ enum IOASIC_INTCTL /* f: interrupt control */ }; -static UINT16 ioasic_fifo_r(device_t *device); -static UINT16 ioasic_fifo_status_r(device_t *device); -static void ioasic_input_empty(running_machine &machine, int state); -static void ioasic_output_full(running_machine &machine, int state); -static void update_ioasic_irq(running_machine &machine); -static void cage_irq_handler(running_machine &machine, int state); - - -static void ioasic_register_state(running_machine &machine) +void midway_ioasic_device::ioasic_register_state() { - machine.save().save_item(NAME(ioasic.reg)); - machine.save().save_item(NAME(ioasic.shuffle_active)); - machine.save().save_item(NAME(ioasic.irq_state)); - machine.save().save_item(NAME(ioasic.sound_irq_state)); - machine.save().save_item(NAME(ioasic.auto_ack)); - machine.save().save_item(NAME(ioasic.force_fifo_full)); - machine.save().save_item(NAME(ioasic.fifo)); - machine.save().save_item(NAME(ioasic.fifo_in)); - machine.save().save_item(NAME(ioasic.fifo_out)); - machine.save().save_item(NAME(ioasic.fifo_bytes)); - machine.save().save_item(NAME(ioasic.fifo_force_buffer_empty_pc)); + save_item(NAME(m_reg)); + save_item(NAME(m_shuffle_active)); + save_item(NAME(m_irq_state)); + save_item(NAME(m_sound_irq_state)); + save_item(NAME(m_auto_ack)); + save_item(NAME(m_force_fifo_full)); + save_item(NAME(m_fifo)); + save_item(NAME(m_fifo_in)); + save_item(NAME(m_fifo_out)); + save_item(NAME(m_fifo_bytes)); + save_item(NAME(m_fifo_force_buffer_empty_pc)); +} + +const device_type MIDWAY_IOASIC = &device_creator; + + +//------------------------------------------------- +// midway_serial_pic2_device - constructor +//------------------------------------------------- + +midway_ioasic_device::midway_ioasic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + midway_serial_pic2_device(mconfig, MIDWAY_IOASIC, "Midway IOASIC", tag, owner, clock, "midway_ioasic", __FILE__), + m_has_dcs(0), + m_has_cage(0), + m_dcs_cpu(NULL), + m_shuffle_type(0), + m_shuffle_default(0), + m_shuffle_active(0), + m_shuffle_map(NULL), + m_irq_callback(*this), + m_irq_state(0), + m_sound_irq_state(0), + m_auto_ack(0), + m_force_fifo_full(0), + m_fifo_in(0), + m_fifo_out(0), + m_fifo_bytes(0), + m_fifo_force_buffer_empty_pc(0), + m_cage(NULL), + m_dcs(NULL) +{ + memset(m_fifo,0,sizeof(m_fifo)); + memset(m_reg,0,sizeof(m_reg)); } -void midway_ioasic_init(running_machine &machine, int shuffle, int upper, int yearoffs, void (*irq_callback)(running_machine &, int)) +//------------------------------------------------- +// device_start - device-specific startup +//------------------------------------------------- + +void midway_ioasic_device::device_start() +//void midway_ioasic_init(running_machine &machine, int shuffle, int upper, int yearoffs, void (*irq_callback)(running_machine &, int)) { static const UINT8 shuffle_maps[][16] = { @@ -597,123 +637,118 @@ void midway_ioasic_init(running_machine &machine, int shuffle, int upper, int ye { 0x1,0x2,0x3,0x0,0x4,0x5,0x6,0x7,0xa,0xb,0x8,0x9,0xc,0xd,0xe,0xf }, /* Hyperdrive */ }; - ioasic_register_state(machine); + ioasic_register_state(); /* do we have a DCS2 sound chip connected? (most likely) */ - ioasic.has_dcs = (machine.device("dcs2") != NULL || machine.device("dsio") != NULL || machine.device("denver") != NULL); - ioasic.has_cage = (machine.device("cage") != NULL); - ioasic.dcs_cpu = machine.device("dcs2"); - if (ioasic.dcs_cpu == NULL) - ioasic.dcs_cpu = machine.device("dsio"); - if (ioasic.dcs_cpu == NULL) - ioasic.dcs_cpu = machine.device("denver"); - ioasic.shuffle_type = shuffle; - ioasic.shuffle_map = &shuffle_maps[shuffle][0]; - ioasic.auto_ack = 0; - ioasic.irq_callback = irq_callback; + m_dcs = machine().device("dcs"); + m_has_dcs = (m_dcs != NULL); + m_cage = machine().device("cage"); + m_has_cage = (m_cage != NULL); + + m_dcs_cpu = m_dcs->subdevice("dcs2"); + if (m_dcs_cpu == NULL) + m_dcs_cpu = m_dcs->subdevice("dsio"); + if (m_dcs_cpu == NULL) + m_dcs_cpu = m_dcs->subdevice("denver"); + m_shuffle_map = &shuffle_maps[m_shuffle_type][0]; + // resolve callbacks + m_irq_callback.resolve_safe(); /* initialize the PIC */ - midway_serial_pic2_init(machine, upper, yearoffs); + midway_serial_pic2_device::device_start(); /* reset the chip */ - midway_ioasic_reset(machine); - ioasic.reg[IOASIC_SOUNDCTL] = 0x0001; + ioasic_reset(); + + m_reg[IOASIC_SOUNDCTL] = 0x0001; /* configure the fifo */ - if (ioasic.has_dcs) + if (m_has_dcs) { - dcs_set_fifo_callbacks(ioasic_fifo_r, ioasic_fifo_status_r); - dcs_set_io_callbacks(ioasic_output_full, ioasic_input_empty); + m_dcs->set_fifo_callbacks(read16_delegate(FUNC(midway_ioasic_device::fifo_r),this), + read16_delegate(FUNC(midway_ioasic_device::fifo_status_r),this), + write_line_delegate(FUNC(midway_ioasic_device::fifo_reset_w),this)); + m_dcs->set_io_callbacks(write_line_delegate(FUNC(midway_ioasic_device::ioasic_output_full),this), + write_line_delegate(FUNC(midway_ioasic_device::ioasic_input_empty),this)); } - midway_ioasic_fifo_reset_w(machine, 1); + fifo_reset_w(1); +} - /* configure the CAGE IRQ */ - if (ioasic.has_cage) - cage_set_irq_handler(cage_irq_handler); +void midway_ioasic_device::set_shuffle_state(int state) +{ + m_shuffle_active = state; } -void midway_ioasic_set_auto_ack(int auto_ack) +void midway_ioasic_device::ioasic_reset() { - ioasic.auto_ack = auto_ack; + m_shuffle_active = m_shuffle_default; + m_sound_irq_state = 0x0080; + m_reg[IOASIC_INTCTL] = 0; + if (m_has_dcs) + fifo_reset_w(1); + update_ioasic_irq(); + midway_serial_pic_device::reset_w(1); } -void midway_ioasic_set_shuffle_state(int state) +void midway_ioasic_device::update_ioasic_irq() { - ioasic.shuffle_active = state; -} - - -void midway_ioasic_reset(running_machine &machine) -{ - ioasic.shuffle_active = 0; - ioasic.sound_irq_state = 0x0080; - ioasic.reg[IOASIC_INTCTL] = 0; - if (ioasic.has_dcs) - midway_ioasic_fifo_reset_w(machine, 1); - update_ioasic_irq(machine); - midway_serial_pic_reset_w(1); -} - - -static void update_ioasic_irq(running_machine &machine) -{ - UINT16 fifo_state = ioasic_fifo_status_r(NULL); + UINT16 fifo_state = fifo_status_r(machine().driver_data()->generic_space(),0); UINT16 irqbits = 0x2000; UINT8 new_state; - irqbits |= ioasic.sound_irq_state; - if (ioasic.reg[IOASIC_UARTIN] & 0x1000) + irqbits |= m_sound_irq_state; + if (m_reg[IOASIC_UARTIN] & 0x1000) irqbits |= 0x1000; if (fifo_state & 8) irqbits |= 0x0008; if (irqbits) irqbits |= 0x0001; - ioasic.reg[IOASIC_INTSTAT] = irqbits; + m_reg[IOASIC_INTSTAT] = irqbits; - new_state = ((ioasic.reg[IOASIC_INTCTL] & 0x0001) != 0) && ((ioasic.reg[IOASIC_INTSTAT] & ioasic.reg[IOASIC_INTCTL] & 0x3ffe) != 0); - if (new_state != ioasic.irq_state) + new_state = ((m_reg[IOASIC_INTCTL] & 0x0001) != 0) && ((m_reg[IOASIC_INTSTAT] & m_reg[IOASIC_INTCTL] & 0x3ffe) != 0); + if (new_state != m_irq_state) { - ioasic.irq_state = new_state; - if (ioasic.irq_callback) - (*ioasic.irq_callback)(machine, ioasic.irq_state ? ASSERT_LINE : CLEAR_LINE); + m_irq_state = new_state; + if (!m_irq_callback.isnull()) + m_irq_callback(m_irq_state ? ASSERT_LINE : CLEAR_LINE); } } -static void cage_irq_handler(running_machine &machine, int reason) +WRITE8_MEMBER(midway_ioasic_device::cage_irq_handler) { - logerror("CAGE irq handler: %d\n", reason); - ioasic.sound_irq_state = 0; - if (reason & CAGE_IRQ_REASON_DATA_READY) - ioasic.sound_irq_state |= 0x0040; - if (reason & CAGE_IRQ_REASON_BUFFER_EMPTY) - ioasic.sound_irq_state |= 0x0080; - update_ioasic_irq(machine); + logerror("CAGE irq handler: %d\n", offset); + m_sound_irq_state = 0; + if (offset & CAGE_IRQ_REASON_DATA_READY) + m_sound_irq_state |= 0x0040; + if (offset & CAGE_IRQ_REASON_BUFFER_EMPTY) + m_sound_irq_state |= 0x0080; + update_ioasic_irq(); } -static void ioasic_input_empty(running_machine &machine, int state) +WRITE_LINE_MEMBER(midway_ioasic_device::ioasic_input_empty) { // logerror("ioasic_input_empty(%d)\n", state); if (state) - ioasic.sound_irq_state |= 0x0080; + m_sound_irq_state |= 0x0080; else - ioasic.sound_irq_state &= ~0x0080; - update_ioasic_irq(machine); + m_sound_irq_state &= ~0x0080; + update_ioasic_irq(); } -static void ioasic_output_full(running_machine &machine, int state) +WRITE_LINE_MEMBER(midway_ioasic_device::ioasic_output_full) { // logerror("ioasic_output_full(%d)\n", state); if (state) - ioasic.sound_irq_state |= 0x0040; + m_sound_irq_state |= 0x0040; else - ioasic.sound_irq_state &= ~0x0040; - update_ioasic_irq(machine); + m_sound_irq_state &= ~0x0040; + update_ioasic_irq(); } @@ -724,30 +759,30 @@ static void ioasic_output_full(running_machine &machine, int state) * *************************************/ -static UINT16 ioasic_fifo_r(device_t *device) +READ16_MEMBER(midway_ioasic_device::fifo_r) { UINT16 result = 0; /* we can only read data if there's some to read! */ - if (ioasic.fifo_bytes != 0) + if (m_fifo_bytes != 0) { /* fetch the data from the buffer and update the IOASIC state */ - result = ioasic.fifo[ioasic.fifo_out++ % FIFO_SIZE]; - ioasic.fifo_bytes--; - update_ioasic_irq(device->machine()); + result = m_fifo[m_fifo_out++ % FIFO_SIZE]; + m_fifo_bytes--; + update_ioasic_irq(); - if (LOG_FIFO && (ioasic.fifo_bytes < 4 || ioasic.fifo_bytes >= FIFO_SIZE - 4)) - logerror("fifo_r(%04X): FIFO bytes = %d!\n", result, ioasic.fifo_bytes); + if (LOG_FIFO && (m_fifo_bytes < 4 || m_fifo_bytes >= FIFO_SIZE - 4)) + logerror("fifo_r(%04X): FIFO bytes = %d!\n", result, m_fifo_bytes); /* if we just cleared the buffer, this may generate an IRQ on the master CPU */ /* because of the way the streaming code works, we need to make sure that the */ /* next status read indicates an empty buffer, even if we've timesliced and the */ /* main CPU is handling the I/O ASIC interrupt */ - if (ioasic.fifo_bytes == 0 && ioasic.has_dcs) + if (m_fifo_bytes == 0 && m_has_dcs) { - ioasic.fifo_force_buffer_empty_pc = ioasic.dcs_cpu->safe_pc(); + m_fifo_force_buffer_empty_pc = m_dcs_cpu->safe_pc(); if (LOG_FIFO) - logerror("fifo_r(%04X): FIFO empty, PC = %04X\n", result, ioasic.fifo_force_buffer_empty_pc); + logerror("fifo_r(%04X): FIFO empty, PC = %04X\n", result, m_fifo_force_buffer_empty_pc); } } else @@ -759,26 +794,26 @@ static UINT16 ioasic_fifo_r(device_t *device) } -static UINT16 ioasic_fifo_status_r(device_t *device) +READ16_MEMBER(midway_ioasic_device::fifo_status_r) { UINT16 result = 0; - if (ioasic.fifo_bytes == 0 && !ioasic.force_fifo_full) + if (m_fifo_bytes == 0 && !m_force_fifo_full) result |= 0x08; - if (ioasic.fifo_bytes >= FIFO_SIZE/2) + if (m_fifo_bytes >= FIFO_SIZE/2) result |= 0x10; - if (ioasic.fifo_bytes >= FIFO_SIZE || ioasic.force_fifo_full) + if (m_fifo_bytes >= FIFO_SIZE || m_force_fifo_full) result |= 0x20; /* kludge alert: if we're reading this from the DCS CPU itself, and we recently cleared */ /* the FIFO, and we're within 16 instructions of the read that cleared the FIFO, make */ /* sure the FIFO clear bit is set */ - if (ioasic.fifo_force_buffer_empty_pc && device == ioasic.dcs_cpu) + if (m_fifo_force_buffer_empty_pc && m_has_dcs)// && device == m_dcs_cpu) { - offs_t currpc = ioasic.dcs_cpu->safe_pc(); - if (currpc >= ioasic.fifo_force_buffer_empty_pc && currpc < ioasic.fifo_force_buffer_empty_pc + 0x10) + offs_t currpc = m_dcs_cpu->safe_pc(); + if (currpc >= m_fifo_force_buffer_empty_pc && currpc < m_fifo_force_buffer_empty_pc + 0x10) { - ioasic.fifo_force_buffer_empty_pc = 0; + m_fifo_force_buffer_empty_pc = 0; result |= 0x08; if (LOG_FIFO) logerror("ioasic_fifo_status_r(%04X): force empty, PC = %04X\n", result, currpc); @@ -789,49 +824,49 @@ static UINT16 ioasic_fifo_status_r(device_t *device) } -void midway_ioasic_fifo_reset_w(running_machine &machine, int state) +WRITE_LINE_MEMBER(midway_ioasic_device::fifo_reset_w) { /* on the high state, reset the FIFO data */ if (state) { - ioasic.fifo_in = 0; - ioasic.fifo_out = 0; - ioasic.fifo_bytes = 0; - ioasic.force_fifo_full = 0; - update_ioasic_irq(machine); + m_fifo_in = 0; + m_fifo_out = 0; + m_fifo_bytes = 0; + m_force_fifo_full = 0; + update_ioasic_irq(); } if (LOG_FIFO) - logerror("%s:fifo_reset(%d)\n", machine.describe_context(), state); + logerror("%s:fifo_reset(%d)\n", machine().describe_context(), state); } -void midway_ioasic_fifo_w(running_machine &machine, UINT16 data) +void midway_ioasic_device::fifo_w(UINT16 data) { /* if we have room, add it to the FIFO buffer */ - if (ioasic.fifo_bytes < FIFO_SIZE) + if (m_fifo_bytes < FIFO_SIZE) { - ioasic.fifo[ioasic.fifo_in++ % FIFO_SIZE] = data; - ioasic.fifo_bytes++; - update_ioasic_irq(machine); - if (LOG_FIFO && (ioasic.fifo_bytes < 4 || ioasic.fifo_bytes >= FIFO_SIZE - 4)) - logerror("fifo_w(%04X): FIFO bytes = %d!\n", data, ioasic.fifo_bytes); + m_fifo[m_fifo_in++ % FIFO_SIZE] = data; + m_fifo_bytes++; + update_ioasic_irq(); + if (LOG_FIFO && (m_fifo_bytes < 4 || m_fifo_bytes >= FIFO_SIZE - 4)) + logerror("fifo_w(%04X): FIFO bytes = %d!\n", data, m_fifo_bytes); } else { if (LOG_FIFO) logerror("fifo_w(%04X): out of space!\n", data); } - dcs_fifo_notify(machine, ioasic.fifo_bytes, FIFO_SIZE); + m_dcs->fifo_notify(m_fifo_bytes, FIFO_SIZE); } -void midway_ioasic_fifo_full_w(running_machine &machine, UINT16 data) +void midway_ioasic_device::fifo_full_w(UINT16 data) { if (LOG_FIFO) logerror("fifo_full_w(%04X)\n", data); - ioasic.force_fifo_full = 1; - update_ioasic_irq(machine); - dcs_fifo_notify(machine, ioasic.fifo_bytes, FIFO_SIZE); + m_force_fifo_full = 1; + update_ioasic_irq(); + m_dcs->fifo_notify(m_fifo_bytes, FIFO_SIZE); } @@ -842,30 +877,30 @@ void midway_ioasic_fifo_full_w(running_machine &machine, UINT16 data) * *************************************/ -READ32_HANDLER( midway_ioasic_packed_r ) +READ32_MEMBER( midway_ioasic_device::packed_r ) { UINT32 result = 0; if (ACCESSING_BITS_0_15) - result |= midway_ioasic_r(space, offset*2, 0x0000ffff) & 0xffff; + result |= read(space, offset*2, 0x0000ffff) & 0xffff; if (ACCESSING_BITS_16_31) - result |= (midway_ioasic_r(space, offset*2+1, 0x0000ffff) & 0xffff) << 16; + result |= (read(space, offset*2+1, 0x0000ffff) & 0xffff) << 16; return result; } -READ32_HANDLER( midway_ioasic_r ) +READ32_MEMBER( midway_ioasic_device::read ) { UINT32 result; - offset = ioasic.shuffle_active ? ioasic.shuffle_map[offset & 15] : offset; - result = ioasic.reg[offset]; + offset = m_shuffle_active ? m_shuffle_map[offset & 15] : offset; + result = m_reg[offset]; switch (offset) { case IOASIC_PORT0: - result = space.machine().root_device().ioport("DIPS")->read(); + result = machine().root_device().ioport("DIPS")->read(); /* bit 0 seems to be a ready flag before shuffling happens */ - if (!ioasic.shuffle_active) + if (!m_shuffle_active) { result |= 0x0001; /* blitz99 wants bit bits 13-15 to be 1 */ @@ -875,33 +910,33 @@ READ32_HANDLER( midway_ioasic_r ) break; case IOASIC_PORT1: - result = space.machine().root_device().ioport("SYSTEM")->read(); + result = machine().root_device().ioport("SYSTEM")->read(); break; case IOASIC_PORT2: - result = space.machine().root_device().ioport("IN1")->read(); + result = machine().root_device().ioport("IN1")->read(); break; case IOASIC_PORT3: - result = space.machine().root_device().ioport("IN2")->read(); + result = machine().root_device().ioport("IN2")->read(); break; case IOASIC_UARTIN: - ioasic.reg[offset] &= ~0x1000; + m_reg[offset] &= ~0x1000; break; case IOASIC_SOUNDSTAT: /* status from sound CPU */ result = 0; - if (ioasic.has_dcs) + if (m_has_dcs) { - result |= ((dcs_control_r(space.machine()) >> 4) ^ 0x40) & 0x00c0; - result |= ioasic_fifo_status_r(&space.device()) & 0x0038; - result |= dcs_data2_r(space.machine()) & 0xff00; + result |= ((m_dcs->control_r() >> 4) ^ 0x40) & 0x00c0; + result |= fifo_status_r(space,0) & 0x0038; + result |= m_dcs->data2_r() & 0xff00; } - else if (ioasic.has_cage) + else if (m_has_cage) { - result |= (cage_control_r(space.machine()) << 6) ^ 0x80; + result |= (m_cage->control_r() << 6) ^ 0x80; } else result |= 0x48; @@ -909,14 +944,14 @@ READ32_HANDLER( midway_ioasic_r ) case IOASIC_SOUNDIN: result = 0; - if (ioasic.has_dcs) + if (m_has_dcs) { - result = dcs_data_r(space.machine()); - if (ioasic.auto_ack) - dcs_ack_w(space.machine()); + result = m_dcs->data_r(); + if (m_auto_ack) + m_dcs->ack_w(); } - else if (ioasic.has_cage) - result = cage_main_r(space); + else if (m_has_cage) + result = m_cage->main_r(); else { static UINT16 val = 0; @@ -925,7 +960,7 @@ READ32_HANDLER( midway_ioasic_r ) break; case IOASIC_PICIN: - result = midway_serial_pic2_r(space) | (midway_serial_pic2_status_r(space) << 8); + result = midway_serial_pic2_device::read(space,0) | (midway_serial_pic2_device::status_r(space,0) << 8); break; default: @@ -939,23 +974,23 @@ READ32_HANDLER( midway_ioasic_r ) } -WRITE32_HANDLER( midway_ioasic_packed_w ) +WRITE32_MEMBER( midway_ioasic_device::packed_w ) { if (ACCESSING_BITS_0_15) - midway_ioasic_w(space, offset*2, data & 0xffff, 0x0000ffff); + write(space, offset*2, data & 0xffff, 0x0000ffff); if (ACCESSING_BITS_16_31) - midway_ioasic_w(space, offset*2+1, data >> 16, 0x0000ffff); + write(space, offset*2+1, data >> 16, 0x0000ffff); } -WRITE32_HANDLER( midway_ioasic_w ) +WRITE32_MEMBER( midway_ioasic_device::write ) { UINT32 oldreg, newreg; - offset = ioasic.shuffle_active ? ioasic.shuffle_map[offset & 15] : offset; - oldreg = ioasic.reg[offset]; - COMBINE_DATA(&ioasic.reg[offset]); - newreg = ioasic.reg[offset]; + offset = m_shuffle_active ? m_shuffle_map[offset & 15] : offset; + oldreg = m_reg[offset]; + COMBINE_DATA(&m_reg[offset]); + newreg = m_reg[offset]; if (LOG_IOASIC && offset != IOASIC_SOUNDOUT) logerror("%06X:ioasic_w(%d) = %08X\n", space.device().safe_pc(), offset, data); @@ -966,26 +1001,26 @@ WRITE32_HANDLER( midway_ioasic_w ) /* the last write here seems to turn on shuffling */ if (data == 0xe2) { - ioasic.shuffle_active = 1; + m_shuffle_active = 1; logerror("*** I/O ASIC shuffling enabled!\n"); - ioasic.reg[IOASIC_INTCTL] = 0; - ioasic.reg[IOASIC_UARTCONTROL] = 0; /* bug in 10th Degree assumes this */ + m_reg[IOASIC_INTCTL] = 0; + m_reg[IOASIC_UARTCONTROL] = 0; /* bug in 10th Degree assumes this */ } break; case IOASIC_PORT2: case IOASIC_PORT3: /* ignore writes here if we're not shuffling yet */ - if (!ioasic.shuffle_active) + if (!m_shuffle_active) break; break; case IOASIC_UARTOUT: - if (ioasic.reg[IOASIC_UARTCONTROL] & 0x800) + if (m_reg[IOASIC_UARTCONTROL] & 0x800) { /* we're in loopback mode -- copy to the input */ - ioasic.reg[IOASIC_UARTIN] = (newreg & 0x00ff) | 0x1000; - update_ioasic_irq(space.machine()); + m_reg[IOASIC_UARTIN] = (newreg & 0x00ff) | 0x1000; + update_ioasic_irq(); } else if (PRINTF_DEBUG) osd_printf_debug("%c", data & 0xff); @@ -993,43 +1028,43 @@ WRITE32_HANDLER( midway_ioasic_w ) case IOASIC_SOUNDCTL: /* sound reset? */ - if (ioasic.has_dcs) + if (m_has_dcs) { - dcs_reset_w(space.machine(), ~newreg & 1); + m_dcs->reset_w(~newreg & 1); } - else if (ioasic.has_cage) + else if (m_has_cage) { if ((oldreg ^ newreg) & 1) { - cage_control_w(space.machine(), 0); + m_cage->control_w(0); if (!(~newreg & 1)) - cage_control_w(space.machine(), 3); + m_cage->control_w(3); } } /* FIFO reset? */ - midway_ioasic_fifo_reset_w(space.machine(), ~newreg & 4); + fifo_reset_w(~newreg & 4); break; case IOASIC_SOUNDOUT: - if (ioasic.has_dcs) - dcs_data_w(space.machine(), newreg); - else if (ioasic.has_cage) - cage_main_w(space, newreg); + if (m_has_dcs) + m_dcs->data_w(newreg); + else if (m_has_cage) + m_cage->main_w(newreg); break; case IOASIC_SOUNDIN: - dcs_ack_w(space.machine()); + m_dcs->ack_w(); /* acknowledge data read */ break; case IOASIC_PICOUT: - if (ioasic.shuffle_type == MIDWAY_IOASIC_VAPORTRX) - midway_serial_pic2_w(space, newreg ^ 0x0a); - else if (ioasic.shuffle_type == MIDWAY_IOASIC_SFRUSHRK) - midway_serial_pic2_w(space, newreg ^ 0x05); + if (m_shuffle_type == MIDWAY_IOASIC_VAPORTRX) + midway_serial_pic2_device::write(space, 0, newreg ^ 0x0a); + else if (m_shuffle_type == MIDWAY_IOASIC_SFRUSHRK) + midway_serial_pic2_device::write(space, 0, newreg ^ 0x05); else - midway_serial_pic2_w(space, newreg); + midway_serial_pic2_device::write(space, 0, newreg); break; case IOASIC_INTCTL: @@ -1041,7 +1076,7 @@ WRITE32_HANDLER( midway_ioasic_w ) /* bit 14 = LED? */ if ((oldreg ^ newreg) & 0x3ff6) logerror("IOASIC int control = %04X\n", data); - update_ioasic_irq(space.machine()); + update_ioasic_irq(); break; default: diff --git a/src/mame/machine/midwayic.h b/src/mame/machine/midwayic.h index 11ad495badf..0b7a363b754 100644 --- a/src/mame/machine/midwayic.h +++ b/src/mame/machine/midwayic.h @@ -6,37 +6,200 @@ ***************************************************************************/ +#ifndef __MIDWAY_IC__ +#define __MIDWAY_IC__ + +#include "audio/cage.h" +#include "audio/dcs.h" /* 1st generation Midway serial PIC */ -void midway_serial_pic_init(running_machine &machine, int upper); -void midway_serial_pic_reset_w(int state); -UINT8 midway_serial_pic_status_r(void); -UINT8 midway_serial_pic_r(address_space &space); -void midway_serial_pic_w(address_space &space, UINT8 data); + +class midway_serial_pic_device : public device_t +{ +public: + // construction/destruction + midway_serial_pic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + midway_serial_pic_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); + + static void static_set_upper(device_t &device, int upper) { downcast(device).m_upper = upper; } + + DECLARE_READ8_MEMBER( read ); + DECLARE_WRITE8_MEMBER( write ); + DECLARE_READ8_MEMBER( status_r ); + DECLARE_WRITE_LINE_MEMBER( reset_w ); + +protected: + // device-level overrides + virtual void device_start(); + + void generate_serial_data(int upper); + void serial_register_state(); + + UINT8 m_data[16]; // reused by other devices + int m_upper; +private: + UINT8 m_buff; + UINT8 m_idx; + UINT8 m_status; + UINT8 m_bits; + UINT8 m_ormask; +}; +// device type definition +extern const device_type MIDWAY_SERIAL_PIC; + +#define MCFG_MIDWAY_SERIAL_PIC_UPPER(_upper) \ + midway_serial_pic_device::static_set_upper(*device, _upper); + /* 2nd generation Midway serial/NVRAM/RTC PIC */ -void midway_serial_pic2_init(running_machine &machine, int upper, int yearoffs); -void midway_serial_pic2_set_default_nvram(const UINT8 *nvram); -UINT8 midway_serial_pic2_status_r(address_space &space); -UINT8 midway_serial_pic2_r(address_space &space); -void midway_serial_pic2_w(address_space &space, UINT8 data); -NVRAM_HANDLER( midway_serial_pic2 ); +// ======================> midway_serial_pic2_device + +class midway_serial_pic2_device : public midway_serial_pic_device, + public device_nvram_interface +{ +public: + // construction/destruction + midway_serial_pic2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + midway_serial_pic2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); + + static void static_set_yearoffs(device_t &device, int yearoffs) { downcast(device).m_yearoffs = yearoffs; } + + DECLARE_READ8_MEMBER( read ); + DECLARE_WRITE8_MEMBER( write ); + DECLARE_READ8_MEMBER( status_r ); + + void set_default_nvram(const UINT8 *nvram); + +protected: + // device-level overrides + virtual void device_start(); + + // device_nvram_interface overrides + virtual void nvram_default(); + virtual void nvram_read(emu_file &file); + virtual void nvram_write(emu_file &file); + +private: + + void pic_register_state(); + TIMER_CALLBACK_MEMBER( reset_timer ); + + UINT16 m_latch; + attotime m_latch_expire_time; + UINT8 m_state; + UINT8 m_index; + UINT8 m_total; + UINT8 m_nvram_addr; + UINT8 m_buffer[0x10]; + UINT8 m_nvram[0x100]; + UINT8 m_default_nvram[0x100]; + UINT8 m_time_buf[8]; + UINT8 m_time_index; + UINT8 m_time_just_written; + UINT16 m_yearoffs; + emu_timer *m_time_write_timer; +}; + + +// device type definition +extern const device_type MIDWAY_SERIAL_PIC2; + +#define MCFG_MIDWAY_SERIAL_PIC2_UPPER MCFG_MIDWAY_SERIAL_PIC_UPPER + +#define MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(_yearoffs) \ + midway_serial_pic2_device::static_set_yearoffs(*device, _yearoffs); /* I/O ASIC connected to 2nd generation PIC */ -void midway_ioasic_init(running_machine &machine, int shuffle, int upper, int yearoffs, void (*irq_callback)(running_machine &, int)); -void midway_ioasic_set_auto_ack(int auto_ack); -void midway_ioasic_set_shuffle_state(int state); -void midway_ioasic_reset(running_machine &machine); -void midway_ioasic_fifo_w(running_machine &machine, UINT16 data); -void midway_ioasic_fifo_reset_w(running_machine &machine, int state); -void midway_ioasic_fifo_full_w(running_machine &machine, UINT16 data); -DECLARE_READ32_HANDLER( midway_ioasic_r ); -DECLARE_WRITE32_HANDLER( midway_ioasic_w ); -DECLARE_READ32_HANDLER( midway_ioasic_packed_r ); -DECLARE_WRITE32_HANDLER( midway_ioasic_packed_w ); +// ======================> midway_ioasic_device + +class midway_ioasic_device : public midway_serial_pic2_device +{ +public: + // construction/destruction + midway_ioasic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + static void static_set_shuffle(device_t &device, UINT8 shuffle) { downcast(device).m_shuffle_type = shuffle; } + static void static_set_shuffle_default(device_t &device, UINT8 shuffle) { downcast(device).m_shuffle_default = shuffle; } + static void static_set_auto_ack(device_t &device, UINT8 auto_ack) { downcast(device).m_auto_ack = auto_ack; } + template static devcb2_base &set_irqhandler_callback(device_t &device, _Object object) { return downcast(device).m_irq_callback.set_callback(object); } + + void set_shuffle_state(int state); + void fifo_w(UINT16 data); + void fifo_full_w(UINT16 data); + + DECLARE_WRITE_LINE_MEMBER(fifo_reset_w); + DECLARE_READ16_MEMBER(fifo_r); + DECLARE_READ16_MEMBER(fifo_status_r); + + DECLARE_WRITE_LINE_MEMBER(ioasic_input_empty); + DECLARE_WRITE_LINE_MEMBER(ioasic_output_full); + + DECLARE_READ32_MEMBER( read ); + DECLARE_WRITE32_MEMBER( write ); + DECLARE_READ32_MEMBER( packed_r ); + DECLARE_WRITE32_MEMBER( packed_w ); + + DECLARE_WRITE8_MEMBER(cage_irq_handler); + + void ioasic_reset(); + +protected: + // device-level overrides + virtual void device_start(); + +private: + void ioasic_register_state(); + void update_ioasic_irq(); + + + UINT32 m_reg[16]; + UINT8 m_has_dcs; + UINT8 m_has_cage; + device_t *m_dcs_cpu; + UINT8 m_shuffle_type; + UINT8 m_shuffle_default; + UINT8 m_shuffle_active; + const UINT8 * m_shuffle_map; + devcb2_write8 m_irq_callback; + UINT8 m_irq_state; + UINT16 m_sound_irq_state; + UINT8 m_auto_ack; + UINT8 m_force_fifo_full; + + UINT16 m_fifo[512]; + UINT16 m_fifo_in; + UINT16 m_fifo_out; + UINT16 m_fifo_bytes; + offs_t m_fifo_force_buffer_empty_pc; + + atari_cage_device *m_cage; + dcs_audio_device *m_dcs; +}; + + +// device type definition +extern const device_type MIDWAY_IOASIC; + +#define MCFG_MIDWAY_IOASIC_UPPER MCFG_MIDWAY_SERIAL_PIC_UPPER + +#define MCFG_MIDWAY_IOASIC_YEAR_OFFS MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS + +#define MCFG_MIDWAY_IOASIC_SHUFFLE(_shuffle) \ + midway_ioasic_device::static_set_shuffle(*device, _shuffle); + +#define MCFG_MIDWAY_IOASIC_SHUFFLE_DEFAULT(_shuffle) \ + midway_ioasic_device::static_set_shuffle_default(*device, _shuffle); + +#define MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(_write) \ + devcb = &midway_ioasic_device::set_irqhandler_callback(*device, DEVCB2_##_write); + +#define MCFG_MIDWAY_IOASIC_AUTO_ACK(_ack) \ + midway_ioasic_device::static_set_auto_ack(*device, _ack); + + enum { MIDWAY_IOASIC_STANDARD = 0, @@ -49,3 +212,5 @@ enum MIDWAY_IOASIC_SFRUSHRK, MIDWAY_IOASIC_HYPRDRIV }; + +#endif \ No newline at end of file diff --git a/src/mame/machine/midwunit.c b/src/mame/machine/midwunit.c index 7db9889e7cb..55125589617 100644 --- a/src/mame/machine/midwunit.c +++ b/src/mame/machine/midwunit.c @@ -12,7 +12,6 @@ #include "audio/dcs.h" #include "includes/midtunit.h" #include "includes/midwunit.h" -#include "midwayic.h" /************************************* * @@ -87,10 +86,10 @@ WRITE16_MEMBER(midwunit_state::midwunit_io_w) logerror("%08X:Control W @ %05X = %04X\n", space.device().safe_pc(), offset, data); /* bit 4 reset sound CPU */ - dcs_reset_w(machine(), newword & 0x10); + m_dcs->reset_w(newword & 0x10); /* bit 5 (active low) reset security chip */ - midway_serial_pic_reset_w(newword & 0x20); + m_midway_serial_pic->reset_w(newword & 0x20); break; case 3: @@ -130,7 +129,7 @@ READ16_MEMBER(midwunit_state::midwunit_io_r) return ioport(portnames[offset])->read(); case 4: - return (midway_serial_pic_status_r() << 12) | midwunit_sound_state_r(space,0,0xffff); + return (m_midway_serial_pic->status_r(space,0) << 12) | midwunit_sound_state_r(space,0,0xffff); default: logerror("%08X:Unknown I/O read from %d\n", space.device().safe_pc(), offset); @@ -151,9 +150,6 @@ void midwunit_state::init_wunit_generic() { /* register for state saving */ register_state_saving(); - - /* init sound */ - dcs_init(machine()); } @@ -201,7 +197,7 @@ void midwunit_state::init_mk3_common() init_wunit_generic(); /* serial prefixes 439, 528 */ - midway_serial_pic_init(machine(), 528); + //midway_serial_pic_init(machine(), 528); } DRIVER_INIT_MEMBER(midwunit_state,mk3) @@ -240,7 +236,7 @@ DRIVER_INIT_MEMBER(midwunit_state,openice) init_wunit_generic(); /* serial prefixes 438, 528 */ - midway_serial_pic_init(machine(), 528); + //midway_serial_pic_init(machine(), 528); } @@ -252,7 +248,7 @@ DRIVER_INIT_MEMBER(midwunit_state,nbahangt) init_wunit_generic(); /* serial prefixes 459, 470, 528 */ - midway_serial_pic_init(machine(), 528); + //midway_serial_pic_init(machine(), 528); } @@ -316,7 +312,7 @@ DRIVER_INIT_MEMBER(midwunit_state,wwfmania) m_maincpu->space(AS_PROGRAM).install_write_handler(0x01800000, 0x0180000f, write16_delegate(FUNC(midwunit_state::wwfmania_io_0_w),this)); /* serial prefixes 430, 528 */ - midway_serial_pic_init(machine(), 528); + //midway_serial_pic_init(machine(), 528); } @@ -328,7 +324,7 @@ DRIVER_INIT_MEMBER(midwunit_state,rmpgwt) init_wunit_generic(); /* serial prefixes 465, 528 */ - midway_serial_pic_init(machine(), 528); + //midway_serial_pic_init(machine(), 528); } @@ -343,8 +339,8 @@ MACHINE_RESET_MEMBER(midwunit_state,midwunit) int i; /* reset sound */ - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); /* reset I/O shuffling */ for (i = 0; i < 16; i++) @@ -361,14 +357,14 @@ MACHINE_RESET_MEMBER(midwunit_state,midwunit) READ16_MEMBER(midwunit_state::midwunit_security_r) { - return midway_serial_pic_r(space); + return m_midway_serial_pic->read(space,0); } WRITE16_MEMBER(midwunit_state::midwunit_security_w) { if (offset == 0 && ACCESSING_BITS_0_7) - midway_serial_pic_w(space, data); + m_midway_serial_pic->write(space, 0, data); } @@ -383,13 +379,13 @@ READ16_MEMBER(midwunit_state::midwunit_sound_r) { logerror("%08X:Sound read\n", space.device().safe_pc()); - return dcs_data_r(machine()) & 0xff; + return m_dcs->data_r() & 0xff; } READ16_MEMBER(midwunit_state::midwunit_sound_state_r) { - return dcs_control_r(machine()); + return m_dcs->control_r(); } @@ -406,6 +402,6 @@ WRITE16_MEMBER(midwunit_state::midwunit_sound_w) if (ACCESSING_BITS_0_7) { logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data); - dcs_data_w(machine(), data & 0xff); + m_dcs->data_w(data & 0xff); } } diff --git a/src/mame/machine/midxunit.c b/src/mame/machine/midxunit.c index 5224d6735cf..47c9d3879ff 100644 --- a/src/mame/machine/midxunit.c +++ b/src/mame/machine/midxunit.c @@ -15,11 +15,6 @@ #include "midwayic.h" -/* prototype */ -static void midxunit_dcs_output_full(running_machine &machine, int state); - - - /************************************* * * State saving @@ -101,7 +96,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_unknown_w) int offs = offset / 0x40000; if (offs == 1 && ACCESSING_BITS_0_7) - dcs_reset_w(machine(), data & 2); + m_dcs->reset_w(data & 2); if (ACCESSING_BITS_0_7 && offset % 0x40000 == 0) logerror("%08X:midxunit_unknown_w @ %d = %02X\n", space.device().safe_pc(), offs, data & 0xff); @@ -155,7 +150,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_analog_select_w) READ16_MEMBER(midxunit_state::midxunit_status_r) { /* low bit indicates whether the ADC is done reading the current input */ - return (midway_serial_pic_status_r() << 1) | 1; + return (m_midway_serial_pic->status_r(space,0) << 1) | 1; } @@ -166,12 +161,11 @@ READ16_MEMBER(midxunit_state::midxunit_status_r) * *************************************/ -static void midxunit_dcs_output_full(running_machine &machine, int state) +WRITE_LINE_MEMBER(midxunit_state::midxunit_dcs_output_full) { - midxunit_state *drvstate = machine.driver_data(); /* only signal if not in loopback state */ - if (drvstate->m_uart[1] != 0x66) - drvstate->m_maincpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE); + if (m_uart[1] != 0x66) + m_maincpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE); } @@ -267,7 +261,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_uart_w) break; case 5: /* register 5 write seems to reset things */ - dcs_data_r(machine()); + m_dcs->data_r(); break; default: /* everyone else just stores themselves */ @@ -294,16 +288,8 @@ DRIVER_INIT_MEMBER(midxunit_state,revx) { /* register for state saving */ register_state_saving(); - - /* init sound */ - dcs_init(machine()); - - /* serial prefixes 419, 420 */ - midway_serial_pic_init(machine(), 419); } - - /************************************* * * Machine init @@ -315,14 +301,14 @@ MACHINE_RESET_MEMBER(midxunit_state,midxunit) int i; /* reset sound */ - dcs_reset_w(machine(), 1); - dcs_reset_w(machine(), 0); + m_dcs->reset_w(1); + m_dcs->reset_w(0); /* reset I/O shuffling */ for (i = 0; i < 16; i++) m_ioshuffle[i] = i % 8; - dcs_set_io_callbacks(midxunit_dcs_output_full, NULL); + m_dcs->set_io_callbacks(write_line_delegate(FUNC(midxunit_state::midxunit_dcs_output_full),this), write_line_delegate()); } @@ -335,7 +321,7 @@ MACHINE_RESET_MEMBER(midxunit_state,midxunit) READ16_MEMBER(midxunit_state::midxunit_security_r) { - return midway_serial_pic_r(space); + return m_midway_serial_pic->read(space,0); } WRITE16_MEMBER(midxunit_state::midxunit_security_w) @@ -348,7 +334,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_security_w) WRITE16_MEMBER(midxunit_state::midxunit_security_clock_w) { if (offset == 0 && ACCESSING_BITS_0_7) - midway_serial_pic_w(space, ((~data & 2) << 3) | m_security_bits); + m_midway_serial_pic->write(space, 0, ((~data & 2) << 3) | m_security_bits); } @@ -363,13 +349,13 @@ READ16_MEMBER(midxunit_state::midxunit_sound_r) { logerror("%08X:Sound read\n", space.device().safe_pc()); - return dcs_data_r(machine()) & 0xff; + return m_dcs->data_r() & 0xff; } READ16_MEMBER(midxunit_state::midxunit_sound_state_r) { - return dcs_control_r(machine()); + return m_dcs->control_r(); } @@ -386,6 +372,6 @@ WRITE16_MEMBER(midxunit_state::midxunit_sound_w) if (ACCESSING_BITS_0_7) { logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data); - dcs_data_w(machine(), data & 0xff); + m_dcs->data_w(data & 0xff); } } diff --git a/src/mame/mame.mak b/src/mame/mame.mak index d518947fd92..64c9adce5ef 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -615,6 +615,7 @@ $(MAMEOBJ)/shared.a: \ $(MACHINE)/segacrp2.o \ $(MACHINE)/ticket.o \ $(VIDEO)/avgdvg.o \ + $(AUDIO)/dcs.o \ $(AUDIO)/decobsmt.o \ $(AUDIO)/segam1audio.o \ @@ -1330,7 +1331,6 @@ $(MAMEOBJ)/midway.a: \ $(DRIVERS)/vegas.o $(DRIVERS)/wmg.o \ $(DRIVERS)/williams.o $(MACHINE)/williams.o $(AUDIO)/williams.o $(VIDEO)/williams.o \ $(MACHINE)/midwayic.o \ - $(AUDIO)/dcs.o \ $(AUDIO)/gorf.o \ $(AUDIO)/midway.o \ $(AUDIO)/wow.o \