mirror of
https://github.com/holub/mame
synced 2025-06-30 16:00:01 +03:00
never hurts to srcclean (nw)
This commit is contained in:
Vas Crabb
parent
962fa2ffac
commit
d18aa3e097
@ -2086,7 +2086,7 @@ files {
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MAME_DIR .. "src/mame/drivers/hp9k_3xx.cpp",
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MAME_DIR .. "src/mame/drivers/hp9k_3xx.cpp",
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MAME_DIR .. "src/mame/drivers/hp64k.cpp",
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MAME_DIR .. "src/mame/drivers/hp64k.cpp",
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MAME_DIR .. "src/mame/drivers/hp_ipc.cpp",
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MAME_DIR .. "src/mame/drivers/hp_ipc.cpp",
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MAME_DIR .. "src/mame/drivers/hp80.cpp",
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MAME_DIR .. "src/mame/drivers/hp80.cpp",
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}
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}
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createMESSProjects(_target, _subtarget, "hec2hrp")
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createMESSProjects(_target, _subtarget, "hec2hrp")
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@ -109,32 +109,32 @@ namespace {
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}
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}
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// Bits in m_flags
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// Bits in m_flags
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static constexpr unsigned FLAGS_DCM_BIT = 0; // Decimal/binary mode
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static constexpr unsigned FLAGS_DCM_BIT = 0; // Decimal/binary mode
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static constexpr unsigned FLAGS_CY_BIT = 1; // Carry
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static constexpr unsigned FLAGS_CY_BIT = 1; // Carry
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static constexpr unsigned FLAGS_OVF_BIT = 2; // Overflow
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static constexpr unsigned FLAGS_OVF_BIT = 2; // Overflow
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static constexpr unsigned FLAGS_LSB_BIT = 3; // LSB
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static constexpr unsigned FLAGS_LSB_BIT = 3; // LSB
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static constexpr unsigned FLAGS_MSB_BIT = 4; // MSB
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static constexpr unsigned FLAGS_MSB_BIT = 4; // MSB
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static constexpr unsigned FLAGS_Z_BIT = 5; // Zero
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static constexpr unsigned FLAGS_Z_BIT = 5; // Zero
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static constexpr unsigned FLAGS_LDZ_BIT = 6; // Left digit zero
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static constexpr unsigned FLAGS_LDZ_BIT = 6; // Left digit zero
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static constexpr unsigned FLAGS_RDZ_BIT = 7; // Right digit zero
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static constexpr unsigned FLAGS_RDZ_BIT = 7; // Right digit zero
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static constexpr unsigned FLAGS_IRL_BIT = 8; // Interrupt request
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static constexpr unsigned FLAGS_IRL_BIT = 8; // Interrupt request
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// Special registers
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// Special registers
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static constexpr unsigned REG_BANK_PTR = 0; // R0: register bank pointer
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static constexpr unsigned REG_BANK_PTR = 0; // R0: register bank pointer
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static constexpr unsigned REG_INDEX_SCRATCH = 2; // R2 & R3: index scratch registers
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static constexpr unsigned REG_INDEX_SCRATCH = 2; // R2 & R3: index scratch registers
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static constexpr unsigned REG_PC = 4; // R4 & R5: PC
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static constexpr unsigned REG_PC = 4; // R4 & R5: PC
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static constexpr unsigned REG_SP = 6; // R6 & R7: return stack pointer
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static constexpr unsigned REG_SP = 6; // R6 & R7: return stack pointer
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// Bit in address values that specifies external address (0) or internal register (1)
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// Bit in address values that specifies external address (0) or internal register (1)
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static constexpr unsigned GP_REG_BIT = 17;
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static constexpr unsigned GP_REG_BIT = 17;
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static constexpr unsigned GP_REG_MASK = BIT_MASK(GP_REG_BIT);
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static constexpr unsigned GP_REG_MASK = BIT_MASK(GP_REG_BIT);
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static constexpr unsigned ADDR_MASK = 0xffff;
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static constexpr unsigned ADDR_MASK = 0xffff;
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// Mask of bits in ARP & DRP
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// Mask of bits in ARP & DRP
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static constexpr uint8_t ARP_DRP_MASK = 0x3f;
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static constexpr uint8_t ARP_DRP_MASK = 0x3f;
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// Mask of bits in E
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// Mask of bits in E
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static constexpr uint8_t E_MASK = 0xf;
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static constexpr uint8_t E_MASK = 0xf;
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DEFINE_DEVICE_TYPE(HP_CAPRICORN , capricorn_cpu_device , "capricorn" , "HP-Capricorn")
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DEFINE_DEVICE_TYPE(HP_CAPRICORN , capricorn_cpu_device , "capricorn" , "HP-Capricorn")
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@ -483,44 +483,44 @@ uint8_t capricorn_cpu_device::sub_bcd_bytes(uint8_t first , uint8_t second , boo
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return (ld << 4) | rd;
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return (ld << 4) | rd;
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}
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}
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#define OP_ITERATION_START_FWD(idx , multi) \
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#define OP_ITERATION_START_FWD(idx , multi) \
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unsigned boundary = multi ? get_upper_boundary() : m_drp; \
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unsigned boundary = multi ? get_upper_boundary() : m_drp; \
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BIT_SET(m_flags , FLAGS_Z_BIT); \
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BIT_SET(m_flags , FLAGS_Z_BIT); \
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bool first = true; \
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bool first = true; \
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for (unsigned idx = m_drp; idx <= boundary; idx++)
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for (unsigned idx = m_drp; idx <= boundary; idx++)
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#define OP_ITERATION_START_REV(idx , multi) \
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#define OP_ITERATION_START_REV(idx , multi) \
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int boundary = multi ? get_lower_boundary() : m_drp; \
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int boundary = multi ? get_lower_boundary() : m_drp; \
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BIT_SET(m_flags , FLAGS_Z_BIT); \
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BIT_SET(m_flags , FLAGS_Z_BIT); \
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bool first = true; \
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bool first = true; \
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for (int idx = m_drp; idx >= boundary; idx--)
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for (int idx = m_drp; idx >= boundary; idx--)
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#define OP1_GET(idx , op1) \
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#define OP1_GET(idx , op1) \
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m_icount--; \
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m_icount--; \
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uint8_t op1 = m_reg[ idx ];
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uint8_t op1 = m_reg[ idx ];
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#define OP2_GET(idx , ea , op1 , op2) \
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#define OP2_GET(idx , ea , op1 , op2) \
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m_icount--; \
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m_icount--; \
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uint8_t op1 = m_reg[ idx ]; \
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uint8_t op1 = m_reg[ idx ]; \
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uint8_t op2 = RM(ea);
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uint8_t op2 = RM(ea);
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#define RES_SET(idx , res) \
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#define RES_SET(idx , res) \
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m_reg[ idx ] = res;
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m_reg[ idx ] = res;
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#define OP_ITERATION_END_FWD(res) \
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#define OP_ITERATION_END_FWD(res) \
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if (first) { \
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if (first) { \
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update_flags_right(res); \
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update_flags_right(res); \
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first = false; \
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first = false; \
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} \
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} \
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update_flags_left(res); \
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update_flags_left(res); \
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update_flags_every(res);
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update_flags_every(res);
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#define OP_ITERATION_END_REV(res) \
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#define OP_ITERATION_END_REV(res) \
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if (first) { \
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if (first) { \
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update_flags_left(res); \
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update_flags_left(res); \
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first = false; \
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first = false; \
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} \
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} \
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update_flags_right(res); \
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update_flags_right(res); \
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update_flags_every(res);
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update_flags_every(res);
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void capricorn_cpu_device::do_AN_op(ea_addr_t ea)
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void capricorn_cpu_device::do_AN_op(ea_addr_t ea)
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@ -54,16 +54,16 @@ private:
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// State of processor
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// State of processor
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uint8_t m_reg[ 64 ];// Registers R00-R77
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uint8_t m_reg[ 64 ];// Registers R00-R77
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uint8_t m_arp; // ARP register (6 bits)
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uint8_t m_arp; // ARP register (6 bits)
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uint8_t m_drp; // DRP register (6 bits)
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uint8_t m_drp; // DRP register (6 bits)
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uint8_t m_reg_E; // E register (4 bits)
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uint8_t m_reg_E; // E register (4 bits)
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uint16_t m_flags; // Flags
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uint16_t m_flags; // Flags
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uint16_t m_genpc; // PC
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uint16_t m_genpc; // PC
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// Burst memory accesses
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// Burst memory accesses
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bool m_flatten; // Consecutive accesses to memory are "flattened"
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bool m_flatten; // Consecutive accesses to memory are "flattened"
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uint16_t m_start_addr; // Start address of burst
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uint16_t m_start_addr; // Start address of burst
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uint16_t m_curr_addr; // Current address in burst
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uint16_t m_curr_addr; // Current address in burst
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// Effective Addresses
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// Effective Addresses
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// When b17 = 0, b15..b0 hold 16-bit memory address
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// When b17 = 0, b15..b0 hold 16-bit memory address
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@ -3,7 +3,7 @@
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/*
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/*
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uPD7811 - variant of uPD7810 with internal ROM
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uPD7811 - variant of uPD7810 with internal ROM
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*/
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*/
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@ -11,15 +11,15 @@
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#include "upd7811.h"
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#include "upd7811.h"
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/*
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/*
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the MODE pins can cause this to work with external ROM instead
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the MODE pins can cause this to work with external ROM instead
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todo: document MODE pins
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todo: document MODE pins
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M0 M1
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M0 M1
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0 0 -
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0 0 -
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0 1 -
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0 1 -
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1 0 -
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1 0 -
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1 1 -
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1 1 -
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*/
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*/
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@ -439,7 +439,7 @@ void ncr5390_device::step(bool timeout)
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dma_set(dma_command ? DMA_IN : DMA_NONE);
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dma_set(dma_command ? DMA_IN : DMA_NONE);
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// if it's the last message byte, ACK remains asserted, terminate with function_complete()
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// if it's the last message byte, ACK remains asserted, terminate with function_complete()
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state = (xfr_phase == S_PHASE_MSG_IN && (!dma_command || tcounter == 1)) ? INIT_XFR_RECV_BYTE_NACK : INIT_XFR_RECV_BYTE_ACK;
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state = (xfr_phase == S_PHASE_MSG_IN && (!dma_command || tcounter == 1)) ? INIT_XFR_RECV_BYTE_NACK : INIT_XFR_RECV_BYTE_ACK;
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recv_byte();
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recv_byte();
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break;
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break;
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@ -24,13 +24,13 @@
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* Memory - Mitsubishi M5M187AJ 046101-35 SRAM 64K X 1?? - U37
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* Memory - Mitsubishi M5M187AJ 046101-35 SRAM 64K X 1?? - U37
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Logic:
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Logic:
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* U8 - 22V10-25JC
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* U8 - 22V10-25JC
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* U33 - 22V10-25JC
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* U33 - 22V10-25JC
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* U61 - 22V10-25JC
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* U61 - 22V10-25JC
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* U63 - 22V10-25JC
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* U63 - 22V10-25JC
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* U87 - 22V10-20JC
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* U87 - 22V10-20JC
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* U88 - 22V10-20JC
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* U88 - 22V10-20JC
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* U102 - 22V10-25JC
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* U102 - 22V10-25JC
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* U111 - 22V10-25JC
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* U111 - 22V10-25JC
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Switches:
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Switches:
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* S1 - Board reset
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* S1 - Board reset
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@ -191,8 +191,8 @@ void image_manager::options_extract()
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// 2. When is_reset_on_load(), and this results in a device being unmounted (unmounting is_reset_and_load()
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// 2. When is_reset_on_load(), and this results in a device being unmounted (unmounting is_reset_and_load()
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// doesn't force an unmount).
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// doesn't force an unmount).
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//
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//
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// Note that as a part of #2, we cannot extract the option when the image in question is a part of an
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// Note that as a part of #2, we cannot extract the option when the image in question is a part of an
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// active reset_on_load; hence the check for is_reset_and_loading() (see issue #2414)
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// active reset_on_load; hence the check for is_reset_and_loading() (see issue #2414)
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if (!image.is_reset_on_load()
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if (!image.is_reset_on_load()
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|| (!image.exists() && !image.is_reset_and_loading() && !machine().options().image_option(image.instance_name()).value().empty()))
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|| (!image.exists() && !image.is_reset_and_loading() && !machine().options().image_option(image.instance_name()).value().empty()))
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{
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{
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@ -18,12 +18,12 @@
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* M4T28-8R128H1 TimeKeeper RTC/CMOS
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* M4T28-8R128H1 TimeKeeper RTC/CMOS
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* PLX PCI9050 Bus Target Interface Chip (interfaces ISA-style designs to PCI)
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* PLX PCI9050 Bus Target Interface Chip (interfaces ISA-style designs to PCI)
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* Midway Zeus-series custom video
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* Midway Zeus-series custom video
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* Actiontec PM560LKI PCI Data/Fax Modem (PCI\VEN_11C1&DEV_0480&SUBSYS_04801668)
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* Actiontec PM560LKI PCI Data/Fax Modem (PCI\VEN_11C1&DEV_0480&SUBSYS_04801668)
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* TL16c552 dual UART
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* TL16c552 dual UART
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* ADSP-2181 based DCS2 audio (unclear which variant)
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* ADSP-2181 based DCS2 audio (unclear which variant)
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* Cirrus Logic CS4338 16 bit stereo audio serial DAC, PCB has space for 3 chips (6-channels), only 1 is populated
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* Cirrus Logic CS4338 16 bit stereo audio serial DAC, PCB has space for 3 chips (6-channels), only 1 is populated
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* Maxim MAX192 8 channel 10 bit serial ADC
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* Maxim MAX192 8 channel 10 bit serial ADC
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* PIC16C57 (protection? serial #?)
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* PIC16C57 (protection? serial #?)
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* Quantum Fireball CX 6.4GB IDE HDD (C/H/S 13328/15/63)
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* Quantum Fireball CX 6.4GB IDE HDD (C/H/S 13328/15/63)
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TODO:
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TODO:
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@ -61,7 +61,7 @@ Bugs (all of these looks BTANBs):
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00E8E0: 6700 001A beq $e8fc
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00E8E0: 6700 001A beq $e8fc
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00E8E4: 0C39 000F 00C0 008E cmpi.b #$f, $c0008e.l
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00E8E4: 0C39 000F 00C0 008E cmpi.b #$f, $c0008e.l
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00E8EC: 6700 000E beq $e8fc
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00E8EC: 6700 000E beq $e8fc
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00E8F0: 33FC 2000 00C0 1982 move.w #$2000, $c01982.l // timer inited again???
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00E8F0: 33FC 2000 00C0 1982 move.w #$2000, $c01982.l // timer inited again???
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00E8F8: 6100 0118 bsr $ea12
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00E8F8: 6100 0118 bsr $ea12
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00E8FC: 4E75 rts
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00E8FC: 4E75 rts
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---
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---
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@ -184,7 +184,7 @@ WRITE8_MEMBER(blackt96_state::output_w)
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machine().bookkeeping().coin_counter_w(0, data & 1);
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machine().bookkeeping().coin_counter_w(0, data & 1);
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machine().bookkeeping().coin_counter_w(1, data & 2);
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machine().bookkeeping().coin_counter_w(1, data & 2);
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// printf("blackt96_c0000_w %04x %04x\n",data & 0xfc,mem_mask);
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// printf("blackt96_c0000_w %04x %04x\n",data & 0xfc,mem_mask);
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}
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}
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WRITE16_MEMBER(blackt96_state::tx_vram_w)
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WRITE16_MEMBER(blackt96_state::tx_vram_w)
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@ -43,25 +43,25 @@ namespace {
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}
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}
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// **** Constants ****
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// **** Constants ****
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static constexpr unsigned MASTER_CLOCK = 9808000;
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static constexpr unsigned MASTER_CLOCK = 9808000;
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// Video memory is actually made of 16384 4-bit nibbles
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// Video memory is actually made of 16384 4-bit nibbles
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static constexpr unsigned VIDEO_MEM_SIZE= 8192;
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static constexpr unsigned VIDEO_MEM_SIZE= 8192;
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static constexpr unsigned ALPHA_MEM_SIZE= 4096;
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static constexpr unsigned ALPHA_MEM_SIZE= 4096;
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static constexpr unsigned GRAPH_MEM_SIZE= 16384;
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static constexpr unsigned GRAPH_MEM_SIZE= 16384;
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static constexpr unsigned CRT_STS_READY_BIT = 0;
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static constexpr unsigned CRT_STS_READY_BIT = 0;
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static constexpr unsigned CRT_STS_DISPLAY_BIT = 1;
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static constexpr unsigned CRT_STS_DISPLAY_BIT = 1;
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//static constexpr unsigned CRT_STS_BUSY_BIT = 7;
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//static constexpr unsigned CRT_STS_BUSY_BIT = 7;
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static constexpr unsigned CRT_CTL_RD_RQ_BIT = 0;
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static constexpr unsigned CRT_CTL_RD_RQ_BIT = 0;
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static constexpr unsigned CRT_CTL_WIPEOUT_BIT = 1;
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static constexpr unsigned CRT_CTL_WIPEOUT_BIT = 1;
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static constexpr unsigned CRT_CTL_POWERDN_BIT = 2;
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static constexpr unsigned CRT_CTL_POWERDN_BIT = 2;
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static constexpr unsigned CRT_CTL_GRAPHICS_BIT = 7;
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static constexpr unsigned CRT_CTL_GRAPHICS_BIT = 7;
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static constexpr unsigned IRQ_KEYBOARD_BIT = 0;
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static constexpr unsigned IRQ_KEYBOARD_BIT = 0;
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static constexpr unsigned IRQ_TIMER0_BIT = 1;
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static constexpr unsigned IRQ_TIMER0_BIT = 1;
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static constexpr unsigned TIMER_COUNT = 4;
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static constexpr unsigned TIMER_COUNT = 4;
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static constexpr unsigned IRQ_IOP0_BIT = IRQ_TIMER0_BIT + TIMER_COUNT;
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static constexpr unsigned IRQ_IOP0_BIT = IRQ_TIMER0_BIT + TIMER_COUNT;
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static constexpr unsigned IOP_COUNT = 0;
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static constexpr unsigned IOP_COUNT = 0;
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static constexpr unsigned IRQ_BIT_COUNT = IRQ_IOP0_BIT + IOP_COUNT;
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static constexpr unsigned IRQ_BIT_COUNT = IRQ_IOP0_BIT + IOP_COUNT;
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static constexpr unsigned NO_IRQ = IRQ_BIT_COUNT;
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static constexpr unsigned NO_IRQ = IRQ_BIT_COUNT;
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// ************
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// ************
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// hp85_state
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// hp85_state
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@ -251,11 +251,11 @@ WRITE_LINE_MEMBER(hp85_state::vblank_w)
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// Vector table (indexed by bit no. in m_int_serv)
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// Vector table (indexed by bit no. in m_int_serv)
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static const uint8_t vector_table[] = {
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static const uint8_t vector_table[] = {
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0x04, // Keyboard
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0x04, // Keyboard
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0x08, // Timer 0
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0x08, // Timer 0
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0x0a, // Timer 1
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0x0a, // Timer 1
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0x0c, // Timer 2
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0x0c, // Timer 2
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0x0e // Timer 3
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0x0e // Timer 3
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};
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};
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IRQ_CALLBACK_MEMBER(hp85_state::irq_callback)
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IRQ_CALLBACK_MEMBER(hp85_state::irq_callback)
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@ -401,86 +401,86 @@ WRITE8_MEMBER(hp85_state::rselec_w)
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// Inner index: SHIFT state (0 = no SHIFT, 1 = SHIFT)
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// Inner index: SHIFT state (0 = no SHIFT, 1 = SHIFT)
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static const uint8_t keyboard_table[ 80 ][ 2 ] = {
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static const uint8_t keyboard_table[ 80 ][ 2 ] = {
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||||||
// -- SHIFT
|
// -- SHIFT
|
||||||
{ 0xa2 , 0xac }, // 0,0: Down / Auto
|
{ 0xa2 , 0xac }, // 0,0: Down / Auto
|
||||||
{ 0xa1 , 0xa5 }, // 0,1: Up / Home
|
{ 0xa1 , 0xa5 }, // 0,1: Up / Home
|
||||||
{ 0x83 , 0x87 }, // 0,2: k4 / k8
|
{ 0x83 , 0x87 }, // 0,2: k4 / k8
|
||||||
{ 0x82 , 0x86 }, // 0,3: k3 / k7
|
{ 0x82 , 0x86 }, // 0,3: k3 / k7
|
||||||
{ 0x81 , 0x85 }, // 0,4: k2 / k6
|
{ 0x81 , 0x85 }, // 0,4: k2 / k6
|
||||||
{ 0x80 , 0x84 }, // 0,5: k1 / k5
|
{ 0x80 , 0x84 }, // 0,5: k1 / k5
|
||||||
{ 0x96 , 0x60 }, // 0,6: LABEL KEY
|
{ 0x96 , 0x60 }, // 0,6: LABEL KEY
|
||||||
{ 0xff , 0xff }, // 0,7: N/U
|
{ 0xff , 0xff }, // 0,7: N/U
|
||||||
{ 0x38 , 0x2a }, // 1,0: 8
|
{ 0x38 , 0x2a }, // 1,0: 8
|
||||||
{ 0x37 , 0x26 }, // 1,1: 7
|
{ 0x37 , 0x26 }, // 1,1: 7
|
||||||
{ 0x36 , 0x5e }, // 1,2: 6
|
{ 0x36 , 0x5e }, // 1,2: 6
|
||||||
{ 0x35 , 0x25 }, // 1,3: 5
|
{ 0x35 , 0x25 }, // 1,3: 5
|
||||||
{ 0x34 , 0x24 }, // 1,4: 4
|
{ 0x34 , 0x24 }, // 1,4: 4
|
||||||
{ 0x33 , 0x23 }, // 1,5: 3
|
{ 0x33 , 0x23 }, // 1,5: 3
|
||||||
{ 0x32 , 0x40 }, // 1,6: 2
|
{ 0x32 , 0x40 }, // 1,6: 2
|
||||||
{ 0x31 , 0x21 }, // 1,7: 1
|
{ 0x31 , 0x21 }, // 1,7: 1
|
||||||
{ 0x49 , 0x69 }, // 2,0: I
|
{ 0x49 , 0x69 }, // 2,0: I
|
||||||
{ 0x55 , 0x75 }, // 2,1: U
|
{ 0x55 , 0x75 }, // 2,1: U
|
||||||
{ 0x59 , 0x79 }, // 2,2: Y
|
{ 0x59 , 0x79 }, // 2,2: Y
|
||||||
{ 0x54 , 0x74 }, // 2,3: T
|
{ 0x54 , 0x74 }, // 2,3: T
|
||||||
{ 0x52 , 0x72 }, // 2,4: R
|
{ 0x52 , 0x72 }, // 2,4: R
|
||||||
{ 0x45 , 0x65 }, // 2,5: E
|
{ 0x45 , 0x65 }, // 2,5: E
|
||||||
{ 0x57 , 0x77 }, // 2,6: W
|
{ 0x57 , 0x77 }, // 2,6: W
|
||||||
{ 0x51 , 0x71 }, // 2,7: Q
|
{ 0x51 , 0x71 }, // 2,7: Q
|
||||||
{ 0x4b , 0x6b }, // 3,0: K
|
{ 0x4b , 0x6b }, // 3,0: K
|
||||||
{ 0x4a , 0x6a }, // 3,1: J
|
{ 0x4a , 0x6a }, // 3,1: J
|
||||||
{ 0x48 , 0x68 }, // 3,2: H
|
{ 0x48 , 0x68 }, // 3,2: H
|
||||||
{ 0x47 , 0x67 }, // 3,3: G
|
{ 0x47 , 0x67 }, // 3,3: G
|
||||||
{ 0x46 , 0x66 }, // 3,4: F
|
{ 0x46 , 0x66 }, // 3,4: F
|
||||||
{ 0x44 , 0x64 }, // 3,5: D
|
{ 0x44 , 0x64 }, // 3,5: D
|
||||||
{ 0x53 , 0x73 }, // 3,6: S
|
{ 0x53 , 0x73 }, // 3,6: S
|
||||||
{ 0x41 , 0x61 }, // 3,7: A
|
{ 0x41 , 0x61 }, // 3,7: A
|
||||||
{ 0x4d , 0x6d }, // 4,0: M
|
{ 0x4d , 0x6d }, // 4,0: M
|
||||||
{ 0x4e , 0x6e }, // 4,1: N
|
{ 0x4e , 0x6e }, // 4,1: N
|
||||||
{ 0x42 , 0x62 }, // 4,2: B
|
{ 0x42 , 0x62 }, // 4,2: B
|
||||||
{ 0x56 , 0x76 }, // 4,3: V
|
{ 0x56 , 0x76 }, // 4,3: V
|
||||||
{ 0x43 , 0x63 }, // 4,4: C
|
{ 0x43 , 0x63 }, // 4,4: C
|
||||||
{ 0x58 , 0x78 }, // 4,5: X
|
{ 0x58 , 0x78 }, // 4,5: X
|
||||||
{ 0x5a , 0x7a }, // 4,6: Z
|
{ 0x5a , 0x7a }, // 4,6: Z
|
||||||
{ 0x20 , 0x20 }, // 4,7: Space
|
{ 0x20 , 0x20 }, // 4,7: Space
|
||||||
{ 0x2c , 0x3c }, // 5,0: ,
|
{ 0x2c , 0x3c }, // 5,0: ,
|
||||||
{ 0x2e , 0x3e }, // 5,1: .
|
{ 0x2e , 0x3e }, // 5,1: .
|
||||||
{ 0x2f , 0x3f }, // 5,2: / ?
|
{ 0x2f , 0x3f }, // 5,2: / ?
|
||||||
{ 0x8e , 0x90 }, // 5,3: PAUSE / STEP
|
{ 0x8e , 0x90 }, // 5,3: PAUSE / STEP
|
||||||
{ 0x8d , 0x8d }, // 5,4: RUN
|
{ 0x8d , 0x8d }, // 5,4: RUN
|
||||||
{ 0x2b , 0x7f }, // 5,5: KP +
|
{ 0x2b , 0x7f }, // 5,5: KP +
|
||||||
{ 0x2d , 0x7d }, // 5,6: KP -
|
{ 0x2d , 0x7d }, // 5,6: KP -
|
||||||
{ 0x2a , 0x7e }, // 5,7: KP *
|
{ 0x2a , 0x7e }, // 5,7: KP *
|
||||||
{ 0x4c , 0x6c }, // 6,0: L
|
{ 0x4c , 0x6c }, // 6,0: L
|
||||||
{ 0x3b , 0x3a }, // 6,1: ;
|
{ 0x3b , 0x3a }, // 6,1: ;
|
||||||
{ 0x27 , 0x22 }, // 6,2: ' "
|
{ 0x27 , 0x22 }, // 6,2: ' "
|
||||||
{ 0x9a , 0x9a }, // 6,3: END LINE
|
{ 0x9a , 0x9a }, // 6,3: END LINE
|
||||||
{ 0x94 , 0x95 }, // 6,4: LIST / P LST
|
{ 0x94 , 0x95 }, // 6,4: LIST / P LST
|
||||||
{ 0xff , 0xff }, // 6,5: N/U
|
{ 0xff , 0xff }, // 6,5: N/U
|
||||||
{ 0xff , 0xff }, // 6,6: N/U
|
{ 0xff , 0xff }, // 6,6: N/U
|
||||||
{ 0x2f , 0x7b }, // 6,7: KP /
|
{ 0x2f , 0x7b }, // 6,7: KP /
|
||||||
{ 0x4f , 0x6f }, // 7,0: O
|
{ 0x4f , 0x6f }, // 7,0: O
|
||||||
{ 0x50 , 0x70 }, // 7,1: P
|
{ 0x50 , 0x70 }, // 7,1: P
|
||||||
{ 0x28 , 0x5b }, // 7,2: ( [
|
{ 0x28 , 0x5b }, // 7,2: ( [
|
||||||
{ 0x29 , 0x5d }, // 7,3: ) ]
|
{ 0x29 , 0x5d }, // 7,3: ) ]
|
||||||
{ 0x8f , 0xad }, // 7,4: CONT / SCRATCH
|
{ 0x8f , 0xad }, // 7,4: CONT / SCRATCH
|
||||||
{ 0xa0 , 0x92 }, // 7,5: -LINE / CLEAR
|
{ 0xa0 , 0x92 }, // 7,5: -LINE / CLEAR
|
||||||
{ 0x29 , 0x8c }, // 7,6: ) INIT
|
{ 0x29 , 0x8c }, // 7,6: ) INIT
|
||||||
{ 0xff , 0xff }, // 7,7: N/U
|
{ 0xff , 0xff }, // 7,7: N/U
|
||||||
{ 0x39 , 0x28 }, // 8,0: 9
|
{ 0x39 , 0x28 }, // 8,0: 9
|
||||||
{ 0x30 , 0x29 }, // 8,1: 0
|
{ 0x30 , 0x29 }, // 8,1: 0
|
||||||
{ 0x2d , 0x5f }, // 8,2: - _
|
{ 0x2d , 0x5f }, // 8,2: - _
|
||||||
{ 0x3d , 0x2b }, // 8,3: = +
|
{ 0x3d , 0x2b }, // 8,3: = +
|
||||||
{ 0x5c , 0x7c }, // 8,4: \ |
|
{ 0x5c , 0x7c }, // 8,4: \ |
|
||||||
{ 0x99 , 0x9b }, // 8,5: BS
|
{ 0x99 , 0x9b }, // 8,5: BS
|
||||||
{ 0x28 , 0x8b }, // 8,6: ( RESET
|
{ 0x28 , 0x8b }, // 8,6: ( RESET
|
||||||
{ 0x5e , 0xa6 }, // 8,7: ^ / RESLT
|
{ 0x5e , 0xa6 }, // 8,7: ^ / RESLT
|
||||||
{ 0x9c , 0x93 }, // 9,0: LEFT / GRAPH
|
{ 0x9c , 0x93 }, // 9,0: LEFT / GRAPH
|
||||||
{ 0x9d , 0x89 }, // 9,1: RIGHT / COPY
|
{ 0x9d , 0x89 }, // 9,1: RIGHT / COPY
|
||||||
{ 0xa3 , 0xa3 }, // 9,2: RPL / INS
|
{ 0xa3 , 0xa3 }, // 9,2: RPL / INS
|
||||||
{ 0xa4 , 0xa8 }, // 9,3: -CHAR / DEL
|
{ 0xa4 , 0xa8 }, // 9,3: -CHAR / DEL
|
||||||
{ 0x9f , 0x9e }, // 9,4: ROLL
|
{ 0x9f , 0x9e }, // 9,4: ROLL
|
||||||
{ 0xaa , 0x88 }, // 9,5: LOAD / REW
|
{ 0xaa , 0x88 }, // 9,5: LOAD / REW
|
||||||
{ 0xa9 , 0x91 }, // 9,6: STORE / TEST
|
{ 0xa9 , 0x91 }, // 9,6: STORE / TEST
|
||||||
{ 0x8a , 0x8a } // 9,7: PAPER ADVANCE
|
{ 0x8a , 0x8a } // 9,7: PAPER ADVANCE
|
||||||
};
|
};
|
||||||
|
|
||||||
bool hp85_state::kb_scan_ioport(ioport_value pressed , unsigned idx_base , uint8_t& keycode)
|
bool hp85_state::kb_scan_ioport(ioport_value pressed , unsigned idx_base , uint8_t& keycode)
|
||||||
@ -654,95 +654,95 @@ static INPUT_PORTS_START(hp85)
|
|||||||
// n = r / 4
|
// n = r / 4
|
||||||
// b = (r % 4) * 8 + c
|
// b = (r % 4) * 8 + c
|
||||||
PORT_START("KEY0")
|
PORT_START("KEY0")
|
||||||
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_NAME("Down AUTO") // 0,0: Down / Auto
|
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) PORT_NAME("Down AUTO") // 0,0: Down / Auto
|
||||||
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_NAME("Up Home") // 0,1: Up / Home
|
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) PORT_NAME("Up Home") // 0,1: Up / Home
|
||||||
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) PORT_NAME("k4 k8") // 0,2: k4 / k8
|
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) PORT_NAME("k4 k8") // 0,2: k4 / k8
|
||||||
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_NAME("k3 k7") // 0,3: k3 / k7
|
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_NAME("k3 k7") // 0,3: k3 / k7
|
||||||
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_NAME("k2 k6") // 0,4: k2 / k6
|
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_NAME("k2 k6") // 0,4: k2 / k6
|
||||||
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_NAME("k1 k5") // 0,5: k1 / k5
|
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_NAME("k1 k5") // 0,5: k1 / k5
|
||||||
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("LABEL KEY") // 0,6: LABEL KEY
|
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("LABEL KEY") // 0,6: LABEL KEY
|
||||||
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,7: N/U
|
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,7: N/U
|
||||||
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') // 1,0: 8
|
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') // 1,0: 8
|
||||||
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') // 1,1: 7
|
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') // 1,1: 7
|
||||||
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') // 1,2: 6
|
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') // 1,2: 6
|
||||||
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // 1,3: 5
|
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // 1,3: 5
|
||||||
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 1,4: 4
|
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 1,4: 4
|
||||||
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // 1,5: 3
|
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // 1,5: 3
|
||||||
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') // 1,6: 2
|
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') // 1,6: 2
|
||||||
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // 1,7: 1
|
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // 1,7: 1
|
||||||
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // 2,0: I
|
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // 2,0: I
|
||||||
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // 2,1: U
|
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // 2,1: U
|
||||||
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // 2,2: Y
|
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // 2,2: Y
|
||||||
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // 2,3: T
|
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // 2,3: T
|
||||||
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // 2,4: R
|
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // 2,4: R
|
||||||
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // 2,5: E
|
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // 2,5: E
|
||||||
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // 2,6: W
|
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // 2,6: W
|
||||||
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // 2,7: Q
|
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // 2,7: Q
|
||||||
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // 3,0: K
|
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // 3,0: K
|
||||||
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // 3,1: J
|
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // 3,1: J
|
||||||
PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // 3,2: H
|
PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // 3,2: H
|
||||||
PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // 3,3: G
|
PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // 3,3: G
|
||||||
PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // 3,4: F
|
PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // 3,4: F
|
||||||
PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // 3,5: D
|
PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // 3,5: D
|
||||||
PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // 3,6: S
|
PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // 3,6: S
|
||||||
PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // 3,7: A
|
PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // 3,7: A
|
||||||
|
|
||||||
PORT_START("KEY1")
|
PORT_START("KEY1")
|
||||||
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // 4,0: M
|
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // 4,0: M
|
||||||
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // 4,1: N
|
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // 4,1: N
|
||||||
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // 4,2: B
|
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // 4,2: B
|
||||||
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // 4,3: V
|
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // 4,3: V
|
||||||
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // 4,4: C
|
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // 4,4: C
|
||||||
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // 4,5: X
|
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // 4,5: X
|
||||||
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // 4,6: Z
|
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // 4,6: Z
|
||||||
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // 4,7: Space
|
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // 4,7: Space
|
||||||
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // 5,0: ,
|
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // 5,0: ,
|
||||||
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // 5,1: .
|
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // 5,1: .
|
||||||
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') // 5,2: / ?
|
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') // 5,2: / ?
|
||||||
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("PAUSE STEP") // 5,3: PAUSE / STEP
|
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("PAUSE STEP") // 5,3: PAUSE / STEP
|
||||||
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("RUN") // 5,4: RUN
|
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("RUN") // 5,4: RUN
|
||||||
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) PORT_NAME("KP +") // 5,5: KP +
|
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) PORT_NAME("KP +") // 5,5: KP +
|
||||||
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_NAME("KP -") // 5,6: KP -
|
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_NAME("KP -") // 5,6: KP -
|
||||||
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) PORT_NAME("KP *") // 5,7: KP * (not sure)
|
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) PORT_NAME("KP *") // 5,7: KP * (not sure)
|
||||||
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // 6,0: L
|
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // 6,0: L
|
||||||
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') // 6,1: ;
|
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') // 6,1: ;
|
||||||
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') // 6,2: ' "
|
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') // 6,2: ' "
|
||||||
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_NAME("END LINE") // 6,3: END LINE
|
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_NAME("END LINE") // 6,3: END LINE
|
||||||
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("LIST P LST") // 6,4: LIST / P LST
|
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("LIST P LST") // 6,4: LIST / P LST
|
||||||
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,5: N/U
|
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,5: N/U
|
||||||
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,6: N/U
|
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,6: N/U
|
||||||
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) PORT_NAME("KP /") // 6,7: KP /
|
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) PORT_NAME("KP /") // 6,7: KP /
|
||||||
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // 7,0: O
|
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // 7,0: O
|
||||||
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // 7,1: P
|
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // 7,1: P
|
||||||
PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('(') PORT_CHAR('[') // 7,2: ( [
|
PORT_BIT(BIT_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('(') PORT_CHAR('[') // 7,2: ( [
|
||||||
PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(')') PORT_CHAR(']') // 7,3: ) ]
|
PORT_BIT(BIT_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(')') PORT_CHAR(']') // 7,3: ) ]
|
||||||
PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("CONT SCRATCH") // 7,4: CONT / SCRATCH
|
PORT_BIT(BIT_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("CONT SCRATCH") // 7,4: CONT / SCRATCH
|
||||||
PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("-LINE CLEAR") // 7,5: -LINE / CLEAR
|
PORT_BIT(BIT_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("-LINE CLEAR") // 7,5: -LINE / CLEAR
|
||||||
PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME(") INIT") // 7,6: ) INIT
|
PORT_BIT(BIT_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME(") INIT") // 7,6: ) INIT
|
||||||
PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,7: N/U
|
PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,7: N/U
|
||||||
|
|
||||||
PORT_START("KEY2")
|
PORT_START("KEY2")
|
||||||
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') // 8,0: 9
|
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') // 8,0: 9
|
||||||
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') // 8,1: 0
|
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') // 8,1: 0
|
||||||
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') // 8,2: - _
|
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') // 8,2: - _
|
||||||
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') // 8,3: = +
|
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') // 8,3: = +
|
||||||
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('\\') PORT_CHAR('|') // 8,4: \ |
|
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('\\') PORT_CHAR('|') // 8,4: \ |
|
||||||
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // 8,5: BS
|
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // 8,5: BS
|
||||||
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("( RESET") // 8,6: ( RESET
|
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("( RESET") // 8,6: ( RESET
|
||||||
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("^ RESLT") // 8,7: ^ / RESLT
|
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("^ RESLT") // 8,7: ^ / RESLT
|
||||||
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_NAME("Left GRAPH") // 9,0: LEFT / GRAPH
|
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) PORT_NAME("Left GRAPH") // 9,0: LEFT / GRAPH
|
||||||
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_NAME("Right COPY") // 9,1: RIGHT / COPY
|
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) PORT_NAME("Right COPY") // 9,1: RIGHT / COPY
|
||||||
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("RPL INS") // 9,2: RPL / INS
|
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("RPL INS") // 9,2: RPL / INS
|
||||||
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("-CHAR DEL") // 9,3: -CHAR / DEL
|
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("-CHAR DEL") // 9,3: -CHAR / DEL
|
||||||
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_NAME("ROLL") // 9,4: ROLL
|
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_NAME("ROLL") // 9,4: ROLL
|
||||||
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("LOAD REW") // 9,5: LOAD / REW
|
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("LOAD REW") // 9,5: LOAD / REW
|
||||||
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("STORE TEST") // 9,6: STORE / TEST
|
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("STORE TEST") // 9,6: STORE / TEST
|
||||||
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("PAPER ADVANCE") // 9,7: PAPER ADVANCE
|
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("PAPER ADVANCE") // 9,7: PAPER ADVANCE
|
||||||
|
|
||||||
PORT_START("MODKEYS")
|
PORT_START("MODKEYS")
|
||||||
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Shift
|
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Shift
|
||||||
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE PORT_NAME("Shift lock") // Shift lock
|
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE PORT_NAME("Shift lock") // Shift lock
|
||||||
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // Control
|
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // Control
|
||||||
|
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
|
|||||||
@ -259,7 +259,7 @@ static const char *const m14_sample_names[] =
|
|||||||
"*ptrmj",
|
"*ptrmj",
|
||||||
"wall_hit", // 1
|
"wall_hit", // 1
|
||||||
"tile_hit", // 2
|
"tile_hit", // 2
|
||||||
"tick", // 0x40
|
"tick", // 0x40
|
||||||
"ball_drop", // 8
|
"ball_drop", // 8
|
||||||
"paddle_hit",
|
"paddle_hit",
|
||||||
nullptr
|
nullptr
|
||||||
|
|||||||
@ -9,16 +9,16 @@
|
|||||||
James Jenkins
|
James Jenkins
|
||||||
Walter Fath
|
Walter Fath
|
||||||
|
|
||||||
abcheck TODOs:
|
abcheck TODOs:
|
||||||
- YGV608 brokenness
|
- YGV608 brokenness
|
||||||
- Where is the extra data ROM mapped?
|
- Where is the extra data ROM mapped?
|
||||||
|
|
||||||
To make abcheck run when the EEPROM is clear:
|
To make abcheck run when the EEPROM is clear:
|
||||||
- F2 to enter service mode
|
- F2 to enter service mode
|
||||||
- Player 3 A/B to navigate to GAME OPTIONS
|
- Player 3 A/B to navigate to GAME OPTIONS
|
||||||
- Player 1 A to enter, Player 1 B to cancel or go back
|
- Player 1 A to enter, Player 1 B to cancel or go back
|
||||||
- Go to LOCAL SELECT and choose the Japanese city of your choice (I don't know what it affects yet)
|
- Go to LOCAL SELECT and choose the Japanese city of your choice (I don't know what it affects yet)
|
||||||
- Exit test mode (F2) and reset (F3) and the game will boot
|
- Exit test mode (F2) and reset (F3) and the game will boot
|
||||||
|
|
||||||
-----------------------------------
|
-----------------------------------
|
||||||
Guru-Readme for Namco ND-1 hardware
|
Guru-Readme for Namco ND-1 hardware
|
||||||
@ -305,15 +305,15 @@ static ADDRESS_MAP_START( nd1h8rwmap, AS_PROGRAM, 16, namcond1_state )
|
|||||||
AM_RANGE(0xc00010, 0xc00011) AM_NOP
|
AM_RANGE(0xc00010, 0xc00011) AM_NOP
|
||||||
AM_RANGE(0xc00030, 0xc00031) AM_NOP
|
AM_RANGE(0xc00030, 0xc00031) AM_NOP
|
||||||
AM_RANGE(0xc00040, 0xc00041) AM_NOP
|
AM_RANGE(0xc00040, 0xc00041) AM_NOP
|
||||||
AM_RANGE(0xffff1a, 0xffff1b) AM_NOP // abcheck
|
AM_RANGE(0xffff1a, 0xffff1b) AM_NOP // abcheck
|
||||||
AM_RANGE(0xffff1e, 0xffff1f) AM_NOP // ^
|
AM_RANGE(0xffff1e, 0xffff1f) AM_NOP // ^
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
static ADDRESS_MAP_START( nd1h8iomap, AS_IO, 16, namcond1_state )
|
static ADDRESS_MAP_START( nd1h8iomap, AS_IO, 16, namcond1_state )
|
||||||
AM_RANGE(h8_device::PORT_7, h8_device::PORT_7) AM_READ(mcu_p7_read )
|
AM_RANGE(h8_device::PORT_7, h8_device::PORT_7) AM_READ(mcu_p7_read )
|
||||||
AM_RANGE(h8_device::PORT_A, h8_device::PORT_A) AM_READWRITE(mcu_pa_read, mcu_pa_write )
|
AM_RANGE(h8_device::PORT_A, h8_device::PORT_A) AM_READWRITE(mcu_pa_read, mcu_pa_write )
|
||||||
AM_RANGE(h8_device::ADC_0, h8_device::ADC_3) AM_NOP // MCU reads these, but the games have no analog controls
|
AM_RANGE(h8_device::ADC_0, h8_device::ADC_3) AM_NOP // MCU reads these, but the games have no analog controls
|
||||||
AM_RANGE(0x14, 0x17) AM_READNOP // abcheck
|
AM_RANGE(0x14, 0x17) AM_READNOP // abcheck
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
INTERRUPT_GEN_MEMBER(namcond1_state::mcu_interrupt)
|
INTERRUPT_GEN_MEMBER(namcond1_state::mcu_interrupt)
|
||||||
@ -346,7 +346,7 @@ static MACHINE_CONFIG_START( namcond1 )
|
|||||||
/* basic machine hardware */
|
/* basic machine hardware */
|
||||||
MCFG_CPU_ADD("maincpu", M68000, XTAL_49_152MHz/4)
|
MCFG_CPU_ADD("maincpu", M68000, XTAL_49_152MHz/4)
|
||||||
MCFG_CPU_PROGRAM_MAP(namcond1_map)
|
MCFG_CPU_PROGRAM_MAP(namcond1_map)
|
||||||
// MCFG_CPU_VBLANK_INT_DRIVER("screen", namcond1_state, irq1_line_hold)
|
// MCFG_CPU_VBLANK_INT_DRIVER("screen", namcond1_state, irq1_line_hold)
|
||||||
|
|
||||||
MCFG_CPU_ADD("mcu", H83002, XTAL_49_152MHz/3 )
|
MCFG_CPU_ADD("mcu", H83002, XTAL_49_152MHz/3 )
|
||||||
MCFG_CPU_PROGRAM_MAP( nd1h8rwmap)
|
MCFG_CPU_PROGRAM_MAP( nd1h8rwmap)
|
||||||
@ -390,7 +390,7 @@ MACHINE_CONFIG_END
|
|||||||
static MACHINE_CONFIG_DERIVED( abcheck, namcond1 )
|
static MACHINE_CONFIG_DERIVED( abcheck, namcond1 )
|
||||||
MCFG_CPU_REPLACE("maincpu", M68000, XTAL_49_152MHz/4)
|
MCFG_CPU_REPLACE("maincpu", M68000, XTAL_49_152MHz/4)
|
||||||
MCFG_CPU_PROGRAM_MAP(abcheck_map)
|
MCFG_CPU_PROGRAM_MAP(abcheck_map)
|
||||||
// MCFG_CPU_VBLANK_INT_DRIVER("screen", namcond1_state, irq1_line_hold)
|
// MCFG_CPU_VBLANK_INT_DRIVER("screen", namcond1_state, irq1_line_hold)
|
||||||
|
|
||||||
MCFG_NVRAM_ADD_0FILL("zpr1")
|
MCFG_NVRAM_ADD_0FILL("zpr1")
|
||||||
MCFG_NVRAM_ADD_0FILL("zpr2")
|
MCFG_NVRAM_ADD_0FILL("zpr2")
|
||||||
@ -488,7 +488,7 @@ ROM_START( abcheck )
|
|||||||
ROM_REGION( 0x1000000, "c352", 0 ) // Samples
|
ROM_REGION( 0x1000000, "c352", 0 ) // Samples
|
||||||
ROM_LOAD( "an1voice.7c", 0x000000, 0x200000, CRC(d2bfa453) SHA1(6b7d6bb4d65290d8fd3df5d12b41ae7dce5f3f1c) )
|
ROM_LOAD( "an1voice.7c", 0x000000, 0x200000, CRC(d2bfa453) SHA1(6b7d6bb4d65290d8fd3df5d12b41ae7dce5f3f1c) )
|
||||||
|
|
||||||
ROM_REGION( 0x80000, "data", 0 ) // game data?
|
ROM_REGION( 0x80000, "data", 0 ) // game data?
|
||||||
ROM_LOAD( "an1dat0.ic1", 0x000000, 0x080000, CRC(44dc7da1) SHA1(dd57670a2b07c4988ca30bba134931c1701a926f) )
|
ROM_LOAD( "an1dat0.ic1", 0x000000, 0x080000, CRC(44dc7da1) SHA1(dd57670a2b07c4988ca30bba134931c1701a926f) )
|
||||||
|
|
||||||
ROM_REGION( 0x8000, "zpr1", 0 )
|
ROM_REGION( 0x8000, "zpr1", 0 )
|
||||||
|
|||||||
@ -7,7 +7,7 @@
|
|||||||
TODO:
|
TODO:
|
||||||
- colors;
|
- colors;
|
||||||
- dip switches;
|
- dip switches;
|
||||||
- sound, especially f/f part;
|
- sound, especially f/f part;
|
||||||
|
|
||||||
============================================================================
|
============================================================================
|
||||||
Debug cheats:
|
Debug cheats:
|
||||||
|
|||||||
@ -214,7 +214,7 @@ static ADDRESS_MAP_START( sub_program_map, AS_PROGRAM, 8, sderby2_state )
|
|||||||
AM_RANGE(0xd800, 0xdbff) AM_RAM // 2KB Tested at 105B
|
AM_RANGE(0xd800, 0xdbff) AM_RAM // 2KB Tested at 105B
|
||||||
AM_RANGE(0xdc00, 0xdfff) AM_RAM // 2KB Tested at 10B7
|
AM_RANGE(0xdc00, 0xdfff) AM_RAM // 2KB Tested at 10B7
|
||||||
|
|
||||||
AM_RANGE(0xe000, 0xffff) AM_RAM // Tested at FE8
|
AM_RANGE(0xe000, 0xffff) AM_RAM // Tested at FE8
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
static ADDRESS_MAP_START( sub_io_map, AS_IO, 8, sderby2_state )
|
static ADDRESS_MAP_START( sub_io_map, AS_IO, 8, sderby2_state )
|
||||||
|
|||||||
@ -101,7 +101,7 @@ ROM_START(shootaw2)
|
|||||||
ROM_REGION(0x80000, "subcpu", 0) /* Z84C011 program ROM */
|
ROM_REGION(0x80000, "subcpu", 0) /* Z84C011 program ROM */
|
||||||
ROM_LOAD( "sas1_spr0.7f", 0x000000, 0x080000, CRC(3bc14ba3) SHA1(7a75281621f23107c5c3c1a09831be2f8bb93540) )
|
ROM_LOAD( "sas1_spr0.7f", 0x000000, 0x080000, CRC(3bc14ba3) SHA1(7a75281621f23107c5c3c1a09831be2f8bb93540) )
|
||||||
|
|
||||||
ROM_REGION(0x2000, "at28c64", 0) /* AT28C64 parallel EEPROM (not yet supported by MAME) */
|
ROM_REGION(0x2000, "at28c64", 0) /* AT28C64 parallel EEPROM (not yet supported by MAME) */
|
||||||
ROM_LOAD( "m28c64a.9l", 0x000000, 0x002000, CRC(d65d4176) SHA1(dd9b529a729685f9535ae7f060f67d75d70d9567) )
|
ROM_LOAD( "m28c64a.9l", 0x000000, 0x002000, CRC(d65d4176) SHA1(dd9b529a729685f9535ae7f060f67d75d70d9567) )
|
||||||
|
|
||||||
ROM_REGION(0x40000, "oki", 0)
|
ROM_REGION(0x40000, "oki", 0)
|
||||||
|
|||||||
@ -403,6 +403,6 @@ private:
|
|||||||
/* dongle type widel: status */
|
/* dongle type widel: status */
|
||||||
int32_t m_widel_ctrs; /* latched PROM address (E5x0 LSB, E5x1 MSB) */
|
int32_t m_widel_ctrs; /* latched PROM address (E5x0 LSB, E5x1 MSB) */
|
||||||
int32_t m_widel_latch; /* latched enable PROM (1100xxxx written to E5x1) */
|
int32_t m_widel_latch; /* latched enable PROM (1100xxxx written to E5x1) */
|
||||||
uint8_t m_decomult_bank;
|
uint8_t m_decomult_bank;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -328,7 +328,7 @@
|
|||||||
</bezel>
|
</bezel>
|
||||||
<!-- FIXME - missing element definition
|
<!-- FIXME - missing element definition
|
||||||
<bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10">
|
<bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10">
|
||||||
<bounds x="1.51" y="3.28" width="0.31" height="0.24" />
|
<bounds x="1.51" y="3.28" width="0.31" height="0.24" />
|
||||||
</bezel>
|
</bezel>
|
||||||
-->
|
-->
|
||||||
<bezel name="lamp3" element="BET4" inputtag="P1" inputmask="0x08">
|
<bezel name="lamp3" element="BET4" inputtag="P1" inputmask="0x08">
|
||||||
@ -395,7 +395,7 @@
|
|||||||
</bezel>
|
</bezel>
|
||||||
<!-- FIXME - missing element definition
|
<!-- FIXME - missing element definition
|
||||||
<bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10">
|
<bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10">
|
||||||
<bounds x="1.51" y="3.28" width="0.31" height="0.24" />
|
<bounds x="1.51" y="3.28" width="0.31" height="0.24" />
|
||||||
</bezel>
|
</bezel>
|
||||||
-->
|
-->
|
||||||
<bezel name="lamp3" element="BET5" inputtag="P1" inputmask="0x08">
|
<bezel name="lamp3" element="BET5" inputtag="P1" inputmask="0x08">
|
||||||
|
|||||||
@ -105,7 +105,7 @@ protected:
|
|||||||
|
|
||||||
std::vector<uint8_t> m_light_states;
|
std::vector<uint8_t> m_light_states;
|
||||||
|
|
||||||
bool m_eps_mode;
|
bool m_eps_mode;
|
||||||
|
|
||||||
esqpanel_external_panel_server *m_external_panel_server;
|
esqpanel_external_panel_server *m_external_panel_server;
|
||||||
|
|
||||||
|
|||||||
@ -43,9 +43,9 @@
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
DEVICE_ADDRESS_MAP_START(map, 32, interpro_ioga_device)
|
DEVICE_ADDRESS_MAP_START(map, 32, interpro_ioga_device)
|
||||||
AM_RANGE(0x00, 0x03) AM_READWRITE(eth_remap_r, eth_remap_w)
|
AM_RANGE(0x00, 0x03) AM_READWRITE(eth_remap_r, eth_remap_w)
|
||||||
AM_RANGE(0x04, 0x07) AM_READWRITE(eth_map_page_r, eth_map_page_w)
|
AM_RANGE(0x04, 0x07) AM_READWRITE(eth_map_page_r, eth_map_page_w)
|
||||||
AM_RANGE(0x08, 0x0b) AM_READWRITE(eth_control_r, eth_control_w)
|
AM_RANGE(0x08, 0x0b) AM_READWRITE(eth_control_r, eth_control_w)
|
||||||
|
|
||||||
AM_RANGE(0x0c, 0x1b) AM_READWRITE(dma_plotter_r, dma_plotter_w)
|
AM_RANGE(0x0c, 0x1b) AM_READWRITE(dma_plotter_r, dma_plotter_w)
|
||||||
AM_RANGE(0x1c, 0x1f) AM_READWRITE(dma_plotter_eosl_r, dma_plotter_eosl_w)
|
AM_RANGE(0x1c, 0x1f) AM_READWRITE(dma_plotter_eosl_r, dma_plotter_eosl_w)
|
||||||
|
|||||||
@ -205,19 +205,19 @@ public:
|
|||||||
|
|
||||||
enum dma_ctrl_mask
|
enum dma_ctrl_mask
|
||||||
{
|
{
|
||||||
DMA_CTRL_TCZERO = 0x00000001, // transfer count zero
|
DMA_CTRL_TCZERO = 0x00000001, // transfer count zero
|
||||||
DMA_CTRL_TAG = 0x00000e00, // bus tag
|
DMA_CTRL_TAG = 0x00000e00, // bus tag
|
||||||
DMA_CTRL_BERR = 0x00400000, // bus error
|
DMA_CTRL_BERR = 0x00400000, // bus error
|
||||||
DMA_CTRL_ERR = 0x00800000, // checked for in scsi isr
|
DMA_CTRL_ERR = 0x00800000, // checked for in scsi isr
|
||||||
|
|
||||||
DMA_CTRL_BUSY = 0x01000000, // cleared when command complete (maybe bus grant required?)
|
DMA_CTRL_BUSY = 0x01000000, // cleared when command complete (maybe bus grant required?)
|
||||||
DMA_CTRL_WAIT = 0x02000000, // waiting for bus grant
|
DMA_CTRL_WAIT = 0x02000000, // waiting for bus grant
|
||||||
DMA_CTRL_X = 0x04000000, // set during fdc dma?
|
DMA_CTRL_X = 0x04000000, // set during fdc dma?
|
||||||
|
|
||||||
DMA_CTRL_VIRTUAL = 0x20000000, // use virtual addressing
|
DMA_CTRL_VIRTUAL = 0x20000000, // use virtual addressing
|
||||||
DMA_CTRL_WRITE = 0x40000000, // memory to device transfer
|
DMA_CTRL_WRITE = 0x40000000, // memory to device transfer
|
||||||
|
|
||||||
DMA_CTRL_WMASK = 0xfd000e00 // writable fields
|
DMA_CTRL_WMASK = 0xfd000e00 // writable fields
|
||||||
};
|
};
|
||||||
DECLARE_READ32_MEMBER(dma_plotter_r) { return dma_r(space, offset, mem_mask, IOGA_DMA_PLOTTER); }
|
DECLARE_READ32_MEMBER(dma_plotter_r) { return dma_r(space, offset, mem_mask, IOGA_DMA_PLOTTER); }
|
||||||
DECLARE_WRITE32_MEMBER(dma_plotter_w) { dma_w(space, offset, data, mem_mask, IOGA_DMA_PLOTTER); }
|
DECLARE_WRITE32_MEMBER(dma_plotter_w) { dma_w(space, offset, data, mem_mask, IOGA_DMA_PLOTTER); }
|
||||||
|
|||||||
@ -64,18 +64,18 @@ CLK is supplied with a 12MHZ oscillator on operation wolf
|
|||||||
(move below MODE notes to upd7811.cpp?)
|
(move below MODE notes to upd7811.cpp?)
|
||||||
|
|
||||||
The four Mode0/Mode1 combinations are:
|
The four Mode0/Mode1 combinations are:
|
||||||
LOW/LOW 78c11 mem map is 4k external rom (i.e. the eprom inside the c-chip) from 0x0000-0x0FFF;
|
LOW/LOW 78c11 mem map is 4k external rom (i.e. the eprom inside the c-chip) from 0x0000-0x0FFF;
|
||||||
the low 4 bits of port F are used, to provide the high 4 address bits.
|
the low 4 bits of port F are used, to provide the high 4 address bits.
|
||||||
speculation: likely the eprom can be banked so the low or high half is visible here,
|
speculation: likely the eprom can be banked so the low or high half is visible here,
|
||||||
or possibly one fixed window and 3 variable windows, managed by the asic?
|
or possibly one fixed window and 3 variable windows, managed by the asic?
|
||||||
LOW/HIGH 78c11 mem map boots to internal rom (mask rom inside the 78c11 inside the c-chip) from
|
LOW/HIGH 78c11 mem map boots to internal rom (mask rom inside the 78c11 inside the c-chip) from
|
||||||
0x0000-0x0fff but the memory map is under full mcu control and can select any of the
|
0x0000-0x0fff but the memory map is under full mcu control and can select any of the
|
||||||
four modes (internal only, 4k external, 16k external, 64k external)
|
four modes (internal only, 4k external, 16k external, 64k external)
|
||||||
The following two modes are unusable on the c-chip:
|
The following two modes are unusable on the c-chip:
|
||||||
HIGH/LOW 78c11 mem map is 16k external rom from 0x0000-0x3FFF;
|
HIGH/LOW 78c11 mem map is 16k external rom from 0x0000-0x3FFF;
|
||||||
the low 6 bits of port F are used, to provide the high 6 address bits.
|
the low 6 bits of port F are used, to provide the high 6 address bits.
|
||||||
HIGH/HIGH 78c11 mem map is 64k external rom from 0x0000-0xFFFF;
|
HIGH/HIGH 78c11 mem map is 64k external rom from 0x0000-0xFFFF;
|
||||||
all 8 bits of port F are used to provide the high 8 address bits.
|
all 8 bits of port F are used to provide the high 8 address bits.
|
||||||
VPP is only used for programming the 27c64, do not tie it to 18v or you will probably overwrite the 27c64 with garbage.
|
VPP is only used for programming the 27c64, do not tie it to 18v or you will probably overwrite the 27c64 with garbage.
|
||||||
|
|
||||||
(see http://www.cpcwiki.eu/index.php/UPD7810/uPD7811 )
|
(see http://www.cpcwiki.eu/index.php/UPD7810/uPD7811 )
|
||||||
|
|||||||
@ -23,15 +23,15 @@ void cbuster_state::video_start()
|
|||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Crude Buster palette is a little strange compared to other Data East games
|
Crude Buster palette is a little strange compared to other Data East games
|
||||||
of this period. Although the digital palette is 8 bits per channel, the
|
of this period. Although the digital palette is 8 bits per channel, the
|
||||||
analog 'white' level is set at 0x8e. In hardware this is done at the
|
analog 'white' level is set at 0x8e. In hardware this is done at the
|
||||||
final resistors before the JAMMA connector. It also suggests that if the
|
final resistors before the JAMMA connector. It also suggests that if the
|
||||||
game were to use any values above 0x8e (it doesn't) then the final output
|
game were to use any values above 0x8e (it doesn't) then the final output
|
||||||
voltage would be out of spec.
|
voltage would be out of spec.
|
||||||
|
|
||||||
I suspect this setup is actually software compensating for a hardware
|
I suspect this setup is actually software compensating for a hardware
|
||||||
design problem.
|
design problem.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
void cbuster_state::update_palette(int offset)
|
void cbuster_state::update_palette(int offset)
|
||||||
|
|||||||
@ -9,8 +9,8 @@
|
|||||||
****************************************************************************
|
****************************************************************************
|
||||||
|
|
||||||
Data East RM-C3 is a custom resistor pack used to convert a digital
|
Data East RM-C3 is a custom resistor pack used to convert a digital
|
||||||
palette to an analog output. The conversion is non-linear with high bits
|
palette to an analog output. The conversion is non-linear with high bits
|
||||||
weighted a little more than low bits compared to linear.
|
weighted a little more than low bits compared to linear.
|
||||||
|
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
@ -44,7 +44,7 @@
|
|||||||
deco_rmc3_device::static_set_init(*device, deco_rmc3_palette_init_delegate(FUNC(deco_rmc3_device::palette_init_proms), downcast<deco_rmc3_device *>(device)));
|
deco_rmc3_device::static_set_init(*device, deco_rmc3_palette_init_delegate(FUNC(deco_rmc3_device::palette_init_proms), downcast<deco_rmc3_device *>(device)));
|
||||||
|
|
||||||
//#define MCFG_DECO_RMC3_INIT_OWNER(_class, _method)
|
//#define MCFG_DECO_RMC3_INIT_OWNER(_class, _method)
|
||||||
// deco_rmc3_device::static_set_init(*device, deco_rmc3_palette_init_delegate(&_class::PALETTE_INIT_NAME(_method), #_class "::palette_init_" #_method, downcast<_class *>(owner)));
|
// deco_rmc3_device::static_set_init(*device, deco_rmc3_palette_init_delegate(&_class::PALETTE_INIT_NAME(_method), #_class "::palette_init_" #_method, downcast<_class *>(owner)));
|
||||||
|
|
||||||
//**************************************************************************
|
//**************************************************************************
|
||||||
// TYPE DEFINITIONS
|
// TYPE DEFINITIONS
|
||||||
@ -114,12 +114,12 @@ private:
|
|||||||
// configuration state
|
// configuration state
|
||||||
u32 m_entries; // number of entries in the palette
|
u32 m_entries; // number of entries in the palette
|
||||||
u32 m_indirect_entries; // number of indirect colors in the palette
|
u32 m_indirect_entries; // number of indirect colors in the palette
|
||||||
// bool m_enable_shadows; // are shadows enabled?
|
// bool m_enable_shadows; // are shadows enabled?
|
||||||
// bool m_enable_hilights; // are hilights enabled?
|
// bool m_enable_hilights; // are hilights enabled?
|
||||||
// int m_membits; // width of palette RAM, if different from native
|
// int m_membits; // width of palette RAM, if different from native
|
||||||
// bool m_membits_supplied; // true if membits forced in static config
|
// bool m_membits_supplied; // true if membits forced in static config
|
||||||
// endianness_t m_endianness; // endianness of palette RAM, if different from native
|
// endianness_t m_endianness; // endianness of palette RAM, if different from native
|
||||||
// bool m_endianness_supplied; // true if endianness forced in static config
|
// bool m_endianness_supplied; // true if endianness forced in static config
|
||||||
optional_memory_region m_prom_region; // region where the color PROMs are
|
optional_memory_region m_prom_region; // region where the color PROMs are
|
||||||
deco_rmc3_palette_init_delegate m_init;
|
deco_rmc3_palette_init_delegate m_init;
|
||||||
|
|
||||||
|
|||||||
@ -424,7 +424,7 @@ ygv608_device::ygv608_device( const machine_config &mconfig, const char *tag, de
|
|||||||
device_gfx_interface(mconfig, *this, GFXDECODE_NAME(ygv608)),
|
device_gfx_interface(mconfig, *this, GFXDECODE_NAME(ygv608)),
|
||||||
device_memory_interface(mconfig, *this),
|
device_memory_interface(mconfig, *this),
|
||||||
m_io_space_config("io", ENDIANNESS_BIG, 8, 6, 0, *ADDRESS_MAP_NAME(regs_map)),
|
m_io_space_config("io", ENDIANNESS_BIG, 8, 6, 0, *ADDRESS_MAP_NAME(regs_map)),
|
||||||
m_vblank_handler(*this),
|
m_vblank_handler(*this),
|
||||||
m_raster_handler(*this)
|
m_raster_handler(*this)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
@ -949,7 +949,7 @@ void ygv608_device::register_state_save()
|
|||||||
save_item(NAME(m_sprite_attribute_table.b));
|
save_item(NAME(m_sprite_attribute_table.b));
|
||||||
save_item(NAME(m_scroll_data_table));
|
save_item(NAME(m_scroll_data_table));
|
||||||
save_item(NAME(m_colour_palette));
|
save_item(NAME(m_colour_palette));
|
||||||
// save_item(NAME(register_state_save));
|
// save_item(NAME(register_state_save));
|
||||||
save_item(NAME(m_color_state_r));
|
save_item(NAME(m_color_state_r));
|
||||||
save_item(NAME(m_color_state_w));
|
save_item(NAME(m_color_state_w));
|
||||||
|
|
||||||
@ -1594,7 +1594,7 @@ WRITE8_MEMBER( ygv608_device::palette_data_w )
|
|||||||
if (++m_color_state_w == 3)
|
if (++m_color_state_w == 3)
|
||||||
{
|
{
|
||||||
m_color_state_w = 0;
|
m_color_state_w = 0;
|
||||||
// if(m_colour_palette[m_palette_address][0] & 0x80) // Transparency designation, none of the Namco games enables it?
|
// if(m_colour_palette[m_palette_address][0] & 0x80) // Transparency designation, none of the Namco games enables it?
|
||||||
|
|
||||||
palette().set_pen_color(m_palette_address,
|
palette().set_pen_color(m_palette_address,
|
||||||
pal6bit( m_colour_palette[m_palette_address][0] ),
|
pal6bit( m_colour_palette[m_palette_address][0] ),
|
||||||
@ -1769,8 +1769,8 @@ WRITE8_MEMBER( ygv608_device::pattern_name_table_y_w )
|
|||||||
{
|
{
|
||||||
m_ytile_ptr = data & 0x3f;
|
m_ytile_ptr = data & 0x3f;
|
||||||
//if (yTile >= m_page_y)
|
//if (yTile >= m_page_y)
|
||||||
// logerror ("%s:setting pny(%d) >= page_y(%d)\n", machine().describe_context(),
|
// logerror ("%s:setting pny(%d) >= page_y(%d)\n", machine().describe_context(),
|
||||||
// yTile, m_page_y );
|
// yTile, m_page_y );
|
||||||
m_ytile_ptr &= m_page_y -1;
|
m_ytile_ptr &= m_page_y -1;
|
||||||
m_ytile_autoinc = BIT(data,7);
|
m_ytile_autoinc = BIT(data,7);
|
||||||
m_plane_select_access = BIT(data,6);
|
m_plane_select_access = BIT(data,6);
|
||||||
@ -1789,8 +1789,8 @@ WRITE8_MEMBER( ygv608_device::pattern_name_table_x_w )
|
|||||||
{
|
{
|
||||||
m_xtile_ptr = data & 0x3f;
|
m_xtile_ptr = data & 0x3f;
|
||||||
//if (xTile >= m_page_x)
|
//if (xTile >= m_page_x)
|
||||||
// logerror ("%s:setting pnx(%d) >= page_x(%d)\n", machine().describe_context(),
|
// logerror ("%s:setting pnx(%d) >= page_x(%d)\n", machine().describe_context(),
|
||||||
// xTile, m_page_x );
|
// xTile, m_page_x );
|
||||||
m_xtile_ptr &= m_page_x -1;
|
m_xtile_ptr &= m_page_x -1;
|
||||||
m_xtile_autoinc = BIT(data,7);
|
m_xtile_autoinc = BIT(data,7);
|
||||||
if(m_ytile_autoinc == true && m_xtile_autoinc == true)
|
if(m_ytile_autoinc == true && m_xtile_autoinc == true)
|
||||||
@ -1851,7 +1851,7 @@ WRITE8_MEMBER( ygv608_device::sprite_bank_w )
|
|||||||
READ8_MEMBER( ygv608_device::screen_ctrl_mosaic_sprite_r )
|
READ8_MEMBER( ygv608_device::screen_ctrl_mosaic_sprite_r )
|
||||||
{
|
{
|
||||||
return (m_sprite_aux_reg << 6) | ((m_sprite_aux_mode == true) << 5) | ((m_sprite_disable == true) << 4)
|
return (m_sprite_aux_reg << 6) | ((m_sprite_aux_mode == true) << 5) | ((m_sprite_disable == true) << 4)
|
||||||
| (m_mosaic_bplane << 2) | (m_mosaic_aplane & 3);
|
| (m_mosaic_bplane << 2) | (m_mosaic_aplane & 3);
|
||||||
}
|
}
|
||||||
|
|
||||||
// R#10W - screen control: mosaic & sprite
|
// R#10W - screen control: mosaic & sprite
|
||||||
@ -2108,9 +2108,9 @@ WRITE8_MEMBER( ygv608_device::crtc_w )
|
|||||||
// TODO: h/vstart not taken into account (needs video mods)
|
// TODO: h/vstart not taken into account (needs video mods)
|
||||||
void ygv608_device::screen_configure()
|
void ygv608_device::screen_configure()
|
||||||
{
|
{
|
||||||
// int display_hend = (m_crtc.display_hstart + (m_crtc.display_width / 2)) - 1;
|
// int display_hend = (m_crtc.display_hstart + (m_crtc.display_width / 2)) - 1;
|
||||||
int display_hend = (m_crtc.display_width / 2) - 1;
|
int display_hend = (m_crtc.display_width / 2) - 1;
|
||||||
// int display_vend = (m_crtc.display_vstart + m_crtc.display_height) - 1;
|
// int display_vend = (m_crtc.display_vstart + m_crtc.display_height) - 1;
|
||||||
int display_vend = (m_crtc.display_height) - 1;
|
int display_vend = (m_crtc.display_height) - 1;
|
||||||
|
|
||||||
//rectangle visarea(m_crtc.display_hstart, display_hend, m_crtc.display_vstart, display_vend);
|
//rectangle visarea(m_crtc.display_hstart, display_hend, m_crtc.display_vstart, display_vend);
|
||||||
|
|||||||
@ -14,7 +14,7 @@
|
|||||||
#include "screen.h"
|
#include "screen.h"
|
||||||
|
|
||||||
class ygv608_device : public device_t,
|
class ygv608_device : public device_t,
|
||||||
public device_gfx_interface,
|
public device_gfx_interface,
|
||||||
public device_memory_interface
|
public device_memory_interface
|
||||||
{
|
{
|
||||||
public:
|
public:
|
||||||
@ -29,7 +29,7 @@ public:
|
|||||||
DECLARE_READ8_MEMBER(scroll_data_r);
|
DECLARE_READ8_MEMBER(scroll_data_r);
|
||||||
DECLARE_READ8_MEMBER(palette_data_r);
|
DECLARE_READ8_MEMBER(palette_data_r);
|
||||||
DECLARE_READ8_MEMBER(register_data_r);
|
DECLARE_READ8_MEMBER(register_data_r);
|
||||||
// DECLARE_READ8_MEMBER(register_select_r);
|
// DECLARE_READ8_MEMBER(register_select_r);
|
||||||
DECLARE_READ8_MEMBER(status_port_r);
|
DECLARE_READ8_MEMBER(status_port_r);
|
||||||
DECLARE_READ8_MEMBER(system_control_r);
|
DECLARE_READ8_MEMBER(system_control_r);
|
||||||
DECLARE_WRITE8_MEMBER(pattern_name_table_w);
|
DECLARE_WRITE8_MEMBER(pattern_name_table_w);
|
||||||
@ -257,49 +257,49 @@ private:
|
|||||||
/* These were statically allocated in the r/w routines */
|
/* These were statically allocated in the r/w routines */
|
||||||
int p0_state_r,m_color_state_r;
|
int p0_state_r,m_color_state_r;
|
||||||
int p0_state_w,m_color_state_w;
|
int p0_state_w,m_color_state_w;
|
||||||
int pattern_name_base_r,pattern_name_base_w; /* pattern name table base address */
|
int pattern_name_base_r,pattern_name_base_w; /* pattern name table base address */
|
||||||
|
|
||||||
// === new variable handling starts here ===
|
// === new variable handling starts here ===
|
||||||
uint8_t m_register_address; /**< RN: Register address select */
|
uint8_t m_register_address; /**< RN: Register address select */
|
||||||
bool m_register_autoinc_r; /**< RRAI: Register address auto-increment on read */
|
bool m_register_autoinc_r; /**< RRAI: Register address auto-increment on read */
|
||||||
bool m_register_autoinc_w; /**< RWAI: Register address auto-increment on write */
|
bool m_register_autoinc_w; /**< RWAI: Register address auto-increment on write */
|
||||||
uint8_t m_screen_status; /**< CD: status port r/w */
|
uint8_t m_screen_status; /**< CD: status port r/w */
|
||||||
|
|
||||||
bool m_raster_irq_mask; /**< IEP: raster irq mask (INT1 occurs if 1) */
|
bool m_raster_irq_mask; /**< IEP: raster irq mask (INT1 occurs if 1) */
|
||||||
bool m_vblank_irq_mask; /**< IEV: vblank irq mask (INT0 occurs if 1) */
|
bool m_vblank_irq_mask; /**< IEV: vblank irq mask (INT0 occurs if 1) */
|
||||||
int m_raster_irq_hpos; /**< IH: horizontal position where raster irq occurs x 32 */
|
int m_raster_irq_hpos; /**< IH: horizontal position where raster irq occurs x 32 */
|
||||||
int m_raster_irq_vpos; /**< IV: vertical position where raster irq occurs */
|
int m_raster_irq_vpos; /**< IV: vertical position where raster irq occurs */
|
||||||
bool m_raster_irq_mode; /**< FPM: if 1 vertical position becomes invalid for raster irqs (irqs occur for every line) */
|
bool m_raster_irq_mode; /**< FPM: if 1 vertical position becomes invalid for raster irqs (irqs occur for every line) */
|
||||||
|
|
||||||
uint8_t m_scroll_address; /**< SCA: scroll table access pointer */
|
uint8_t m_scroll_address; /**< SCA: scroll table access pointer */
|
||||||
uint8_t m_palette_address; /**< CC: color palette access pointer */
|
uint8_t m_palette_address; /**< CC: color palette access pointer */
|
||||||
uint8_t m_sprite_address; /**< SAA: sprite attribute table access pointer */
|
uint8_t m_sprite_address; /**< SAA: sprite attribute table access pointer */
|
||||||
uint8_t m_sprite_bank; /**< SBA: sprite generator base address (MA20 to MA13) */
|
uint8_t m_sprite_bank; /**< SBA: sprite generator base address (MA20 to MA13) */
|
||||||
uint8_t m_xtile_ptr; /**< PNX: X coordinate of pattern space */
|
uint8_t m_xtile_ptr; /**< PNX: X coordinate of pattern space */
|
||||||
uint8_t m_ytile_ptr; /**< PNY: Y coordinate of pattern space */
|
uint8_t m_ytile_ptr; /**< PNY: Y coordinate of pattern space */
|
||||||
bool m_xtile_autoinc; /**< PNXA: Permits auto-increment in X coordinate */
|
bool m_xtile_autoinc; /**< PNXA: Permits auto-increment in X coordinate */
|
||||||
bool m_ytile_autoinc; /**< PNXA: Permits auto-increment in Y coordinate */
|
bool m_ytile_autoinc; /**< PNXA: Permits auto-increment in Y coordinate */
|
||||||
bool m_plane_select_access; /**< B/(A): A/B plane access select */
|
bool m_plane_select_access; /**< B/(A): A/B plane access select */
|
||||||
|
|
||||||
uint8_t m_mosaic_aplane; /**< MCA: mosaic factor applied to A plane */
|
uint8_t m_mosaic_aplane; /**< MCA: mosaic factor applied to A plane */
|
||||||
uint8_t m_mosaic_bplane; /**< MCA: mosaic factor applied to B plane */
|
uint8_t m_mosaic_bplane; /**< MCA: mosaic factor applied to B plane */
|
||||||
bool m_sprite_disable; /**< SPRD: disables the sprite plane display */
|
bool m_sprite_disable; /**< SPRD: disables the sprite plane display */
|
||||||
bool m_sprite_aux_mode; /**< SPAS: if 0 aux bits selects size, if 1 selects flipping */
|
bool m_sprite_aux_mode; /**< SPAS: if 0 aux bits selects size, if 1 selects flipping */
|
||||||
uint8_t m_sprite_aux_reg; /**< SPA: auxiliary bits of sprite attribute table */
|
uint8_t m_sprite_aux_reg; /**< SPA: auxiliary bits of sprite attribute table */
|
||||||
uint8_t m_border_color; /**< BDC: border color */
|
uint8_t m_border_color; /**< BDC: border color */
|
||||||
|
|
||||||
// screen section
|
// screen section
|
||||||
devcb_write_line m_vblank_handler;
|
devcb_write_line m_vblank_handler;
|
||||||
devcb_write_line m_raster_handler;
|
devcb_write_line m_raster_handler;
|
||||||
screen_device *m_screen;
|
screen_device *m_screen;
|
||||||
emu_timer *m_vblank_timer;
|
emu_timer *m_vblank_timer;
|
||||||
emu_timer *m_raster_timer;
|
emu_timer *m_raster_timer;
|
||||||
|
|
||||||
void screen_configure(); /**< Adjust screen parameters based off CRTC ones */
|
void screen_configure(); /**< Adjust screen parameters based off CRTC ones */
|
||||||
attotime raster_sync_offset(); /**< Adjust timing based off raster & CRTC parameters */
|
attotime raster_sync_offset(); /**< Adjust timing based off raster & CRTC parameters */
|
||||||
void vblank_irq_check(); /**< mask + pend check for vblank irq */
|
void vblank_irq_check(); /**< mask + pend check for vblank irq */
|
||||||
void raster_irq_check(); /**< mask + pend check for raster irq */
|
void raster_irq_check(); /**< mask + pend check for raster irq */
|
||||||
void pattern_name_autoinc_check(); /**< check autoinc for tile pointers */
|
void pattern_name_autoinc_check(); /**< check autoinc for tile pointers */
|
||||||
|
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
@ -308,25 +308,25 @@ private:
|
|||||||
};
|
};
|
||||||
|
|
||||||
struct {
|
struct {
|
||||||
int htotal; /**< HTL: horizontal total number of dots x 2 */
|
int htotal; /**< HTL: horizontal total number of dots x 2 */
|
||||||
int vtotal; /**< VTL: vertical total number of lines x 1 */
|
int vtotal; /**< VTL: vertical total number of lines x 1 */
|
||||||
int display_hstart; /**< HDS: horizontal display starting position x 2*/
|
int display_hstart; /**< HDS: horizontal display starting position x 2*/
|
||||||
int display_vstart; /**< VDS: vertical display starting position x 1 */
|
int display_vstart; /**< VDS: vertical display starting position x 1 */
|
||||||
int display_width; /**< HDW: horizontal display size x 16 */
|
int display_width; /**< HDW: horizontal display size x 16 */
|
||||||
int display_height; /**< VDW: vertical display size x 8 */
|
int display_height; /**< VDW: vertical display size x 8 */
|
||||||
int display_hsync; /**< HSW: horizontal sync signal x 16 */
|
int display_hsync; /**< HSW: horizontal sync signal x 16 */
|
||||||
int display_vsync; /**< VSW: vertical sync signal x 1 */
|
int display_vsync; /**< VSW: vertical sync signal x 1 */
|
||||||
int border_width; /**< HBW: horizontal border size x 16 */
|
int border_width; /**< HBW: horizontal border size x 16 */
|
||||||
int border_height; /**< VBW: vertical border size x 8 */
|
int border_height; /**< VBW: vertical border size x 8 */
|
||||||
}m_crtc;
|
}m_crtc;
|
||||||
|
|
||||||
// rotation, zoom shortcuts
|
// rotation, zoom shortcuts
|
||||||
uint32_t m_ax; /**< AX */
|
uint32_t m_ax; /**< AX */
|
||||||
uint32_t m_dx; /**< DX */
|
uint32_t m_dx; /**< DX */
|
||||||
uint32_t m_dxy; /**< DXY */
|
uint32_t m_dxy; /**< DXY */
|
||||||
uint32_t m_ay; /**< AY */
|
uint32_t m_ay; /**< AY */
|
||||||
uint32_t m_dy; /**< DY */
|
uint32_t m_dy; /**< DY */
|
||||||
uint32_t m_dyx; /**< DYX */
|
uint32_t m_dyx; /**< DYX */
|
||||||
|
|
||||||
// raw register versions of above
|
// raw register versions of above
|
||||||
uint32_t m_raw_ax;
|
uint32_t m_raw_ax;
|
||||||
|
|||||||
@ -41,7 +41,7 @@ public:
|
|||||||
|
|
||||||
void start(running_machine &machine)
|
void start(running_machine &machine)
|
||||||
{
|
{
|
||||||
m_machine = &machine;
|
m_machine = &machine;
|
||||||
m_clients->insert(shared_from_this());
|
m_clients->insert(shared_from_this());
|
||||||
// now send "hello = 1" to the newly connected client
|
// now send "hello = 1" to the newly connected client
|
||||||
std::strncpy(m_data, "hello = 1\1", max_length);
|
std::strncpy(m_data, "hello = 1\1", max_length);
|
||||||
@ -58,43 +58,43 @@ private:
|
|||||||
|
|
||||||
void handle_message(char *msg)
|
void handle_message(char *msg)
|
||||||
{
|
{
|
||||||
char verb[1024];
|
char verb[1024];
|
||||||
int value;
|
int value;
|
||||||
|
|
||||||
//printf("handle_message: got [%s]\n", msg);
|
//printf("handle_message: got [%s]\n", msg);
|
||||||
|
|
||||||
std::uint32_t ch = 0;
|
std::uint32_t ch = 0;
|
||||||
while (msg[ch] != ' ')
|
while (msg[ch] != ' ')
|
||||||
{
|
{
|
||||||
ch++;
|
ch++;
|
||||||
}
|
}
|
||||||
msg[ch] = '\0';
|
msg[ch] = '\0';
|
||||||
ch++;
|
ch++;
|
||||||
std::strncpy(verb, msg, sizeof(verb)-1);
|
std::strncpy(verb, msg, sizeof(verb)-1);
|
||||||
//printf("verb = [%s], ", verb);
|
//printf("verb = [%s], ", verb);
|
||||||
|
|
||||||
while (msg[ch] != ' ')
|
while (msg[ch] != ' ')
|
||||||
{
|
{
|
||||||
ch++;
|
ch++;
|
||||||
}
|
}
|
||||||
|
|
||||||
ch++;
|
ch++;
|
||||||
value = atoi(&msg[ch]);
|
value = atoi(&msg[ch]);
|
||||||
//printf("value = %d\n", value);
|
//printf("value = %d\n", value);
|
||||||
|
|
||||||
if (!std::strcmp(verb, "send_id"))
|
if (!std::strcmp(verb, "send_id"))
|
||||||
{
|
{
|
||||||
if (value == 0)
|
if (value == 0)
|
||||||
{
|
{
|
||||||
std::snprintf(m_data, max_length, "req_id = %s\1", machine().system().name);
|
std::snprintf(m_data, max_length, "req_id = %s\1", machine().system().name);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
std::snprintf(m_data, max_length, "req_id = %s\1", machine().output().id_to_name(value));
|
std::snprintf(m_data, max_length, "req_id = %s\1", machine().output().id_to_name(value));
|
||||||
}
|
}
|
||||||
|
|
||||||
do_write(std::strlen(m_data));
|
do_write(std::strlen(m_data));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void do_read()
|
void do_read()
|
||||||
@ -105,11 +105,11 @@ private:
|
|||||||
{
|
{
|
||||||
if (!ec)
|
if (!ec)
|
||||||
{
|
{
|
||||||
if (length > 0)
|
if (length > 0)
|
||||||
{
|
{
|
||||||
m_input_m_data[length] = '\0';
|
m_input_m_data[length] = '\0';
|
||||||
handle_message(m_input_m_data);
|
handle_message(m_input_m_data);
|
||||||
}
|
}
|
||||||
do_read();
|
do_read();
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
@ -148,7 +148,7 @@ public:
|
|||||||
output_network_server(asio::io_context& io_context, short port, running_machine &machine) :
|
output_network_server(asio::io_context& io_context, short port, running_machine &machine) :
|
||||||
m_acceptor(io_context, asio::ip::tcp::endpoint(asio::ip::tcp::v4(), port))
|
m_acceptor(io_context, asio::ip::tcp::endpoint(asio::ip::tcp::v4(), port))
|
||||||
{
|
{
|
||||||
m_machine = &machine;
|
m_machine = &machine;
|
||||||
do_accept();
|
do_accept();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -250,7 +250,7 @@ static const dasm_table_entry dasm_table[] =
|
|||||||
{ "arm7thumbb", _16be, 0, CPU_DISASSEMBLE_NAME(arm7thumb_be) },
|
{ "arm7thumbb", _16be, 0, CPU_DISASSEMBLE_NAME(arm7thumb_be) },
|
||||||
{ "asap", _32le, 0, CPU_DISASSEMBLE_NAME(asap) },
|
{ "asap", _32le, 0, CPU_DISASSEMBLE_NAME(asap) },
|
||||||
{ "avr8", _16le, 0, CPU_DISASSEMBLE_NAME(avr8) },
|
{ "avr8", _16le, 0, CPU_DISASSEMBLE_NAME(avr8) },
|
||||||
{ "capricorn", _8bit, 0, CPU_DISASSEMBLE_NAME(capricorn) },
|
{ "capricorn", _8bit, 0, CPU_DISASSEMBLE_NAME(capricorn) },
|
||||||
{ "ccpu", _8bit, 0, CPU_DISASSEMBLE_NAME(ccpu) },
|
{ "ccpu", _8bit, 0, CPU_DISASSEMBLE_NAME(ccpu) },
|
||||||
{ "cdp1801", _8bit, 0, CPU_DISASSEMBLE_NAME(cdp1801) },
|
{ "cdp1801", _8bit, 0, CPU_DISASSEMBLE_NAME(cdp1801) },
|
||||||
{ "cdp1802", _8bit, 0, CPU_DISASSEMBLE_NAME(cdp1802) },
|
{ "cdp1802", _8bit, 0, CPU_DISASSEMBLE_NAME(cdp1802) },
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user