mirror of
https://github.com/holub/mame
synced 2025-06-04 03:46:29 +03:00
Goupil G2 computer support added. (#2383)
This commit is contained in:
Jean-François DEL NERO
Vas Crabb
parent
9bed343246
commit
d1e1fa2d90
@ -1,29 +1,30 @@
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// license:BSD-3-Clause
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// copyright-holders:Jean-Francois DEL NERO
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// copyright-holders:Jean-François DEL NERO
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/***************************************************************************
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SMT Goupil G1 driver
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SMT Goupil G1 & G2 driver
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Current state :
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-> CPU / ROM / RAM working
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-> Video output working
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-> Video output working (G1: ef9364, G2: Visu 24x80 MC6845)
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-> Keyboard support working (need to be polished... )
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-> Floppy FDC not fully implemented.
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-> Sound support missing.
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Software :
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-> The Monitor is working
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-> The internal Basic is working (-> 6800 0xC3 illegal opcode emulation needed).
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-> The internal G1 Basic is working (-> 6800 0xC3 illegal opcode emulation needed).
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02/04/2016
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Jean-Francois DEL NERO
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Jean-François DEL NERO
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****************************************************************************/
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#include "emu.h"
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#include "cpu/m6800/m6800.h"
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#include "machine/ram.h"
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#include "machine/6522via.h"
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#include "machine/6850acia.h"
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#include "machine/i8279.h"
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@ -34,6 +35,7 @@
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#include "screen.h"
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#include "softlist.h"
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#include "logmacro.h"
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#define MAIN_CLOCK XTAL_4MHz
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#define VIDEO_CLOCK MAIN_CLOCK / 8 /* 1.75 Mhz */
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@ -85,7 +87,7 @@ public:
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private:
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required_device<acia6850_device> m_acia;
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required_device<ef9364_device> m_ef9364;
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optional_device<ef9364_device> m_ef9364;
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required_device<cpu_device> m_maincpu;
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required_device<via6522_device> m_via_video;
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required_device<via6522_device> m_via_keyb;
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@ -96,6 +98,36 @@ private:
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floppy_image_device *m_floppy;
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};
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ROM_START( visu_24x80 )
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ROM_REGION( 0x800, "visu_24x80", 0 )
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ROM_LOAD( "SMT_Goupil_G2_Charset_24x80.bin", 0x0000, 0x0800, CRC(F0F83B99) SHA1(75A7730AEC30280EE4CCF3DCAF587EEA4F861196) )
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ROM_END
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class goupil_g2_state : public goupil_g1_state
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{
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public:
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goupil_g2_state(const machine_config &mconfig, device_type type, const char *tag)
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: goupil_g1_state(mconfig, type, tag),
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m_palette(*this, "palette"),
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m_visu24x80_ram(*this, RAM_TAG),
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m_visu24x80_rom(*this, "visu_24x80")
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{
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}
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MC6845_UPDATE_ROW(crtc_update_row);
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MC6845_ON_UPDATE_ADDR_CHANGED(crtc_update_addr_changed);
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DECLARE_READ8_MEMBER(visu24x80_ram_r);
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DECLARE_WRITE8_MEMBER(visu24x80_ram_w);
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protected:
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required_device<palette_device> m_palette;
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required_device<ram_device> m_visu24x80_ram;
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required_region_ptr<uint8_t> m_visu24x80_rom;
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};
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/**********************************
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* Floppy controller I/O Handlers *
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***********************************/
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@ -112,33 +144,69 @@ TIMER_DEVICE_CALLBACK_MEMBER( goupil_g1_state::goupil_scanline )
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static ADDRESS_MAP_START(goupil_mem, AS_PROGRAM, 8, goupil_g1_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000,0x3fff) AM_RAM
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AM_RANGE(0x4000,0x7fff) AM_RAM
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AM_RANGE(0xC000,0xE3FF) AM_ROM AM_REGION("maincpu", 0x1000) // Basic ROM (BASIC 1 up to BASIC 9).
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AM_RANGE(0x0000,0x3FFF) AM_RAM
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AM_RANGE(0x4000,0x7FFF) AM_RAM
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AM_RANGE(0xC000,0xE3FF) AM_ROM AM_REGION("maincpu", 0xC000) // Basic ROM (BASIC 1 up to BASIC 9).
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AM_RANGE(0xe400,0xe7ff) AM_RAM
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AM_RANGE(0xE400,0xE7FF) AM_RAM
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AM_RANGE(0xE800,0xE80F) AM_DEVREADWRITE("ef6850", acia6850_device, data_r, data_w)
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AM_RANGE(0xE810,0xE81F) AM_DEVREADWRITE("m_via_video", via6522_device, read, write)
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AM_RANGE(0xe820, 0xe821) AM_DEVREADWRITE("i8279_kb1", i8279_device, read, write)
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AM_RANGE(0xe830, 0xe831) AM_DEVREADWRITE("i8279_kb2", i8279_device, read, write)
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AM_RANGE(0xE820,0xE820) AM_DEVREADWRITE("i8279_kb1", i8279_device, data_r, data_w )
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AM_RANGE(0xE821,0xE821) AM_DEVREADWRITE("i8279_kb1", i8279_device, status_r, cmd_w )
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AM_RANGE(0xE830,0xE830) AM_DEVREADWRITE("i8279_kb2", i8279_device, data_r, data_w )
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AM_RANGE(0xE831,0xE831) AM_DEVREADWRITE("i8279_kb2", i8279_device, status_r, cmd_w )
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AM_RANGE(0xE840,0xE84F) AM_DEVREADWRITE("m_via_keyb", via6522_device, read, write)
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AM_RANGE(0xE860,0xE86F) AM_DEVREADWRITE("m_via_modem", via6522_device, read, write)
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AM_RANGE(0xe8f0,0xe8ff) AM_DEVREADWRITE("fd1791", fd1791_device, read, write)
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//AM_RANGE(0xf08a,0xf08a) AM_READWRITE( fdc_sel0_r, fdc_sel0_w )
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//AM_RANGE(0xf08b,0xf08b) AM_READWRITE( fdc_sel1_r, fdc_sel1_w )
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AM_RANGE(0xE8F0,0xE8FF) AM_DEVREADWRITE("fd1791", fd1791_device, read, write)
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AM_RANGE(0xf400,0xf7ff) AM_ROM AM_REGION("maincpu", 0x0800) // Modem (MOD 3)
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AM_RANGE(0xf800,0xffff) AM_ROM AM_REGION("maincpu", 0x0000) // Monitor (MON 1 + MON 2)
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AM_RANGE(0xF000,0xF3FF) AM_ROM AM_REGION("maincpu", 0xF000)
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AM_RANGE(0xF400,0xF7FF) AM_ROM AM_REGION("maincpu", 0xF400) // Modem (MOD 3)
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AM_RANGE(0xF800,0xFFFF) AM_ROM AM_REGION("maincpu", 0xF800) // Monitor (MON 1 + MON 2)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( goupil_io, AS_IO, 8, goupil_g1_state)
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(goupil_g2_mem, AS_PROGRAM, 8, goupil_g2_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000,0x3FFF) AM_RAM
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AM_RANGE(0x4000,0x7FFF) AM_RAM
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AM_RANGE(0x8000,0xE3FF) AM_RAM
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AM_RANGE(0xE400,0xE7FF) AM_RAM
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AM_RANGE(0xE800,0xE80F) AM_DEVREADWRITE("ef6850", acia6850_device, data_r, data_w)
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AM_RANGE(0xE810,0xE81F) AM_DEVREADWRITE("m_via_video", via6522_device, read, write)
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AM_RANGE(0xE820,0xE820) AM_DEVREADWRITE("i8279_kb1", i8279_device, data_r, data_w )
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AM_RANGE(0xE821,0xE821) AM_DEVREADWRITE("i8279_kb1", i8279_device, status_r, cmd_w )
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AM_RANGE(0xE830,0xE830) AM_DEVREADWRITE("i8279_kb2", i8279_device, data_r, data_w )
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AM_RANGE(0xE831,0xE831) AM_DEVREADWRITE("i8279_kb2", i8279_device, status_r, cmd_w )
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AM_RANGE(0xE840,0xE84F) AM_DEVREADWRITE("m_via_keyb", via6522_device, read, write)
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AM_RANGE(0xE860,0xE86F) AM_DEVREADWRITE("m_via_modem", via6522_device, read, write)
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AM_RANGE(0xE870,0xE870) AM_DEVREADWRITE("crtc", mc6845_device, status_r, address_w)
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AM_RANGE(0xE871,0xE871) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
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AM_RANGE(0xE8F0,0xE8FF) AM_DEVREADWRITE("fd1791", fd1791_device, read, write)
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AM_RANGE(0xEC00,0xF3FF) AM_READWRITE(visu24x80_ram_r, visu24x80_ram_w)
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AM_RANGE(0xF000,0xF7FF) AM_ROM AM_REGION("maincpu", 0xF000) // Monitor (MON 1)
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AM_RANGE(0xF800,0xFFFF) AM_ROM AM_REGION("maincpu", 0xF800) // Monitor (MON 2)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( goupil_g2_io, AS_IO, 8, goupil_g2_state)
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_END
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WRITE8_MEMBER( goupil_g1_state::scanlines_kbd1_w )
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{
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m_row_kbd1 = data;
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@ -401,29 +469,68 @@ void goupil_g1_state::machine_reset()
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WRITE8_MEMBER(goupil_g1_state::via_video_pba_w)
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{
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#ifdef DBGMODE
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printf("%s: write via_video_pba_w reg : 0x%X\n",machine().describe_context(),data);
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#endif
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m_ef9364->char_latch_w(data);
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LOG("%s: write via_video_pba_w reg : 0x%X\n",machine().describe_context(),data);
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if(m_ef9364)
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m_ef9364->char_latch_w(data);
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}
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WRITE8_MEMBER(goupil_g1_state::via_video_pbb_w)
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{
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#ifdef DBGMODE
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printf("%s: write via_video_pbb_w reg : 0x%X\n",machine().describe_context(),data);
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#endif
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LOG("%s: write via_video_pbb_w reg : 0x%X\n",machine().describe_context(),data);
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via_video_pbb_data = data;
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}
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WRITE_LINE_MEMBER( goupil_g1_state::via_video_ca2_w )
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{
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if(old_state_ca2==0 && state==1)
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if(old_state_ca2==0 && state==1 && m_ef9364)
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{
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m_ef9364->command_w(via_video_pbb_data&0xF);
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}
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old_state_ca2 = state;
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}
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// Visu 24x80 video card update row.
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MC6845_UPDATE_ROW(goupil_g2_state::crtc_update_row)
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{
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rgb_t const *const palette = m_palette->palette()->entry_list_raw();
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uint32_t *p = &bitmap.pix32(y);
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for (uint8_t x = 0; x < x_count; ++x)
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{
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uint16_t const offset = ( 0x400 + ( ma + x ) ) & 0x7FF;
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uint8_t const chr = m_visu24x80_ram->pointer()[offset];
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uint8_t const gfx = m_visu24x80_rom[ ( ( chr & 0x7F ) << 4 ) + ra ];
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for (unsigned bit = 0; 8 > bit; ++bit)
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{
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*p++ = palette[BIT(gfx, 7 - bit)];
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}
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}
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}
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MC6845_ON_UPDATE_ADDR_CHANGED(goupil_g2_state::crtc_update_addr_changed)
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{
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}
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WRITE8_MEMBER( goupil_g2_state::visu24x80_ram_w )
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{
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LOG("%s: write visu24x80_ram_w mem : 0x%.4X <- 0x%X\n",machine().describe_context(),offset,data);
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m_visu24x80_ram->pointer()[offset] = data;
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}
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READ8_MEMBER( goupil_g2_state::visu24x80_ram_r )
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{
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uint8_t data;
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data = m_visu24x80_ram->pointer()[offset];
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LOG("%s: read visu24x80_ram_r 0x%.4X = 0x%.2X\n",machine().describe_context(),offset,data);
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return data;
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}
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static MACHINE_CONFIG_START( goupil_g1 )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu",M6808, CPU_CLOCK)
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@ -480,32 +587,116 @@ static MACHINE_CONFIG_START( goupil_g1 )
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MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( goupil_g2 )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu",M6808, CPU_CLOCK)
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MCFG_CPU_PROGRAM_MAP(goupil_g2_mem)
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MCFG_CPU_IO_MAP(goupil_g2_io)
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/* sound hardware */
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// TODO !
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MCFG_DEVICE_ADD ("ef6850", ACIA6850, 0)
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/* screen */
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// "visu 24x80" board
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MCFG_RAM_ADD(RAM_TAG)
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MCFG_RAM_DEFAULT_SIZE("2K") // visu24x80 2K ram
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MCFG_SCREEN_ADD("screen" ,RASTER)
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MCFG_SCREEN_REFRESH_RATE(50)
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MCFG_SCREEN_NO_PALETTE
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MCFG_SCREEN_UPDATE_DEVICE("crtc", mc6845_device, screen_update)
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MCFG_SCREEN_SIZE((80*8), (24*(8+4)))
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MCFG_SCREEN_VISIBLE_AREA(0, (80*8)-1, 0, (24*(8+4))-1)
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MCFG_PALETTE_ADD_MONOCHROME_HIGHLIGHT("palette")
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MCFG_MC6845_ADD("crtc", MC6845, "screen", XTAL_14_31818MHz/8)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(8)
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MCFG_MC6845_UPDATE_ROW_CB(goupil_g2_state, crtc_update_row)
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MCFG_MC6845_ADDR_CHANGED_CB(goupil_g2_state, crtc_update_addr_changed)
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MCFG_DEVICE_ADD("m_via_video", VIA6522, 0)
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MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(goupil_g2_state, via_video_pba_w))
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MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(goupil_g2_state, via_video_pbb_w))
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MCFG_VIA6522_CA2_HANDLER(WRITELINE(goupil_g2_state, via_video_ca2_w))
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MCFG_DEVICE_ADD("m_via_keyb", VIA6522, 0)
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MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6808_IRQ_LINE))
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MCFG_DEVICE_ADD("m_via_modem", VIA6522, 0)
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MCFG_VIA6522_IRQ_HANDLER(INPUTLINE("maincpu", M6808_IRQ_LINE))
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/* Floppy */
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MCFG_FD1791_ADD("fd1791", XTAL_8MHz )
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MCFG_FLOPPY_DRIVE_ADD("fd1791:0", goupil_floppies, "525qd", floppy_image_device::default_floppy_formats)
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MCFG_FLOPPY_DRIVE_ADD("fd1791:1", goupil_floppies, "525qd", floppy_image_device::default_floppy_formats)
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MCFG_DEVICE_ADD("i8279_kb1", I8279, CPU_CLOCK)
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MCFG_I8279_OUT_SL_CB(WRITE8(goupil_g2_state, scanlines_kbd1_w)) // scan SL lines
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MCFG_I8279_IN_RL_CB(READ8(goupil_g2_state, kbd1_r)) // kbd RL lines
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MCFG_I8279_IN_SHIFT_CB(READ8(goupil_g2_state, shift_kb1_r))
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MCFG_I8279_IN_CTRL_CB(READ8(goupil_g2_state, ctrl_kb1_r))
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MCFG_I8279_OUT_IRQ_CB(DEVWRITELINE("m_via_keyb", via6522_device, write_ca1))
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MCFG_DEVICE_ADD("i8279_kb2", I8279, CPU_CLOCK)
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MCFG_I8279_OUT_SL_CB(WRITE8(goupil_g2_state, scanlines_kbd2_w)) // scan SL lines
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MCFG_I8279_IN_RL_CB(READ8(goupil_g2_state, kbd2_r)) // kbd RL lines
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MCFG_I8279_IN_SHIFT_CB(READ8(goupil_g2_state, shift_kb2_r))
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MCFG_I8279_IN_CTRL_CB(READ8(goupil_g2_state, ctrl_kb2_r))
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MACHINE_CONFIG_END
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/* ROM definition */
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ROM_START( goupilg1 )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_DEFAULT_BIOS("v1_0")
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ROM_SYSTEM_BIOS(0, "v1_0", "Version 1.0")
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ROMX_LOAD( "SMT_Goupil_G1_MON_1.bin", 0x0000, 0x0400, CRC(98b7be69) SHA1(69e83fe78a43fcf2b08fb0bcefb0d217a57b1ecb), ROM_BIOS(1) )
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ROM_LOAD ( "SMT_Goupil_G1_MON_2.bin", 0x0400, 0x0400, CRC(19386b81) SHA1(e52f63fd29d374319781e9677de6d3fd61a3684c) )
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ROMX_LOAD( "SMT_Goupil_G1_MON_1.bin", 0xF800, 0x0400, CRC(98b7be69) SHA1(69e83fe78a43fcf2b08fb0bcefb0d217a57b1ecb), ROM_BIOS(1) )
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ROM_LOAD ( "SMT_Goupil_G1_MON_2.bin", 0xFC00, 0x0400, CRC(19386b81) SHA1(e52f63fd29d374319781e9677de6d3fd61a3684c) )
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ROM_LOAD( "SMT_Goupil_G1_MOD_3.bin", 0x0800, 0x0400, CRC(e662f152) SHA1(11b91c5737e7572a2c18472b66bbd16b485132d5) )
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ROM_LOAD( "SMT_Goupil_G1_MOD_3.bin", 0xF400, 0x0400, CRC(e662f152) SHA1(11b91c5737e7572a2c18472b66bbd16b485132d5) )
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ROMX_LOAD( "SMT_Goupil_G1_Basic_1.bin", 0x1000, 0x0400, CRC(ad105b12) SHA1(631cd4b997f76b57bf2509e4bff30b1595c8bd13), ROM_BIOS(1) )
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ROMX_LOAD( "SMT_Goupil_G1_Basic_2.bin", 0x1400, 0x0400, CRC(0c5c309c) SHA1(f1cab4b0f9191e53113790a95f1ab7108f9406a1), ROM_BIOS(1) )
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ROMX_LOAD( "SMT_Goupil_G1_Basic_3.bin", 0x1800, 0x0400, CRC(1f1eb127) SHA1(dbbb880c79d515acbfcb2be9a4c96962f3e4edea), ROM_BIOS(1) )
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ROMX_LOAD( "SMT_Goupil_G1_Basic_4.bin", 0x1C00, 0x0400, CRC(09be48e4) SHA1(86cae0d159583c1d572a5754f3bb6b4a2e479359), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_5.bin", 0x2000, 0x0400, CRC(bdeb395c) SHA1(32a50468f1ca772ee45a1f5c61c66f3ecc774074), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_6.bin", 0x2400, 0x0400, CRC(850a4000) SHA1(720f0bb3e45877835219b7e1d943ef4f19b9977d), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_7.bin", 0x2800, 0x0400, CRC(586c7670) SHA1(13e2e96b9f1a53555ce0d55f657cf3c6b96f10a0), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_8.bin", 0x2C00, 0x0400, CRC(33281300) SHA1(ce631fa8157a3f8869c5fefe24b7f40e06696df9), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_9.bin", 0x3000, 0x0400, CRC(a3911201) SHA1(8623a0a2d83eb3a27a795030643c5c05a4350a9f), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_1.bin", 0xC000, 0x0400, CRC(ad105b12) SHA1(631cd4b997f76b57bf2509e4bff30b1595c8bd13), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_2.bin", 0xC400, 0x0400, CRC(0c5c309c) SHA1(f1cab4b0f9191e53113790a95f1ab7108f9406a1), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_3.bin", 0xC800, 0x0400, CRC(1f1eb127) SHA1(dbbb880c79d515acbfcb2be9a4c96962f3e4edea), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_4.bin", 0xCC00, 0x0400, CRC(09be48e4) SHA1(86cae0d159583c1d572a5754f3bb6b4a2e479359), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_5.bin", 0xD000, 0x0400, CRC(bdeb395c) SHA1(32a50468f1ca772ee45a1f5c61c66f3ecc774074), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_6.bin", 0xD400, 0x0400, CRC(850a4000) SHA1(720f0bb3e45877835219b7e1d943ef4f19b9977d), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_7.bin", 0xD800, 0x0400, CRC(586c7670) SHA1(13e2e96b9f1a53555ce0d55f657cf3c6b96f10a0), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_8.bin", 0xDC00, 0x0400, CRC(33281300) SHA1(ce631fa8157a3f8869c5fefe24b7f40e06696df9), ROM_BIOS(1) )
|
||||
ROMX_LOAD( "SMT_Goupil_G1_Basic_9.bin", 0xE000, 0x0400, CRC(a3911201) SHA1(8623a0a2d83eb3a27a795030643c5c05a4350a9f), ROM_BIOS(1) )
|
||||
|
||||
ROM_REGION( 0x400, "ef9364", 0 )
|
||||
ROM_LOAD( "SMT_Goupil_G1_Charset.bin", 0x0000, 0x0400, CRC(8b6da54b) SHA1(ac2204600f45c6dd0df1e759b62ed25928f02a12) )
|
||||
ROM_END
|
||||
|
||||
/* ROM definition */
|
||||
ROM_START( goupilg2 )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||
ROM_DEFAULT_BIOS("v1_4")
|
||||
|
||||
ROM_SYSTEM_BIOS(0, "v1_4", "Version 1.4")
|
||||
ROMX_LOAD( "SMT_Goupil_G2_MON_1.bin", 0xF000, 0x0800, CRC(91A4F256) SHA1(ECE3B47A17E47FC87E2262BE806CE8015F5F5DB6), ROM_BIOS(1) )
|
||||
ROM_LOAD ( "SMT_Goupil_G2_MON_2.bin", 0xF800, 0x0800, CRC(F7783A32) SHA1(7368FC0BD86B48E6727367BD7D1922F219741015) )
|
||||
|
||||
ROM_LOAD( "SMT_Goupil_G2_MOD_1.bin", 0xC000, 0x0400, CRC(4D585E40) SHA1(7558F89DB52299C4C305755259D5C908B3F66AC7) )
|
||||
ROM_LOAD( "SMT_Goupil_G2_MOD_2.bin", 0xC400, 0x0400, CRC(C5531667) SHA1(24B0A1D3B812B95E68F4DC4323581B1FD14EB4FB) )
|
||||
|
||||
ROM_REGION( 0x400, "ef9364", 0 )
|
||||
ROM_LOAD( "SMT_Goupil_G2_Charset.bin", 0x0000, 0x0400, CRC(D3930877) SHA1(7B790FB18F8893CFC753BF622C8B795075741D22) )
|
||||
|
||||
ROM_REGION( 0x800, "visu_24x80", 0 )
|
||||
ROM_LOAD( "SMT_Goupil_G2_Charset_24x80.bin", 0x0000, 0x0800, CRC(F0F83B99) SHA1(75A7730AEC30280EE4CCF3DCAF587EEA4F861196) )
|
||||
|
||||
ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
|
||||
COMP( 1979, goupilg1, 0, 0, goupil_g1, goupil_g1, goupil_g1_state, 0, "SMT", "Goupil G1", MACHINE_IS_SKELETON )
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1979, goupilg1, 0, 0, goupil_g1, goupil_g1,goupil_g1_state, 0, "SMT", "Goupil G1", MACHINE_NO_SOUND )
|
||||
COMP( 1981, goupilg2, 0, 0, goupil_g2, goupil_g1,goupil_g2_state, 0, "SMT", "Goupil G2", MACHINE_NO_SOUND )
|
||||
|
||||
@ -13976,6 +13976,7 @@ thehand // (c) 1981 T.I.C.
|
||||
|
||||
@source:goupil.cpp
|
||||
goupilg1 //
|
||||
goupilg2 //
|
||||
|
||||
@source:gp_1.cpp
|
||||
blvelvet //
|
||||
|
||||
Loading…
Reference in New Issue
Block a user