Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-23 00:39:36 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

m6805: Allow vectors to be placed at an internal boundary other than the end of the address space (nw)

Browse Source 
geniusjr.cpp: Minor note and formatting fix (nw)
This commit is contained in:
AJR 2019-07-12 20:30:13 -04:00
parent a852d9a9c3
commit d2874f25b7
6 changed files with 35 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/devices/cpu/m6805/6805ops.hxx
View File

@ -502,7 +502,7 @@ OP_HANDLER( swi )
pushbyte(m_a);
pushbyte(m_cc);
SEI;
rm16(m_params.m_swi_vector, m_pc);
rm16(m_params.m_swi_vector & m_params.m_vector_mask, m_pc);
}
// $84 ILLEGAL

4
src/devices/cpu/m6805/m6805.cpp
View File

@ -307,7 +307,7 @@ void m6805_base_device::device_reset()
/* IRQ disabled */
SEI;
rm16(0xfffe, m_pc);
rm16(0xfffe & m_params.m_vector_mask, m_pc);
}
@ -356,7 +356,7 @@ bool m6805_base_device::test_il()
void m6805_base_device::interrupt_vector()
{
rm16(0xfffa, m_pc);
rm16(0xfffa & m_params.m_vector_mask, m_pc);
}
/* Generate interrupts */

20
src/devices/cpu/m6805/m6805.h
View File

@ -65,6 +65,25 @@ protected:
, m_addr_width(addr_width)
, m_sp_mask(sp_mask)
, m_sp_floor(sp_floor)
, m_vector_mask((1U << addr_width) - 1)
, m_swi_vector(swi_vector)
{
}
configuration_params(
op_handler_table &ops,
cycle_count_table &cycles,
u32 addr_width,
u32 sp_mask,
u32 sp_floor,
u16 vector_mask,
u16 swi_vector)
: m_ops(ops)
, m_cycles(cycles)
, m_addr_width(addr_width)
, m_sp_mask(sp_mask)
, m_sp_floor(sp_floor)
, m_vector_mask(vector_mask)
, m_swi_vector(swi_vector)
{
}
@ -74,6 +93,7 @@ protected:
u32 m_addr_width;
u32 m_sp_mask;
u32 m_sp_floor;
u16 m_vector_mask;
u16 m_swi_vector;
};

13
src/devices/cpu/m6805/m68hc05.cpp
View File

@ -109,6 +109,7 @@ m68hc05_device::m68hc05_device(
u32 clock,
device_type type,
u32 addr_width,
u16 vector_mask,
address_map_constructor internal_map)
: m6805_base_device(
mconfig,
@ -116,7 +117,7 @@ m68hc05_device::m68hc05_device(
owner,
clock,
type,
{ s_hc_ops, s_hc_cycles, addr_width, 0x00ff, 0x00c0, M68HC05_VECTOR_SWI },
{ s_hc_ops, s_hc_cycles, addr_width, 0x00ff, 0x00c0, vector_mask, M68HC05_VECTOR_SWI },
internal_map)
, m_port_cb_r{ *this, *this, *this, *this }
, m_port_cb_w{ *this, *this, *this, *this }
@ -567,12 +568,12 @@ void m68hc05_device::interrupt()
LOGINT("servicing external interrupt\n");
m_irq_latch = 0;
m_pending_interrupts &= ~M68HC05_INT_IRQ;
rm16(M68HC05_VECTOR_IRQ, m_pc);
rm16(M68HC05_VECTOR_IRQ & m_params.m_vector_mask, m_pc);
}
else if (m_pending_interrupts & M68HC05_INT_TIMER)
{
LOGINT("servicing timer interrupt\n");
rm16(M68HC05_VECTOR_TIMER, m_pc);
rm16(M68HC05_VECTOR_TIMER & m_params.m_vector_mask, m_pc);
}
else
{
@ -712,7 +713,7 @@ m68hc705_device::m68hc705_device(
device_type type,
u32 addr_width,
address_map_constructor internal_map)
: m68hc05_device(mconfig, tag, owner, clock, type, addr_width, internal_map)
: m68hc05_device(mconfig, tag, owner, clock, type, addr_width, (1U << addr_width) - 1, internal_map)
{
}
@ -762,6 +763,7 @@ m68hc05c4_device::m68hc05c4_device(machine_config const &mconfig, char const *ta
clock,
M68HC05C4,
13,
0x1fff,
address_map_constructor(FUNC(m68hc05c4_device::c4_map), this))
{
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0xbf }});
@ -828,6 +830,7 @@ m68hc05c8_device::m68hc05c8_device(machine_config const &mconfig, char const *ta
clock,
M68HC05C8,
13,
0x1fff,
address_map_constructor(FUNC(m68hc05c8_device::c8_map), this))
{
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0xbf }});
@ -989,6 +992,7 @@ m68hc05l9_device::m68hc05l9_device(machine_config const &mconfig, char const *ta
clock,
M68HC05L9,
16,
0x1fff,
address_map_constructor(FUNC(m68hc05l9_device::l9_map), this))
{
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0x1f }});
@ -1071,6 +1075,7 @@ m68hc05l11_device::m68hc05l11_device(machine_config const &mconfig, char const *
clock,
M68HC05L11,
16, // FIXME: 16 logical mapped to 23 physical
0x7fff,
address_map_constructor(FUNC(m68hc05l11_device::l11_map), this))
{
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0xff, 0xff, 0xff }});

1
src/devices/cpu/m6805/m68hc05.h
View File

@ -80,6 +80,7 @@ protected:
u32 clock,
device_type type,
u32 addr_width,
u16 vector_mask,
address_map_constructor internal_map);
void set_port_bits(std::array<u8, PORT_COUNT> const &bits);

4
src/mame/drivers/geniusjr.cpp
View File

@ -237,7 +237,7 @@ void geniusjr_state::gj5000(machine_config &config)
void geniusjr_state::gjrstar(machine_config &config)
{
M68HC05L9(config, m_maincpu, 8'000'000); // unknown clock (type also uncertain)
M68HC05L9(config, m_maincpu, 8'000'000); // unknown clock (type also uncertain, could be L7 instead of L9)
m_maincpu->set_addrmap(AS_PROGRAM, &geniusjr_state::gjrstar_map);
m_bank_size = 0x2000;
@ -315,4 +315,4 @@ COMP( 1996, gjrstar, 0, 0, gjrstar, geniusjr, geniusjr_state, empty
COMP( 1996, gjrstar2, gjrstar, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar 2 (Germany)", MACHINE_IS_SKELETON )
COMP( 1998, gjrstar3, 0, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior Redstar 3 (Germany)", MACHINE_IS_SKELETON )
COMP( 1998, gj5000, 0, 0, gj5000, geniusjr, geniusjr_state, empty_init, "VTech", "Genius Junior 5000 (Germany)", MACHINE_IS_SKELETON )
COMP( 199?, pitagjr, 0, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Pitagorin Junior", MACHINE_IS_SKELETON )
COMP( 199?, pitagjr, 0, 0, gjrstar, geniusjr, geniusjr_state, empty_init, "VTech", "Pitagorin Junior", MACHINE_IS_SKELETON )