diff --git a/src/emu/bus/isa/dectalk.c b/src/emu/bus/isa/dectalk.c index 34e02695bb7..d4df9b4e212 100644 --- a/src/emu/bus/isa/dectalk.c +++ b/src/emu/bus/isa/dectalk.c @@ -39,11 +39,13 @@ READ16_MEMBER(dectalk_isa_device::host_irq_r) READ8_MEMBER(dectalk_isa_device::dma_r) { + m_cpu->drq1_w(0); return m_dma; } WRITE8_MEMBER(dectalk_isa_device::dma_w) { + m_cpu->drq1_w(0); m_dma = data; } @@ -71,6 +73,7 @@ WRITE16_MEMBER(dectalk_isa_device::output_ctl_w) READ16_MEMBER(dectalk_isa_device::dsp_dma_r) { m_bio = ASSERT_LINE; + m_cpu->drq1_w(0); return m_dsp_dma; } diff --git a/src/emu/cpu/i86/i186.c b/src/emu/cpu/i86/i186.c index a3162964732..6b980653445 100644 --- a/src/emu/cpu/i86/i186.c +++ b/src/emu/cpu/i86/i186.c @@ -10,9 +10,7 @@ #define LOG_INTERRUPTS 0 #define LOG_INTERRUPTS_EXT 0 #define LOG_TIMER 0 -#define LOG_OPTIMIZATION 0 #define LOG_DMA 0 -#define CPU_RESUME_TRIGGER 7123 /* external int priority masks */ @@ -608,8 +606,6 @@ void i80186_cpu_device::device_start() m_timer[0].time_timer = timer_alloc(TIMER_TIME0); m_timer[1].time_timer = timer_alloc(TIMER_TIME1); m_timer[2].time_timer = timer_alloc(TIMER_TIME2); - m_dma[0].finish_timer = timer_alloc(TIMER_DMA0); - m_dma[1].finish_timer = timer_alloc(TIMER_DMA1); m_out_tmrout0_func.resolve_safe(); m_out_tmrout1_func.resolve_safe(); @@ -637,8 +633,6 @@ void i80186_cpu_device::device_reset() m_intr.status = 0x0000; m_intr.poll_status = 0x0000; m_reloc = 0x20ff; - m_dma[0].drq_delay = false; - m_dma[1].drq_delay = false; m_dma[0].drq_state = false; m_dma[1].drq_state = false; for(int i = 0; i < ARRAY_LENGTH(m_timer); ++i) @@ -647,6 +641,7 @@ void i80186_cpu_device::device_reset() m_timer[i].time_timer_active = 0; m_timer[i].maxA = 0; m_timer[i].maxB = 0; + m_timer[i].count = 0; } } @@ -826,6 +821,7 @@ void i80186_cpu_device::update_interrupt_state() /* check external interrupts */ for (IntNo = 0; IntNo < 4; IntNo++) + { if ((m_intr.ext[IntNo] & 0x0F) == Priority) { if (LOG_INTERRUPTS) @@ -838,6 +834,12 @@ void i80186_cpu_device::update_interrupt_state() /* if there's something pending, generate an interrupt */ if (m_intr.request & (0x10 << IntNo)) { + if((IntNo >= 2) && (m_intr.ext[IntNo - 2] & EXTINT_CTRL_CASCADE)) + { + logerror("i186: %06x: irq %d use when set for cascade mode\n", pc(), IntNo); + m_intr.request &= ~(0x10 << IntNo); + continue; + } /* otherwise, generate an interrupt for this request */ new_vector = 0x0c + IntNo; @@ -845,7 +847,10 @@ void i80186_cpu_device::update_interrupt_state() m_intr.ack_mask = 0x0010 << IntNo; goto generate_int; } + else if ((m_intr.in_service & (0x10 << IntNo)) && (m_intr.ext[IntNo] & EXTINT_CTRL_SFNM)) + return; // if an irq is in service and sfnm is enabled, stop here } + } } return; @@ -855,8 +860,6 @@ generate_int: if (!m_intr.pending) set_input_line(0, ASSERT_LINE); m_intr.pending = 1; - machine().scheduler().trigger(CPU_RESUME_TRIGGER); - if (LOG_OPTIMIZATION) logerror(" - trigger due to interrupt pending\n"); if (LOG_INTERRUPTS) logerror("(%f) **** Requesting interrupt vector %02X\n", machine().time().as_double(), new_vector); } @@ -920,6 +923,7 @@ void i80186_cpu_device::handle_eoi(int data) } } } + update_interrupt_state(); } /* Trigger an external interrupt, optionally supplying the vector to take */ @@ -928,10 +932,13 @@ void i80186_cpu_device::external_int(UINT16 intno, int state, UINT8 vector) if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X, vector %02X\n",intno,vector); if(!state) - return; + { + m_intr.request &= ~(0x010 << intno); + m_intr.ack_mask &= ~(0x0010 << intno); + } + else // Turn on the requested request bit and handle interrupt + m_intr.request |= (0x010 << intno); - // Turn on the requested request bit and handle interrupt - m_intr.request |= (0x010 << intno); update_interrupt_state(); } @@ -1015,17 +1022,6 @@ void i80186_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p t->int_timer->adjust(attotime::never, which); break; } - case TIMER_DMA0: - case TIMER_DMA1: - { - int which = param; - struct dma_state *d = &m_dma[which]; - - d->drq_delay = false; - if(d->drq_state) - drq_callback(which); - break; - } case TIMER_TIME0: case TIMER_TIME1: case TIMER_TIME2: @@ -1227,9 +1223,6 @@ void i80186_cpu_device::drq_callback(int which) UINT8 dma_byte; UINT8 incdec_size; - if(dma->drq_delay) - return; - if (LOG_DMA>1) logerror("Control=%04X, src=%05X, dest=%05X, count=%04X\n",dma->control,dma->source,dma->dest,dma->count); @@ -1282,7 +1275,7 @@ void i80186_cpu_device::drq_callback(int which) dma->count -= 1; // Terminate if count is zero, and terminate flag set - if((dma->control & TERMINATE_ON_ZERO) && (dma->count==0)) + if(((dma->control & TERMINATE_ON_ZERO) || !(dma->control & SYNC_MASK)) && (dma->count==0)) { dma->control &= ~ST_STOP; if (LOG_DMA) logerror("DMA terminated\n"); @@ -1295,9 +1288,6 @@ void i80186_cpu_device::drq_callback(int which) m_intr.request |= 0x04 << which; update_interrupt_state(); } - -// dma->finish_timer->adjust(attotime::from_hz(clock()/8), 0); -// dma->drq_delay = true; } READ16_MEMBER(i80186_cpu_device::internal_port_r) diff --git a/src/emu/cpu/i86/i186.h b/src/emu/cpu/i86/i186.h index 33a32efdf4d..22f96db990b 100644 --- a/src/emu/cpu/i86/i186.h +++ b/src/emu/cpu/i86/i186.h @@ -88,7 +88,6 @@ private: struct dma_state { - bool drq_delay; bool drq_state; UINT32 source; UINT32 dest; @@ -117,8 +116,6 @@ private: static const device_timer_id TIMER_TIME0 = 3; static const device_timer_id TIMER_TIME1 = 4; static const device_timer_id TIMER_TIME2 = 5; - static const device_timer_id TIMER_DMA0 = 6; - static const device_timer_id TIMER_DMA1 = 7; struct timer_state m_timer[3]; struct dma_state m_dma[2]; diff --git a/src/mess/drivers/rmnimbus.c b/src/mess/drivers/rmnimbus.c index e17dab43bd2..dae1c0c2b51 100644 --- a/src/mess/drivers/rmnimbus.c +++ b/src/mess/drivers/rmnimbus.c @@ -120,8 +120,7 @@ static MACHINE_CONFIG_START( nimbus, rmnimbus_state ) //MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE) MCFG_SCREEN_PALETTE("palette") - MCFG_PALETTE_ADD("palette", SCREEN_NO_COLOURS) - MCFG_PALETTE_INIT_OWNER(rmnimbus_state, rmnimbus) + MCFG_PALETTE_ADD("palette", 16) /* Backing storage */ MCFG_WD2793x_ADD(FDC_TAG, 1000000) diff --git a/src/mess/includes/rmnimbus.h b/src/mess/includes/rmnimbus.h index 78425f97f34..60f87bf888f 100644 --- a/src/mess/includes/rmnimbus.h +++ b/src/mess/includes/rmnimbus.h @@ -20,13 +20,6 @@ #define MAINCPU_TAG "maincpu" #define IOCPU_TAG "iocpu" -#define SCREEN_WIDTH_PIXELS 640 -#define SCREEN_HEIGHT_LINES 250 -#define SCREEN_NO_COLOURS 16 - -#define NO_VIDREGS (0x30/2) - - /* Nimbus specific */ /* External int vectors for chained interupts */ @@ -191,10 +184,8 @@ public: UINT8 m_last_playmode; UINT8 m_ay8910_a; UINT8 m_sio_int_state; - UINT16 m_vidregs[NO_VIDREGS]; - UINT8 m_bpp; - UINT16 m_pixel_mask; - UINT8 m_hs_count; + UINT16 m_vidregs[24]; + UINT16 m_x, m_y; UINT32 m_debug_video; UINT8 m_vector; UINT8 m_eeprom_bits; @@ -202,8 +193,6 @@ public: DECLARE_READ8_MEMBER(nimbus_mcu_r); DECLARE_WRITE8_MEMBER(nimbus_mcu_w); - DECLARE_READ16_MEMBER(nimbus_io_r); - DECLARE_WRITE16_MEMBER(nimbus_io_w); DECLARE_READ8_MEMBER(scsi_r); DECLARE_WRITE8_MEMBER(scsi_w); DECLARE_WRITE8_MEMBER(fdc_ctl_w); @@ -225,7 +214,6 @@ public: virtual void machine_reset(); virtual void video_start(); virtual void video_reset(); - DECLARE_PALETTE_INIT(rmnimbus); UINT32 screen_update_nimbus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); DECLARE_WRITE_LINE_MEMBER(sio_interrupt); DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_intrq_w); @@ -241,15 +229,17 @@ public: DECLARE_WRITE_LINE_MEMBER(write_scsi_iena); UINT8 get_pixel(UINT16 x, UINT16 y); - UINT16 read_pixel_line(UINT16 x, UINT16 y, UINT8 width); + UINT16 read_pixel_line(UINT16 x, UINT16 y, UINT8 pixels, UINT8 bpp); UINT16 read_pixel_data(UINT16 x, UINT16 y); void set_pixel(UINT16 x, UINT16 y, UINT8 colour); void set_pixel40(UINT16 x, UINT16 y, UINT8 colour); - void write_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width); - void move_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width); + void write_pixel_line(UINT16 x, UINT16 y, UINT16, UINT8 pixels, UINT8 bpp); + void move_pixel_line(UINT16 x, UINT16 y, UINT8 width); void write_pixel_data(UINT16 x, UINT16 y, UINT16 data); void write_reg_004(); void write_reg_006(); + void write_reg_00A(); + void write_reg_00E(); void write_reg_010(); void write_reg_012(); void write_reg_014(); @@ -258,7 +248,7 @@ public: void write_reg_01C(); void write_reg_01E(); void write_reg_026(); - void change_palette(UINT8 bank, UINT16 colours, UINT8 regno); + void change_palette(UINT8 bank, UINT16 colours); void external_int(UINT16 intno, UINT8 vector); DECLARE_READ8_MEMBER(cascade_callback); void *get_dssi_ptr(address_space &space, UINT16 ds, UINT16 si); @@ -271,7 +261,7 @@ public: void hdc_post_rw(); void hdc_drq(); void pc8031_reset(); - void ipc_dumpregs(); + //void ipc_dumpregs(); void iou_reset(); void rmni_sound_reset(); void mouse_js_reset(); diff --git a/src/mess/machine/rmnimbus.c b/src/mess/machine/rmnimbus.c index 932a0bf3282..b731a5195c1 100644 --- a/src/mess/machine/rmnimbus.c +++ b/src/mess/machine/rmnimbus.c @@ -1026,8 +1026,7 @@ WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_drq_w) if(LOG_DISK) logerror("nimbus_drives_drq_w(%d)\n", state); - if(state && FDC_DRQ_ENABLED()) - m_maincpu->drq1_w(state); + m_maincpu->drq1_w(state && FDC_DRQ_ENABLED()); } UINT8 rmnimbus_state::fdc_driveno(UINT8 drivesel) diff --git a/src/mess/video/rmnimbus.c b/src/mess/video/rmnimbus.c index 6527ee346ec..872ed7a34d3 100644 --- a/src/mess/video/rmnimbus.c +++ b/src/mess/video/rmnimbus.c @@ -28,8 +28,6 @@ #define WIDTH_MASK 0x07 -#define XOR_MASK 0x08 -#define MASK_4080 0x10 // Offsets of nimbus video registers within register array @@ -60,9 +58,11 @@ #define FG_COLOUR (m_vidregs[reg024]&0x0F) #define BG_COLOUR ((m_vidregs[reg024]&0xF0)>>4) +#define SELECT_COL(x,c) (IS_80COL ? ((((x) & 1) ? ((c) << 2) : (c)) & 0xC) : (c)) +#define FILL_WORD(c) (((c) << 12) | ((c) << 8) | ((c) << 4) | (c)) -#define IS_80COL (m_vidregs[reg026]&MASK_4080) -#define IS_XOR (m_vidregs[reg022]&XOR_MASK) +#define IS_80COL (m_vidregs[reg026]&0x10) +#define IS_XOR (m_vidregs[reg022]&8) #define DEBUG_TEXT 0x01 #define DEBUG_DB 0x02 @@ -71,7 +71,6 @@ #define DEBUG_SET(flags) ((m_debug_video & (flags))==(flags)) static void video_debug(running_machine &machine, int ref, int params, const char *param[]); -static void video_regdump(running_machine &machine, int ref, int params, const char *param[]); /* I'm not sure which of thes return values on a real machine, so for the time being I'm going @@ -85,7 +84,7 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r) switch (offset) { - case reg000 : result=m_vidregs[reg000]; break; + case reg000 : result=read_pixel_data(m_vidregs[reg002],m_vidregs[reg00C]); break; case reg002 : result=m_vidregs[reg002]; break; case reg004 : result=read_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C]); break; case reg006 : result=m_vidregs[reg006]; break; @@ -94,12 +93,12 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r) case reg00C : result=m_vidregs[reg00C]; break; case reg00E : result=m_vidregs[reg00E]; break; - case reg010 : result=m_vidregs[reg010]; break; + case reg010 : result=read_pixel_data(m_vidregs[reg002],m_vidregs[reg00C]); break; case reg012 : result=m_vidregs[reg012]; break; case reg014 : result=m_vidregs[reg014]; break; case reg016 : result=m_vidregs[reg016]; break; case reg018 : result=m_vidregs[reg018]; break; - case reg01A : result=m_vidregs[reg01A]; break; + case reg01A : result=read_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C]); break; case reg01C : result=m_vidregs[reg01C]; break; case reg01E : result=m_vidregs[reg01E]; break; @@ -108,8 +107,8 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r) case reg024 : result=m_vidregs[reg024]; break; case reg026 : result=m_vidregs[reg026]; break; case reg028 : result=m_screen->vpos() % 0xb; break; //result=m_vidregs[reg028]; break; - case reg02A : result=m_vidregs[reg02A]; break; - case reg02C : result=m_vidregs[reg02C]; break; + case reg02A : result=m_vidregs[reg002]; break; + case reg02C : result=m_vidregs[reg00C]; break; case reg02E : result=m_vidregs[reg02E]; break; default : result=0; break; } @@ -124,10 +123,10 @@ UINT8 rmnimbus_state::get_pixel(UINT16 x, UINT16 y) { UINT8 result = 0; - if((x> 2; else result=m_video_mem.pix16(y, x*2); } @@ -135,34 +134,25 @@ UINT8 rmnimbus_state::get_pixel(UINT16 x, UINT16 y) return result; } -UINT16 rmnimbus_state::read_pixel_line(UINT16 x, UINT16 y, UINT8 width) +UINT16 rmnimbus_state::read_pixel_line(UINT16 x, UINT16 y, UINT8 pixels, UINT8 bpp) { - UINT16 result = 0; - UINT16 mask; - UINT16 pixel_x; - UINT16 colour; - UINT8 shifts; + UINT16 colour = 0; + int i; + x *= pixels; if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL)) - logerror("read_pixel_line(x=%04X, y=%04X, width=%02X, bpp=%02X, pixel_mask=%02X)\n",x,y,width,m_bpp,m_pixel_mask); + logerror("read_pixel_line(x=%d, y=%d, width=%d, bpp=%d)\n",x,y,pixels,bpp); - shifts=width-m_bpp; - - for(mask=m_pixel_mask, pixel_x=(x*(width/m_bpp)); mask>0; mask=(mask>>m_bpp), pixel_x++) + for(i = 0; i < pixels - 1; i++) { - colour=get_pixel(pixel_x,y); + colour |= get_pixel(i + x, y); - if(m_bpp==1) - colour=((colour==FG_COLOUR) ? 1 : 0) << shifts; + if(bpp==1) + colour=((colour==SELECT_COL(x + i, FG_COLOUR)) ? 1 : 0) << 1; else - colour=colour << shifts; - - result=(result & ~mask) | colour; - - shifts-=m_bpp; + colour <<= bpp; } - - return result; + return colour | get_pixel(x + i, y); } UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y) @@ -170,7 +160,7 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y) UINT16 result=0; if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL)) - logerror("read_pixel_data(x=%04X, y=%04X), reg022=%04X\n",x,y,m_vidregs[reg022]); + logerror("read_pixel_data(x=%d, y=%d), reg022=%04X\n",x,y,m_vidregs[reg022]); if(IS_80COL) { @@ -184,15 +174,15 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y) case 0x03 : break; - case 0x04 : m_bpp=2; m_pixel_mask=0xC0; - result=read_pixel_line(x,y,8); - break; + case 0x04 : + result=read_pixel_line(x,y,4,2); + break; case 0x05 : break; - case 0x06 : m_bpp=2; m_pixel_mask=0xC000; - result=read_pixel_line(x,y,16); - break; + case 0x06 : + result=read_pixel_line(x,y,8,2); + break; case 0x07 : break; } @@ -213,9 +203,9 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y) case 0x05 : break; - case 0x06 : m_bpp=4; m_pixel_mask=0xF000; - result=read_pixel_line(x,y,16); - break; + case 0x06 : + result=read_pixel_line(x,y,4,4); + break; case 0x07 : break; } @@ -254,9 +244,9 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w) case reg004 : m_vidregs[reg004]=data; write_reg_004(); break; case reg006 : m_vidregs[reg006]=data; write_reg_006(); break; case reg008 : m_vidregs[reg008]=data; break; - case reg00A : m_vidregs[reg00A]=data; break; + case reg00A : m_vidregs[reg00A]=data; write_reg_00A(); break; case reg00C : m_vidregs[reg00C]=data; break; - case reg00E : m_vidregs[reg00E]=data; break; + case reg00E : m_vidregs[reg00E]=data; write_reg_00E(); break; case reg010 : m_vidregs[reg010]=data; write_reg_010(); break; case reg012 : m_vidregs[reg012]=data; write_reg_012(); break; @@ -271,10 +261,10 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w) case reg022 : m_vidregs[reg022]=data; break; case reg024 : m_vidregs[reg024]=data; break; case reg026 : m_vidregs[reg026]=data; write_reg_026(); break; - case reg028 : change_palette(0,data,reg028); break; - case reg02A : change_palette(1,data,reg02A); break; - case reg02C : change_palette(2,data,reg02C); break; - case reg02E : change_palette(3,data,reg02E); break; + case reg028 : change_palette(0,data); break; + case reg02A : change_palette(1,data); break; + case reg02C : change_palette(2,data); break; + case reg02E : change_palette(3,data); break; default : break; } @@ -283,12 +273,9 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w) void rmnimbus_state::set_pixel(UINT16 x, UINT16 y, UINT8 colour) { if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL)) - logerror("set_pixel(x=%04X, y=%04X, colour=%04X), IS_XOR=%02X\n",x,y,colour,IS_XOR); + logerror("set_pixel(x=%d, y=%d, colour=%04X), IS_XOR=%02X\n",x,y,colour,IS_XOR); - if(IS_80COL) - colour&=0x03; - - if((x0; mask=(mask>>m_bpp), pixel_x++) + for(int i = (pixels - 1); i >= 0; i--) { - if(m_bpp==1) - colour=(data & mask) ? FG_COLOUR : BG_COLOUR; + if(bpp==1) + colour = SELECT_COL(x + i, (data & 1) ? FG_COLOUR : BG_COLOUR); + else if(IS_80COL) + colour = (data & mask) << 2; else - colour=(data & mask) >> shifts; - - //logerror("write_pixel_line: data=%04X, mask=%04X, shifts=%02X, bpp=%02X colour=%02X\n",data,mask,shifts,m_bpp,colour); + colour = (data & mask); if(IS_80COL) - set_pixel(pixel_x,y,colour); + set_pixel(x + i,y,colour); else - set_pixel40(pixel_x,y,colour); + set_pixel40(x + i,y,colour); - shifts-=m_bpp; + data >>= bpp; } } -void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width) +void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT8 pixels) { - UINT16 pixelno; - UINT16 pixelx; - + x *= pixels; if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL)) - logerror("move_pixel_line(x=%04X, y=%04X, data=%04X, width=%02X)\n",x,y,data,width); + logerror("move_pixel_line(x=%d, y=%d, width=%d)\n",x,y,pixels); - for(pixelno=0;pixelno>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,8)),8); - break; + case 0x04: + write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,4,2)),4,2); + break; - case 0x05 : move_pixel_line(x,y,data,16); - break; + case 0x05: + move_pixel_line(x,y,16); + break; - case 0x06 : m_bpp=2; m_pixel_mask=0xC000; - write_pixel_line(x,y,data,16); - break; + case 0x06: + write_pixel_line(x,y,data,8,2); + break; - case 0x07 : m_bpp=1; - set_pixel(x,y,FG_COLOUR); - break; + case 0x07: + set_pixel(x,y,SELECT_COL(x, FG_COLOUR)); + break; } } else /* 40 Col */ { switch (m_vidregs[reg022] & WIDTH_MASK) { - case 0x00 : m_bpp=1; m_pixel_mask=0x0080; - write_pixel_line(x,y,data,8); - break; + case 0x00: + write_pixel_line(x,y,data,8,1); + break; - case 0x01 : m_bpp=2; m_pixel_mask=0xC0; - write_pixel_line(x,y,data,8); - break; + case 0x01: + write_pixel_line(x,y,data,4,2); + break; - case 0x02 : m_bpp=1; m_pixel_mask=0x0080; - set_pixel40(x,y,FG_COLOUR); - break; + case 0x02: + set_pixel40(x,y,FG_COLOUR); + break; - case 0x03 : m_bpp=1; - set_pixel(x,y,FG_COLOUR); - break; + case 0x03: + set_pixel(x,y,FG_COLOUR); + break; - case 0x04 : m_bpp=4; m_pixel_mask=0xF0; - write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,8)),8); - break; + case 0x04: + write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,2,4)),2,4); + break; - case 0x05 : move_pixel_line(x,y,data,16); - break; + case 0x05: + move_pixel_line(x,y,16); + break; - case 0x06 : m_bpp=4; m_pixel_mask=0xF000; - write_pixel_line(x,y,data,16); - break; + case 0x06: + write_pixel_line(x,y,data,4,4); + break; - case 0x07 : m_bpp=1; - set_pixel(x,y,FG_COLOUR); - break; + case 0x07: + set_pixel(x,y,FG_COLOUR); + break; } } } void rmnimbus_state::write_reg_004() { - m_vidregs[reg002]=0; + //m_vidregs[reg002]=0; m_vidregs[reg00C]++; } @@ -468,6 +451,17 @@ void rmnimbus_state::write_reg_006() m_vidregs[reg002]=m_vidregs[reg006]; } +void rmnimbus_state::write_reg_00A() +{ + m_vidregs[reg002]++; +} + +void rmnimbus_state::write_reg_00E() +{ + m_vidregs[reg002]++; + m_vidregs[reg00C]=m_vidregs[reg00E]; +} + void rmnimbus_state::write_reg_010() { write_pixel_data(m_vidregs[reg002],m_vidregs[reg00C],m_vidregs[reg010]); @@ -480,7 +474,7 @@ void rmnimbus_state::write_reg_012() // work correctly. m_vidregs[reg002]=m_vidregs[reg012]; - write_pixel_data(m_vidregs[reg012],m_vidregs[reg00C],FG_COLOUR); + write_pixel_data(m_vidregs[reg012],m_vidregs[reg00C],FILL_WORD(FG_COLOUR)); } void rmnimbus_state::write_reg_014() @@ -492,7 +486,7 @@ void rmnimbus_state::write_reg_016() { m_vidregs[reg002]=m_vidregs[reg016]; - write_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C],FG_COLOUR); + write_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C],FILL_WORD(FG_COLOUR)); } @@ -508,14 +502,14 @@ void rmnimbus_state::write_reg_01C() // and others using the standard RM box menus) work correctly. m_vidregs[reg00C]=m_vidregs[reg01C]; - write_pixel_data(m_vidregs[reg002],m_vidregs[reg01C],FG_COLOUR); + write_pixel_data(m_vidregs[reg002],m_vidregs[reg01C],FILL_WORD(FG_COLOUR)); } void rmnimbus_state::write_reg_01E() { m_vidregs[reg00C]=m_vidregs[reg01E]; - write_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C],FG_COLOUR); + write_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C],FILL_WORD(FG_COLOUR)); } /* @@ -529,38 +523,17 @@ void rmnimbus_state::write_reg_026() logerror("reg 026 write, border_colour=%02X\n",m_vidregs[reg026] & 0x0F); } -void rmnimbus_state::change_palette(UINT8 bank, UINT16 colours, UINT8 regno) +void rmnimbus_state::change_palette(UINT8 bank, UINT16 colours) { - UINT8 colourno; - UINT16 mask; - UINT8 shifts; - UINT8 colourmax; - UINT8 first; - - // for the register's data has changed update it, and then update the pallette, else do nothing. - if(m_vidregs[regno]!=colours) - m_vidregs[regno]=colours; - else - return; - - // Setup parameters for pallette change - colourmax=IS_80COL ? 1 : 4; - first=IS_80COL ? bank : bank*4; - - shifts=0; - mask=0x000F; - // loop over changing colours - for(colourno=first; colourno<(first+colourmax); colourno++) + for(int colourno = (bank * 4); colourno < ((bank + 1) * 4); colourno++) { - int paletteidx=(colours & mask) >> shifts; - int i = (paletteidx & 8) >> 3; - m_palette->set_pen_color(colourno, pal2bit((paletteidx & 2) | i), pal2bit(((paletteidx & 4) >> 1) | i), pal2bit(((paletteidx & 1) << 1) | i)); + int i = (colours & 8) >> 3; + m_palette->set_pen_color(colourno, pal2bit((colours & 2) | i), pal2bit(((colours & 4) >> 1) | i), pal2bit(((colours & 1) << 1) | i)); if(DEBUG_SET(DEBUG_TEXT)) - logerror("set colourno[%02X], paletteidx=%02X\n",colourno, paletteidx); - mask=mask<<4; - shifts+=4; + logerror("set colourno[%02X], colour=%02X\n",colourno, colours); + colours >>= 4; } } @@ -578,31 +551,10 @@ static void video_debug(running_machine &machine, int ref, int params, const cha } } -static void video_regdump(running_machine &machine, int ref, int params, const char *param[]) -{ - rmnimbus_state *state = machine.driver_data(); - int regno; - - for(regno=0;regno<0x08;regno++) - { - debug_console_printf(machine,"reg%03X=%04X reg%03X=%04X reg%03X=%04X\n", - regno*2,state->m_vidregs[regno], - (regno+0x08)*2,state->m_vidregs[regno+0x08], - (regno+0x10)*2,state->m_vidregs[regno+0x10]); - - logerror("reg%03X=%04X reg%03X=%04X reg%03X=%04X\n", - regno*2,state->m_vidregs[regno], - (regno+0x08)*2,state->m_vidregs[regno+0x08], - (regno+0x10)*2,state->m_vidregs[regno+0x10]); - } -} - void rmnimbus_state::video_start() { m_debug_video=0; - logerror("video_start\n"); - m_screen->register_screen_bitmap(m_video_mem); save_item(NAME(m_vidregs)); @@ -610,18 +562,6 @@ void rmnimbus_state::video_start() if (machine().debug_flags & DEBUG_FLAG_ENABLED) { debug_console_register_command(machine(), "nimbus_vid_debug", CMDFLAG_NONE, 0, 0, 1, video_debug); - debug_console_register_command(machine(), "nimbus_vid_regdump", CMDFLAG_NONE, 0, 0, 1, video_regdump); - } -} - -PALETTE_INIT_MEMBER(rmnimbus_state, rmnimbus) -{ - int colourno; - - for ( colourno = 0; colourno < SCREEN_NO_COLOURS; colourno++ ) - { - int i = (colourno & 8) >> 3; - palette.set_pen_color(colourno, pal2bit((colourno & 2) | i), pal2bit(((colourno & 4) >> 1) | i), pal2bit(((colourno & 1) << 1) | i)); } } @@ -629,9 +569,6 @@ void rmnimbus_state::video_reset() { // When we reset clear the video registers and video memory. memset(&m_vidregs,0x00,sizeof(m_vidregs)); - - m_bpp=4; // bits per pixel - logerror("Video reset\n"); } UINT32 rmnimbus_state::screen_update_nimbus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)