tms9995: Changed method names for some input lines

This commit is contained in:
Michael Zapf 2016-03-31 01:25:06 +02:00
parent 93116a38c5
commit d2c4c2e347
8 changed files with 15 additions and 15 deletions

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@ -1352,7 +1352,7 @@ void tms9995_device::pulse_clock(int count)
/*
Enter the hold state.
*/
WRITE_LINE_MEMBER( tms9995_device::set_hold )
WRITE_LINE_MEMBER( tms9995_device::hold_line )
{
m_hold_requested = (state==ASSERT_LINE);
if (TRACE_WAITHOLD) logerror("set HOLD = %d\n", state);
@ -1366,7 +1366,7 @@ WRITE_LINE_MEMBER( tms9995_device::set_hold )
Signal READY to the CPU. When cleared, the CPU enters wait states. This
becomes effective on a clock pulse.
*/
WRITE_LINE_MEMBER( tms9995_device::set_ready )
WRITE_LINE_MEMBER( tms9995_device::ready_line )
{
if (m_reset && (m_ready_bufd != state)) logerror("Ignoring READY=%d change due to pending RESET\n", state);
else

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@ -54,12 +54,12 @@ public:
// READY input line. When asserted (high), the memory is ready for data exchange.
// We chose to use a direct method instead of a delegate to keep performance
// footprint low; this method may be called very frequently.
DECLARE_WRITE_LINE_MEMBER( set_ready );
DECLARE_WRITE_LINE_MEMBER( ready_line );
// HOLD input line. When asserted (low), the CPU is requested to release the
// data and address bus and enter the HOLD state. The entrance of this state
// is acknowledged by the HOLDA output line.
DECLARE_WRITE_LINE_MEMBER( set_hold );
DECLARE_WRITE_LINE_MEMBER( hold_line );
// RESET input line. Unlike the standard set_input_line, this input method
// is synchronous and will immediately lead to a reset of the CPU.

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@ -72,7 +72,7 @@ void cortex_state::machine_reset()
{
UINT8* ROM = memregion("maincpu")->base();
memcpy(m_p_ram, ROM, 0x6000);
m_maincpu->set_ready(ASSERT_LINE);
m_maincpu->ready_line(ASSERT_LINE);
}
static MACHINE_CONFIG_START( cortex, cortex_state )

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@ -89,7 +89,7 @@ void evmbug_state::machine_reset()
{
m_term_data = 0;
// Disable auto wait state generation by raising the READY line on reset
static_cast<tms9995_device*>(machine().device("maincpu"))->set_ready(ASSERT_LINE);
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(ASSERT_LINE);
}
static MACHINE_CONFIG_START( evmbug, evmbug_state )

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@ -584,14 +584,14 @@ WRITE_LINE_MEMBER( geneve_state::ext_ready )
{
if (TRACE_READY) logerror("geneve: READY level (ext) = %02x\n", state);
m_ready_line = state;
m_cpu->set_ready((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE);
m_cpu->ready_line((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE);
}
WRITE_LINE_MEMBER( geneve_state::mapper_ready )
{
if (TRACE_READY) logerror("geneve: READY level (mapper) = %02x\n", state);
m_ready_line1 = state;
m_cpu->set_ready((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE);
m_cpu->ready_line((m_ready_line == ASSERT_LINE && m_ready_line1 == ASSERT_LINE)? ASSERT_LINE : CLEAR_LINE);
}
/*
@ -672,8 +672,8 @@ void geneve_state::machine_reset()
m_keyint = CLEAR_LINE;
// No automatic wait state (auto wait state is enabled with READY=CLEAR at RESET)
m_cpu->set_ready(ASSERT_LINE);
m_cpu->set_hold(CLEAR_LINE);
m_cpu->ready_line(ASSERT_LINE);
m_cpu->hold_line(CLEAR_LINE);
m_ready_line = m_ready_line1 = ASSERT_LINE;

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@ -139,7 +139,7 @@ void ti99_2_state::machine_reset()
// Configure CPU to insert 1 wait state for each external memory access
// by lowering the READY line on reset
// TODO: Check with specs
static_cast<tms9995_device*>(machine().device("maincpu"))->set_ready(CLEAR_LINE);
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(CLEAR_LINE);
}
INTERRUPT_GEN_MEMBER(ti99_2_state::ti99_2_vblank_interrupt)

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@ -754,7 +754,7 @@ void ti99_8_state::console_ready_join(int id, int state)
}
m_nready_prev = m_nready_combined;
m_cpu->set_ready(m_nready_combined==0);
m_cpu->ready_line(m_nready_combined==0);
}
/*
@ -950,11 +950,11 @@ MACHINE_START_MEMBER(ti99_8_state,ti99_8)
MACHINE_RESET_MEMBER(ti99_8_state, ti99_8)
{
m_cpu->set_hold(CLEAR_LINE);
m_cpu->hold_line(CLEAR_LINE);
// Pulling down the line on RESET configures the CPU to insert one wait
// state on external memory accesses
m_cpu->set_ready(CLEAR_LINE);
m_cpu->ready_line(CLEAR_LINE);
// But we assert the line here so that the system starts running
m_nready_combined = 0;

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@ -261,7 +261,7 @@ void tutor_state::machine_reset()
m_centronics_busy = 0;
// Enable auto wait states by lowering READY during reset
m_maincpu->set_ready(CLEAR_LINE);
m_maincpu->ready_line(CLEAR_LINE);
}
/*