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https://github.com/holub/mame
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sh2: fix and enable memory system bypass for SH-1 & SH-2 DRC. [R. Belmont]
nw: The speedup is only really gaudy on CPS-3 where the SH-2 is a major percentage of the frame time (800% -> 1250% unthrottled). SKNS games that access spriteram a lot (cyvern) get a decent speedup as well. Saturn/ST-V and Cool Riders are dominated by the rendering in profiles and get around 10% improvement depending on the game.
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@ -934,7 +934,6 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
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UML_LABEL(block, label++); // label:
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#if 0 // DO NOT ENABLE - SEVERE AARON DAMAGE
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for (int ramnum = 0; ramnum < SH2_MAX_FASTRAM; ramnum++)
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{
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if (m_fastram[ramnum].base != NULL && (!iswrite || !m_fastram[ramnum].readonly))
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@ -956,12 +955,12 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
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{
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if (size == 1)
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{
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UML_XOR(block, I0, I0, BYTE4_XOR_LE(0));
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UML_XOR(block, I0, I0, BYTE4_XOR_BE(0));
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UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1); // load i0,fastbase,i0,byte
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}
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else if (size == 2)
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{
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UML_XOR(block, I0, I0, WORD_XOR_LE(0));
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UML_XOR(block, I0, I0, WORD_XOR_BE(0));
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UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1); // load i0,fastbase,i0,word_x1
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}
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else if (size == 4)
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@ -974,12 +973,12 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
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{
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if (size == 1)
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{
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UML_XOR(block, I0, I0, BYTE4_XOR_LE(0));
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UML_XOR(block, I0, I0, BYTE4_XOR_BE(0));
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UML_STORE(block, fastbase, I0, I1, SIZE_BYTE, SCALE_x1);// store fastbase,i0,i1,byte
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}
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else if (size == 2)
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{
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UML_XOR(block, I0, I0, WORD_XOR_LE(0));
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UML_XOR(block, I0, I0, WORD_XOR_BE(0));
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UML_STORE(block, fastbase, I0, I1, SIZE_WORD, SCALE_x1);// store fastbase,i0,i1,word_x1
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}
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else if (size == 4)
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@ -992,7 +991,6 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
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UML_LABEL(block, skip); // skip:
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}
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}
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#endif
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if (iswrite)
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{
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@ -801,6 +801,10 @@ void cps3_state::init_crypt(UINT32 key1, UINT32 key2, int altEncryption)
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// set strict verify
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m_maincpu->sh2drc_set_options(SH2DRC_STRICT_VERIFY);
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m_maincpu->sh2drc_add_fastram(0x02000000, 0x0207ffff, 0, &m_mainram[0]);
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m_maincpu->sh2drc_add_fastram(0x04000000, 0x0407ffff, 0, &m_spriteram[0]);
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m_maincpu->sh2drc_add_fastram(0x040C0020, 0x040C002b, 0, &m_tilemap20_regs_base[0]);
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m_maincpu->sh2drc_add_fastram(0x040C0030, 0x040C003b, 0, &m_tilemap30_regs_base[0]);
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cps3_decrypt_bios();
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m_decrypted_gamerom = auto_alloc_array(machine(), UINT32, 0x1000000/4);
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@ -393,6 +393,13 @@ DRIVER_INIT_MEMBER(stv_state,stv)
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m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x00400000, 0x0040003f, read32_delegate(FUNC(stv_state::stv_ioga_r32),this), write32_delegate(FUNC(stv_state::stv_ioga_w32),this));
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m_slave->space(AS_PROGRAM).install_readwrite_handler(0x00400000, 0x0040003f, read32_delegate(FUNC(stv_state::stv_ioga_r32),this), write32_delegate(FUNC(stv_state::stv_ioga_w32),this));
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m_maincpu->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
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m_maincpu->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
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m_maincpu->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
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m_slave->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
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m_slave->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
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m_slave->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
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m_vdp2.pal = 0;
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}
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@ -946,6 +946,9 @@ void skns_state::init_skns()
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{
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// init DRC to fastest options
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m_maincpu->sh2drc_set_options(SH2DRC_FASTEST_OPTIONS);
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m_maincpu->sh2drc_add_fastram(0x02000000, 0x02003fff, 0, &m_spriteram[0]);
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m_maincpu->sh2drc_add_fastram(0x02100000, 0x0210003f, 0, &m_spc_regs[0]);
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m_maincpu->sh2drc_add_fastram(0x02600000, 0x02607fff, 0, &m_v3slc_ram[0]);
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}
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void skns_state::set_drc_pcflush(UINT32 addr)
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@ -9,7 +9,7 @@
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Many thanks to Guru, Fabien, Runik and Charles MacDonald for the help given.
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===================================================================================================
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Notes:
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-To enter into an Advanced Test Mode,keep pressed the Test Button (F2) on the start-up.
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-Memo: Some tests done on the original & working PCB,to be implemented:
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@ -809,6 +809,13 @@ void sat_console_state::saturn_init_driver(int rgn)
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m_maincpu->sh2drc_set_options(SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
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m_slave->sh2drc_set_options(SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
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m_maincpu->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
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m_maincpu->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
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m_maincpu->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
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m_slave->sh2drc_add_fastram(0x00000000, 0x0007ffff, 1, &m_rom[0]);
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m_slave->sh2drc_add_fastram(0x00200000, 0x002fffff, 0, &m_workram_l[0]);
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m_slave->sh2drc_add_fastram(0x06000000, 0x060fffff, 0, &m_workram_h[0]);
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/* amount of time to boost interleave for on MINIT / SINIT, needed for communication to work */
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m_minit_boost = 400;
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m_sinit_boost = 400;
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