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z8: Add more control registers for debug state

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This commit is contained in:
AJR 2017-06-25 23:16:43 -04:00
parent 059c0412cc
commit d3150b0090
2 changed files with 23 additions and 12 deletions
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17
src/devices/cpu/z8/z8.cpp
View File

@ -674,9 +674,18 @@ void z8_device::device_start()
state_add(Z8_SP, "SP", m_fake_sp).callimport().callexport();
state_add(STATE_GENSP, "GENSP", m_fake_sp).callimport().callexport().noshow();
state_add(Z8_RP, "RP", m_r[Z8_REGISTER_RP]);
state_add(Z8_T0, "T0", m_t0);
state_add(Z8_T1, "T1", m_t1);
state_add(STATE_GENFLAGS, "GENFLAGS", m_r[Z8_REGISTER_FLAGS]).noshow().formatstr("%6s");
state_add(Z8_IMR, "IMR", m_r[Z8_REGISTER_IMR]);
state_add(Z8_IRQ, "IRQ", m_r[Z8_REGISTER_IRQ]);
state_add(Z8_IPR, "IPR", m_r[Z8_REGISTER_IPR]);
state_add(Z8_P01M, "P01M", m_r[Z8_REGISTER_P01M]);
state_add(Z8_P3M, "P3M", m_r[Z8_REGISTER_P3M]);
state_add(Z8_P2M, "P2M", m_r[Z8_REGISTER_P2M]);
state_add(Z8_PRE0, "PRE0", m_r[Z8_REGISTER_PRE0]);
state_add(Z8_T0, "T0", m_t0);
state_add(Z8_PRE1, "PRE1", m_r[Z8_REGISTER_PRE1]);
state_add(Z8_T1, "T1", m_t1);
state_add(Z8_TMR, "TMR", m_r[Z8_REGISTER_TMR]);
for (int regnum = 0; regnum < 16; regnum++)
state_add(Z8_R0 + regnum, string_format("R%d", regnum).c_str(), m_fake_r[regnum]).callimport().callexport();
@ -755,8 +764,8 @@ void z8_device::device_reset()
m_pc = 0x000c;
register_write(Z8_REGISTER_TMR, 0x00);
register_write(Z8_REGISTER_PRE1, register_read(Z8_REGISTER_PRE1) & 0xfc);
register_write(Z8_REGISTER_PRE0, register_read(Z8_REGISTER_PRE0) & 0xfe);
register_write(Z8_REGISTER_PRE1, PRE1 & 0xfc);
register_write(Z8_REGISTER_PRE0, PRE0 & 0xfe);
register_write(Z8_REGISTER_P2M, 0xff);
register_write(Z8_REGISTER_P3M, 0x00);
register_write(Z8_REGISTER_P01M, 0x4d);

18
src/devices/cpu/z8/z8.h
View File

@ -12,17 +12,19 @@
#pragma once
enum
{
Z8_PC, Z8_SP, Z8_RP, Z8_T0, Z8_T1,
Z8_R0, Z8_R1, Z8_R2, Z8_R3, Z8_R4, Z8_R5, Z8_R6, Z8_R7, Z8_R8, Z8_R9, Z8_R10, Z8_R11, Z8_R12, Z8_R13, Z8_R14, Z8_R15
};
class z8_device : public cpu_device
{
protected:
enum
{
Z8_PC, Z8_SP, Z8_RP,
Z8_IMR, Z8_IRQ, Z8_IPR,
Z8_P01M, Z8_P3M, Z8_P2M,
Z8_PRE0, Z8_T0, Z8_PRE1, Z8_T1, Z8_TMR,
Z8_R0, Z8_R1, Z8_R2, Z8_R3, Z8_R4, Z8_R5, Z8_R6, Z8_R7, Z8_R8, Z8_R9, Z8_R10, Z8_R11, Z8_R12, Z8_R13, Z8_R14, Z8_R15
};
// construction/destruction
z8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int size);