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DPS1: system boots up, working [Robbbert]
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Robbbert
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@ -1,8 +1,20 @@
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// license:BSD-3-Clause
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// copyright-holders:Miodrag Milanovic, Robbbert
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/****************************************************************************************************************
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Ithaca Intersystems DPS-1
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The last commercial release of a computer fitted with a front panel.
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ToDo:
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- Need artwork of the front panel switches and LEDs, and port FF.
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- Replace terminal with s2651 UART and RS232.
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***************************************************************************************************************/
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#include "emu.h"
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#include "cpu/z80/z80.h"
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#include "machine/upd765.h"
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#include "machine/terminal.h"
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#include "softlist.h"
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class dps1_state : public driver_device
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@ -10,33 +22,221 @@ class dps1_state : public driver_device
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public:
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dps1_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_fdc(*this, "fdc")
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, m_floppy0(*this, "fdc:0")
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//, m_floppy1(*this, "fdc:1")
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, m_terminal(*this, "terminal")
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{ }
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DECLARE_READ8_MEMBER(port00_r);
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DECLARE_WRITE8_MEMBER(port00_w);
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DECLARE_WRITE8_MEMBER(portb2_w);
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DECLARE_WRITE8_MEMBER(portb4_w);
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DECLARE_WRITE8_MEMBER(portb6_w);
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DECLARE_WRITE8_MEMBER(portb8_w);
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DECLARE_WRITE8_MEMBER(portba_w);
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DECLARE_WRITE8_MEMBER(portbc_w);
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DECLARE_WRITE8_MEMBER(portbe_w);
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DECLARE_READ8_MEMBER(portff_r);
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DECLARE_WRITE8_MEMBER(portff_w);
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DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
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DECLARE_DRIVER_INIT(dps1);
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DECLARE_MACHINE_RESET(dps1);
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DECLARE_WRITE8_MEMBER(kbd_put);
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private:
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bool m_dma_dir;
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UINT16 m_dma_adr;
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UINT8 m_term_data;
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required_device<cpu_device> m_maincpu;
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required_device<upd765_family_device> m_fdc;
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required_device<floppy_connector> m_floppy0;
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//required_device<floppy_connector> m_floppy1;
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required_device<generic_terminal_device> m_terminal;
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};
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static ADDRESS_MAP_START( dps1_mem, AS_PROGRAM, 8, dps1_state )
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AM_RANGE(0x0000, 0x03ff) AM_ROM AM_REGION("maincpu", 0)
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AM_RANGE(0x2000, 0x2fff) AM_RAM
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AM_RANGE(0x0000, 0x03ff) AM_READ_BANK("bankr0") AM_WRITE_BANK("bankw0")
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AM_RANGE(0x0400, 0xffff) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( dps1_io, AS_IO, 8, dps1_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x00, 0x03) AM_READWRITE(port00_r,port00_w) // 2651 uart
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AM_RANGE(0xb0, 0xb1) AM_DEVICE("fdc", upd765_family_device, map)
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AM_RANGE(0xb2, 0xb3) AM_WRITE(portb2_w) // set dma fdc->memory
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AM_RANGE(0xb4, 0xb5) AM_WRITE(portb4_w) // set dma memory->fdc
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AM_RANGE(0xb6, 0xb7) AM_WRITE(portb6_w) // enable eprom
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AM_RANGE(0xb8, 0xb9) AM_WRITE(portb8_w) // set A16-23
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AM_RANGE(0xba, 0xbb) AM_WRITE(portba_w) // set A8-15
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AM_RANGE(0xbc, 0xbd) AM_WRITE(portbc_w) // set A0-7
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AM_RANGE(0xbe, 0xbf) AM_WRITE(portbe_w) // disable eprom
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AM_RANGE(0xff, 0xff) AM_READWRITE(portff_r, portff_w)
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ADDRESS_MAP_END
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// uart in
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READ8_MEMBER( dps1_state::port00_r )
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{
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UINT8 data = 0x4e;
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switch(offset)
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{
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case 0:
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data = m_term_data;
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m_term_data = 0;
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break;
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case 1:
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data = (m_term_data) ? 3 : 1;
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break;
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case 3:
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data = 0x27;
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default:
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break;
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}
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return data;
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}
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// uart out
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WRITE8_MEMBER( dps1_state::port00_w )
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{
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if (offset == 0)
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m_terminal->write(space, 0, data);
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}
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// read from disk, to memory
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WRITE8_MEMBER( dps1_state::portb2_w )
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{
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m_dma_dir = 1;
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}
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// write to disk, from memory
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WRITE8_MEMBER( dps1_state::portb4_w )
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{
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m_dma_dir = 0;
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}
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// enable eprom
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WRITE8_MEMBER( dps1_state::portb6_w )
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{
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membank("bankr0")->set_entry(1); // point at rom
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}
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// set A16-23
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WRITE8_MEMBER( dps1_state::portb8_w )
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{
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}
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// set A8-15
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WRITE8_MEMBER( dps1_state::portba_w )
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{
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m_dma_adr = (data << 8) | (m_dma_adr & 0xff);
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}
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// set A0-7
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WRITE8_MEMBER( dps1_state::portbc_w )
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{
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m_dma_adr = (m_dma_adr & 0xff00) | data;
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}
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// disable eprom
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WRITE8_MEMBER( dps1_state::portbe_w )
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{
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membank("bankr0")->set_entry(0); // point at ram
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}
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// read 8 front-panel switches
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READ8_MEMBER( dps1_state::portff_r )
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{
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return 0x0e;
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}
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// write to 8 leds
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WRITE8_MEMBER( dps1_state::portff_w )
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{
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}
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// do dma
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WRITE_LINE_MEMBER( dps1_state::fdc_drq_w )
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{
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if (state)
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{
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// acknowledge drq by taking /dack low (unsupported)
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// then depending on direction, transfer a byte
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address_space& mem = m_maincpu->space(AS_PROGRAM);
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if (m_dma_dir)
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{ // disk to mem
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mem.write_byte(m_dma_adr, m_fdc->mdma_r(mem, 0));
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}
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else
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{ // mem to disk
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m_fdc->mdma_w(mem, 0, mem.read_byte(m_dma_adr));
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}
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m_dma_adr++;
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}
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// else take /dack high (unsupported)
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}
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MACHINE_RESET_MEMBER( dps1_state, dps1 )
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{
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membank("bankr0")->set_entry(1); // point at rom
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membank("bankw0")->set_entry(0); // always write to ram
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// set fdc for 8 inch floppies
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m_fdc->set_rate(500000);
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// turn on the motor
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floppy_image_device *floppy = m_floppy0->get_device();
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m_fdc->set_floppy(floppy);
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floppy->mon_w(0);
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}
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DRIVER_INIT_MEMBER( dps1_state, dps1 )
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{
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UINT8 *main = memregion("maincpu")->base();
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membank("bankr0")->configure_entry(1, &main[0x0000]);
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membank("bankr0")->configure_entry(0, &main[0x0400]);
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membank("bankw0")->configure_entry(0, &main[0x0400]);
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}
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static INPUT_PORTS_START( dps1 )
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INPUT_PORTS_END
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WRITE8_MEMBER( dps1_state::kbd_put )
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{
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m_term_data = data;
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}
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static SLOT_INTERFACE_START( floppies )
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SLOT_INTERFACE( "floppy0", FLOPPY_8_DSDD )
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SLOT_INTERFACE_END
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static MACHINE_CONFIG_START( dps1, dps1_state )
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// basic machine hardware
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MCFG_CPU_ADD("maincpu", Z80, 4000000)
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MCFG_CPU_PROGRAM_MAP(dps1_mem)
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MCFG_CPU_IO_MAP(dps1_io)
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MCFG_MACHINE_RESET_OVERRIDE(dps1_state, dps1)
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/* video hardware */
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MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)
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MCFG_GENERIC_TERMINAL_KEYBOARD_CB(WRITE8(dps1_state, kbd_put))
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// floppy
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MCFG_UPD765A_ADD("fdc", false, true)
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//MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(dps1_state, fdc_int_w)) // doesn't appear to be used
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MCFG_UPD765_DRQ_CALLBACK(WRITELINE(dps1_state, fdc_drq_w))
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MCFG_FLOPPY_DRIVE_ADD("fdc:0", floppies, "floppy0", floppy_image_device::default_floppy_formats)
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MCFG_FLOPPY_DRIVE_SOUND(true)
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//MCFG_FLOPPY_DRIVE_ADD("fdc:1", floppies, "floppy1", floppy_image_device::default_floppy_formats)
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//MCFG_FLOPPY_DRIVE_SOUND(true)
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// software lists
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MCFG_SOFTWARE_LIST_ADD("flop_list", "dps1")
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MACHINE_CONFIG_END
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ROM_START( dps1 )
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ROM_REGION( 0x400, "maincpu", 0 )
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ROM_REGION( 0x800, "maincpu", 0 )
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ROM_LOAD( "boot 1280", 0x000, 0x400, CRC(9c2e98fa) SHA1(78e6c9d00aa6e8f6c4d3c65984cfdf4e99434c66) ) // actually on the FDC-2 board
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ROM_END
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COMP( 1979, dps1, 0, 0, dps1, dps1, driver_device, 0, "Ithaca InterSystems", "DPS-1", MACHINE_NOT_WORKING | MACHINE_NO_SOUND_HW )
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COMP( 1979, dps1, 0, 0, dps1, dps1, dps1_state, dps1, "Ithaca InterSystems", "DPS-1", MACHINE_NO_SOUND_HW )
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