mirror of
https://github.com/holub/mame
synced 2025-05-30 17:41:47 +03:00
(MESS) mm1: Trying to fix floppy. (nw)
This commit is contained in:
parent
8532507dea
commit
d369a640f8
@ -59,15 +59,15 @@
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// MACROS / CONSTANTS
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// MACROS / CONSTANTS
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//**************************************************************************
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//**************************************************************************
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#define LOG 0
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#define LOG 1
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#define MMU_IOEN_MEMEN 0x01
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#define MMU_IOEN 0x01
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#define MMU_RAMEN 0x02
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#define MMU_RAMEN 0x02
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#define MMU_CE4 0x08
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#define MMU_CE4 0x08
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#define MMU_CE0 0x10
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#define MMU_CE0 0x10
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#define MMU_CE1 0x20
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#define MMU_CE1 0x20
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#define MMU_CE2 0x40
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#define MMU_CE2 0x40
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#define MMU_CE3 0x80
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#define MMU_CE3 0x80
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@ -76,15 +76,15 @@
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//**************************************************************************
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//**************************************************************************
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//-------------------------------------------------
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//-------------------------------------------------
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// mmu_r -
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// read -
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//-------------------------------------------------
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//-------------------------------------------------
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READ8_MEMBER( mm1_state::mmu_r )
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READ8_MEMBER( mm1_state::read )
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{
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{
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UINT8 data = 0;
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UINT8 data = 0;
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UINT8 mmu = m_mmu_rom[(m_a8 << 8) | (offset >> 8)];
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UINT8 mmu = m_mmu_rom[(m_a8 << 8) | (offset >> 8)];
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if (mmu & MMU_IOEN_MEMEN)
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if (mmu & MMU_IOEN)
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{
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{
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switch ((offset >> 4) & 0x07)
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switch ((offset >> 4) & 0x07)
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{
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{
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@ -146,14 +146,14 @@ READ8_MEMBER( mm1_state::mmu_r )
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//-------------------------------------------------
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//-------------------------------------------------
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// mmu_w -
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// write -
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//-------------------------------------------------
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//-------------------------------------------------
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WRITE8_MEMBER( mm1_state::mmu_w )
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WRITE8_MEMBER( mm1_state::write )
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{
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{
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UINT8 mmu = m_mmu_rom[(m_a8 << 8) | (offset >> 8)];
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UINT8 mmu = m_mmu_rom[(m_a8 << 8) | (offset >> 8)];
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if (mmu & MMU_IOEN_MEMEN)
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if (mmu & MMU_IOEN)
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{
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{
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switch ((offset >> 4) & 0x07)
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switch ((offset >> 4) & 0x07)
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{
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{
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@ -221,8 +221,7 @@ WRITE8_MEMBER( mm1_state::ls259_w )
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case 1: // RECALL
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case 1: // RECALL
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if (LOG) logerror("RECALL %u\n", d);
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if (LOG) logerror("RECALL %u\n", d);
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m_recall = d;
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m_recall = d;
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if(d)
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if (d) m_fdc->reset();
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m_fdc->reset();
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break;
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break;
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case 2: // _RV28/RX21
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case 2: // _RV28/RX21
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@ -333,7 +332,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(mm1_state::kbclk_tick)
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//-------------------------------------------------
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//-------------------------------------------------
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static ADDRESS_MAP_START( mm1_map, AS_PROGRAM, 8, mm1_state )
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static ADDRESS_MAP_START( mm1_map, AS_PROGRAM, 8, mm1_state )
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(mmu_r, mmu_w)
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(read, write)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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@ -485,7 +484,12 @@ static I8212_INTERFACE( iop_intf )
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// I8237_INTERFACE( dmac_intf )
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// I8237_INTERFACE( dmac_intf )
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//-------------------------------------------------
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//-------------------------------------------------
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WRITE_LINE_MEMBER( mm1_state::dma_hrq_changed )
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void mm1_state::update_tc()
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{
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m_fdc->tc_w(m_tc && !m_dack3);
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}
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WRITE_LINE_MEMBER( mm1_state::dma_hrq_w )
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{
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{
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m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
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m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
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@ -509,51 +513,28 @@ WRITE8_MEMBER( mm1_state::mpsc_dack_w )
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m_dmac->dreq1_w(CLEAR_LINE);
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m_dmac->dreq1_w(CLEAR_LINE);
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}
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}
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WRITE_LINE_MEMBER( mm1_state::tc_w )
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WRITE_LINE_MEMBER( mm1_state::dma_eop_w )
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{
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{
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if (!m_dack3)
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{
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// floppy terminal count
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m_fdc->tc_w(!state);
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}
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m_tc = !state;
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m_maincpu->set_input_line(I8085_RST75_LINE, state);
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m_maincpu->set_input_line(I8085_RST75_LINE, state);
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m_tc = state;
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update_tc();
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}
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}
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WRITE_LINE_MEMBER( mm1_state::dack3_w )
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WRITE_LINE_MEMBER( mm1_state::dack3_w )
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{
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{
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m_dack3 = state;
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m_dack3 = state;
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update_tc();
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if (!m_dack3)
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{
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// floppy terminal count
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m_fdc->tc_w(m_tc);
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}
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}
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static UINT8 memory_read_byte(address_space &space, offs_t address, UINT8 mem_mask) { return space.read_byte(address); }
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static void memory_write_byte(address_space &space, offs_t address, UINT8 data, UINT8 mem_mask) { space.write_byte(address, data); }
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READ8_MEMBER( mm1_state::fdc_dma_r )
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{
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return m_fdc->dma_r();
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}
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WRITE8_MEMBER( mm1_state::fdc_dma_w )
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{
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m_fdc->dma_w(data);
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}
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}
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static I8237_INTERFACE( dmac_intf )
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static I8237_INTERFACE( dmac_intf )
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{
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{
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DEVCB_DRIVER_LINE_MEMBER(mm1_state, dma_hrq_changed),
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DEVCB_DRIVER_LINE_MEMBER(mm1_state, dma_hrq_w),
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DEVCB_DRIVER_LINE_MEMBER(mm1_state, tc_w),
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DEVCB_DRIVER_LINE_MEMBER(mm1_state, dma_eop_w),
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DEVCB_MEMORY_HANDLER(I8085A_TAG, PROGRAM, memory_read_byte),
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DEVCB_DRIVER_MEMBER(mm1_state, read),
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DEVCB_MEMORY_HANDLER(I8085A_TAG, PROGRAM, memory_write_byte),
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DEVCB_DRIVER_MEMBER(mm1_state, write),
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(mm1_state, mpsc_dack_r), DEVCB_DRIVER_MEMBER(mm1_state, fdc_dma_r) },
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_MEMBER(mm1_state, mpsc_dack_r), DEVCB_DEVICE_MEMBER(UPD765_TAG, upd765_family_device, mdma_r) },
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{ DEVCB_DEVICE_HANDLER(I8275_TAG, i8275_dack_w), DEVCB_DRIVER_MEMBER(mm1_state, mpsc_dack_w), DEVCB_NULL, DEVCB_DRIVER_MEMBER(mm1_state, fdc_dma_w) },
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{ DEVCB_DEVICE_HANDLER(I8275_TAG, i8275_dack_w), DEVCB_DRIVER_MEMBER(mm1_state, mpsc_dack_w), DEVCB_NULL, DEVCB_DEVICE_MEMBER(UPD765_TAG, upd765_family_device, mdma_w) },
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mm1_state, dack3_w) }
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{ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_DRIVER_LINE_MEMBER(mm1_state, dack3_w) }
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};
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};
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@ -693,12 +674,12 @@ static SLOT_INTERFACE_START( mm1_floppies )
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SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
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SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
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SLOT_INTERFACE_END
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SLOT_INTERFACE_END
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void mm1_state::fdc_irq(bool state)
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void mm1_state::fdc_intrq_w(bool state)
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{
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{
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m_maincpu->set_input_line(I8085_RST55_LINE, state ? ASSERT_LINE : CLEAR_LINE);
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m_maincpu->set_input_line(I8085_RST55_LINE, state ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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void mm1_state::fdc_drq(bool state)
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void mm1_state::fdc_drq_w(bool state)
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{
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{
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m_dmac->dreq3_w(state);
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m_dmac->dreq3_w(state);
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}
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}
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@ -715,8 +696,8 @@ void mm1_state::fdc_drq(bool state)
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void mm1_state::machine_start()
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void mm1_state::machine_start()
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{
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{
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// floppy callbacks
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// floppy callbacks
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m_fdc->setup_intrq_cb(upd765a_device::line_cb(FUNC(mm1_state::fdc_irq), this));
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m_fdc->setup_intrq_cb(upd765_family_device::line_cb(FUNC(mm1_state::fdc_intrq_w), this));
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m_fdc->setup_drq_cb(upd765a_device::line_cb(FUNC(mm1_state::fdc_drq), this));
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m_fdc->setup_drq_cb(upd765_family_device::line_cb(FUNC(mm1_state::fdc_drq_w), this));
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// find memory regions
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// find memory regions
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m_mmu_rom = memregion("address")->base();
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m_mmu_rom = memregion("address")->base();
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@ -731,7 +712,6 @@ void mm1_state::machine_start()
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save_item(NAME(m_tx21));
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save_item(NAME(m_tx21));
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save_item(NAME(m_rcl));
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save_item(NAME(m_rcl));
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save_item(NAME(m_recall));
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save_item(NAME(m_recall));
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save_item(NAME(m_dack3));
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}
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}
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@ -742,10 +722,12 @@ void mm1_state::machine_start()
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void mm1_state::machine_reset()
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void mm1_state::machine_reset()
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{
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{
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address_space &program = m_maincpu->space(AS_PROGRAM);
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address_space &program = m_maincpu->space(AS_PROGRAM);
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int i;
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// reset LS259
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// reset LS259
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for (i = 0; i < 8; i++) ls259_w(program, i, 0);
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for (int i = 0; i < 8; i++)
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{
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ls259_w(program, i, 0);
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}
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// reset FDC
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// reset FDC
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m_fdc->reset();
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m_fdc->reset();
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@ -766,6 +748,7 @@ static MACHINE_CONFIG_START( mm1, mm1_state )
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MCFG_CPU_ADD(I8085A_TAG, I8085A, XTAL_6_144MHz)
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MCFG_CPU_ADD(I8085A_TAG, I8085A, XTAL_6_144MHz)
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MCFG_CPU_PROGRAM_MAP(mm1_map)
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MCFG_CPU_PROGRAM_MAP(mm1_map)
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MCFG_CPU_CONFIG(i8085_intf)
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MCFG_CPU_CONFIG(i8085_intf)
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MCFG_QUANTUM_PERFECT_CPU(I8085A_TAG)
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MCFG_TIMER_DRIVER_ADD_PERIODIC("kbclk", mm1_state, kbclk_tick, attotime::from_hz(2500))
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MCFG_TIMER_DRIVER_ADD_PERIODIC("kbclk", mm1_state, kbclk_tick, attotime::from_hz(2500))
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@ -43,7 +43,11 @@ public:
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m_floppy0(*this, UPD765_TAG ":0:525qd"),
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m_floppy0(*this, UPD765_TAG ":0:525qd"),
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m_floppy1(*this, UPD765_TAG ":1:525qd"),
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m_floppy1(*this, UPD765_TAG ":1:525qd"),
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m_ram(*this, RAM_TAG),
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m_ram(*this, RAM_TAG),
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m_video_ram(*this, "video_ram")
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m_video_ram(*this, "video_ram"),
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m_a8(0),
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m_recall(0),
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m_dack3(1),
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m_tc(CLEAR_LINE)
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{ }
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{ }
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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@ -66,14 +70,14 @@ public:
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virtual void video_start();
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virtual void video_start();
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UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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DECLARE_READ8_MEMBER( mmu_r );
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DECLARE_READ8_MEMBER( read );
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DECLARE_WRITE8_MEMBER( mmu_w );
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DECLARE_WRITE8_MEMBER( write );
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DECLARE_WRITE8_MEMBER( ls259_w );
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DECLARE_WRITE8_MEMBER( ls259_w );
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DECLARE_READ8_MEMBER( kb_r );
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DECLARE_READ8_MEMBER( kb_r );
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DECLARE_WRITE_LINE_MEMBER( dma_hrq_changed );
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DECLARE_WRITE_LINE_MEMBER( dma_hrq_w );
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DECLARE_READ8_MEMBER( mpsc_dack_r );
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DECLARE_READ8_MEMBER( mpsc_dack_r );
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DECLARE_WRITE8_MEMBER( mpsc_dack_w );
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DECLARE_WRITE8_MEMBER( mpsc_dack_w );
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DECLARE_WRITE_LINE_MEMBER( tc_w );
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DECLARE_WRITE_LINE_MEMBER( dma_eop_w );
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DECLARE_WRITE_LINE_MEMBER( dack3_w );
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DECLARE_WRITE_LINE_MEMBER( dack3_w );
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DECLARE_WRITE_LINE_MEMBER( itxc_w );
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DECLARE_WRITE_LINE_MEMBER( itxc_w );
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DECLARE_WRITE_LINE_MEMBER( irxc_w );
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DECLARE_WRITE_LINE_MEMBER( irxc_w );
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DECLARE_WRITE_LINE_MEMBER( drq2_w );
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DECLARE_WRITE_LINE_MEMBER( drq2_w );
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DECLARE_WRITE_LINE_MEMBER( drq1_w );
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DECLARE_WRITE_LINE_MEMBER( drq1_w );
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DECLARE_READ_LINE_MEMBER( dsra_r );
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DECLARE_READ_LINE_MEMBER( dsra_r );
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DECLARE_PALETTE_INIT(mm1);
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DECLARE_READ8_MEMBER(fdc_dma_r);
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DECLARE_WRITE8_MEMBER(fdc_dma_w);
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void fdc_irq(bool state);
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void update_tc();
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void fdc_drq(bool state);
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void fdc_intrq_w(bool state);
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void fdc_drq_w(bool state);
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void scan_keyboard();
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void scan_keyboard();
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@ -114,7 +116,7 @@ public:
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int m_recall;
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int m_recall;
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int m_dack3;
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int m_dack3;
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int m_tc;
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int m_tc;
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UINT32 screen_update_mm1(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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TIMER_DEVICE_CALLBACK_MEMBER(kbclk_tick);
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TIMER_DEVICE_CALLBACK_MEMBER(kbclk_tick);
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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};
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};
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@ -49,7 +49,8 @@ static const i8275_interface crtc_intf =
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//-------------------------------------------------
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//-------------------------------------------------
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static ADDRESS_MAP_START( mm1_upd7220_map, AS_0, 8, mm1_state )
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static ADDRESS_MAP_START( mm1_upd7220_map, AS_0, 8, mm1_state )
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AM_RANGE(0x00000, 0x3ffff) AM_RAM AM_SHARE("video_ram")
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ADDRESS_MAP_GLOBAL_MASK(0x7fff)
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AM_RANGE(0x0000, 0x7fff) AM_RAM AM_SHARE("video_ram")
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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@ -61,7 +62,7 @@ static UPD7220_DISPLAY_PIXELS( hgdc_display_pixels )
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{
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{
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mm1_state *state = device->machine().driver_data<mm1_state>();
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mm1_state *state = device->machine().driver_data<mm1_state>();
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UINT8 data = state->m_video_ram[address * 2];
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UINT8 data = state->m_video_ram[address];
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for (int i = 0; i < 8; i++)
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for (int i = 0; i < 8; i++)
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{
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{
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