mirror of
https://github.com/holub/mame
synced 2025-04-16 13:34:55 +03:00
Initial ROLM 9751 driver
This commit is contained in:
Brandon Munger
parent
70d77a389c
commit
d3785e805e
@ -2701,3 +2701,14 @@ if (MACHINES["VT82C496"]~=null) then
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}
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end
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---------------------------------------------------
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--
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--@src/emu/machine/pdc.h,MACHINES["PDC"] = true
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---------------------------------------------------
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if (MACHINES["PDC"]~=null) then
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files {
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MAME_DIR .. "src/emu/machine/pdc.c",
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MAME_DIR .. "src/emu/machine/pdc.h",
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}
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end
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@ -486,6 +486,7 @@ MACHINES["PC_LPT"] = true
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MACHINES["PCCARD"] = true
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MACHINES["PCF8593"] = true
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MACHINES["PCKEYBRD"] = true
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MACHINES["PDC"] = true
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MACHINES["PIC8259"] = true
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MACHINES["PIT68230"] = true
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MACHINES["PIT8253"] = true
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@ -3120,6 +3121,7 @@ files {
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MAME_DIR .. "src/mame/drivers/pulsar.cpp",
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MAME_DIR .. "src/mame/drivers/pv9234.cpp",
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MAME_DIR .. "src/mame/drivers/qtsbc.cpp",
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MAME_DIR .. "src/mess/drivers/r9751.c",
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MAME_DIR .. "src/mame/drivers/rd100.cpp",
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MAME_DIR .. "src/mame/drivers/rvoice.cpp",
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MAME_DIR .. "src/mame/drivers/sacstate.cpp",
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204
src/emu/machine/pdc.c
Normal file
204
src/emu/machine/pdc.c
Normal file
@ -0,0 +1,204 @@
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// license:GPL-2.0+
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// copyright-holders:Brandon Munger
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/**********************************************************************
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ROLM 9751 9005 Peripheral device controller emulation
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**********************************************************************/
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/*
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Notes
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*/
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#include "pdc.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#define Z80_TAG "u19"
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#define FDC_TAG "fdc"
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//**************************************************************************
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// DEVICE DEFINITIONS
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//**************************************************************************
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const device_type PDC = &device_creator<pdc_device>;
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//-------------------------------------------------
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// ROM( PDC )
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//-------------------------------------------------
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ROM_START( pdc )
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ROM_REGION( 0x4000, "rom", 0 )
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ROM_LOAD( "pdc-97d9988.u17", 0x0000, 0x4000, CRC(d96ccaa6) SHA1(e1a465c2274a63e81dba7a71fc8b30f10c03baf0) )
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ROM_END
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//-------------------------------------------------
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// rom_region - device-specific ROM region
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//-------------------------------------------------
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const rom_entry *pdc_device::device_rom_region() const
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{
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return ROM_NAME( pdc );
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}
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//-------------------------------------------------
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// ADDRESS_MAP( pdc_mem )
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//-------------------------------------------------
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static ADDRESS_MAP_START( pdc_mem, AS_PROGRAM, 8, pdc_device )
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// AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x6000) AM_RAM
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// AM_RANGE(0x1800, 0x180f) AM_MIRROR(0x63f0) AM_DEVREADWRITE(M6522_0_TAG, via6522_device, read, write)
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// AM_RANGE(0x1c00, 0x1c0f) AM_MIRROR(0x63f0) AM_DEVREADWRITE(M6522_1_TAG, via6522_device, read, write)
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// AM_RANGE(0x8000, 0xbfff) AM_MIRROR(0x4000) AM_ROM AM_REGION(M6502_TAG, 0)
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AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("rom", 0)
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AM_RANGE(0x8000, 0x9FFF) AM_RAM AM_SHARE("pdc_ram") // HM6264ALP-12 SRAM 8KB
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// AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("pdc_ram")
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ADDRESS_MAP_END
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//-------------------------------------------------
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// ADDRESS_MAP( pdc_io )
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//-------------------------------------------------
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static ADDRESS_MAP_START( pdc_io, AS_IO, 8, pdc_device )
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//AM_RANGE(0x10, 0x11) AM_DEVICE(FDC_TAG, upd765a_device, map)
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ADDRESS_MAP_END
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//-------------------------------------------------
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// SLOT_INTERFACE( pdc_floppies )
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//-------------------------------------------------
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static SLOT_INTERFACE_START( pdc_floppies )
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SLOT_INTERFACE( "35hd", FLOPPY_35_HD )
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SLOT_INTERFACE_END
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//-------------------------------------------------
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// FLOPPY_FORMATS( floppy_formats )
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//-------------------------------------------------
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FLOPPY_FORMATS_MEMBER( pdc_device::floppy_formats )
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FLOPPY_PC_FORMAT
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FLOPPY_FORMATS_END
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//-------------------------------------------------
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// MACHINE_DRIVER( pdc )
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//-------------------------------------------------
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static MACHINE_CONFIG_FRAGMENT( pdc )
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MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_10MHz / 2)
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MCFG_CPU_PROGRAM_MAP(pdc_mem)
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MCFG_CPU_IO_MAP(pdc_io)
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// MCFG_QUANTUM_PERFECT_CPU(M6502_TAG)
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// MCFG_DEVICE_ADD(M6522_0_TAG, VIA6522, XTAL_16MHz/16)
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// MCFG_VIA6522_READPA_HANDLER(READ8(c1541_base_t, via0_pa_r))
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// MCFG_VIA6522_READPB_HANDLER(READ8(c1541_base_t, via0_pb_r))
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// MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(c1541_base_t, via0_pa_w))
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// MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(c1541_base_t, via0_pb_w))
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// MCFG_VIA6522_CB2_HANDLER(WRITELINE(c1541_base_t, via0_ca2_w))
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// MCFG_VIA6522_IRQ_HANDLER(WRITELINE(c1541_base_t, via0_irq_w))
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// MCFG_DEVICE_ADD(M6522_1_TAG, VIA6522, XTAL_16MHz/16)
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// MCFG_VIA6522_READPA_HANDLER(DEVREAD8(C64H156_TAG, c64h156_device, yb_r))
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// MCFG_VIA6522_READPB_HANDLER(READ8(c1541_base_t, via1_pb_r))
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// MCFG_VIA6522_WRITEPA_HANDLER(DEVWRITE8(C64H156_TAG, c64h156_device, yb_w))
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// MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(c1541_base_t, via1_pb_w))
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// MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(C64H156_TAG, c64h156_device, soe_w))
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// MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(C64H156_TAG, c64h156_device, oe_w))
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// MCFG_VIA6522_IRQ_HANDLER(WRITELINE(c1541_base_t, via1_irq_w))
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// MCFG_DEVICE_ADD(C64H156_TAG, C64H156, XTAL_16MHz)
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// MCFG_64H156_ATN_CALLBACK(WRITELINE(c1541_base_t, atn_w))
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// MCFG_64H156_BYTE_CALLBACK(WRITELINE(c1541_base_t, byte_w))
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// MCFG_FLOPPY_DRIVE_ADD(C64H156_TAG":0", c1540_floppies, "525ssqd", c1541_base_t::floppy_formats)
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// MCFG_UPD765A_ADD("upd765a", true, false)
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MCFG_UPD765A_ADD(FDC_TAG, true, false)
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// MCFG_FLOPPY_DRIVE_ADD(FDC_TAG, pdc_floppies, "35hd", pdc_device::floppy_formats)
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MCFG_FLOPPY_DRIVE_ADD(FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats)
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MACHINE_CONFIG_END
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//-------------------------------------------------
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// machine_config_additions - device-specific
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// machine configurations
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//-------------------------------------------------
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machine_config_constructor pdc_device::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( pdc );
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// c1541_base_t - constructor
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//-------------------------------------------------
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//pdc_device::pdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
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pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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//device_t(mconfig, type, name, tag, owner, clock, shortname, source),
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device_t(mconfig, PDC, "ROLM PDC", tag, owner, clock, "pdc", __FILE__),
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//device_cbm_iec_interface(mconfig, *this),
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//device_c64_floppy_parallel_interface(mconfig, *this),
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m_pdccpu(*this, Z80_TAG),
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//m_via0(*this, M6522_0_TAG),
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//m_via1(*this, M6522_1_TAG),
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//m_ga(*this, C64H156_TAG),
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//m_floppy(*this, C64H156_TAG":0:525ssqd"),
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// m_fdc(*this, FDC_TAG ":35hd")
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m_fdc(*this, FDC_TAG),
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m_floppy(*this, FDC_TAG ":0"),
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//m_address(*this, "ADDRESS"),
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//m_data_out(1),
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//m_via0_irq(CLEAR_LINE),
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//m_via1_irq(CLEAR_LINE)
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m_pdc_ram(*this, "pdc_ram")
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{
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}
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//-------------------------------------------------
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// c1540_t - constructor
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//-------------------------------------------------
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//pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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// : pdc_device_t(mconfig, PDC, "ROLM PDC", tag, owner, clock, "pdc", __FILE__) { }
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void pdc_device::device_start()
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{
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// install image callbacks
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// m_ga->set_floppy(m_floppy);
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// register for state saving
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// save_item(NAME(m_data_out));
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// save_item(NAME(m_via0_irq));
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// save_item(NAME(m_via1_irq));
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void pdc_device::device_reset()
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{
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// UINT8 *rom = memregion("rom")->base();
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// UINT8 *ram = m_pdc_ram;
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// memcpy(ram, rom, 0x4000);
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m_pdccpu->reset();
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// m_via0->reset();
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// m_via1->reset();
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// initialize gate array
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// m_ga->accl_w(0);
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// m_ga->ted_w(1);
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}
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97
src/emu/machine/pdc.h
Normal file
97
src/emu/machine/pdc.h
Normal file
@ -0,0 +1,97 @@
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// license:GPL-2.0+
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// copyright-holders:Brandon Munger
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/**********************************************************************
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ROLM 9751 9005 Peripheral device controller emulation
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**********************************************************************/
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#pragma once
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#ifndef __R9751_PDC_H__
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#define __R9751_PDC_H__
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#include "emu.h"
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#include "cpu/z80/z80.h"
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#include "machine/upd765.h"
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#include "formats/pc_dsk.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#define PDC_TAG "pdc"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> pdc_device
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class pdc_device : public device_t
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{
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public:
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// construction/destruction
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// pdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
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pdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// optional information overrides
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virtual machine_config_constructor device_mconfig_additions() const;
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// virtual ioport_constructor device_input_ports() const;
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virtual const rom_entry *device_rom_region() const;
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// DECLARE_WRITE_LINE_MEMBER( via0_irq_w );
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// virtual DECLARE_READ8_MEMBER( via0_pa_r );
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// DECLARE_WRITE8_MEMBER( via0_pa_w );
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// DECLARE_READ8_MEMBER( via0_pb_r );
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// DECLARE_WRITE8_MEMBER( via0_pb_w );
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// DECLARE_WRITE_LINE_MEMBER( via0_ca2_w );
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// DECLARE_WRITE_LINE_MEMBER( via1_irq_w );
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// DECLARE_READ8_MEMBER( via1_pb_r );
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// DECLARE_WRITE8_MEMBER( via1_pb_w );
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// DECLARE_WRITE_LINE_MEMBER( atn_w );
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// DECLARE_WRITE_LINE_MEMBER( byte_w );
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_cbm_iec_interface overrides
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// virtual void cbm_iec_atn(int state);
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// virtual void cbm_iec_reset(int state);
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// device_c64_floppy_parallel_interface overrides
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// virtual void parallel_data_w(UINT8 data);
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// virtual void parallel_strobe_w(int state);
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// enum
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// {
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// LED_POWER = 0,
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// LED_ACT
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// };
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// inline void set_iec_data();
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required_device<cpu_device> m_pdccpu;
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// required_device<via6522_device> m_via0;
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// required_device<via6522_device> m_via1;
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// required_device<c64h156_device> m_ga;
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// required_device<floppy_image_device> m_fdc;
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required_device<upd765a_device> m_fdc;
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required_device<floppy_connector> m_floppy;
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// required_ioport m_address;
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required_shared_ptr<UINT8> m_pdc_ram;
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// IEC bus
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// int m_data_out; // serial data out
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// interrupts
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// int m_via0_irq; // VIA #0 interrupt request
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// int m_via1_irq; // VIA #1 interrupt request
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};
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extern const device_type PDC;
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#endif
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@ -2337,7 +2337,7 @@ wildfire // Parker Bros
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ssem // Manchester Small-Scale Experimental Machine, "Baby"
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craft // Craft, by [lft]
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r9751 // ROLM 9751 phone system
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//********** To sort (mostly skeleton drivers) *****************************
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387
src/mess/drivers/r9751.c
Normal file
387
src/mess/drivers/r9751.c
Normal file
@ -0,0 +1,387 @@
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// license:GPL-2.0+
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// copyright-holders:Brandon Munger
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/******************************************************************************
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*
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* Rolm CBX 9751 Release 9005 Driver
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*
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* This driver attempts to emulate the following models:
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* * Model 10
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* * Model 20
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* * Model 40
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* * Model 50
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* * Model 70
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*
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* The basis of this driver was influenced by the zexall.c driver by
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* Jonathan Gevaryahu and Robbbert.
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*
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*
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* Special Thanks to:
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* * Stephen Stair (sgstair) - for help with reverse engineering,
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* programming, and emulation
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* * Felipe Sanches (FSanches) - for help with MESS and emulation
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*
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* Memory map:
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* * 0x00000000 - 0x00ffffff : RAM? 16MB, up to 128MB?
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* * 0x08000000 - 0x0800ffff : PROM Region
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*
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******************************************************************************/
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/* Core includes */
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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#include "machine/terminal.h"
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#include "machine/pdc.h"
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#define TERMINAL_TAG "terminal"
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class r9751_state : public driver_device
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{
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public:
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r9751_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_pdc(*this, "pdc"),
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m_terminal(*this, TERMINAL_TAG),
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m_main_ram(*this, "main_ram")
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{
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}
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DECLARE_READ32_MEMBER(r9751_mmio_5ff_r);
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DECLARE_WRITE32_MEMBER(r9751_mmio_5ff_w);
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DECLARE_READ32_MEMBER(r9751_mmio_ff05_r);
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DECLARE_WRITE32_MEMBER(r9751_mmio_ff05_w);
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DECLARE_READ32_MEMBER(r9751_mmio_fff8_r);
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DECLARE_WRITE32_MEMBER(r9751_mmio_fff8_w);
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DECLARE_READ8_MEMBER( r9751_output_ack_r );
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DECLARE_READ8_MEMBER( r9751_output_req_r );
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DECLARE_READ8_MEMBER( r9751_output_data_r );
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DECLARE_WRITE8_MEMBER( r9751_output_ack_w );
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DECLARE_WRITE8_MEMBER( r9751_output_req_w );
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DECLARE_WRITE8_MEMBER( r9751_output_data_w );
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DECLARE_DRIVER_INIT(r9751);
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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private:
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required_device<cpu_device> m_maincpu;
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required_device<pdc_device> m_pdc;
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required_device<generic_terminal_device> m_terminal;
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required_shared_ptr<UINT32> m_main_ram;
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// Begin registers
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UINT32 reg_ff050004;
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UINT32 reg_ff050320; // Counter?
|
||||
UINT32 reg_fff80040;
|
||||
UINT32 fdd_dest_address; // 5FF080B0
|
||||
UINT32 smioc_out_addr;
|
||||
// End registers
|
||||
|
||||
// UINT32 fdd_scsi_command;
|
||||
address_space *m_mem;
|
||||
|
||||
// functions
|
||||
UINT32 swap_uint32( UINT32 val );
|
||||
bool fd_read(int LBA, unsigned char* buffer, int bufferLength);
|
||||
|
||||
virtual void machine_reset();
|
||||
};
|
||||
|
||||
bool r9751_state::fd_read(int LBA, unsigned char* buffer, int bufferLength)
|
||||
{
|
||||
if (bufferLength < 512)
|
||||
return false;
|
||||
// std::vector<UINT32> *ptr_fdd_vector = &m_floppy->get_buffer();
|
||||
// std::vector<UINT32> *ptr_vector = &m_floppy->image->get_buffer(0,0);
|
||||
//UINT32 f_start = 0x09000000;
|
||||
UINT8 *f_hack = memregion("floppy_hack")->base();
|
||||
memcpy(buffer,f_hack+(LBA*512),bufferLength);
|
||||
|
||||
// for(int i=0;i<bufferLength/4; i++)
|
||||
// {
|
||||
// buffer[i*4] = (*ptr_vector)[i] & 255;
|
||||
// buffer[i*4+1] = ((*ptr_vector)[i]>>8)&255;
|
||||
// buffer[i*4+2] = ((*ptr_vector)[i]>>16)&255;
|
||||
// buffer[i*4+3] = ((*ptr_vector)[i]>>24)&255;
|
||||
// }
|
||||
return true;
|
||||
}
|
||||
|
||||
UINT32 r9751_state::swap_uint32( UINT32 val )
|
||||
{
|
||||
val = ((val << 8) & 0xFF00FF00 ) | ((val >> 8) & 0xFF00FF );
|
||||
return (val << 16) | (val >> 16);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(r9751_state,r9751)
|
||||
{
|
||||
reg_ff050004 = 0;
|
||||
reg_ff050320 = 1;
|
||||
reg_fff80040 = 0;
|
||||
fdd_dest_address = 0;
|
||||
// fdd_scsi_command = 0;
|
||||
smioc_out_addr = 0;
|
||||
m_mem = &m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
}
|
||||
|
||||
void r9751_state::machine_reset()
|
||||
{
|
||||
UINT8 *rom = memregion("prom")->base();
|
||||
UINT32 *ram = m_main_ram;
|
||||
|
||||
memcpy(ram, rom, 8);
|
||||
|
||||
m_maincpu->reset();
|
||||
m_pdc->reset();
|
||||
}
|
||||
|
||||
READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
|
||||
{
|
||||
UINT32 data;
|
||||
UINT32 address = offset * 4 + 0x5FF00000;
|
||||
if(address == 0x5FF00824)
|
||||
data = 0x10; // FDD Command result code
|
||||
else if(address == 0x5FF00898) // Serial status or DMA status
|
||||
data = 0x40;
|
||||
else if(address == 0x5FF008B0)
|
||||
data = 0x10; // HDD Command result code
|
||||
else if(address == 0x5FF03024)
|
||||
{
|
||||
data = 0x1; // HDD SCSI command completed successfully
|
||||
logerror("SCSI HDD command completed - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
return data;
|
||||
}
|
||||
else if(address == 0x5FF030B0)
|
||||
{
|
||||
data = 0x1; // FDD SCSI command completed successfully
|
||||
logerror("SCSI FDD command completed - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
return data;
|
||||
}
|
||||
else
|
||||
data = 0x00000000;
|
||||
logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
|
||||
{
|
||||
UINT32 address = offset * 4 + 0x5FF00000;
|
||||
if(address == 0x5FF00224) // HDD SCSI read command
|
||||
logerror("HDD Read Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
else if(address == 0x5FF04098) // Serial DMA Command
|
||||
{
|
||||
if(data == 0x4100) // Send byte to serial
|
||||
{
|
||||
logerror("Serial byte: %02X\n", m_mem->read_dword(smioc_out_addr));
|
||||
m_terminal->write(space,0,m_mem->read_dword(smioc_out_addr));
|
||||
}
|
||||
}
|
||||
else if(address == 0x5FF08024) // HDD SCSI read command
|
||||
logerror("HDD Read Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
else if(address == 0x5FF0C024) // HDD SCSI read command
|
||||
logerror("HDD Read Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
|
||||
else if(address == 0x5FF001B0) // FDD SCSI read command
|
||||
logerror("FDD Read Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
else if(address == 0x5FF002B0) // FDD SCSI read command
|
||||
logerror("FDD Read Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
else if(address == 0x5FF008B0) // FDD SCSI read command
|
||||
logerror("FDD Read Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), address);
|
||||
|
||||
else if(address == 0x5FF080B0) // fdd_dest_address register
|
||||
{
|
||||
fdd_dest_address = data << 1;
|
||||
logerror("FDD Address: %08X\n", fdd_dest_address);
|
||||
}
|
||||
else if(address == 0x5FF0C098) // Serial DMA output address
|
||||
smioc_out_addr = data * 2;
|
||||
else if((address == 0x5FF0C0B0) || (address == 0x5FF0C1B0)) // Do something with ffd_dest_address
|
||||
{
|
||||
UINT32 fdd_scsi_command;
|
||||
UINT32 fdd_scsi_command2;
|
||||
unsigned char c_fdd_scsi_command[8];
|
||||
//unsigned char fdd_buffer[512];
|
||||
int scsi_lba;
|
||||
|
||||
// fdd_scsi_command = swap_uint32(m_mem->read_dword(fdd_dest_address));
|
||||
// fdd_scsi_command2 = swap_uint32(m_mem->read_dword(fdd_dest_address+4));
|
||||
fdd_scsi_command = swap_uint32(m_mem->read_dword(data << 1));
|
||||
fdd_scsi_command2 = swap_uint32(m_mem->read_dword((data << 1)+4));
|
||||
|
||||
memcpy(c_fdd_scsi_command,&fdd_scsi_command,4);
|
||||
memcpy(c_fdd_scsi_command+4,&fdd_scsi_command2,4);
|
||||
|
||||
logerror("FDD SCSI Command: ");
|
||||
for(int i = 0; i < 8; i++)
|
||||
logerror("%02X ", c_fdd_scsi_command[i]);
|
||||
logerror("\n");
|
||||
|
||||
switch(c_fdd_scsi_command[0])
|
||||
{
|
||||
case 8:
|
||||
{
|
||||
scsi_lba = c_fdd_scsi_command[3] | (c_fdd_scsi_command[2]<<8) | ((c_fdd_scsi_command[1]&0x1F)<<16);
|
||||
unsigned char fdd_buffer[c_fdd_scsi_command[4]*512];
|
||||
logerror("FDD: SCSI READ LBA: %i\n", scsi_lba);
|
||||
fd_read(scsi_lba,fdd_buffer,sizeof(fdd_buffer));
|
||||
logerror("Bytes: \n");
|
||||
for (int i = 0; i < sizeof(fdd_buffer); i++)
|
||||
{
|
||||
logerror(" %02X",fdd_buffer[i]);
|
||||
if (i % 16 == 15)
|
||||
logerror("\n");
|
||||
}
|
||||
|
||||
for (int i = 0; i < sizeof(fdd_buffer); i++)
|
||||
{
|
||||
m_mem->write_byte(fdd_dest_address+i, fdd_buffer[i]);
|
||||
}
|
||||
break;
|
||||
}
|
||||
default:
|
||||
logerror("FDD: Unknown SCSI command\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
|
||||
return;
|
||||
}
|
||||
|
||||
READ32_MEMBER( r9751_state::r9751_mmio_ff05_r ) //0xFF050000 - 0xFF06FFFF
|
||||
{
|
||||
UINT32 data;
|
||||
UINT32 address = offset * 4 + 0xFF050000;
|
||||
if(address == 0xFF050610)
|
||||
data = 0xabacabac;
|
||||
else if(address == 0xFF050004)
|
||||
data = reg_ff050004;
|
||||
else if(address == 0xFF050300)
|
||||
data = 0x1B | (1<<0x14);
|
||||
else if(address == 0xFF050320) // Some type of counter
|
||||
{
|
||||
//data = 0x1;
|
||||
reg_ff050320++;
|
||||
data = reg_ff050320;
|
||||
}
|
||||
else if(address == 0xFF050584)
|
||||
return 0x0;
|
||||
else if(address == 0xFF060014)
|
||||
data = 0x80;
|
||||
else
|
||||
data = 0x00000000;
|
||||
logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( r9751_state::r9751_mmio_ff05_w )
|
||||
{
|
||||
UINT32 address = offset * 4 + 0xFF050000;
|
||||
if(address == 0xFF050004)
|
||||
reg_ff050004 = data;
|
||||
else if(address == 0xFF05000C) // LED hex display indicator
|
||||
{
|
||||
logerror("LED: %02x, Instruction: %08x\n", data, space.machine().firstcpu->pc());
|
||||
/* char buf[10];
|
||||
char *buf2;
|
||||
sprintf(buf,"%02X",data);
|
||||
buf2 = buf;
|
||||
while(*buf2)
|
||||
{
|
||||
m_terminal->write(space,0,*buf2);
|
||||
buf2++;
|
||||
}
|
||||
m_terminal->write(space,0,0x0a);
|
||||
*/
|
||||
return;
|
||||
}
|
||||
logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
|
||||
return;
|
||||
}
|
||||
|
||||
READ32_MEMBER( r9751_state::r9751_mmio_fff8_r )
|
||||
{
|
||||
UINT32 data;
|
||||
UINT32 address = offset * 4 + 0xFFF80000;
|
||||
if(address == 0xFFF80040)
|
||||
data = reg_fff80040;
|
||||
else
|
||||
data = 0x00000000;
|
||||
|
||||
logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( r9751_state::r9751_mmio_fff8_w )
|
||||
{
|
||||
UINT32 address = offset * 4 + 0xFFF80000;
|
||||
if(address == 0xFFF80040)
|
||||
reg_fff80040 = data;
|
||||
|
||||
logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), address, data, mem_mask);
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
Address Maps
|
||||
******************************************************************************/
|
||||
|
||||
static ADDRESS_MAP_START(r9751_mem, AS_PROGRAM, 32, r9751_state)
|
||||
//ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00000000,0x00ffffff) AM_RAM AM_SHARE("main_ram") // 16MB
|
||||
//AM_RANGE(0x01000000,0x07ffffff) AM_NOP
|
||||
AM_RANGE(0x08000000,0x0800ffff) AM_ROM AM_REGION("prom", 0)
|
||||
AM_RANGE(0x09000000,0x09167fff) AM_ROM AM_REGION("floppy_hack",0)
|
||||
AM_RANGE(0x5FF00000,0x5FFFFFFF) AM_READWRITE(r9751_mmio_5ff_r, r9751_mmio_5ff_w)
|
||||
AM_RANGE(0xFF050000,0xFF06FFFF) AM_READWRITE(r9751_mmio_ff05_r, r9751_mmio_ff05_w)
|
||||
AM_RANGE(0xFFF80000,0xFFF8FFFF) AM_READWRITE(r9751_mmio_fff8_r, r9751_mmio_fff8_w)
|
||||
//AM_RANGE(0xffffff00,0xffffffff) AM_RAM // Unknown area
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/******************************************************************************
|
||||
Input Ports
|
||||
******************************************************************************/
|
||||
static INPUT_PORTS_START( r9751 )
|
||||
INPUT_PORTS_END
|
||||
|
||||
/******************************************************************************
|
||||
Machine Drivers
|
||||
******************************************************************************/
|
||||
|
||||
static MACHINE_CONFIG_START( r9751, r9751_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68030, 20000000)
|
||||
MCFG_CPU_PROGRAM_MAP(r9751_mem)
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(60))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
|
||||
|
||||
/* disk hardware */
|
||||
MCFG_DEVICE_ADD("pdc", PDC, 0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
ROM Definitions
|
||||
******************************************************************************/
|
||||
|
||||
ROM_START(r9751)
|
||||
ROM_REGION32_BE(0x00010000, "prom", 0)
|
||||
ROM_SYSTEM_BIOS(0, "prom34", "PROM Version 3.4")
|
||||
ROMX_LOAD( "abaco_v3_4_pn_98d4643_(49fe7a).j221", 0x0000, 0x10000, CRC(9fb19a85) SHA1(c861e15a2fc9a4ef689c2034c53fbb36f17f7da6), ROM_GROUPWORD | ROM_BIOS(1) )
|
||||
|
||||
ROM_REGION(0x00168000, "floppy_hack",0)
|
||||
ROMX_LOAD( "floppy1.img", 0x0000, 0x00168000, CRC(b5d349b5) SHA1(9e7e4f13723f54eed7bcbabd6c4fe5670ee1aa96), ROM_GROUPWORD)
|
||||
ROM_END
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
Drivers
|
||||
******************************************************************************/
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
|
||||
COMP( 1988, r9751, 0, 0, r9751, r9751, r9751_state, r9751, "ROLM Systems, Inc.", "ROLM 9751 Release 9005", MACHINE_NO_SOUND | MACHINE_NOT_WORKING )
|
||||
Loading…
Reference in New Issue
Block a user