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srcclean (nw)

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This commit is contained in:
Vas Crabb 2019-06-23 18:02:43 +10:00
parent 12561ec937
commit d3af11cb11
55 changed files with 137405 additions and 137405 deletions
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2
hash/cd32.xml
View File

@ -2,7 +2,7 @@
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="cd32" description="Amiga CD-32 CD-ROMs">
<!--
<!--
UNDUMPED:
Acid Attack Compilation (Guardian, Roadkill, Super Skidmarks)

2
hash/jb3000_flop.xml
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@ -16,5 +16,5 @@
</software>
<!-- Apps -->
</softwarelist>

20
hash/leapfrog_leappad_cart.xml
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@ -241,10 +241,10 @@
</software>
<!-- Also found as:
Description: Phonics - Leap's Friends From A to Z
Year: 2001
Serial: 500-00263
U1: MX23L8111
Description: Phonics - Leap's Friends From A to Z
Year: 2001
Serial: 500-00263
U1: MX23L8111
-->
<software name="prlpfrnds" supported="no">
<description>Pre Reading - Leap's Friends From A to Z (UK)</description>
@ -490,12 +490,12 @@
</software>
<!-- Also found as:
Description: Phonics Programme - Lesson 2 - Short Vowels a and i - Tad's Good Night
Year: 2003
Serial: 500-01367
PCB: 57000-003-3317
PCB Rev: REV.03
U1: HY23V16202
Description: Phonics Programme - Lesson 2 - Short Vowels a and i - Tad's Good Night
Year: 2003
Serial: 500-01367
PCB: 57000-003-3317
PCB Rev: REV.03
U1: HY23V16202
-->
<software name="tadsgngt" supported="no">
<description>Tad's Good Night (UK)</description>

26
hash/pc98.xml
View File

@ -13383,7 +13383,7 @@ only have some part of Windows file and a Video driver(CLGD?).
</part>
</software>
<!--
<!--
This game saves its configuration to the system disk, and this particular image has sound disabled.
To enable sound, select the "音源の設定" option on the main menu, choose FM or MIDI, and reset.
-->
@ -13593,7 +13593,7 @@ only have some part of Windows file and a Video driver(CLGD?).
</dataarea>
</part>
</software>
<software name="vieen3">
<description>Dennou Sentai La Vie en Three</description>
<year>1994</year>
@ -13930,9 +13930,9 @@ only have some part of Windows file and a Video driver(CLGD?).
</part>
</software>
<!--
Doesn't recognize disk changes, but it's possible to install the game to HDD.
Also, This game is supposed to play voice samples, but in MAME it just outputs a constant beep.
<!--
Doesn't recognize disk changes, but it's possible to install the game to HDD.
Also, This game is supposed to play voice samples, but in MAME it just outputs a constant beep.
-->
<software name="diadrum" supported="partial">
<!-- Origin: Neo Kobe Collection -->
@ -16929,7 +16929,7 @@ only have some part of Windows file and a Video driver(CLGD?).
</dataarea>
</part>
</software>
<software name="duelkawa">
<!-- Origin: Neo Kobe Collection -->
<description>Duel - Kawanakajima Scenario</description>
@ -16986,7 +16986,7 @@ only have some part of Windows file and a Video driver(CLGD?).
</part>
</software>
<!-- Disk changes don't work. It's possible to start the game if you skip the opening sequence, but it might not work correctly later. -->
<!-- Disk changes don't work. It's possible to start the game if you skip the opening sequence, but it might not work correctly later. -->
<software name="dbuster2" supported="partial">
<description>Dungeon Buster 2 Revive</description>
<year>1991</year>
@ -17033,10 +17033,10 @@ only have some part of Windows file and a Video driver(CLGD?).
</part>
</software>
<!--
This is a revised edition that adds:
- An optional 16-color compatible graphics driver, for older PC-9801 computers
- An updated installer that can use SMARTDRV.EXE instead of SMARTDRV.SYS, hence allowing DOS versions newer than 5.0
<!--
This is a revised edition that adds:
- An optional 16-color compatible graphics driver, for older PC-9801 computers
- An updated installer that can use SMARTDRV.EXE instead of SMARTDRV.SYS, hence allowing DOS versions newer than 5.0
-->
<software name="dhack">
<!-- Origin: Neo Kobe Collection -->
@ -31111,7 +31111,7 @@ Requires MS-DOS 5.00H plus an unknown procedure (HDD install?)
</dataarea>
</part>
</software>
<software name="3dgolfv2">
<!-- Origin: Neo Kobe Collection -->
<description>New 3D Golf Simulation Ver. 2.0</description>
@ -56583,7 +56583,7 @@ SPACE EMPIRE
<info name="usage" value="Create a user disk with the ユーザーディスクを作成する option, then boot from it" />
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Program Disk"/>
<dataarea name="flop" size="1264636">
<dataarea name="flop" size="1264636">
<rom name="dragonslayer eiyu densetsu 4 (1996)(falcom)(disk 1 of 8)(program disk).fdd" size="1264636" crc="46b6761c" sha1="d58d43647d6f9b4c6fa61d67ed6a25c3f9dfa5a4" offset="0" />
</dataarea>
</part>

273550
hash/spectrum_cass.xml
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File diff suppressed because it is too large Load Diff

4
hash/vgmplay.xml
View File

@ -224167,7 +224167,7 @@
</software>
<!-- vgmrips.net update - February 19, 2019 - 25 Entries -->
<software name="biomirac_fc">
<description>Bio Miracle Bokutte Upa (Family Computer)</description>
<year>1993</year>
@ -230554,7 +230554,7 @@
</dataarea>
</part>
</software>
<!-- Project.org 2612 VGM Archives located at http://project2612.org/list.php
Also https://archive.org/details/Project2612CompleteArchive20180623681Sets.7z -->

362
src/devices/bus/gio64/newport.cpp
View File

@ -24,7 +24,7 @@
#define LOG_XMAP0 (1 << 4)
#define LOG_XMAP1 (1 << 5)
#define LOG_REX3 (1 << 6)
#define LOG_RAMDAC (1 << 7)
#define LOG_RAMDAC (1 << 7)
#define LOG_COMMANDS (1 << 8)
#define LOG_REJECTS (1 << 9)
#define LOG_ALL (LOG_UNKNOWN | LOG_VC2 | LOG_CMAP0 | LOG_CMAP1 | LOG_XMAP0 | LOG_XMAP1 | LOG_REX3 | LOG_RAMDAC | LOG_COMMANDS | LOG_REJECTS)
@ -1843,7 +1843,7 @@ READ64_MEMBER(newport_base_device::rex3_r)
uint32_t newport_base_device::do_endian_swap(uint32_t color)
{
return (color >> 24) | (color << 24) | ((color >> 8) & 0x0000ff00) | ((color << 8) & 0x00ff0000);
return (color >> 24) | (color << 24) | ((color >> 8) & 0x0000ff00) | ((color << 8) & 0x00ff0000);
}
uint32_t newport_base_device::get_host_color()
@ -1862,47 +1862,47 @@ uint32_t newport_base_device::get_host_color()
{
default:
// No conversion needed
break;
break;
case 1: // 4bpp -> 8bpp
color = convert_4bpp_bgr_to_8bpp((uint8_t)color);
break;
break;
case 2: // 4bpp -> 12bpp
color = convert_4bpp_bgr_to_12bpp((uint8_t)color);
break;
break;
case 3: // 4bpp -> 24bpp
color = convert_4bpp_bgr_to_24bpp((uint8_t)color);
break;
break;
case 4: // 8bpp -> 4bpp
color = convert_8bpp_bgr_to_4bpp((uint8_t)color);
break;
break;
case 6: // 8bpp -> 12bpp
color = convert_8bpp_bgr_to_12bpp((uint8_t)color);
break;
break;
case 7: // 8bpp -> 24bpp
color = convert_8bpp_bgr_to_24bpp((uint8_t)color);
break;
break;
case 8: // 12bpp -> 4bpp
color = convert_12bpp_bgr_to_4bpp((uint16_t)color);
break;
break;
case 9: // 12bpp -> 8bpp
color = convert_12bpp_bgr_to_8bpp((uint16_t)color);
break;
break;
case 11: // 12bpp -> 24bpp
color = convert_12bpp_bgr_to_24bpp((uint16_t)color);
break;
break;
case 12: // 32bpp -> 4bpp
color = convert_24bpp_bgr_to_4bpp(color);
break;
break;
case 13: // 32bpp -> 8bpp
color = convert_24bpp_bgr_to_8bpp(color);
break;
break;
case 14: // 32bpp -> 12bpp
color = convert_24bpp_bgr_to_12bpp(color);
break;
break;
}
if (BIT(m_rex3.m_draw_mode1, 11))
color = do_endian_swap(color);
return color;
color = do_endian_swap(color);
return color;
}
void newport_base_device::write_pixel(uint32_t color)
@ -2024,11 +2024,11 @@ void newport_base_device::blend_pixel(uint32_t *dest_buf, uint32_t src)
switch (m_rex3.m_plane_depth)
{
case 0: // 4bpp (not supported)
break;
break;
case 1: // 8bpp
sb = (0xaa * BIT(src, 7)) | (0x55 * BIT(src, 6));
sg = (0x92 * BIT(src, 5)) | (0x49 * BIT(src, 4)) | (0x24 * BIT(src, 3));
sr = (0x92 * BIT(src, 2)) | (0x49 * BIT(src, 1)) | (0x24 * BIT(src, 0));
sb = (0xaa * BIT(src, 7)) | (0x55 * BIT(src, 6));
sg = (0x92 * BIT(src, 5)) | (0x49 * BIT(src, 4)) | (0x24 * BIT(src, 3));
sr = (0x92 * BIT(src, 2)) | (0x49 * BIT(src, 1)) | (0x24 * BIT(src, 0));
if (BIT(m_rex3.m_draw_mode1, 25))
{
@ -2258,58 +2258,58 @@ uint32_t newport_base_device::get_rgb_color(int16_t x, int16_t y)
{
static const uint8_t s_bayer[4][4] = { { 0, 12, 3, 15 },{ 8, 4, 11, 7 },{ 2, 14, 1, 13 },{ 10, 6, 9, 5 } };
uint32_t red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
uint32_t green = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
uint32_t blue = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
uint32_t alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
uint32_t red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
uint32_t green = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
uint32_t blue = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
uint32_t alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
if (red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
{
red = 0;
if (red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
{
red = 0;
}
else if (red > 0xff)
{
red = 0xff;
else if (red > 0xff)
{
red = 0xff;
}
if (green >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
{
green = 0;
if (green >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
{
green = 0;
}
else if (green > 0xff)
{
green = 0xff;
else if (green > 0xff)
{
green = 0xff;
}
if (blue >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
{
blue = 0;
if (blue >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
{
blue = 0;
}
else if (blue > 0xff)
{
blue = 0xff;
else if (blue > 0xff)
{
blue = 0xff;
}
if (alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
{
alpha = 0;
if (alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
{
alpha = 0;
}
else if (alpha > 0xff)
{
alpha = 0xff;
else if (alpha > 0xff)
{
alpha = 0xff;
}
alpha <<= 24;
alpha <<= 24;
if (!BIT(m_rex3.m_draw_mode1, 15)) // RGB
{
switch (m_rex3.m_plane_depth)
{
case 0: // 4bpp
return (m_rex3.m_curr_color_red >> 11) & 0x0000000f;
return (m_rex3.m_curr_color_red >> 11) & 0x0000000f;
case 1: // 8bpp
return (m_rex3.m_curr_color_red >> 11) & 0x000000ff;
return (m_rex3.m_curr_color_red >> 11) & 0x000000ff;
case 2: // 12bpp
return (m_rex3.m_curr_color_red >> 9) & 0x00000fff;
return (m_rex3.m_curr_color_red >> 9) & 0x00000fff;
case 3: // 24bpp
// Not supported
return 0;
@ -2915,66 +2915,66 @@ uint64_t newport_base_device::do_pixel_word_read()
void newport_base_device::iterate_shade()
{
if (m_rex3.m_slope_red & 0x7fffff)
m_rex3.m_curr_color_red += (m_rex3.m_slope_red << 8) >> 8;
if (m_rex3.m_slope_green & 0x7ffff)
m_rex3.m_curr_color_green += (m_rex3.m_slope_green << 12) >> 12;
if (m_rex3.m_slope_blue & 0x7ffff)
m_rex3.m_curr_color_blue += (m_rex3.m_slope_blue << 12) >> 12;
if (m_rex3.m_slope_alpha & 0x7ffff)
m_rex3.m_curr_color_alpha += (m_rex3.m_slope_alpha << 12) >> 12;
if (m_rex3.m_slope_red & 0x7fffff)
m_rex3.m_curr_color_red += (m_rex3.m_slope_red << 8) >> 8;
if (m_rex3.m_slope_green & 0x7ffff)
m_rex3.m_curr_color_green += (m_rex3.m_slope_green << 12) >> 12;
if (m_rex3.m_slope_blue & 0x7ffff)
m_rex3.m_curr_color_blue += (m_rex3.m_slope_blue << 12) >> 12;
if (m_rex3.m_slope_alpha & 0x7ffff)
m_rex3.m_curr_color_alpha += (m_rex3.m_slope_alpha << 12) >> 12;
if (BIT(m_rex3.m_draw_mode0, 21)) // CIClamp
{
if (BIT(m_rex3.m_draw_mode1, 15)) // RGBMode
{
const uint32_t val_red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
const uint32_t val_grn = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
const uint32_t val_blu = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
const uint32_t val_alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
if (BIT(m_rex3.m_draw_mode0, 21)) // CIClamp
{
if (BIT(m_rex3.m_draw_mode1, 15)) // RGBMode
{
const uint32_t val_red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
const uint32_t val_grn = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
const uint32_t val_blu = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
const uint32_t val_alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
if (val_red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
m_rex3.m_curr_color_red = 0;
else if (val_red > 0xff)
m_rex3.m_curr_color_red = 0x7ffff;
if (val_red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
m_rex3.m_curr_color_red = 0;
else if (val_red > 0xff)
m_rex3.m_curr_color_red = 0x7ffff;
if (val_grn >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
m_rex3.m_curr_color_green = 0;
else if (val_grn > 0xff)
m_rex3.m_curr_color_green = 0x7ffff;
if (val_grn >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
m_rex3.m_curr_color_green = 0;
else if (val_grn > 0xff)
m_rex3.m_curr_color_green = 0x7ffff;
if (val_blu >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
m_rex3.m_curr_color_blue = 0;
else if (val_blu > 0xff)
m_rex3.m_curr_color_blue = 0x7ffff;
if (val_blu >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
m_rex3.m_curr_color_blue = 0;
else if (val_blu > 0xff)
m_rex3.m_curr_color_blue = 0x7ffff;
if (val_alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
m_rex3.m_curr_color_alpha = 0;
else if (val_alpha > 0xff)
m_rex3.m_curr_color_alpha = 0x7ffff;
}
else
{
switch ((m_rex3.m_draw_mode1 >> 3) & 3)
{
case 0: // 4bpp
if (BIT(m_rex3.m_color_red, 15))
m_rex3.m_color_red = 0x00007fff;
break;
case 1: // 8bpp
if (BIT(m_rex3.m_color_red, 19))
m_rex3.m_color_red = 0x0007ffff;
break;
case 2: // 12bpp
if (BIT(m_rex3.m_color_red, 21))
m_rex3.m_color_red = 0x001fffff;
break;
case 3: // 24bpp
// No clamping on CI
break;
}
}
}
if (val_alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
m_rex3.m_curr_color_alpha = 0;
else if (val_alpha > 0xff)
m_rex3.m_curr_color_alpha = 0x7ffff;
}
else
{
switch ((m_rex3.m_draw_mode1 >> 3) & 3)
{
case 0: // 4bpp
if (BIT(m_rex3.m_color_red, 15))
m_rex3.m_color_red = 0x00007fff;
break;
case 1: // 8bpp
if (BIT(m_rex3.m_color_red, 19))
m_rex3.m_color_red = 0x0007ffff;
break;
case 2: // 12bpp
if (BIT(m_rex3.m_color_red, 21))
m_rex3.m_color_red = 0x001fffff;
break;
case 3: // 24bpp
// No clamping on CI
break;
}
}
}
}
void newport_base_device::do_rex3_command()
@ -3197,10 +3197,10 @@ void newport_base_device::do_rex3_command()
if ((dx > 0 && start_x >= end_x) || (dx < 0 && start_x <= end_x) || lr_abort)
{
m_rex3.m_curr_color_red = m_rex3.m_color_red;
m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
m_rex3.m_curr_color_red = m_rex3.m_color_red;
m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
start_x = m_rex3.m_x_save;
start_y += dy;
}
@ -3519,48 +3519,48 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
}
m_rex3.m_draw_mode1 = data32;
static const uint32_t s_store_shift[8][4][2] = {
{ { 0, 0 }, // None, 4bpp, Buffer 0/1
{ 0, 0 }, // None, 8bpp, Buffer 0/1
{ 0, 0 }, // None, 12bpp, Buffer 0/1
{ 0, 0 }, // None, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // RGB/CI, 4bpp, Buffer 0/1
{ 0, 8 }, // RGB/CI, 8bpp, Buffer 0/1
{ 0, 12 }, // RGB/CI, 12bpp, Buffer 0/1
{ 0, 0 }, // RGB/CI, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // RGBA, 4bpp, Buffer 0/1
{ 0, 8 }, // RGBA, 8bpp, Buffer 0/1
{ 0, 12 }, // RGBA, 12bpp, Buffer 0/1
{ 0, 0 }, // RGBA, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 8bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 12bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
},
{ { 8, 16 }, // Overlay, 4bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 8bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 12bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // Popup, 4bpp, Buffer 0/1
{ 0, 8 }, // Popup, 8bpp, Buffer 0/1
{ 0, 12 }, // Popup, 12bpp, Buffer 0/1
{ 0, 0 }, // Popup, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // CID, 4bpp, Buffer 0/1
{ 0, 8 }, // CID, 8bpp, Buffer 0/1
{ 0, 12 }, // CID, 12bpp, Buffer 0/1
{ 0, 0 }, // CID, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 8bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 12bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
},
};
static const uint32_t s_store_shift[8][4][2] = {
{ { 0, 0 }, // None, 4bpp, Buffer 0/1
{ 0, 0 }, // None, 8bpp, Buffer 0/1
{ 0, 0 }, // None, 12bpp, Buffer 0/1
{ 0, 0 }, // None, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // RGB/CI, 4bpp, Buffer 0/1
{ 0, 8 }, // RGB/CI, 8bpp, Buffer 0/1
{ 0, 12 }, // RGB/CI, 12bpp, Buffer 0/1
{ 0, 0 }, // RGB/CI, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // RGBA, 4bpp, Buffer 0/1
{ 0, 8 }, // RGBA, 8bpp, Buffer 0/1
{ 0, 12 }, // RGBA, 12bpp, Buffer 0/1
{ 0, 0 }, // RGBA, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 8bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 12bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
},
{ { 8, 16 }, // Overlay, 4bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 8bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 12bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // Popup, 4bpp, Buffer 0/1
{ 0, 8 }, // Popup, 8bpp, Buffer 0/1
{ 0, 12 }, // Popup, 12bpp, Buffer 0/1
{ 0, 0 }, // Popup, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // CID, 4bpp, Buffer 0/1
{ 0, 8 }, // CID, 8bpp, Buffer 0/1
{ 0, 12 }, // CID, 12bpp, Buffer 0/1
{ 0, 0 }, // CID, 24bpp, Buffer 0/1 (not valid)
},
{ { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 8bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 12bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
},
};
m_rex3.m_plane_enable = m_rex3.m_draw_mode1 & 7;
m_rex3.m_plane_depth = (m_rex3.m_draw_mode1 >> 3) & 3;
@ -3879,30 +3879,30 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
LOGMASKED(LOG_REX3, "REX3 Red/CI Full State Write: %08x\n", (uint32_t)(data >> 32));
m_rex3.m_color_red = (int32_t)((data >> 32) & 0xffffff);
m_rex3.m_curr_color_red = m_rex3.m_color_red;
if (!BIT(m_rex3.m_draw_mode1, 15))
{
switch (m_rex3.m_plane_depth)
{
case 0: // 4bpp
m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xf);
break;
case 1: // 8bpp
m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xff);
break;
case 2: // 12bpp
m_rex3.m_color_i = (uint32_t)((data >> 41) & 0xfff);
break;
case 3: // 32bpp
// Invalid for CI mode
break;
}
}
if (!BIT(m_rex3.m_draw_mode1, 15))
{
switch (m_rex3.m_plane_depth)
{
case 0: // 4bpp
m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xf);
break;
case 1: // 8bpp
m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xff);
break;
case 2: // 12bpp
m_rex3.m_color_i = (uint32_t)((data >> 41) & 0xfff);
break;
case 3: // 32bpp
// Invalid for CI mode
break;
}
}
}
if (ACCESSING_BITS_0_31)
{
LOGMASKED(LOG_REX3, "REX3 Alpha Full State Write: %08x\n", (uint32_t)data);
m_rex3.m_color_alpha = (int32_t)(data & 0xfffff);
m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
}
break;
case 0x0208/8:
@ -3910,13 +3910,13 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
{
LOGMASKED(LOG_REX3, "REX3 Green Full State Write: %08x\n", (uint32_t)(data >> 32));
m_rex3.m_color_green = (int32_t)((data >> 32) & 0xfffff);
m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_green = m_rex3.m_color_green;
}
if (ACCESSING_BITS_0_31)
{
LOGMASKED(LOG_REX3, "REX3 Blue Full State Write: %08x\n", (uint32_t)data);
m_rex3.m_color_blue = (int32_t)(data & 0xfffff);
m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
}
break;
case 0x0210/8:
@ -4004,16 +4004,16 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
{
LOGMASKED(LOG_REX3, "REX3 Packed Color Write: %08x\n", (uint32_t)data);
m_rex3.m_color_i = (uint32_t)data;
if (BIT(m_rex3.m_draw_mode1, 15))
{
if (BIT(m_rex3.m_draw_mode1, 15))
{
m_rex3.m_color_red = (data & 0xff) << 11;
m_rex3.m_color_green = (data & 0xff00) << 3;
m_rex3.m_color_blue = (data & 0xff0000) >> 5;
m_rex3.m_curr_color_red = m_rex3.m_color_red;
m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
}
m_rex3.m_curr_color_red = m_rex3.m_color_red;
m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
}
}
break;
case 0x0228/8:

20
src/devices/bus/gio64/newport.h
View File

@ -73,16 +73,16 @@ protected:
enum
{
STATUS_GFXBUSY = (1 << 3),
STATUS_BACKBUSY = (1 << 4),
STATUS_VRINT = (1 << 5),
STATUS_VIDEOINT = (1 << 6),
STATUS_GFIFOLEVEL_SHIFT = 7,
STATUS_GFIFOLEVEL_MASK = (0x3f << STATUS_GFIFOLEVEL_SHIFT),
STATUS_BFIFOLEVEL_SHIFT = 13,
STATUS_BFIFOLEVEL_MASK = (0x1f << STATUS_BFIFOLEVEL_SHIFT),
STATUS_BFIFO_INT = 18,
STATUS_GFIFO_INT = 19
STATUS_GFXBUSY = (1 << 3),
STATUS_BACKBUSY = (1 << 4),
STATUS_VRINT = (1 << 5),
STATUS_VIDEOINT = (1 << 6),
STATUS_GFIFOLEVEL_SHIFT = 7,
STATUS_GFIFOLEVEL_MASK = (0x3f << STATUS_GFIFOLEVEL_SHIFT),
STATUS_BFIFOLEVEL_SHIFT = 13,
STATUS_BFIFOLEVEL_MASK = (0x1f << STATUS_BFIFOLEVEL_SHIFT),
STATUS_BFIFO_INT = 18,
STATUS_GFIFO_INT = 19
};
struct vc2_t

8
src/devices/bus/isa/myb3k_fdc.cpp
View File

@ -259,7 +259,7 @@ WRITE8_MEMBER( isa8_myb3k_fdc471x_device_base::myb3k_fdc_command )
LOGCMD(" - Drive %d\n", selected_drive);
LOGCMD(" - Side %d\n", selected_side);
LOGCMD(" - Density %s\n", dden ? "MFM" : "FM");
if (has_motor_control)
LOGCMD(" - Motor %s\n", motor_on ? "ON" : "OFF");
@ -268,7 +268,7 @@ WRITE8_MEMBER( isa8_myb3k_fdc471x_device_base::myb3k_fdc_command )
if (floppy_connector.found())
floppy = floppy_connector->get_device();
m_fdc->set_floppy(floppy);
if (floppy != nullptr)
@ -277,7 +277,7 @@ WRITE8_MEMBER( isa8_myb3k_fdc471x_device_base::myb3k_fdc_command )
if (has_motor_control)
floppy->mon_w(motor_on ? 0 : 1); // Active low and inverter on incoming data line
}
}
m_fdc->dden_w(dden ? 0 : 1); // active low == MFM
}
@ -307,7 +307,7 @@ READ8_MEMBER( isa8_myb3k_fdc4712_device::myb3k_fdc_status )
auto floppy_connector = m_floppy_connectors[selected_drive];
floppy_image_device *floppy = nullptr;
if (floppy_connector.found())
floppy = floppy_connector->get_device();

10
src/devices/cpu/jaguar/jaguar.cpp
View File

@ -6,11 +6,11 @@
Core implementation for the portable Jaguar DSP emulator.
Written by Aaron Giles
TODO:
- Implement pipeline, actually instruction cycles;
Currently implementation is similar to single stepping
with single cycle
- Implement and acknowlodge remain registers
TODO:
- Implement pipeline, actually instruction cycles;
Currently implementation is similar to single stepping
with single cycle
- Implement and acknowlodge remain registers
***************************************************************************/

4
src/devices/cpu/m6502/xavix.cpp
View File

@ -18,8 +18,8 @@
0x0000-0x7fff seems to be a 'low bus' area, it is always the same regardless
of banking
0x8000-0xffff is a banked area with individual code and data banks
Zero Page notes:
Zero Page notes:
0x00ff contains the DATA bank, set manually in code
0x00fe appears to be the current CODE bank, set with either the

28
src/devices/cpu/sh/sh2.cpp
View File

@ -130,8 +130,8 @@ void sh2_device::sh7604_map(address_map &map)
// TODO: cps3boot breaks with this enabled. Needs callback
// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
// map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w));
// map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w));
// TODO: internal map takes way too much resources if mirrored with 0x1ffffe00
// we eventually internalize again via trampoline & sh7604_device
// Also area 0xffff8000-0xffffbfff is for synchronous DRAM mode,
@ -143,7 +143,7 @@ void sh2_device::sh7604_map(address_map &map)
map(0xfffffe03, 0xfffffe03).rw(FUNC(sh2_device::tdr_r), FUNC(sh2_device::tdr_w));
map(0xfffffe04, 0xfffffe04).rw(FUNC(sh2_device::ssr_r), FUNC(sh2_device::ssr_w));
map(0xfffffe05, 0xfffffe05).r(FUNC(sh2_device::rdr_r));
// FRC
map(0xfffffe10, 0xfffffe10).rw(FUNC(sh2_device::tier_r), FUNC(sh2_device::tier_w));
map(0xfffffe11, 0xfffffe11).rw(FUNC(sh2_device::ftcsr_r), FUNC(sh2_device::ftcsr_w));
@ -162,7 +162,7 @@ void sh2_device::sh7604_map(address_map &map)
map(0xfffffe71, 0xfffffe71).rw(FUNC(sh2_device::drcr_r<0>), FUNC(sh2_device::drcr_w<0>));
map(0xfffffe72, 0xfffffe72).rw(FUNC(sh2_device::drcr_r<1>), FUNC(sh2_device::drcr_w<1>));
// WTC
map(0xfffffe80, 0xfffffe81).rw(FUNC(sh2_device::wtcnt_r), FUNC(sh2_device::wtcnt_w));
map(0xfffffe82, 0xfffffe83).rw(FUNC(sh2_device::rstcsr_r), FUNC(sh2_device::rstcsr_w));
@ -170,7 +170,7 @@ void sh2_device::sh7604_map(address_map &map)
// standby and cache control
map(0xfffffe91, 0xfffffe91).rw(FUNC(sh2_device::sbycr_r), FUNC(sh2_device::sbycr_w));
map(0xfffffe92, 0xfffffe92).rw(FUNC(sh2_device::ccr_r), FUNC(sh2_device::ccr_w));
// INTC second section
map(0xfffffee0, 0xfffffee1).rw(FUNC(sh2_device::intc_icr_r), FUNC(sh2_device::intc_icr_w));
map(0xfffffee2, 0xfffffee3).rw(FUNC(sh2_device::ipra_r), FUNC(sh2_device::ipra_w));
@ -198,11 +198,11 @@ void sh2_device::sh7604_map(address_map &map)
map(0xffffff94, 0xffffff97).rw(FUNC(sh2_device::dar_r<1>), FUNC(sh2_device::dar_w<1>));
map(0xffffff98, 0xffffff9b).rw(FUNC(sh2_device::dmac_tcr_r<1>), FUNC(sh2_device::dmac_tcr_w<1>));
map(0xffffff9c, 0xffffff9f).rw(FUNC(sh2_device::chcr_r<1>), FUNC(sh2_device::chcr_w<1>));
map(0xffffffa0, 0xffffffa3).rw(FUNC(sh2_device::vcrdma_r<0>), FUNC(sh2_device::vcrdma_w<0>));
map(0xffffffa8, 0xffffffab).rw(FUNC(sh2_device::vcrdma_r<1>), FUNC(sh2_device::vcrdma_w<1>));
map(0xffffffb0, 0xffffffb3).rw(FUNC(sh2_device::dmaor_r), FUNC(sh2_device::dmaor_w));
// BSC
map(0xffffffe0, 0xffffffe3).rw(FUNC(sh2_device::bcr1_r), FUNC(sh2_device::bcr1_w));
map(0xffffffe4, 0xffffffe7).rw(FUNC(sh2_device::bcr2_r), FUNC(sh2_device::bcr2_w));
@ -575,7 +575,7 @@ void sh2_device::device_start()
save_item(NAME(m_irq_vector.divu));
save_item(NAME(m_irq_vector.dmac[0]));
save_item(NAME(m_irq_vector.dmac[1]));
save_item(NAME(m_ipra));
save_item(NAME(m_iprb));
save_item(NAME(m_vcra));
@ -590,14 +590,14 @@ void sh2_device::device_start()
save_item(NAME(m_vecmd));
save_item(NAME(m_nmie));
// DIVU
save_item(NAME(m_divu_ovf));
save_item(NAME(m_divu_ovfie));
save_item(NAME(m_dvsr));
save_item(NAME(m_dvdntl));
save_item(NAME(m_dvdnth));
// WTC
save_item(NAME(m_wtcnt));
save_item(NAME(m_wtcsr));
@ -617,11 +617,11 @@ void sh2_device::device_start()
save_item(NAME(m_dmac[1].tcr));
save_item(NAME(m_dmac[0].chcr));
save_item(NAME(m_dmac[1].chcr));
// misc
save_item(NAME(m_sbycr));
save_item(NAME(m_ccr));
// BSC
save_item(NAME(m_bcr1));
save_item(NAME(m_bcr2));
@ -630,7 +630,7 @@ void sh2_device::device_start()
save_item(NAME(m_rtcsr));
save_item(NAME(m_rtcor));
save_item(NAME(m_rtcnt));
/*
for (int i = 0; i < 16; ++i)
{
@ -647,7 +647,7 @@ void sh2_device::device_start()
save_item(NAME(m_internal_irq_vector));
save_item(NAME(m_dma_timer_active));
save_item(NAME(m_dma_irq));
state_add( STATE_GENPC, "PC", m_sh2_state->pc).mask(SH12_AM).callimport();
state_add( STATE_GENPCBASE, "CURPC", m_sh2_state->pc ).callimport().noshow();

38
src/devices/cpu/sh/sh2.h
View File

@ -95,7 +95,7 @@ public:
DECLARE_READ8_MEMBER( ssr_r );
DECLARE_WRITE8_MEMBER( ssr_w );
DECLARE_READ8_MEMBER( rdr_r );
// FRT / FRC
DECLARE_READ8_MEMBER( tier_r );
DECLARE_WRITE8_MEMBER( tier_w );
@ -110,7 +110,7 @@ public:
DECLARE_READ8_MEMBER( tocr_r );
DECLARE_WRITE8_MEMBER( tocr_w );
DECLARE_READ16_MEMBER( frc_icr_r );
// INTC
DECLARE_READ16_MEMBER( ipra_r );
DECLARE_WRITE16_MEMBER( ipra_w );
@ -130,7 +130,7 @@ public:
DECLARE_WRITE32_MEMBER( vcrdiv_w );
DECLARE_READ16_MEMBER( intc_icr_r );
DECLARE_WRITE16_MEMBER( intc_icr_w );
// DIVU
DECLARE_READ32_MEMBER( dvsr_r );
DECLARE_WRITE32_MEMBER( dvsr_w );
@ -143,21 +143,21 @@ public:
DECLARE_READ32_MEMBER( dvcr_r );
DECLARE_WRITE32_MEMBER( dvcr_w );
// DMAC
template <int Channel> READ32_MEMBER(vcrdma_r)
{
return m_vcrdma[Channel] & 0x7f;
}
template <int Channel> WRITE32_MEMBER(vcrdma_w)
{
COMBINE_DATA(&m_vcrdma[Channel]);
m_irq_vector.dmac[Channel] = m_vcrdma[Channel] & 0x7f;
sh2_recalc_irq();
}
template <int Channel> READ8_MEMBER(drcr_r) { return m_dmac[Channel].drcr & 3; }
template <int Channel> READ8_MEMBER(drcr_r) { return m_dmac[Channel].drcr & 3; }
template <int Channel> WRITE8_MEMBER(drcr_w) { m_dmac[Channel].drcr = data & 3; sh2_recalc_irq(); }
template <int Channel> READ32_MEMBER(sar_r) { return m_dmac[Channel].sar; }
template <int Channel> WRITE32_MEMBER(sar_w) { COMBINE_DATA(&m_dmac[Channel].sar); }
@ -166,8 +166,8 @@ public:
template <int Channel> READ32_MEMBER(dmac_tcr_r) { return m_dmac[Channel].tcr; }
template <int Channel> WRITE32_MEMBER(dmac_tcr_w) { COMBINE_DATA(&m_dmac[Channel].tcr); m_dmac[Channel].tcr &= 0xffffff; }
template <int Channel> READ32_MEMBER(chcr_r) { return m_dmac[Channel].chcr; }
template <int Channel> WRITE32_MEMBER(chcr_w)
{
template <int Channel> WRITE32_MEMBER(chcr_w)
{
uint32_t old;
old = m_dmac[Channel].chcr;
COMBINE_DATA(&m_dmac[Channel].chcr);
@ -186,19 +186,19 @@ public:
sh2_dmac_check(1);
}
}
// WTC
DECLARE_READ16_MEMBER( wtcnt_r );
DECLARE_WRITE16_MEMBER( wtcnt_w );
DECLARE_READ16_MEMBER( rstcsr_r );
DECLARE_WRITE16_MEMBER( rstcsr_w );
// misc
DECLARE_READ8_MEMBER( sbycr_r );
DECLARE_WRITE8_MEMBER( sbycr_w );
DECLARE_READ8_MEMBER( ccr_r );
DECLARE_WRITE8_MEMBER( ccr_w );
// BSC
DECLARE_READ32_MEMBER( bcr1_r );
DECLARE_WRITE32_MEMBER( bcr1_w );
@ -215,7 +215,7 @@ public:
DECLARE_READ32_MEMBER( rtcnt_r );
DECLARE_WRITE32_MEMBER( rtcnt_w );
virtual void set_frt_input(int state) override;
void sh2_notify_dma_data_available();
void func_fastirq();
@ -283,16 +283,16 @@ private:
uint16_t m_ipra, m_iprb;
uint16_t m_vcra, m_vcrb, m_vcrc, m_vcrd, m_vcrwdt, m_vcrdiv, m_intc_icr, m_vcrdma[2];
bool m_vecmd, m_nmie;
// DIVU
bool m_divu_ovf, m_divu_ovfie;
uint32_t m_dvsr, m_dvdntl, m_dvdnth;
// WTC
uint8_t m_wtcnt, m_wtcsr;
uint8_t m_rstcsr;
uint16_t m_wtcw[2];
// DMAC
struct {
uint8_t drcr;
@ -302,13 +302,13 @@ private:
uint32_t chcr;
} m_dmac[2];
uint8_t m_dmaor;
// misc
uint8_t m_sbycr, m_ccr;
// BSC
uint32_t m_bcr1, m_bcr2, m_wcr, m_mcr, m_rtcsr, m_rtcor, m_rtcnt;
int8_t m_nmi_line_state;
uint64_t m_frc_base;

30
src/devices/cpu/sh/sh2comn.cpp
View File

@ -510,10 +510,10 @@ READ8_MEMBER( sh2_device::rdr_r )
return 0;
}
/*
/*
* FRC
*/
READ8_MEMBER( sh2_device::tier_r )
{
return m_tier;
@ -529,10 +529,10 @@ WRITE8_MEMBER( sh2_device::tier_w )
READ8_MEMBER( sh2_device::ftcsr_r )
{
// TODO: to be tested
// TODO: to be tested
if (!m_ftcsr_read_cb.isnull())
m_ftcsr_read_cb((((m_tier<<24) | (m_ftcsr<<16)) & 0xffff0000) | m_frc);
return m_ftcsr;
}
@ -610,7 +610,7 @@ READ16_MEMBER( sh2_device::frc_icr_r )
return m_frc_icr;
}
/*
/*
* INTC
*/
@ -641,7 +641,7 @@ WRITE16_MEMBER( sh2_device::ipra_w )
m_irq_level.wdt = (m_ipra >> 4) & 0xf;
sh2_recalc_irq();
}
READ16_MEMBER( sh2_device::iprb_r )
{
return m_iprb & 0xff00;
@ -729,13 +729,13 @@ WRITE32_MEMBER( sh2_device::vcrdiv_w )
sh2_recalc_irq();
}
/*
/*
* DIVU
*/
READ32_MEMBER( sh2_device::dvcr_r )
{
return (m_divu_ovfie == true ? 2 : 0) | (m_divu_ovf == true ? 1 : 0);
return (m_divu_ovfie == true ? 2 : 0) | (m_divu_ovf == true ? 1 : 0);
}
WRITE32_MEMBER( sh2_device::dvcr_w )
@ -835,7 +835,7 @@ WRITE32_MEMBER( sh2_device::dvdntl_w )
}
}
/*
/*
* WTC
*/
@ -907,12 +907,12 @@ READ8_MEMBER( sh2_device::ccr_r )
WRITE8_MEMBER( sh2_device::ccr_w )
{
/*
xx-- ---- Way 0/1
---x ---- Cache Purge (CP), write only
---- x--- Two-Way Mode (TW)
---- -x-- Data Replacement Disable (OD)
---- --x- Instruction Replacement Disable (ID)
---- ---x Cache Enable (CE)
xx-- ---- Way 0/1
---x ---- Cache Purge (CP), write only
---- x--- Two-Way Mode (TW)
---- -x-- Data Replacement Disable (OD)
---- --x- Instruction Replacement Disable (ID)
---- ---x Cache Enable (CE)
*/
m_ccr = data;
}

48
src/devices/machine/am2910.cpp
View File

@ -5,21 +5,21 @@
am2910.cpp
AMD Am2910 Microprogram Controller emulation
TODO:
- Check /RLD behavior
- Find and fix bugs that almost surely exist
TODO:
- Check /RLD behavior
- Find and fix bugs that almost surely exist
***************************************************************************/
#include "emu.h"
#include "am2910.h"
#define LOG_INSN (1 << 0)
#define LOG_STACK (1 << 1)
#define LOG_ERROR (1 << 2)
#define LOG_ALL (LOG_INSN | LOG_STACK | LOG_ERROR)
#define LOG_INSN (1 << 0)
#define LOG_STACK (1 << 1)
#define LOG_ERROR (1 << 2)
#define LOG_ALL (LOG_INSN | LOG_STACK | LOG_ERROR)
#define VERBOSE (0)
#define VERBOSE (0)
#include "logmacro.h"
/*****************************************************************************/
@ -162,12 +162,12 @@ void am2910_device::execute()
m_pc += (uint16_t)m_ci;
switch (m_i)
{
case 0: // JZ, Jump Zero
case 0: // JZ, Jump Zero
LOGMASKED(LOG_INSN, "%04x: JZ\n", m_pc);
m_pc = 0;
m_sp = 0;
break;
case 1: // CJS, Conditional Jump-To-Subroutine PL
case 1: // CJS, Conditional Jump-To-Subroutine PL
LOGMASKED(LOG_INSN, "%04x: CJS\n", m_pc);
if (test_pass())
{
@ -175,22 +175,22 @@ void am2910_device::execute()
m_pc = m_d;
}
break;
case 2: // JMAP, Jump Map
case 2: // JMAP, Jump Map
LOGMASKED(LOG_INSN, "%04x: JMAP\n", m_pc);
m_pc = m_d;
break;
case 3: // CJP, Conditional Jump PL
case 3: // CJP, Conditional Jump PL
LOGMASKED(LOG_INSN, "%04x: CJP\n", m_pc);
if (test_pass())
m_pc = m_d;
break;
case 4: // PUSH, Push / Conditional Load Counter
case 4: // PUSH, Push / Conditional Load Counter
LOGMASKED(LOG_INSN, "%04x: PUSH\n", m_pc);
push(m_pc);
if (test_pass())
m_r = m_d;
break;
case 5: // JSRP, Conditional JSB R/PL
case 5: // JSRP, Conditional JSB R/PL
LOGMASKED(LOG_INSN, "%04x: JSRP\n", m_pc);
push(m_pc);
if (test_pass())
@ -198,21 +198,21 @@ void am2910_device::execute()
else
m_pc = m_r;
break;
case 6: // CJV, Conditional Jump Vector
case 6: // CJV, Conditional Jump Vector
LOGMASKED(LOG_INSN, "%04x: CJV\n", m_pc);
if (test_pass())
{
m_pc = m_d;
}
break;
case 7: // JRP, Conditional Jump R/PL
case 7: // JRP, Conditional Jump R/PL
LOGMASKED(LOG_INSN, "%04x: JRP\n", m_pc);
if (test_pass())
m_pc = m_d;
else
m_pc = m_r;
break;
case 8: // RFCT, Repeat Loop, Counter != 0
case 8: // RFCT, Repeat Loop, Counter != 0
LOGMASKED(LOG_INSN, "%04x: RFCT\n", m_pc);
if (m_r != 0)
{
@ -220,7 +220,7 @@ void am2910_device::execute()
m_pc = m_stack[m_sp];
}
break;
case 9: // RPCT, Repeat PL, Counter != 0
case 9: // RPCT, Repeat PL, Counter != 0
LOGMASKED(LOG_INSN, "%04x: RPCT\n", m_pc);
if (m_r != 0)
{
@ -228,12 +228,12 @@ void am2910_device::execute()
m_pc = m_d;
}
break;
case 10: // CRTN, Conditional Return
case 10: // CRTN, Conditional Return
LOGMASKED(LOG_INSN, "%04x: CRTN\n", m_pc);
if (test_pass())
m_pc = m_stack[m_sp];
break;
case 11: // CJPP, Conditional Jump PL & Pop
case 11: // CJPP, Conditional Jump PL & Pop
LOGMASKED(LOG_INSN, "%04x: CJPP\n", m_pc);
if (test_pass())
{
@ -241,19 +241,19 @@ void am2910_device::execute()
pop();
}
break;
case 12: // LDCT, Load Counter & Continue
case 12: // LDCT, Load Counter & Continue
LOGMASKED(LOG_INSN, "%04x: LDCT\n", m_pc);
m_r = m_d;
break;
case 13: // LOOP, Test End Loop
case 13: // LOOP, Test End Loop
LOGMASKED(LOG_INSN, "%04x: LOOP\n", m_pc);
if (!test_pass())
m_pc = m_stack[m_sp];
break;
case 14: // CONT, Continue
case 14: // CONT, Continue
LOGMASKED(LOG_INSN, "%04x: CONT\n", m_pc);
break;
case 15: // TWB, Three-Way Branch
case 15: // TWB, Three-Way Branch
LOGMASKED(LOG_INSN, "%04x: TWB\n", m_pc);
if (!test_pass())
{

10
src/devices/machine/am2910.h
View File

@ -24,11 +24,11 @@ public:
// construction/destruction
am2910_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE_LINE_MEMBER(cc_w); // !CC
DECLARE_WRITE_LINE_MEMBER(ccen_w); // !CCEN
DECLARE_WRITE_LINE_MEMBER(ci_w); // CI
DECLARE_WRITE_LINE_MEMBER(rld_w); // !RLD
DECLARE_WRITE_LINE_MEMBER(cp_w); // CP
DECLARE_WRITE_LINE_MEMBER(cc_w); // !CC
DECLARE_WRITE_LINE_MEMBER(ccen_w); // !CCEN
DECLARE_WRITE_LINE_MEMBER(ci_w); // CI
DECLARE_WRITE_LINE_MEMBER(rld_w); // !RLD
DECLARE_WRITE_LINE_MEMBER(cp_w); // CP
void d_w(uint16_t data);
void i_w(uint8_t data);

6
src/devices/machine/upd7004.cpp
View File

@ -6,9 +6,9 @@
10-bit 8 Channel A/D Converter
TODO:
- Serial modes
- 2s complement output
TODO:
- Serial modes
- 2s complement output
***************************************************************************/

6
src/frontend/mame/clifront.cpp
View File

@ -68,7 +68,7 @@
#define CLICOMMAND_VERIFYSOFTWARE "verifysoftware"
#define CLICOMMAND_GETSOFTLIST "getsoftlist"
#define CLICOMMAND_VERIFYSOFTLIST "verifysoftlist"
#define CLICOMMAND_VERSION "version"
#define CLICOMMAND_VERSION "version"
// command options
#define CLIOPTION_DTD "dtd"
@ -112,7 +112,7 @@ const options_entry cli_option_entries[] =
{ CLICOMMAND_VERIFYSOFTWARE ";vsoft", "0", OPTION_COMMAND, "verify known software for the system" },
{ CLICOMMAND_GETSOFTLIST ";glist", "0", OPTION_COMMAND, "retrieve software list by name" },
{ CLICOMMAND_VERIFYSOFTLIST ";vlist", "0", OPTION_COMMAND, "verify software list by name" },
{ CLICOMMAND_VERSION, "0", OPTION_COMMAND, "get MAME version" },
{ CLICOMMAND_VERSION, "0", OPTION_COMMAND, "get MAME version" },
{ nullptr, nullptr, OPTION_HEADER, "FRONTEND COMMAND OPTIONS" },
{ CLIOPTION_DTD, "1", OPTION_BOOLEAN, "include DTD in XML output" },
@ -1585,7 +1585,7 @@ const cli_frontend::info_command_struct *cli_frontend::find_command(const std::s
{ CLICOMMAND_ROMIDENT, 1, 1, &cli_frontend::romident, "(file or directory path)" },
{ CLICOMMAND_GETSOFTLIST, 0, 1, &cli_frontend::getsoftlist, "[system name|*]" },
{ CLICOMMAND_VERIFYSOFTLIST, 0, 1, &cli_frontend::verifysoftlist, "[system name|*]" },
{ CLICOMMAND_VERSION, 0, 0, &cli_frontend::version, "" }
{ CLICOMMAND_VERSION, 0, 0, &cli_frontend::version, "" }
};
for (const auto &info_command : s_info_commands)

6
src/mame/drivers/4enlinea.cpp
View File

@ -472,7 +472,7 @@ void _4enlinea_state::k7_io_map(address_map &map)
map(0x0100, 0x0100).w(m_ay, FUNC(ay8910_device::address_w));
map(0x0101, 0x0101).r(m_ay, FUNC(ay8910_device::data_r));
map(0x0102, 0x0102).w(m_ay, FUNC(ay8910_device::data_w));
// 0x03bf W (0x40)
// 0x03bf W (0x40)
}
@ -679,8 +679,8 @@ ROM_START( k7_olym )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "odk7_v3.11_27c512.ic18", 0x00000, 0x10000, CRC(063d24fe) SHA1(ad4509438d2028ede779f5aa9a918d1020c1db41) )
// The EEPROM contains a custom message (operators can set on-screen messages).
// A clean one for default need to be created...
// The EEPROM contains a custom message (operators can set on-screen messages).
// A clean one for default need to be created...
ROM_REGION( 0x0800, "eeprom", 0 )
ROM_LOAD( "x24c16p.bin", 0x0000, 0x0800, CRC(4c6685b2) SHA1(38c4f64f038d7ce185d6fd0b6eec4c9818f64e8e) )

24
src/mame/drivers/argus.cpp
View File

@ -107,18 +107,18 @@ Note :
- Information about the internal ROM tests (see also MT03219):
* argus: Checksum routine at $7fc9 (for banks at $7fc0). Checksum is a
simple sum of the contents. Our dump gives a result of 0x95 while the
game expects 0x9b, therefore it displays a checksum error. Checksums for
the banked ROMs match.
* valtric: Checksum routine at $987c (for banks at $f000). Checksum is a
XOR over the contents. The expected checksums are stored in ROM vt_06.bin
starting at $d000 (main ROM first, then banks). For our dump, the
expected checksums are all 0x00, but the calculated checksums differ,
therefore displays a checksum error for all ROMs. This has been validated
on real hardware to also fail there.
* butasan: Checksum routine is at $e0a8 (for banks at $ec74). Checksum is a
simple sum over the contents. The test seems to be broken (or hacked) as
it will only fail when the checksum is exactly 0x00.
simple sum of the contents. Our dump gives a result of 0x95 while the
game expects 0x9b, therefore it displays a checksum error. Checksums for
the banked ROMs match.
* valtric: Checksum routine at $987c (for banks at $f000). Checksum is a
XOR over the contents. The expected checksums are stored in ROM vt_06.bin
starting at $d000 (main ROM first, then banks). For our dump, the
expected checksums are all 0x00, but the calculated checksums differ,
therefore displays a checksum error for all ROMs. This has been validated
on real hardware to also fail there.
* butasan: Checksum routine is at $e0a8 (for banks at $ec74). Checksum is a
simple sum over the contents. The test seems to be broken (or hacked) as
it will only fail when the checksum is exactly 0x00.
Known issues :

2
src/mame/drivers/bagman.cpp
View File

@ -249,7 +249,7 @@ static INPUT_PORTS_START( pickin )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_MODIFY ("P2")
PORT_MODIFY ("P2")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL

16
src/mame/drivers/bbusters.cpp
View File

@ -182,15 +182,15 @@ If you calibrate the guns correctly the game runs as expected:
2) Using P2 controls fire at the indicated spots.
3) Using P3 controls fire at the indicated spots.
The locations of the shots fired in attract mode are defined by a table
starting at $65000. The value taken from there is combined with data from
the gun calibration to calculate the final position of the shots.
Unexpected calibration values will therefore cause the game to show the
shots in weird positions (see MT07333).
The locations of the shots fired in attract mode are defined by a table
starting at $65000. The value taken from there is combined with data from
the gun calibration to calculate the final position of the shots.
Unexpected calibration values will therefore cause the game to show the
shots in weird positions (see MT07333).
The EEPROM data starts with the 16 bit calibration values for all six axes
in the order: Minimum axis 0, middle axis 0, maximum axis 0 (repeat for
the other 5 axes).
The EEPROM data starts with the 16 bit calibration values for all six axes
in the order: Minimum axis 0, middle axis 0, maximum axis 0 (repeat for
the other 5 axes).
***************************************************************************/

16
src/mame/drivers/bigkarnk_ms.cpp
View File

@ -2,15 +2,15 @@
// copyright-holders:David Haywood
/*
Big Karnak (Modular System)
Big Karnak (Modular System)
this appears to be a different revision than the gaelco.cpp version, so could be original code, or
based off one that is otherwise undumped.
this appears to be a different revision than the gaelco.cpp version, so could be original code, or
based off one that is otherwise undumped.
as with most of the 'Modular System' setups, the hardware is heavily modified from the original
and consists of a multi-board stack in a cage, hence different driver.
as with most of the 'Modular System' setups, the hardware is heavily modified from the original
and consists of a multi-board stack in a cage, hence different driver.
TODO: PCB list
TODO: PCB list
*/
@ -139,7 +139,7 @@ ROM_START( bigkarnkm )
ROM_LOAD32_BYTE( "5_ka.ic15", 0x100002, 0x020000, CRC(802128e4) SHA1(20cfdf28aa7ada404ceca236c6eb554dcaa8e633) )
ROM_LOAD32_BYTE( "5_ka.ic21", 0x100001, 0x020000, CRC(5ccc0f99) SHA1(ae2b2d4b2aa77a099ad2711032e6a05ab52789b9) )
ROM_LOAD32_BYTE( "5_ka.ic27", 0x100000, 0x020000, CRC(55509d96) SHA1(ddd064695ca7e8c2377f13484e385bf7ea7df610) )
ROM_REGION( 0x100000, "gfx2", 0 )
ROM_LOAD32_BYTE( "8_ka_814.ic14", 0x000003, 0x020000, CRC(50e6cab6) SHA1(5af8b27f35a59611484ea35a2883b1e59d5c7517) )
ROM_LOAD32_BYTE( "8_ka_821.ic21", 0x000002, 0x020000, CRC(90c1d93e) SHA1(581a1e2f30e8b467c8d8f5c8e528c78c0c3904f2) )
@ -152,7 +152,7 @@ ROM_START( bigkarnkm )
ROM_REGION( 0x100, "prom", ROMREGION_ERASEFF )
ROM_LOAD( "51_p0502_n82s129n.ic10", 0x000, 0x100, CRC(15085e44) SHA1(646e7100fcb112594023cf02be036bd3d42cc13c) ) // common PROM found on all? Modular System sets?
ROM_REGION( 0x100000, "pals", 0 )
ROM_LOAD( "51_p0503_pal16r6acn.ic48", 0x000, 0x104, CRC(07eb86d2) SHA1(482eb325df5bc60353bac85412cf45429cd03c6d) ) // matches one of the Euro League Modular System PALs

18
src/mame/drivers/cntsteer.cpp
View File

@ -23,11 +23,11 @@
We currently have slave CPU irq hooked up to vblank, might or might not be correct.
- invert order between maincpu and subcpu, subcpu is clearly the master CPU here.
- understand why background mirroring causes wrong gfxs on title screen_device.
Probably area 0x2000-0x2fff enables tile bank bit 8 and write addresses have same mapping as reading.
A preliminary decoding is in tilelayout_swap;
- tilemap flashing when gameplay timer is running out;
- tilemap scrolling, correct only for title screen.
Maybe upper scroll bits also controls startdx/dy?
Probably area 0x2000-0x2fff enables tile bank bit 8 and write addresses have same mapping as reading.
A preliminary decoding is in tilelayout_swap;
- tilemap flashing when gameplay timer is running out;
- tilemap scrolling, correct only for title screen.
Maybe upper scroll bits also controls startdx/dy?
cleanup
- split into driver/video;
@ -308,8 +308,8 @@ void cntsteer_state::cntsteer_draw_sprites( bitmap_ind16 &bitmap, const rectangl
multi = m_spriteram[offs + 0] & 0x10;
magnify = (m_spriteram[offs + 0] & 0x20) >> 5;
region = magnify ? 3 : 1;
tile_size = magnify ? 32 : 16;
tile_size = magnify ? 32 : 16;
if (m_flipscreen)
{
sy = 240 - sy;
@ -874,8 +874,8 @@ static const gfx_layout sprites_magnify =
{ RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) },
{ 16*8, 1+16*8, 2+16*8, 3+16*8, 4+16*8, 5+16*8, 6+16*8, 7+16*8,
0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 0*8, 1*8, 1*8, 2*8, 2*8, 3*8, 3*8,
4*8, 4*8, 5*8, 5*8, 6*8, 6*8, 7*8, 7*8,
{ 0*8, 0*8, 1*8, 1*8, 2*8, 2*8, 3*8, 3*8,
4*8, 4*8, 5*8, 5*8, 6*8, 6*8, 7*8, 7*8,
8*8, 8*8, 9*8, 9*8, 10*8,10*8,11*8,11*8,
12*8,12*8,13*8,13*8,14*8,14*8,15*8,15*8 },
16*16

16
src/mame/drivers/dfruit.cpp
View File

@ -4,7 +4,7 @@
Fruit Dream (c) 1993 Nippon Data Kiki / Star Fish
Gemcrush (c) 1996 Star Fish
driver by Angelo Salese
Uses a TC0091LVC, a variant of the one used on Taito L HW
@ -14,7 +14,7 @@
- lamps?
- service mode?
- nvram?
- dfruit: (possible bug) has an X on top-left corner after POST,
- dfruit: (possible bug) has an X on top-left corner after POST,
is it supposed to be disabled somehow?
***************************************************************************/
@ -199,7 +199,7 @@ static INPUT_PORTS_START( gemcrush )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN1")
PORT_DIPNAME( 0x01, 0x01, "IN1" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
@ -225,7 +225,7 @@ static INPUT_PORTS_START( gemcrush )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN2")
PORT_DIPNAME( 0x01, 0x01, "IN2" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
@ -244,7 +244,7 @@ static INPUT_PORTS_START( gemcrush )
// guess: these works only on round select
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_START("DSW")
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DS1:1,2,3")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
@ -350,10 +350,10 @@ ROM_END
ROM_START( gemcrush )
ROM_REGION( 0x40000, "tc0091lvc", ROMREGION_ERASE00 )
ROM_LOAD( "gcj_00.ic2", 0x000000, 0x040000, CRC(e1431390) SHA1(f1f63e23d4b73cc099adddeadcf1ea3e27688bcd) ) /* ST M27C2001 EPROM */
ROM_LOAD( "gcj_00.ic2", 0x000000, 0x040000, CRC(e1431390) SHA1(f1f63e23d4b73cc099adddeadcf1ea3e27688bcd) ) /* ST M27C2001 EPROM */
ROM_REGION( 0x80000, "tc0091lvc:gfx", ROMREGION_ERASE00 )
ROM_LOAD( "gcj_01.ic10", 0x000000, 0x080000, CRC(5b9e7a6e) SHA1(345357feed8e80e6a06093fcb69f2b38063d057a) ) /* HN27C4096 EPROM */
ROM_REGION( 0x80000, "tc0091lvc:gfx", ROMREGION_ERASE00 )
ROM_LOAD( "gcj_01.ic10", 0x000000, 0x080000, CRC(5b9e7a6e) SHA1(345357feed8e80e6a06093fcb69f2b38063d057a) ) /* HN27C4096 EPROM */
ROM_END
GAME( 1993, dfruit, 0, dfruit, dfruit, dfruit_state, empty_init, ROT0, "Nippon Data Kiki / Star Fish", "Fruit Dream (Japan)", 0 )

108
src/mame/drivers/dpb7000.cpp
View File

@ -26,21 +26,21 @@
#include "screen.h"
#include <deque>
#define LOG_UNKNOWN (1 << 0)
#define LOG_UCODE (1 << 1)
#define LOG_MORE_UCODE (1 << 2)
#define LOG_CSR (1 << 3)
#define LOG_CTRLBUS (1 << 4)
#define LOG_SYS_CTRL (1 << 5)
#define LOG_FDC_CTRL (1 << 6)
#define LOG_FDC_PORT (1 << 7)
#define LOG_FDC_CMD (1 << 8)
#define LOG_OUTPUT_TIMING (1 << 9)
#define LOG_BRUSH_ADDR (1 << 10)
#define LOG_ALL (LOG_UNKNOWN | LOG_UCODE | LOG_MORE_UCODE | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | \
#define LOG_UNKNOWN (1 << 0)
#define LOG_UCODE (1 << 1)
#define LOG_MORE_UCODE (1 << 2)
#define LOG_CSR (1 << 3)
#define LOG_CTRLBUS (1 << 4)
#define LOG_SYS_CTRL (1 << 5)
#define LOG_FDC_CTRL (1 << 6)
#define LOG_FDC_PORT (1 << 7)
#define LOG_FDC_CMD (1 << 8)
#define LOG_OUTPUT_TIMING (1 << 9)
#define LOG_BRUSH_ADDR (1 << 10)
#define LOG_ALL (LOG_UNKNOWN | LOG_UCODE | LOG_MORE_UCODE | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | \
LOG_OUTPUT_TIMING | LOG_BRUSH_ADDR)
#define VERBOSE (LOG_ALL &~ LOG_FDC_CTRL)
#define VERBOSE (LOG_ALL &~ LOG_FDC_CTRL)
#include "logmacro.h"
class dpb7000_state : public driver_device
@ -111,11 +111,11 @@ private:
enum : uint16_t
{
SYSCTRL_AUTO_START = 0x0001,
SYSCTRL_REQ_B_EN = 0x0020,
SYSCTRL_REQ_A_EN = 0x0040,
SYSCTRL_REQ_A_IN = 0x0080,
SYSCTRL_REQ_B_IN = 0x8000
SYSCTRL_AUTO_START = 0x0001,
SYSCTRL_REQ_B_EN = 0x0020,
SYSCTRL_REQ_A_EN = 0x0040,
SYSCTRL_REQ_A_IN = 0x0080,
SYSCTRL_REQ_B_IN = 0x8000
};
DECLARE_READ16_MEMBER(cpu_sysctrl_r);
@ -172,31 +172,31 @@ private:
enum : uint8_t
{
DSEQ_STATUS_READY_BIT = 0, // C5
DSEQ_STATUS_FAULT_BIT = 1, // C6
DSEQ_STATUS_ONCYL_BIT = 2, // C7
DSEQ_STATUS_SKERR_BIT = 3, // C8
DSEQ_STATUS_INDEX_BIT = 4, // C9
DSEQ_STATUS_SECTOR_BIT = 5, // C10
DSEQ_STATUS_AMFND_BIT = 6, // C11
DSEQ_STATUS_WTPROT_BIT = 7, // C12
DSEQ_STATUS_SELECTED_BIT = 8, // C13
DSEQ_STATUS_SEEKEND_BIT = 9, // C14
DSEQ_STATUS_SYNC_DET_BIT = 10, // C15
DSEQ_STATUS_RAM_ADDR_OVFLO_BIT = 11, // C16
DSEQ_STATUS_READY_BIT = 0, // C5
DSEQ_STATUS_FAULT_BIT = 1, // C6
DSEQ_STATUS_ONCYL_BIT = 2, // C7
DSEQ_STATUS_SKERR_BIT = 3, // C8
DSEQ_STATUS_INDEX_BIT = 4, // C9
DSEQ_STATUS_SECTOR_BIT = 5, // C10
DSEQ_STATUS_AMFND_BIT = 6, // C11
DSEQ_STATUS_WTPROT_BIT = 7, // C12
DSEQ_STATUS_SELECTED_BIT = 8, // C13
DSEQ_STATUS_SEEKEND_BIT = 9, // C14
DSEQ_STATUS_SYNC_DET_BIT = 10, // C15
DSEQ_STATUS_RAM_ADDR_OVFLO_BIT = 11, // C16
DSEQ_CTRLOUT_CK_SEL_1 = (1 << 0), // S40
DSEQ_CTRLOUT_CK_SEL_0 = (1 << 1), // S41
DSEQ_CTRLOUT_ADDR_W_PERMIT = (1 << 2), // S42
DSEQ_CTRLOUT_ZERO_RAM = (1 << 3), // S43
DSEQ_CTRLOUT_WRITE_RAM = (1 << 4), // S44
DSEQ_CTRLOUT_WORD_READ_RAM = (1 << 5), // S45
DSEQ_CTRLOUT_WRITE_SYNC = (1 << 6), // S46
DSEQ_CTRLOUT_SYNC_DET_EN = (1 << 7), // S47
DSEQ_CTRLOUT_CK_SEL_1 = (1 << 0), // S40
DSEQ_CTRLOUT_CK_SEL_0 = (1 << 1), // S41
DSEQ_CTRLOUT_ADDR_W_PERMIT = (1 << 2), // S42
DSEQ_CTRLOUT_ZERO_RAM = (1 << 3), // S43
DSEQ_CTRLOUT_WRITE_RAM = (1 << 4), // S44
DSEQ_CTRLOUT_WORD_READ_RAM = (1 << 5), // S45
DSEQ_CTRLOUT_WRITE_SYNC = (1 << 6), // S46
DSEQ_CTRLOUT_SYNC_DET_EN = (1 << 7), // S47
DSEQ_CTRLOUT_WRITE_ZERO = (1 << 5), // S53
DSEQ_CTRLOUT_LINE_CK = (1 << 6), // S54
DSEQ_CTRLOUT_DISC_CLEAR = (1 << 7), // S55
DSEQ_CTRLOUT_WRITE_ZERO = (1 << 5), // S53
DSEQ_CTRLOUT_LINE_CK = (1 << 6), // S54
DSEQ_CTRLOUT_DISC_CLEAR = (1 << 7), // S55
};
// Computer Card
@ -207,17 +207,17 @@ private:
int m_diskseq_cp;
bool m_diskseq_reset;
bool m_diskseq_halt;
uint8_t m_diskseq_line_cnt; // EF/EE
uint8_t m_diskseq_ed_cnt; // ED
uint8_t m_diskseq_head_cnt; // EC
uint16_t m_diskseq_cyl_from_cpu; // AE/BH
uint16_t m_diskseq_cmd_from_cpu; // DD/CC
uint8_t m_diskseq_line_cnt; // EF/EE
uint8_t m_diskseq_ed_cnt; // ED
uint8_t m_diskseq_head_cnt; // EC
uint16_t m_diskseq_cyl_from_cpu; // AE/BH
uint16_t m_diskseq_cmd_from_cpu; // DD/CC
uint8_t m_diskseq_cyl_to_ctrl;
uint8_t m_diskseq_cmd_to_ctrl;
uint8_t m_diskseq_status_in; // CG
uint8_t m_diskseq_status_out; // BC
uint8_t m_diskseq_ucode_latch[7]; // GG/GF/GE/GD/GC/GB/GA
uint8_t m_diskseq_cc_inputs[4]; // Inputs to FE/FD/FC/FB
uint8_t m_diskseq_status_in; // CG
uint8_t m_diskseq_status_out; // BC
uint8_t m_diskseq_ucode_latch[7]; // GG/GF/GE/GD/GC/GB/GA
uint8_t m_diskseq_cc_inputs[4]; // Inputs to FE/FD/FC/FB
// Output Timing Card
uint16_t m_cursor_origin_x;
@ -786,10 +786,10 @@ WRITE16_MEMBER(dpb7000_state::cpu_ctrlbus_w)
{
static const char* const s_func_names[16] =
{
"Live Video", "Brush Store Read", "Brush Store Write", "Framestore Read",
"Framestore Write", "Fast Wipe Video", "Fast Wipe Brush Store", "Fast Wipe Framestore",
"Draw", "Draw with Stencil I", "Draw with Stencil II", "Copy to Framestore",
"Copy to Brush Store", "Paste with Stencil I", "Paste with Stencil II", "Copy to same Framestore (Invert)"
"Live Video", "Brush Store Read", "Brush Store Write", "Framestore Read",
"Framestore Write", "Fast Wipe Video", "Fast Wipe Brush Store", "Fast Wipe Framestore",
"Draw", "Draw with Stencil I", "Draw with Stencil II", "Copy to Framestore",
"Copy to Brush Store", "Paste with Stencil I", "Paste with Stencil II", "Copy to same Framestore (Invert)"
};
LOGMASKED(LOG_CTRLBUS | LOG_BRUSH_ADDR, "%s: Brush Address Card, Function Select: %04x\n", machine().describe_context(), data);
LOGMASKED(LOG_CTRLBUS | LOG_BRUSH_ADDR, " Function: %s\n", s_func_names[(data >> 1) & 0xf]);

74
src/mame/drivers/elan_eu3a14.cpp
View File

@ -30,33 +30,33 @@
The Basketball camera also uses an ETOMS CU5502. It’s different from the others (XaviXport + Real Swing Golf) in that the sensor is on a small PCB with
a 3.58MHz resonator with 16 wires going to another small PCB that has a glob and a 4MHz resonator. 6 wires go from that PCB to the main game PCB.
To access hidden test mode in Football hold enter and right during power on.
To access hidden test mode in Football hold enter and right during power on.
Football test mode tests X pos, Y pos, Z pos, direction and speed. This data must all be coming from the camera in the unit as the shinpads are simply
reflective objects, they don't contain any electronics. It could be a useful test case for better understanding these things.
Football test mode tests X pos, Y pos, Z pos, direction and speed. This data must all be coming from the camera in the unit as the shinpads are simply
reflective objects, they don't contain any electronics. It could be a useful test case for better understanding these things.
To access hidden test mode in Golden Tee Home hold back/backspin and left during power on.
To access hidden test mode in Golden Tee Home hold back/backspin and left during power on.
To access hidden test mode in Basketball hold left and Button 1 during power on.
To access hidden test mode in Basketball hold left and Button 1 during power on.
To access hidden test mode in Real Swing Golf hold left and down during power on.
- test mode check
77B6: lda $5041
77B9: eor #$ed
77BB: beq $77be
To access hidden test mode in Real Swing Golf hold left and down during power on.
- test mode check
77B6: lda $5041
77B9: eor #$ed
77BB: beq $77be
To access hidden test mode in Baseball 3 hold down during power on.
- test mode check
686E: lda $5041
6871: eor #$f7
6873: bne $68c8
To access hidden test mode in Baseball 3 hold down during power on.
- test mode check
686E: lda $5041
6871: eor #$f7
6873: bne $68c8
It is not clear how to access Huntin'3 Test Mode (if possible) there do appear to be tiles for it tho
It is not clear how to access Huntin'3 Test Mode (if possible) there do appear to be tiles for it tho
Huntin'3 makes much more extensive use of the video hardware than the other titles, including
- Table based Rowscroll (most first person views)
- RAM based tiles (status bar in "Target Range", text descriptions on menus etc.)
- Windowing effects (to highlight menu items, timer in "Target Range") NOT YET EMULATED / PROPERLY UNDERSTOOD
Huntin'3 makes much more extensive use of the video hardware than the other titles, including
- Table based Rowscroll (most first person views)
- RAM based tiles (status bar in "Target Range", text descriptions on menus etc.)
- Windowing effects (to highlight menu items, timer in "Target Range") NOT YET EMULATED / PROPERLY UNDERSTOOD
*/
@ -492,7 +492,7 @@ int radica_eu3a14_state::get_xscroll_for_screenypos(int ydraw)
int xscroll = m_scrollregs[0] | (m_scrollregs[1] << 8);
if (m_rowscrollcfg[1] == 0x01) // GUESS! could be anything, but this bit is set in Huntin'3
if (m_rowscrollcfg[1] == 0x01) // GUESS! could be anything, but this bit is set in Huntin'3
{
int split0 = m_rowscrollregs[0] | (m_rowscrollregs[1] << 8);
int split1 = m_rowscrollregs[2] | (m_rowscrollregs[3] << 8);
@ -589,11 +589,11 @@ void radica_eu3a14_state::draw_background_ramlayer(screen_device& screen, bitmap
// this register use is questionable
if (m_ramtilecfg[0] & 0x80)
{
int rtm_size;;
int rtm_pagewidth;
int rtm_pageheight;
int rtm_yscroll;
int rtm_bpp;
int rtm_size;;
int rtm_pagewidth;
int rtm_pageheight;
int rtm_yscroll;
int rtm_bpp;
int rtm_bytespertile = 2;
uint8_t palettepri = m_ramtilecfg[1];
@ -638,7 +638,7 @@ void radica_eu3a14_state::draw_background_ramlayer(screen_device& screen, bitmap
// wrap y
draw_background_page(screen, bitmap, cliprect, ramstart, ramend, 0, (rtm_size * rtm_pageheight) + 0 - rtm_yscroll, rtm_size, rtm_bpp, rtm_base, rtm_pagewidth, rtm_pageheight, rtm_bytespertile, palettepri, 1);
// wrap x+y
draw_background_page(screen, bitmap, cliprect, ramstart, ramend, (rtm_size * rtm_pagewidth), (rtm_size * rtm_pageheight) + 0 - rtm_yscroll, rtm_size, rtm_bpp, rtm_base, rtm_pagewidth, rtm_pageheight, rtm_bytespertile, palettepri, 1);
draw_background_page(screen, bitmap, cliprect, ramstart, ramend, (rtm_size * rtm_pagewidth), (rtm_size * rtm_pageheight) + 0 - rtm_yscroll, rtm_size, rtm_bpp, rtm_base, rtm_pagewidth, rtm_pageheight, rtm_bytespertile, palettepri, 1);
}
}
@ -722,7 +722,7 @@ void radica_eu3a14_state::draw_background(screen_device &screen, bitmap_ind16 &b
ramstart = m_tilerambase + pagesize * 2;
ramend = m_tilerambase + pagesize * 3;
draw_background_page(screen, bitmap, cliprect, ramstart,ramend, 0, (size * pageheight) - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0); // normal
draw_background_page(screen, bitmap, cliprect, ramstart,ramend, (size * pagewidth * 2), (size * pageheight) - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0); // wrap x
draw_background_page(screen, bitmap, cliprect, ramstart,ramend, 0, (size * pageheight * 3) - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0); // wrap y
@ -730,7 +730,7 @@ void radica_eu3a14_state::draw_background(screen_device &screen, bitmap_ind16 &b
ramstart = m_tilerambase + pagesize * 3;
ramend = m_tilerambase + pagesize * 4;
draw_background_page(screen, bitmap, cliprect, ramstart,ramend, (size * pagewidth), (size * pageheight) - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0); // normal
draw_background_page(screen, bitmap, cliprect, ramstart,ramend, (size * pagewidth * 3), (size * pageheight) - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0); // wrap x
draw_background_page(screen, bitmap, cliprect, ramstart,ramend, (size * pagewidth), (size * pageheight * 3) - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0);// wrap y
@ -738,7 +738,7 @@ void radica_eu3a14_state::draw_background(screen_device &screen, bitmap_ind16 &b
}
else if ((m_tilecfg[0] & 0x03) == 0x03) // individual tilemaps? multiple layers?
{
// popmessage("m_tilecfg[0] & 0x03 multiple layers config %04x", base);
// popmessage("m_tilecfg[0] & 0x03 multiple layers config %04x", base);
ramstart = m_tilerambase + pagesize * 0;
ramend = m_tilerambase + pagesize * 1;
@ -750,7 +750,7 @@ void radica_eu3a14_state::draw_background(screen_device &screen, bitmap_ind16 &b
draw_background_page(screen, bitmap, cliprect, ramstart, ramend, 0, (size * pageheight) + 0 - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0);
// wrap x+y
draw_background_page(screen, bitmap, cliprect, ramstart, ramend, (size * pagewidth), (size * pageheight) + 0 - yscroll, size, bpp, base, pagewidth,pageheight, bytespertile, palettepri, 0);
// RAM based tile layer
draw_background_ramlayer(screen, bitmap, cliprect);
}
@ -798,7 +798,7 @@ void radica_eu3a14_state::draw_sprite_line(screen_device &screen, bitmap_ind16 &
offset += line * 4;
bppdiv = 2;
break;
case 0x2:
offset += line * 2;
bppdiv = 4;
@ -853,7 +853,7 @@ void radica_eu3a14_state::draw_sprite_line(screen_device &screen, bitmap_ind16 &
if (flipx) { mask = 0x0f; shift = 0; } else { mask = 0xf0; shift = 4; }
draw_sprite_pix(cliprect, dst, pridst, realx, priority, pix, mask, shift, palette);
realx++;
if (flipx) { mask = 0xf0; shift = 4; } else { mask = 0x0f; shift = 0; }
if (flipx) { mask = 0xf0; shift = 4; } else { mask = 0x0f; shift = 0; }
draw_sprite_pix(cliprect, dst, pridst, realx, priority, pix, mask, shift, palette);
}
else if (bpp == 3)
@ -1156,7 +1156,7 @@ void radica_eu3a14_state::radica_eu3a14_map(address_map &map)
// video regs are in the 51xx range
// huntin'3 seems to use some registers for a windowing / highlight effect on the trophy room names and "Target Range" mode timer??
// 5100 - 0x0f when effect is enabled, 0x00 otherwise?
// 5100 - 0x0f when effect is enabled, 0x00 otherwise?
// 5101 - 0x0e in both modes
// 5102 - 0x86 in both modes
// 5103 - 0x0e in tropy room (left?) / 0x2a in "Target Range" mode (left position?)
@ -1179,9 +1179,9 @@ void radica_eu3a14_state::radica_eu3a14_map(address_map &map)
map(0x5116, 0x5117).ram().share("rowscrollcfg"); // 00 01 in hnt3 (could just be extra tile config bits, purpose guessed) set to 00 05 in rad_gtg overhead part (no rowscroll)
// 0x5118, 0x5119 not used
map(0x511a, 0x511e).ram().share("rowscrollsplit"); // hnt3 (60 68 78 90 b8 - rowscroll position list see note below
// register value notes for 511a-511e and how they relate to screen
// 00-6f normal scroll reg
// 00-6f normal scroll reg
// 60-67 is where the first extra scroll reg (rowscrollregs) is onscreen
// 68-77 is the 2nd
// 78-8f is the 3rd
@ -1894,7 +1894,7 @@ ROM_END
ROM_START( rad_hnt3p )
ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD( "huntin3.bin", 0x000000, 0x400000, CRC(c8e3e40b) SHA1(81eb16ac5ab6d93525fcfadbc6703b2811d7de7f) )
ROM_LOAD( "huntin3.bin", 0x000000, 0x400000, CRC(c8e3e40b) SHA1(81eb16ac5ab6d93525fcfadbc6703b2811d7de7f) )
ROM_END
ROM_START( rad_bask )

8
src/mame/drivers/gaelco2.cpp
View File

@ -527,9 +527,9 @@ void gaelco2_state::saltcrdi(machine_config &config)
02AB = MC68HC000FN12
SW1 = 8 dipswitches (soldered on the back side of the PCB, all off by default)
U24 = Unpopulated socket for 424C257
There is also a Salter I/O PCB with a MCU (undumped) labeled as "2".
The I/O PCB layout is slightly different than the one found on the Pro Stepper machine.
There is also a Salter I/O PCB with a MCU (undumped) labeled as "2".
The I/O PCB layout is slightly different than the one found on the Pro Stepper machine.
*/
ROM_START( sltpcycl ) // REF 970410
ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 code */
@ -592,7 +592,7 @@ ROM_END
E208 = MC68HC000FN16
SW1 = 8 dipswitches (soldered on the back side of the PCB, all off by default)
U24 = Unpopulated socket for 424C257
There is also a Salter I/O PCB with a MCU (undumped):
Salter PCB "CPU 6022" manufactured by "APEL Electronica"

52
src/mame/drivers/galpanic_ms.cpp
View File

@ -2,22 +2,22 @@
// copyright-holders:David Haywood, Nicola Salmoria
/*
Gals Panic (Modular System bootleg)
Gals Panic (Modular System bootleg)
PCB stack was marked as 'New Quiz' (aka New Qix?)
PCB stack was marked as 'New Quiz' (aka New Qix?)
this is a clone of the expro02.cpp version of Gals Panic
the hardware changes make it messy enough to have its own driver tho
this is a clone of the expro02.cpp version of Gals Panic
The Modular System cage contains 6! main boards for this game.
the hardware changes make it messy enough to have its own driver tho
MOD-6M - 68k board (CPU + 6 ROMs + RAM)
COMP MOD-A - RAM board for Framebuffer gfx, 24Mhz XTAL
MOD1/5 - Sound board (Z80, 2xYM2203C) (various wire mods and small sub-boards) Dipswitches also on here (same/similar to the Euro League Modular board?)
MOD51/3 - Sprite board (ROM sockets used for plug in board below)
COMP AEREO MOD/5-1 (MODULAR SYSTEM 2) - Sprite ROM board, plugs into above, 24 sprite ROMs
MOD 4/3 - Tilemap board, has logic + 4 tilemap ROMs, long thin sub-board (CAR-0484/1 SOLD) with no chips, just routing along one edge
The Modular System cage contains 6! main boards for this game.
MOD-6M - 68k board (CPU + 6 ROMs + RAM)
COMP MOD-A - RAM board for Framebuffer gfx, 24Mhz XTAL
MOD1/5 - Sound board (Z80, 2xYM2203C) (various wire mods and small sub-boards) Dipswitches also on here (same/similar to the Euro League Modular board?)
MOD51/3 - Sprite board (ROM sockets used for plug in board below)
COMP AEREO MOD/5-1 (MODULAR SYSTEM 2) - Sprite ROM board, plugs into above, 24 sprite ROMs
MOD 4/3 - Tilemap board, has logic + 4 tilemap ROMs, long thin sub-board (CAR-0484/1 SOLD) with no chips, just routing along one edge
*/
@ -95,7 +95,7 @@ void galspanic_ms_state::newquiz_map(address_map &map)
map(0x800004, 0x800005).portr("SYSTEM");
map(0x80000e, 0x80000f).r(FUNC(galspanic_ms_state::comad_timer_r));
map(0xb00000, 0xbfffff).rom().region("user1", 0); // reads girl data here
map(0xc80000, 0xc8ffff).ram();
@ -154,7 +154,7 @@ uint32_t galspanic_ms_state::screen_update_backgrounds(screen_device &screen, bi
uint32_t galspanic_ms_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
screen_update_backgrounds(screen, bitmap, cliprect);
// m_kaneko_spr->render_sprites(bitmap,cliprect, screen.priority(), m_spriteram, m_spriteram.bytes());
// m_kaneko_spr->render_sprites(bitmap,cliprect, screen.priority(), m_spriteram, m_spriteram.bytes());
return 0;
}
@ -276,17 +276,17 @@ void galspanic_ms_state::newquiz(machine_config &config)
GFXDECODE(config, m_gfxdecode, "palette", gfx_galspanic_ms);
// does not use original video hardware, will implement different hardware in driver instead
// KANEKO_TMAP(config, m_view2);
// m_view2->set_colbase(0x400);
// m_view2->set_offset(0x5b, 0x8, 256, 224);
// m_view2->set_palette(m_palette);
// m_view2->set_tile_callback(kaneko_view2_tilemap_device::view2_cb_delegate(FUNC(galspanic_ms_state::tile_callback), this));
// KANEKO_TMAP(config, m_view2);
// m_view2->set_colbase(0x400);
// m_view2->set_offset(0x5b, 0x8, 256, 224);
// m_view2->set_palette(m_palette);
// m_view2->set_tile_callback(kaneko_view2_tilemap_device::view2_cb_delegate(FUNC(galspanic_ms_state::tile_callback), this));
// KANEKO_VU002_SPRITE(config, m_kaneko_spr);
// m_kaneko_spr->set_priorities(8,8,8,8); // above all (not verified)
// m_kaneko_spr->set_offsets(0, -0x40);
// m_kaneko_spr->set_palette(m_palette);
// m_kaneko_spr->set_color_base(0x100);
// KANEKO_VU002_SPRITE(config, m_kaneko_spr);
// m_kaneko_spr->set_priorities(8,8,8,8); // above all (not verified)
// m_kaneko_spr->set_offsets(0, -0x40);
// m_kaneko_spr->set_palette(m_palette);
// m_kaneko_spr->set_color_base(0x100);
/* sound hardware */
SPEAKER(config, "mono").front_center();
@ -308,7 +308,7 @@ ROM_START( galpanicms )
ROM_LOAD16_BYTE( "cpu_ic11.bin", 0x000001, 0x40000, CRC(10967497) SHA1(65d1e5554f47a3f7a88fa1354035dff640faac2f) ) // AM27C020
ROM_LOAD16_BYTE( "cpu_ic26.bin", 0x080000, 0x40000, CRC(c7e2135b) SHA1(8cf0c21c9b64e48da458bc29cfb15e1a5189c551) ) // D27C020
ROM_LOAD16_BYTE( "cpu_ic25.bin", 0x080001, 0x40000, CRC(406c2e3e) SHA1(ae229f01bdf0dea72a89c63b60f513a338fd8061) ) // AM27C020
ROM_REGION( 0x200000, "kan_spr", ROMREGION_ERASEFF ) // sprites (seems to be the same as Gals Panic but alt ROM arrangement / decoding)
ROM_LOAD32_BYTE( "5_gp_501.ic1", 0x000003, 0x010000, CRC(55ce19e8) SHA1(6aee3a43c731f017427b9316a6d2a536d7d44d35) ) // all TMS27C512
ROM_LOAD32_BYTE( "5_gp_510.ic10", 0x000002, 0x010000, CRC(95cfabc0) SHA1(36708945b4a7c153e67c5f8d8a8a71e7b6cb0ca3) )
@ -350,7 +350,7 @@ ROM_START( galpanicms )
ROM_LOAD( "snd_p0115_74s288.ic20", 0x0000, 0x20, CRC(50bba48d) SHA1(0d677a67d3c3faca49ea3fe372d2df6802daefb0) )
ROM_REGION( 0x100, "prom", 0 )
ROM_LOAD( "51_502_63s141n.ic10", 0x0000, 0x100, CRC(15085e44) SHA1(646e7100fcb112594023cf02be036bd3d42cc13c) ) // same as Euro League modular bootleg
ROM_LOAD( "51_502_63s141n.ic10", 0x0000, 0x100, CRC(15085e44) SHA1(646e7100fcb112594023cf02be036bd3d42cc13c) ) // same as Euro League modular bootleg
ROM_REGION( 0x117, "gal", 0 )
ROM_LOAD( "a_a-147_gal16v8-20hb1.ic47", 0x0000, 0x117, CRC(39102e72) SHA1(227e25df1555c226e5ae8fc7bcb0f2e2996e24cb) )

6
src/mame/drivers/goldart.cpp
View File

@ -13,8 +13,8 @@
| _________ _________ _________ |
| 74HCT373N||74HC04B1| _________ 74HCT245N |
| ________ _____________ | | _________ |
| __ |74F112N| | ROM U11 | TPC1020BFN-084C 74HCT245N |
| | | _____ |____________| | | _________ |
| __ |74F112N| | ROM U11 | TPC1020BFN-084C 74HCT245N |
| | | _____ |____________| | | _________ |
| |J| |XTAL| _________ _________ |________| 74HCT273E |
| |P| |____| |SN74F32N||74LS257_| _________ |
| |1| ______ _________ _________ _____________ 74HCT273E |
@ -121,7 +121,7 @@ uint32_t goldart_state::screen_update_goldart(screen_device& screen, bitmap_ind1
dstptr_bitmap[x] = data^0xff;
}
}
return 0;
}

6
src/mame/drivers/gticlub.cpp
View File

@ -148,11 +148,11 @@ Notes:
CN11/12 - Power connectors
CN8/9 - 6-pin analog control connectors (to CCD cameras)
CN10 - 4-pin power connector for IR emitters
CN4/5 - Pin jack/network connectors (to cpu board)
CN4/5 - Pin jack/network connectors (to cpu board)
NRPS11 - Idec NRPS11 PC Board circuit protector
LM1881 - Video sync separator (DIP8)
056230 - Konami Custom (QFP80)
056230 - Konami Custom (QFP80)
Bottom Board

2
src/mame/drivers/gts80b.cpp
View File

@ -1754,7 +1754,7 @@ ROM_END
/ they only swapped in Italian texts and maybe changed some game rules.
/ The main CPU board is using a 6502 CPU with all 16 address lines
/ (System 80B only used 14), 2K of static RAM, and a 27256 EPROM.
/
/
/ Obviously they forgot to adjust the ROM checksums of the game
/ because it reports an error when running the memory test.
/ The game works just fine however, and when comparing the game code

14
src/mame/drivers/jazz.cpp
View File

@ -270,14 +270,14 @@ void jazz_state::jazz(machine_config &config)
pc_kbdc_slot_device &kbd(PC_KBDC_SLOT(config, "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL));
kbd.set_pc_kbdc_slot(&kbd_con);
// auxiliary connector
pc_kbdc_device &aux_con(PC_KBDC(config, "aux_con", 0));
aux_con.out_clock_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_clk_w));
aux_con.out_data_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_data_w));
// auxiliary connector
pc_kbdc_device &aux_con(PC_KBDC(config, "aux_con", 0));
aux_con.out_clock_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_clk_w));
aux_con.out_data_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_data_w));
// auxiliary port
pc_kbdc_slot_device &aux(PC_KBDC_SLOT(config, "aux", ps2_mice, STR_HLE_PS2_MOUSE));
aux.set_pc_kbdc_slot(&aux_con);
// auxiliary port
pc_kbdc_slot_device &aux(PC_KBDC_SLOT(config, "aux", ps2_mice, STR_HLE_PS2_MOUSE));
aux.set_pc_kbdc_slot(&aux_con);
// keyboard controller
PS2_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL);

26
src/mame/drivers/mindset.cpp
View File

@ -103,7 +103,7 @@ void mindset_state::machine_reset()
int mindset_state::sys_t0_r()
{
// logerror("SYS: %d read t0 %d (%03x)\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0, m_syscpu->pc());
// logerror("SYS: %d read t0 %d (%03x)\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0, m_syscpu->pc());
return (m_kbd_p2 & 0x40) != 0;
}
@ -115,25 +115,25 @@ int mindset_state::sys_t1_r()
u8 mindset_state::sys_p1_r()
{
// logerror("SYS: read p1\n");
// logerror("SYS: read p1\n");
return 0xff;
}
u8 mindset_state::sys_p2_r()
{
// logerror("SYS: read p2 (%03x)\n", m_syscpu->pc());
// logerror("SYS: read p2 (%03x)\n", m_syscpu->pc());
return 0xff;
}
void mindset_state::sys_p1_w(u8 data)
{
// logerror("SYS: write p1 %02x\n", data);
// logerror("SYS: write p1 %02x\n", data);
}
void mindset_state::sys_p2_w(u8 data)
{
m_maincpu->int3_w(!(data & 0x80));
// logerror("SYS: write p2 %02x\n", data);
// logerror("SYS: write p2 %02x\n", data);
}
void mindset_state::kbd_p1_w(u8 data)
@ -143,8 +143,8 @@ void mindset_state::kbd_p1_w(u8 data)
void mindset_state::kbd_p2_w(u8 data)
{
// if((m_kbd_p2 ^ data) & 0x40)
// logerror("KBD: %d output bit %d\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0);
// if((m_kbd_p2 ^ data) & 0x40)
// logerror("KBD: %d output bit %d\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0);
m_kbd_p2 = data;
}
@ -326,7 +326,7 @@ u32 mindset_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, co
src += 128;
u32 *dest = &bitmap.pix32(8*y+yy, 8*x);
for(u32 xx=0; xx<8; xx++)
*dest++ = pix & (0x80 >> xx) ? m_palette[1] : m_palette[0];
*dest++ = pix & (0x80 >> xx) ? m_palette[1] : m_palette[0];
}
}
}
@ -467,7 +467,7 @@ void mindset_state::blit(u16 packet_seg, u16 packet_adr)
for(u32 y=0; y<height; y++) {
u16 src_cadr = src_adr;
u16 dst_cadr = dst_adr;
u16 cmask = swmask;
u16 nw1 = nw;
u32 srcs = sw(m_gcos->read_word((src_seg << 4) + src_cadr));
@ -505,8 +505,8 @@ void mindset_state::blit(u16 packet_seg, u16 packet_adr)
res = (dst & ~cmask) | (res & cmask);
// logerror("GCO: %04x * %04x = %04x @ %04x\n", src, dst, res, cmask);
// logerror("GCO: %04x * %04x = %04x @ %04x\n", src, dst, res, cmask);
m_gcos->write_word((dst_seg << 4) + dst_cadr, sw(res));
if(mode & 0x100)
src_cadr += 2;
@ -594,9 +594,9 @@ void mindset_state::mindset(machine_config &config)
m_screen->set_screen_update(FUNC(mindset_state::screen_update));
m_screen->scanline().set([this](int scanline) { m_maincpu->int2_w(scanline == 198); });
// This is bad and wrong and I don't yet care
// m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int0_w));
// m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int0_w));
m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int1_w));
// m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int2_w));
// m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int2_w));
}
static INPUT_PORTS_START(mindset)

8
src/mame/drivers/newbrain.cpp
View File

@ -432,11 +432,11 @@ READ8_MEMBER( newbrain_state::cop_g_r )
// Therefore the motors are left permanently on until the above issues can be fixed.
void newbrain_state::tm()
{
// cassette_state tm1 = (!m_cop_g1 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED;
// cassette_state tm2 = (!m_cop_g3 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED;
// cassette_state tm1 = (!m_cop_g1 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED;
// cassette_state tm2 = (!m_cop_g3 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED;
// m_cassette1->change_state(tm1, CASSETTE_MASK_MOTOR);
// m_cassette2->change_state(tm2, CASSETTE_MASK_MOTOR);
// m_cassette1->change_state(tm1, CASSETTE_MASK_MOTOR);
// m_cassette2->change_state(tm2, CASSETTE_MASK_MOTOR);
}
WRITE8_MEMBER( newbrain_state::cop_g_w )

8
src/mame/drivers/nforcepc.cpp
View File

@ -751,10 +751,10 @@ void nforcepc_state::nforcepc(machine_config &config)
PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge
// 10ec:8139 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (behind bridge)
MCPX_IDE(config, ":pci:09.0", 0); // 10de:01bc NVIDIA Corporation nForce IDE
/* subdevice<ide_controller_32_device>(":pci:09.0:ide")->options(nforcepc_ata_devices, "hdd", "cdrom", true);
.interrupt_handler().set(FUNC(nforcepc_state::ide_interrupt_changed));
ide.irq_pri().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq14_w));
ide.irq_sec().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq15_w));*/
/* subdevice<ide_controller_32_device>(":pci:09.0:ide")->options(nforcepc_ata_devices, "hdd", "cdrom", true);
.interrupt_handler().set(FUNC(nforcepc_state::ide_interrupt_changed));
ide.irq_pri().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq14_w));
ide.irq_sec().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq15_w));*/
NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge
SST_49LF020(config, "bios", 0);
}

4
src/mame/drivers/o2.cpp
View File

@ -12,8 +12,8 @@
1f000000 - 1f3fffff MACE
1fc00000 - 1fc7ffff Boot ROM
40000000 - 7fffffff RAM
NOTE: The default Sgi O2 Keyboard (Model No. RT6856T, Part No. 121472-101-B,
NOTE: The default Sgi O2 Keyboard (Model No. RT6856T, Part No. 121472-101-B,
Sgi No. 062-0002-001) has a Zilog "RT101+228A" MCU, which is really a
Zilog Z8615 (a Z8-based PC keyboard controller) with 4K ROM (undumped).
It might have a custom ROM, since it had special marking.

20
src/mame/drivers/qvt190.cpp
View File

@ -2,18 +2,18 @@
// copyright-holders:
/****************************************************************************
Qume QVT-190
Qume QVT-190
Hardware:
- MC68B00P
- 2x MC68B50P
- MC68B45P
- V61C16P55L
- M5M5165P-70L
- ABHGA101006
- button battery, 7-DIL-jumper
Hardware:
- MC68B00P
- 2x MC68B50P
- MC68B45P
- V61C16P55L
- M5M5165P-70L
- ABHGA101006
- button battery, 7-DIL-jumper
Crystal: unreadable (but likely to be 16.6698)
Crystal: unreadable (but likely to be 16.6698)
****************************************************************************/

38
src/mame/drivers/qvt70.cpp
View File

@ -2,25 +2,25 @@
// copyright-holders: Dirk Best
/****************************************************************************
Qume QVT-70 terminal
Qume QVT-70 terminal
Hardware:
- Z80 (Z8040008VSC)
- Z80 DART (Z0847006PSC)
- QUME 303489-01 QFP144
- DTC 801000-02 QFP100
- ROM 128k + 64k
- CXK5864CM-70LL (8k, next to ROMs)
- W242575-70LL (32k) + 5x CXK5864CM-70LL (8k)
- DS1231
- Beeper + Battery
- XTAL unreadable
Hardware:
- Z80 (Z8040008VSC)
- Z80 DART (Z0847006PSC)
- QUME 303489-01 QFP144
- DTC 801000-02 QFP100
- ROM 128k + 64k
- CXK5864CM-70LL (8k, next to ROMs)
- W242575-70LL (32k) + 5x CXK5864CM-70LL (8k)
- DS1231
- Beeper + Battery
- XTAL unreadable
Features:
- 65 hz with 16x16 characters
- 78 hz with 16x13 characters
- 64 background/foreground colors
- 80/132 columns
Features:
- 65 hz with 16x16 characters
- 78 hz with 16x13 characters
- 64 background/foreground colors
- 80/132 columns
****************************************************************************/
@ -62,7 +62,7 @@ void qvt70_state::mem_map(address_map &map)
map(0x0000, 0x7fff).m(m_bank, FUNC(address_map_bank_device::amap8));
map(0x8000, 0x8000).w(FUNC(qvt70_state::bankswitch_w));
map(0xa000, 0xbfff).ram();
// map(0xc000, 0xffff).ram();
// map(0xc000, 0xffff).ram();
}
void qvt70_state::bank_map(address_map &map)
@ -74,7 +74,7 @@ void qvt70_state::bank_map(address_map &map)
map(0x20000, 0x27fff).rom().region("maincpu", 0x20000);
map(0x28000, 0x2ffff).rom().region("maincpu", 0x28000);
map(0x30000, 0x37fff).ram();
// map(0x38000, 0x3ffff)
// map(0x38000, 0x3ffff)
}
void qvt70_state::io_map(address_map &map)

8
src/mame/drivers/subsino2.cpp
View File

@ -2425,7 +2425,7 @@ static INPUT_PORTS_START( saklove )
INPUT_PORTS_END
/***************************************************************************
Treasure City
Treasure City
***************************************************************************/
static INPUT_PORTS_START( treacity )
@ -3629,7 +3629,7 @@ ROM_END
void subsino2_state::init_tbonusal()
{
subsino_decrypt(machine(), sharkpy_bitswaps, sharkpy_xors, 0x8000);
// patch serial protection test (it always enters test mode on boot otherwise)
uint8_t *rom = memregion("maincpu")->base();
rom[0x0ea7] = 0x18;
@ -3875,9 +3875,9 @@ void subsino2_state::init_ptrain()
/***************************************************************************
Treasure City
Treasure City
unknown hardware
unknown hardware
***************************************************************************/
ROM_START( treacity )

16
src/mame/drivers/toki_ms.cpp
View File

@ -2,16 +2,16 @@
// copyright-holders:David Haywood
/*
Toki (Modular System)
Toki (Modular System)
as with most of the 'Modular System' setups, the hardware is heavily modified from the original
and consists of a multi-board stack in a cage, hence different driver.
as with most of the 'Modular System' setups, the hardware is heavily modified from the original
and consists of a multi-board stack in a cage, hence different driver.
TODO: PCB list
TODO: PCB list
NOTES:
PCB lacks raster effect on title screen
NOTES:
PCB lacks raster effect on title screen
*/
@ -147,7 +147,7 @@ ROM_START( tokims )
ROM_LOAD32_BYTE( "5_tk_504.ic6", 0x0c0003, 0x010000, CRC(cec71122) SHA1(283d38f998b1ca4fa080bf9fac797f5ac91dd072) )
ROM_LOAD32_BYTE( "5_tk_508.ic15", 0x0c0002, 0x010000, CRC(1873ae38) SHA1(a1633ab5c417e9851e285a6b322c06e7d2d0bccd) )
ROM_LOAD32_BYTE( "5_tk_512.ic21", 0x0c0001, 0x010000, CRC(0228110f) SHA1(33a29f9f458ca9d0af3c8da8a5b67bab79cecdec) )
ROM_LOAD32_BYTE( "5_tk_516.ic27", 0x0c0000, 0x010000, CRC(f4e29429) SHA1(706050b51e0afbddf6ec5c8f14d3649bb05c8550) )
ROM_LOAD32_BYTE( "5_tk_516.ic27", 0x0c0000, 0x010000, CRC(f4e29429) SHA1(706050b51e0afbddf6ec5c8f14d3649bb05c8550) )
ROM_REGION( 0x040000, "gfx2", 0 )
ROM_LOAD( "8_tk_825.ic9", 0x000000, 0x10000, CRC(6d04def0) SHA1(36f23b0893dfae6cf4c6f4414ff54bb13cfdad41) )
@ -177,7 +177,7 @@ ROM_START( tokims )
ROM_REGION( 0x100, "prom", ROMREGION_ERASEFF )
ROM_LOAD( "1_10110_82s123.ic20", 0x0000, 0x0100, NO_DUMP )
ROM_REGION( 0x100, "protpal", 0 ) // all read protected
ROM_LOAD( "5_5140_palce16v8h-25pc.ic9", 0, 1, NO_DUMP )
ROM_LOAD( "5_5240_palce16v8h-25pc.ic8", 0, 1, NO_DUMP )

54
src/mame/drivers/trkfldch.cpp
View File

@ -124,50 +124,50 @@ void trkfldch_state::video_start()
void trkfldch_state::render_tile_layer(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect, int which)
{
// tilemap 0 = trkfld events, my1stddr background
// tilemap 0 = trkfld events, my1stddr background
// tilemap 1= my1stddr HUD layer
// tilemap 1= my1stddr HUD layer
// first group of tile scroll registers starting at 7820
// none of these written by hammer throw in trkfld or ddr
// uint8_t unk20 = m_tmapscroll_window[0][0x00]; // 0f - 100 meters 00 - javelin, long jump, triple 00 after events, 1e high jump -- hurdle holes -- ddr (assume default of 00?)
// uint8_t unk21 = m_tmapscroll_window[0][0x01]; // 1f - 100 meters 00 - javelin, long jump, triple 00 after events, 00 high jump 00 hurdle holes -- ddr (assume default of 00?)
// uint8_t unk22 = m_tmapscroll_window[0][0x02]; // 1f - 100 meters 1e - javelin, long jump, triple 1e after events, 1e high jump 1e hurdle holes -- ddr (assume default of 1e?)
// uint8_t unk23 = m_tmapscroll_window[0][0x03]; // -- - 100 meters, 1e - javelin, long jump, triple -- after events, -- high jump -- hurdle holes -- ddr (assume default of 1e?)
// uint8_t unk24 = m_tmapscroll_window[0][0x04]; // 00 after events 00 hurdle holes -- ddr (assume default of 00?)
// uint8_t unk25 = m_tmapscroll_window[0][0x05]; // 28 after events 14 hurdle holes -- ddr (assume default of 28?)
// uint8_t unk20 = m_tmapscroll_window[0][0x00]; // 0f - 100 meters 00 - javelin, long jump, triple 00 after events, 1e high jump -- hurdle holes -- ddr (assume default of 00?)
// uint8_t unk21 = m_tmapscroll_window[0][0x01]; // 1f - 100 meters 00 - javelin, long jump, triple 00 after events, 00 high jump 00 hurdle holes -- ddr (assume default of 00?)
// uint8_t unk22 = m_tmapscroll_window[0][0x02]; // 1f - 100 meters 1e - javelin, long jump, triple 1e after events, 1e high jump 1e hurdle holes -- ddr (assume default of 1e?)
// uint8_t unk23 = m_tmapscroll_window[0][0x03]; // -- - 100 meters, 1e - javelin, long jump, triple -- after events, -- high jump -- hurdle holes -- ddr (assume default of 1e?)
// uint8_t unk24 = m_tmapscroll_window[0][0x04]; // 00 after events 00 hurdle holes -- ddr (assume default of 00?)
// uint8_t unk25 = m_tmapscroll_window[0][0x05]; // 28 after events 14 hurdle holes -- ddr (assume default of 28?)
// uint16_t xscroll = (m_tmapscroll_window[0][0x06] << 0) | (m_tmapscroll_window[0][0x07] << 8); // trkfld tilemap 0, race top // why do the split screen races use a different set of scroll registers? maybe global (applies to both layers?) as only one is enabled at this point.
// uint16_t xscroll = (m_tmapscroll_window[0][0x08] << 0) | (m_tmapscroll_window[0][0x09] << 8); // trkfld tilemap 0, race bot (window?)
// uint16_t xscroll = (m_tmapscroll_window[0][0x0a] << 0) | (m_tmapscroll_window[0][0x0b] << 8); // trkfld tilemap 0?, javelin
// uint16_t xscroll = (m_tmapscroll_window[0][0x06] << 0) | (m_tmapscroll_window[0][0x07] << 8); // trkfld tilemap 0, race top // why do the split screen races use a different set of scroll registers? maybe global (applies to both layers?) as only one is enabled at this point.
// uint16_t xscroll = (m_tmapscroll_window[0][0x08] << 0) | (m_tmapscroll_window[0][0x09] << 8); // trkfld tilemap 0, race bot (window?)
// uint16_t xscroll = (m_tmapscroll_window[0][0x0a] << 0) | (m_tmapscroll_window[0][0x0b] << 8); // trkfld tilemap 0?, javelin
// 0c,0d never written
// 0e,0f never written
// uint16_t yscroll = (m_tmapscroll_window[0][0x10] << 0) | (m_tmapscroll_window[0][0x11] << 8); // trkfld tilemap 0, javelin, holes, hammer throw
// uint16_t yscroll = (m_tmapscroll_window[0][0x10] << 0) | (m_tmapscroll_window[0][0x11] << 8); // trkfld tilemap 0, javelin, holes, hammer throw
// second group of tile scroll registers starting at 7832
// 32 never written (assume default of 00? to fit 20-25 pattern?)
// uint8_t windowtop = m_tmapscroll_window[1][0x01]; // 0x00 - on trkfld hurdle the holes (also resets to 0x00 & after event - possible default values) (assume default of 00?)
// uint8_t windowbottom = m_tmapscroll_window[1][0x02]; // 0x1e ^ 0x1e (assume default of 1e?)
// uint8_t windowtop = m_tmapscroll_window[1][0x01]; // 0x00 - on trkfld hurdle the holes (also resets to 0x00 & after event - possible default values) (assume default of 00?)
// uint8_t windowbottom = m_tmapscroll_window[1][0x02]; // 0x1e ^ 0x1e (assume default of 1e?)
// uint8_t unk35 = m_tmapscroll_window[1][0x03]; set to 1e (30) (30*8=240) by trkfld high jump otherwise uninitialized always - something to do with bottom (assume default of 1e?)
// for left / right on tilemap 1
// uint8_t windowleft = m_tmapscroll_window[1][0x04]; //0x29 when unused on my1stddr, 0x25 when used 14 when used on hurdle holes, resets to 00 after event (assume default of 00?)
// uint8_t windowright = m_tmapscroll_window[1][0x05]; //0x29 0x29 28 when used on hurdle holes, resets to 28 after event (assume default of 28?)
// uint8_t windowleft = m_tmapscroll_window[1][0x04]; //0x29 when unused on my1stddr, 0x25 when used 14 when used on hurdle holes, resets to 00 after event (assume default of 00?)
// uint8_t windowright = m_tmapscroll_window[1][0x05]; //0x29 0x29 28 when used on hurdle holes, resets to 28 after event (assume default of 28?)
// 06,076never written
// uint16_t xscroll = (m_tmapscroll_window[1][0x08] << 0) | (m_tmapscroll_window[1][0x09] << 8); // trkfld tilemap 1?, javelin
// uint16_t xscroll = (m_tmapscroll_window[1][0x08] << 0) | (m_tmapscroll_window[1][0x09] << 8); // trkfld tilemap 1?, javelin
// 0a,0b never written
// 0c,0d never written
// 0e,0f never written
// uint16_t yscroll = (m_tmapscroll_window[1][0x10] << 0) | (m_tmapscroll_window[1][0x11] << 8); // my1stddr tilemap 1 scroller, trkfld tilemap 1 holes (both window)
// uint16_t yscroll = (m_tmapscroll_window[1][0x10] << 0) | (m_tmapscroll_window[1][0x11] << 8); // my1stddr tilemap 1 scroller, trkfld tilemap 1 holes (both window)
// printf("window %02x %02x %02x %02x %02x %02x\n", unk20, unk21, unk22, unk23, unk24, unk25);
// printf("xscroll %04x\n", xscroll);
// printf("yscroll %04x\n", yscroll);
// printf("window left/right %02x %02x\n", windowleft, windowright);
// printf("window top/bottom %02x %02x\n", windowtop, windowbottom);
// printf("window %02x %02x %02x %02x %02x %02x\n", unk20, unk21, unk22, unk23, unk24, unk25);
// printf("xscroll %04x\n", xscroll);
// printf("yscroll %04x\n", yscroll);
// printf("window left/right %02x %02x\n", windowleft, windowright);
// printf("window top/bottom %02x %02x\n", windowtop, windowbottom);
int base, gfxbase, gfxregion;
@ -266,7 +266,7 @@ void trkfldch_state::render_text_tile_layer(screen_device& screen, bitmap_ind16&
// regs 11 13 15 17
//
//
// DDR Title = 5000 03 03 05 00
// DDR Ingame Girl 1 = 7000 04 05 06 80
// DDR Music Select = 9000 05 03 04 00
@ -279,7 +279,7 @@ void trkfldch_state::draw_sprites(screen_device& screen, bitmap_ind16& bitmap, c
for (int i = 0x500 - 5; i >= 0; i -= 5)
{
int priority = (m_spriteram[i + 4] & 0x20)>>5;
// list is NOT drawn but instead z sorted, see shadows in trkfldch
if (priority != pri)
continue;
@ -679,11 +679,11 @@ WRITE8_MEMBER(trkfldch_state::modebankregs_w)
logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
break;
case 0x09: // unknowns? another unknown layer?
case 0x09: // unknowns? another unknown layer?
logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
break;
case 0x0a: // unknowns? another unknown layer?
case 0x0a: // unknowns? another unknown layer?
logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
break;
}

2
src/mame/drivers/z9001.cpp
View File

@ -26,7 +26,7 @@ Some other control keys:
ToDo:
- cassette in - interrupt-driven via PIO1
- cassette in - interrupt-driven via PIO1
via astb should cause interrupt but nothing happens.
- proper keyboard - interrupt-driven via PIO2
pressing any key should program ctc/2 to a debounce delay and this then causes

2
src/mame/layout/by35.lay
View File

@ -1198,7 +1198,7 @@
<!-- Sound Board Power On Self Test LED -->
<bezel name="sound_led0" element="LED_Green"><bounds x="618" y="358" width="10" height="10" /></bezel>
<bezel element="Text_Sound_LED"> <bounds x="609" y="372" width="30" height="10" /></bezel>
<bezel element="Text_Sound_LED"> <bounds x="609" y="372" width="30" height="10" /></bezel>
<!-- Misc Solenoids -->
<bezel name="solenoid5" element="Solenoid_Knocker"><bounds x="297" y="457" width="23" height="09" /></bezel>

24
src/mame/machine/deco_irq.cpp
View File

@ -5,20 +5,20 @@
Data East IRQ Controller
TODO:
- Lightgun support is only used by Locked 'n Loaded.
irq is likely an h AND v beam trigger, game counts via raster irqs until
it finds one of these, and where gun trigger x position is the H pixel
latch.
- Lightgun support is only used by Locked 'n Loaded.
irq is likely an h AND v beam trigger, game counts via raster irqs until
it finds one of these, and where gun trigger x position is the H pixel
latch.
Two problems here:
1. (assuming being correct) default calibration looks way offset.
2. We currently give minmax defaults to Y latches to order to avoid
making the game to crash. These limits doesn't seem very sane,
for example lower limit is / 3 the full screen height (248 / 3 = 82).
Being an highly timing dependant behaviour ARM core is probably at
fault here.
1. (assuming being correct) default calibration looks way offset.
2. We currently give minmax defaults to Y latches to order to avoid
making the game to crash. These limits doesn't seem very sane,
for example lower limit is / 3 the full screen height (248 / 3 = 82).
Being an highly timing dependant behaviour ARM core is probably at
fault here.
- Understand if there's an additional switch for player 1 and player 2
wrt lightgun trigger.
wrt lightgun trigger.
***************************************************************************/
#include "emu.h"

16
src/mame/machine/hal2.h
View File

@ -44,14 +44,14 @@ protected:
enum
{
IAR_TYPE = 0xf000,
IAR_TYPE_SHIFT = 12,
IAR_NUM = 0x0f00,
IAR_NUM_SHIFT = 8,
IAR_ACCESS_SEL = 0x0080,
IAR_PARAM = 0x000c,
IAR_PARAM_SHIFT = 2,
IAR_RB_INDEX = 0x0003
IAR_TYPE = 0xf000,
IAR_TYPE_SHIFT = 12,
IAR_NUM = 0x0f00,
IAR_NUM_SHIFT = 8,
IAR_ACCESS_SEL = 0x0080,
IAR_PARAM = 0x000c,
IAR_PARAM_SHIFT = 2,
IAR_RB_INDEX = 0x0003
};
enum

2
src/mame/machine/mega32x.cpp
View File

@ -1422,7 +1422,7 @@ void sega_32x_device::sh2_common_map(address_map &map)
map(0x00004008, 0x00004013).rw(FUNC(sega_32x_device::dreq_common_r), FUNC(sega_32x_device::dreq_common_w));
map(0x00004014, 0x0000401f).nopr();
map(0x00004020, 0x0000402f).rw(FUNC(sega_32x_device::m68k_m_commsram_r), FUNC(sega_32x_device::m68k_m_commsram_w));
map(0x00004030, 0x0000403f).rw(FUNC(sega_32x_device::pwm_r), FUNC(sega_32x_device::pwm_w));

2
src/mame/machine/mega32x.h
View File

@ -80,7 +80,7 @@ public:
DECLARE_WRITE16_MEMBER( slave_401c_w );
DECLARE_WRITE16_MEMBER( master_401e_w );
DECLARE_WRITE16_MEMBER( slave_401e_w );
SH2_DMA_FIFO_DATA_AVAILABLE_CB(_32x_fifo_available_callback);
void render_videobuffer_to_screenbuffer_helper(int scanline);

2
src/mame/machine/nb1413m3.cpp
View File

@ -325,7 +325,7 @@ WRITE8_MEMBER( nb1413m3_device::sndrombank1_alt_w )
m_counter = 0;
}
}
m_nmi_enable = ((data & 0x80) >> 7);
//m_sndrombank1 = (((data & 0xc0) >> 5) | ((data & 0x10) >> 4));
}

10
src/mame/machine/sgi.h
View File

@ -48,11 +48,11 @@ protected:
private:
enum
{
MODE_TO_HOST = (1 << 1),
MODE_SYNC = (1 << 2),
MODE_FILL = (1 << 3),
MODE_DIR = (1 << 4),
MODE_SNOOP = (1 << 5)
MODE_TO_HOST = (1 << 1),
MODE_SYNC = (1 << 2),
MODE_FILL = (1 << 3),
MODE_DIR = (1 << 4),
MODE_SNOOP = (1 << 5)
};
uint32_t dma_translate(uint32_t address);

2
src/mame/machine/xbox_pci.cpp
View File

@ -1104,7 +1104,7 @@ void mcpx_ide_device::map_extra(uint64_t memory_window_start, uint64_t memory_wi
if (~pclass & 1)
io_space->install_device(0x1f0, 0x1f7, *this, &mcpx_ide_device::ide_pri_command);
/*if (~pclass & 4)
io_space->install_device(0x3f0, 0x3f7, *this, &mcpx_ide_device::ide_sec_command);*/
io_space->install_device(0x3f0, 0x3f7, *this, &mcpx_ide_device::ide_sec_command);*/
}
WRITE32_MEMBER(mcpx_ide_device::class_rev_w)

4
src/mame/video/dpb_brushproc.h
View File

@ -5,8 +5,8 @@
dpb_brushproc.h
DPB-7000/1 - Brush Processor Card
TODO:
- Everything
TODO:
- Everything
***************************************************************************/

12
src/mame/video/dpb_storeaddr.cpp
View File

@ -5,11 +5,11 @@
dpb_storeaddr.cpp
DPB-7000/1 - Store Address Card
TODO:
- Code is currently a more or less direct translation of the board
schematic. It is highly inefficient, but accurate. An equally-
accurate, but faster, version can be made once better understanding
of the overall DPB-7000 system is had.
TODO:
- Code is currently a more or less direct translation of the board
schematic. It is highly inefficient, but accurate. An equally-
accurate, but faster, version can be made once better understanding
of the overall DPB-7000 system is had.
***************************************************************************/
@ -1180,7 +1180,7 @@ void dpb7000_storeaddr_card_device::ipen_w(int state)
const bool old_sel = m_ipsel;
m_ipsel = ((!m_crc || m_selvideo) != m_ipsel);
if (old_sel != m_ipsel)
m_ipsel_out(m_ipsel);
m_ipsel_out(m_ipsel);
}
}

6
src/mame/video/segas32.cpp
View File

@ -143,9 +143,9 @@
---- ---- ---- --0- : 1= NBG0 layer disable
---- ---- ---- ---t : 1= Text layer disable
reference
- arabfgt : https://www.youtube.com/watch?v=98QivDAGz3I
- darkedge : https://www.youtube.com/watch?v=riO1yb95z7s
reference
- arabfgt : https://www.youtube.com/watch?v=98QivDAGz3I
- darkedge : https://www.youtube.com/watch?v=riO1yb95z7s
*/
#include "emu.h"

2
src/mame/video/wgp.cpp
View File

@ -8,7 +8,7 @@
// reference : https://www.youtube.com/watch?v=Sb3I3eQQvcU
/*******************************************************************/
template<unsigned Offset>
template<unsigned Offset>
TILE_GET_INFO_MEMBER(wgp_state::get_piv_tile_info)
{
const u16 tilenum = m_pivram[tile_index + Offset]; /* 3 blocks of $2000 */